[U-Boot] [PATCH] armv8: layerscape: Enabled I-cache for SPL boot

Enable I-cache for SPL boot to boost performance. Earlier MMU was enabled only for LS2080A and has since been dropped by commit f539c8a4a7a5 ("armv8: ls2080a: Drop early MMU for SPL build").
Signed-off-by: York Sun york.sun@nxp.com --- arch/arm/cpu/armv8/fsl-layerscape/spl.c | 1 + 1 file changed, 1 insertion(+)
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/spl.c b/arch/arm/cpu/armv8/fsl-layerscape/spl.c index dba4b40..f1d6fd6 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/spl.c +++ b/arch/arm/cpu/armv8/fsl-layerscape/spl.c @@ -52,6 +52,7 @@ void spl_board_init(void)
void board_init_f(ulong dummy) { + icache_enable(); /* Clear global data */ memset((void *)gd, 0, sizeof(gd_t)); board_early_init_f();

On 06/26/2018 02:26 PM, York Sun wrote:
Enable I-cache for SPL boot to boost performance. Earlier MMU was enabled only for LS2080A and has since been dropped by commit f539c8a4a7a5 ("armv8: ls2080a: Drop early MMU for SPL build").
Signed-off-by: York Sun york.sun@nxp.com
Applied to fsl-qoriq, awaiting upstream.
York
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York Sun