[U-Boot] [PATCH] Kirkwood: rd6281a: Add kwbimage build support
This patch adds kwbimage configuration file (used by mkimage utility) to support u-boot.kwb target on rd6281a platform.
To create Kirkwood boot image to be flashed on NAND, additional parameter u-boot.kwb need to be passed during make.
Signed-off-by: Prafulla Wadaskar prafulla@marvell.com --- board/Marvell/rd6281a/config.mk | 3 + board/Marvell/rd6281a/kwbimage.cfg | 167 ++++++++++++++++++++++++++++++++++++ 2 files changed, 170 insertions(+), 0 deletions(-) create mode 100644 board/Marvell/rd6281a/kwbimage.cfg
diff --git a/board/Marvell/rd6281a/config.mk b/board/Marvell/rd6281a/config.mk index a4ea769..2bd9f79 100644 --- a/board/Marvell/rd6281a/config.mk +++ b/board/Marvell/rd6281a/config.mk @@ -23,3 +23,6 @@ #
TEXT_BASE = 0x00600000 + +# Kirkwood Boot Image configuration file +KWD_CONFIG = $(SRCTREE)/board/$(BOARDDIR)/kwbimage.cfg diff --git a/board/Marvell/rd6281a/kwbimage.cfg b/board/Marvell/rd6281a/kwbimage.cfg new file mode 100644 index 0000000..0d12dd9 --- /dev/null +++ b/board/Marvell/rd6281a/kwbimage.cfg @@ -0,0 +1,167 @@ +# +# (C) Copyright 2009 +# Marvell Semiconductor <www.marvell.com> +# Written-by: Prafulla Wadaskar prafulla@marvell.com +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, +# MA 02110-1301 USA +# +# Refer docs/README.kwimage for more details about how-to configure +# and create kirkwood boot image +# + +# Boot Media configurations +BOOT_FROM nand +NAND_ECC_MODE default +NAND_PAGE_SIZE 0x0800 + +# SOC registers configuration using bootrom header extension +# Maximum KWBIMAGE_MAX_CONFIG configurations allowed + +# Configure RGMII-0 interface pad voltage to 1.8V +DATA 0xFFD100e0 0x1b1b1b9b + +#Dram initalization for SINGLE x16 CL=5 @ 400MHz +DATA 0xFFD01400 0x43000c30 # DDR Configuration register +# bit13-0: 0xc30 (3120 DDR2 clks refresh rate) +# bit23-14: zero +# bit24: 1= enable exit self refresh mode on DDR access +# bit25: 1 required +# bit29-26: zero +# bit31-30: 01 + +DATA 0xFFD01404 0x37543000 # DDR Controller Control Low +# bit 4: 0=addr/cmd in smame cycle +# bit 5: 0=clk is driven during self refresh, we don't care for APX +# bit 6: 0=use recommended falling edge of clk for addr/cmd +# bit14: 0=input buffer always powered up +# bit18: 1=cpu lock transaction enabled +# bit23-20: 5=recommended value for CL=5 and STARTBURST_DEL disabled bit31=0 +# bit27-24: 7= CL+2, STARTBURST sample stages, for freqs 400MHz, unbuffered DIMM +# bit30-28: 3 required +# bit31: 0=no additional STARTBURST delay + +DATA 0xFFD01408 0x22125451 # DDR Timing (Low) (active cycles value +1) +# bit3-0: TRAS lsbs +# bit7-4: TRCD +# bit11- 8: TRP +# bit15-12: TWR +# bit19-16: TWTR +# bit20: TRAS msb +# bit23-21: 0x0 +# bit27-24: TRRD +# bit31-28: TRTP + +DATA 0xFFD0140C 0x00000a33 # DDR Timing (High) +# bit6-0: TRFC +# bit8-7: TR2R +# bit10-9: TR2W +# bit12-11: TW2W +# bit31-13: zero required + +DATA 0xFFD01410 0x00000099 # DDR Address Control +# bit1-0: 00, Cs0width=x8 +# bit3-2: 11, Cs0size=1Gb +# bit5-4: 00, Cs1width=x8 +# bit7-6: 11, Cs1size=1Gb +# bit9-8: 00, Cs2width=nonexistent +# bit11-10: 00, Cs2size =nonexistent +# bit13-12: 00, Cs3width=nonexistent +# bit15-14: 00, Cs3size =nonexistent +# bit16: 0, Cs0AddrSel +# bit17: 0, Cs1AddrSel +# bit18: 0, Cs2AddrSel +# bit19: 0, Cs3AddrSel +# bit31-20: 0 required + +DATA 0xFFD01414 0x00000000 # DDR Open Pages Control +# bit0: 0, OpenPage enabled +# bit31-1: 0 required + +DATA 0xFFD01418 0x00000000 # DDR Operation +# bit3-0: 0x0, DDR cmd +# bit31-4: 0 required + +DATA 0xFFD0141C 0x00000C52 # DDR Mode +# bit2-0: 2, BurstLen=2 required +# bit3: 0, BurstType=0 required +# bit6-4: 4, CL=5 +# bit7: 0, TestMode=0 normal +# bit8: 0, DLL reset=0 normal +# bit11-9: 6, auto-precharge write recovery ???????????? +# bit12: 0, PD must be zero +# bit31-13: 0 required + +DATA 0xFFD01420 0x00000004 # DDR Extended Mode +# bit0: 0, DDR DLL enabled +# bit1: 0, DDR drive strenght normal +# bit2: 1, DDR ODT control lsd (disabled) +# bit5-3: 000, required +# bit6: 0, DDR ODT control msb, (disabled) +# bit9-7: 000, required +# bit10: 0, differential DQS enabled +# bit11: 0, required +# bit12: 0, DDR output buffer enabled +# bit31-13: 0 required + +DATA 0xFFD01424 0x0000F17F # DDR Controller Control High +# bit2-0: 111, required +# bit3 : 1 , MBUS Burst Chop disabled +# bit6-4: 111, required +# bit7 : 0 +# bit8 : 1 , add writepath sample stage, must be 1 for DDR freq >= 300MHz +# bit9 : 0 , no half clock cycle addition to dataout +# bit10 : 0 , 1/4 clock cycle skew enabled for addr/ctl signals +# bit11 : 0 , 1/4 clock cycle skew disabled for write mesh +# bit15-12: 1111 required +# bit31-16: 0 required + +DATA 0xFFD01428 0x00085520 # DDR2 ODT Read Timing (default values) +DATA 0xFFD0147C 0x00008552 # DDR2 ODT Write Timing (default values) + +DATA 0xFFD01500 0x00000000 # CS[0]n Base address to 0x0 +DATA 0xFFD01504 0x0FFFFFF1 # CS[0]n Size +# bit0: 1, Window enabled +# bit1: 0, Write Protect disabled +# bit3-2: 00, CS0 hit selected +# bit23-4: ones, required +# bit31-24: 0x0F, Size (i.e. 256MB) + +DATA 0xFFD01508 0x10000000 # CS[1]n Base address to 256Mb +DATA 0xFFD0150C 0x0FFFFFF5 # CS[1]n Size 256Mb Window enabled for CS1 + +DATA 0xFFD01514 0x00000000 # CS[2]n Size, window disabled +DATA 0xFFD0151C 0x00000000 # CS[3]n Size, window disabled + +DATA 0xFFD01494 0x00120012 # DDR ODT Control (Low) +# bit3-0: 2, ODT0Rd, MODT[0] asserted during read from DRAM CS1 +# bit7-4: 1, ODT0Rd, MODT[0] asserted during read from DRAM CS0 +# bit19-16:2, ODT0Wr, MODT[0] asserted during write to DRAM CS1 +# bit23-20:1, ODT0Wr, MODT[0] asserted during write to DRAM CS0 + +DATA 0xFFD01498 0x00000000 # DDR ODT Control (High) +# bit1-0: 00, ODT0 controlled by ODT Control (low) register above +# bit3-2: 01, ODT1 active NEVER! +# bit31-4: zero, required + +DATA 0xFFD0149C 0x0000E40F # CPU ODT Control +DATA 0xFFD01480 0x00000001 # DDR Initialization Control +#bit0=1, enable DDR init upon this register write + +# End of Header extension +DATA 0x0 0x0
following build warning was observed
mv88e61xx.c: In function ‘mv88e61xx_busychk’: mv88e61xx.c:208: warning: dereferencing type-punned pointer will break strict-aliasing rules
This patch fixes the same Patch tested for rd6281a board build
Signed-off-by: Prafulla Wadaskar prafulla@marvell.com --- drivers/net/phy/mv88e61xx.c | 4 ++-- 1 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/net/phy/mv88e61xx.c b/drivers/net/phy/mv88e61xx.c index 3754e8b..2d1de02 100644 --- a/drivers/net/phy/mv88e61xx.c +++ b/drivers/net/phy/mv88e61xx.c @@ -201,11 +201,11 @@ static void mv88e61xx_port_vlan_config(struct mv88e61xx_config *swconfig, */ static int mv88e61xx_busychk(char *name) { - u32 reg = 0; + u16 reg = 0; u32 timeout = MV88E61XX_PHY_TIMEOUT; do { RD_PHY(name, MV88E61XX_GLB2REG_DEVADR, - MV88E61XX_PHY_CMD, (u16 *) & reg); + MV88E61XX_PHY_CMD, ®); if (timeout-- == 0) { printf("SMI busy timeout\n"); return -1;
This patch adds kwbimage configuration file (used by mkimage utility) to support u-boot.kwb target on mv88f6281gtw_ge board.
To create Kirkwood boot image to be flashed on SPI Flash, additional parameter u-boot.kwb need to be passed during make.
Signed-off-by: Prafulla Wadaskar prafulla@marvell.com --- board/Marvell/mv88f6281gtw_ge/config.mk | 3 + board/Marvell/mv88f6281gtw_ge/kwbimage.cfg | 165 ++++++++++++++++++++++++++++ 2 files changed, 168 insertions(+), 0 deletions(-) create mode 100644 board/Marvell/mv88f6281gtw_ge/kwbimage.cfg
diff --git a/board/Marvell/mv88f6281gtw_ge/config.mk b/board/Marvell/mv88f6281gtw_ge/config.mk index a4ea769..2bd9f79 100644 --- a/board/Marvell/mv88f6281gtw_ge/config.mk +++ b/board/Marvell/mv88f6281gtw_ge/config.mk @@ -23,3 +23,6 @@ #
TEXT_BASE = 0x00600000 + +# Kirkwood Boot Image configuration file +KWD_CONFIG = $(SRCTREE)/board/$(BOARDDIR)/kwbimage.cfg diff --git a/board/Marvell/mv88f6281gtw_ge/kwbimage.cfg b/board/Marvell/mv88f6281gtw_ge/kwbimage.cfg new file mode 100644 index 0000000..ec2513f --- /dev/null +++ b/board/Marvell/mv88f6281gtw_ge/kwbimage.cfg @@ -0,0 +1,165 @@ +# +# (C) Copyright 2009 +# Marvell Semiconductor <www.marvell.com> +# Written-by: Prafulla Wadaskar prafulla@marvell.com +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, +# MA 02110-1301 USA +# +# Refer docs/README.kwimage for more details about how-to configure +# and create kirkwood boot image +# + +# Boot Media configurations +BOOT_FROM spi # Boot from SPI flash + +# SOC registers configuration using bootrom header extension +# Maximum KWBIMAGE_MAX_CONFIG configurations allowed + +# Configure RGMII-0 interface pad voltage to 1.8V +DATA 0xFFD100e0 0x1b1b1b9b + +#Dram initalization for SINGLE x16 CL=5 @ 400MHz +DATA 0xFFD01400 0x43000a00 # DDR Configuration register +# bit13-0: 0xa00 (2560 DDR2 clks refresh rate) +# bit23-14: zero +# bit24: 1= enable exit self refresh mode on DDR access +# bit25: 1 required +# bit29-26: zero +# bit31-30: 01 + +DATA 0xFFD01404 0x38543000 # DDR Controller Control Low +# bit 4: 0=addr/cmd in smame cycle +# bit 5: 0=clk is driven during self refresh, we don't care for APX +# bit 6: 0=use recommended falling edge of clk for addr/cmd +# bit14: 0=input buffer always powered up +# bit18: 1=cpu lock transaction enabled +# bit23-20: 5=recommended value for CL=5 and STARTBURST_DEL disabled bit31=0 +# bit27-24: 8= CL+3, STARTBURST sample stages, for freqs 400MHz, unbuffered DIMM +# bit30-28: 3 required +# bit31: 0=no additional STARTBURST delay + +DATA 0xFFD01408 0x2202433D # DDR Timing (Low) (active cycles value +1) +# bit3-0: TRAS lsbs +# bit7-4: TRCD +# bit11- 8: TRP +# bit15-12: TWR +# bit19-16: TWTR +# bit20: TRAS msb +# bit23-21: 0x0 +# bit27-24: TRRD +# bit31-28: TRTP + +DATA 0xFFD0140C 0x0000002A # DDR Timing (High) +# bit6-0: TRFC +# bit8-7: TR2R +# bit10-9: TR2W +# bit12-11: TW2W +# bit31-13: zero required + +DATA 0xFFD01410 0x0000000D # DDR Address Control +# bit1-0: 01, Cs0width=x16 +# bit3-2: 11, Cs0size=1Gb +# bit5-4: 00, Cs2width=nonexistent +# bit7-6: 00, Cs1size =nonexistent +# bit9-8: 00, Cs2width=nonexistent +# bit11-10: 00, Cs2size =nonexistent +# bit13-12: 00, Cs3width=nonexistent +# bit15-14: 00, Cs3size =nonexistent +# bit16: 0, Cs0AddrSel +# bit17: 0, Cs1AddrSel +# bit18: 0, Cs2AddrSel +# bit19: 0, Cs3AddrSel +# bit31-20: 0 required + +DATA 0xFFD01414 0x00000000 # DDR Open Pages Control +# bit0: 0, OpenPage enabled +# bit31-1: 0 required + +DATA 0xFFD01418 0x00000000 # DDR Operation +# bit3-0: 0x0, DDR cmd +# bit31-4: 0 required + +DATA 0xFFD0141C 0x00000C52 # DDR Mode +# bit2-0: 2, BurstLen=2 required +# bit3: 0, BurstType=0 required +# bit6-4: 4, CL=5 +# bit7: 0, TestMode=0 normal +# bit8: 0, DLL reset=0 normal +# bit11-9: 6, auto-precharge write recovery ???????????? +# bit12: 0, PD must be zero +# bit31-13: 0 required + +DATA 0xFFD01420 0x00000046 # DDR Extended Mode +# bit0: 0, DDR DLL enabled +# bit1: 1, DDR drive strenght reduced +# bit2: 1, DDR ODT control lsd enabled +# bit5-3: 000, required +# bit6: 1, DDR ODT control msb, enabled +# bit9-7: 000, required +# bit10: 0, differential DQS enabled +# bit11: 0, required +# bit12: 0, DDR output buffer enabled +# bit31-13: 0 required + +DATA 0xFFD01424 0x0000F1FF # DDR Controller Control High +# bit2-0: 111, required +# bit3 : 1 , MBUS Burst Chop disabled +# bit6-4: 111, required +# bit7 : 1 , D2P Latency enabled +# bit8 : 1 , add writepath sample stage, must be 1 for DDR freq >= 300MHz +# bit9 : 0 , no half clock cycle addition to dataout +# bit10 : 0 , 1/4 clock cycle skew enabled for addr/ctl signals +# bit11 : 0 , 1/4 clock cycle skew disabled for write mesh +# bit15-12: 1111 required +# bit31-16: 0 required + +DATA 0xFFD01428 0x00085520 # DDR2 ODT Read Timing (default values) +DATA 0xFFD0147C 0x00008552 # DDR2 ODT Write Timing (default values) + +DATA 0xFFD01500 0x00000000 # CS[0]n Base address to 0x0 +DATA 0xFFD01504 0x07FFFFF1 # CS[0]n Size +# bit0: 1, Window enabled +# bit1: 0, Write Protect disabled +# bit3-2: 00, CS0 hit selected +# bit23-4: ones, required +# bit31-24: 0x07, Size (i.e. 128MB) + +DATA 0xFFD0150C 0x00000000 # CS[1]n Size, window disabled +DATA 0xFFD01514 0x00000000 # CS[2]n Size, window disabled +DATA 0xFFD0151C 0x00000000 # CS[3]n Size, window disabled + +DATA 0xFFD01494 0x00010001 # DDR ODT Control (Low) +# bit3-0: 1, ODT0Rd, MODT[0] asserted during read from DRAM CS0 +# bit19-16:1, ODT0Wr, MODT[0] asserted during write to DRAM CS0 + +DATA 0xFFD01498 0x00000000 # DDR ODT Control (High) +# bit1-0: 00, ODT0 controlled by ODT Control (low) register above +# bit3-2: 01, ODT1 active NEVER! +# bit31-4: zero, required + +DATA 0xFFD0149C 0x0000E811 # CPU ODT Control +# bit3-0: 1, ODT0Rd, Internal ODT asserted during read from DRAM bank0 +# bit7-4: 1, ODT0Wr, Internal ODT asserted during write to DRAM bank0 +# bit11-10:1, DQ_ODTSel. ODT select turned on + +DATA 0xFFD01480 0x00000001 # DDR Initialization Control +#bit0=1, enable DDR init upon this register write + +# End of Header extension +DATA 0x0 0x0
-----Original Message----- From: Prafulla Wadaskar [mailto:prafulla@marvell.com] Sent: Monday, September 21, 2009 8:28 PM To: u-boot@lists.denx.de Cc: Prabhanjan Sarnaik; Ashish Karkare; Prafulla Wadaskar Subject: [PATCH] Kirkwood: mv88f6281gtw_ge: Add kwbimage build support
This patch adds kwbimage configuration file (used by mkimage utility) to support u-boot.kwb target on mv88f6281gtw_ge board.
To create Kirkwood boot image to be flashed on SPI Flash, additional parameter u-boot.kwb need to be passed during make.
Signed-off-by: Prafulla Wadaskar prafulla@marvell.com
board/Marvell/mv88f6281gtw_ge/config.mk | 3 + board/Marvell/mv88f6281gtw_ge/kwbimage.cfg | 165 ++++++++++++++++++++++++++++ 2 files changed, 168 insertions(+), 0 deletions(-) create mode 100644 board/Marvell/mv88f6281gtw_ge/kwbimage.cfg
Applied to u-boot-marvell master branch
Regards.. Prafulla . .
Dear Prafulla Wadaskar,
In message 1253545099-29437-2-git-send-email-prafulla@marvell.com you wrote:
following build warning was observed
mv88e61xx.c: In function âmv88e61xx_busychkâ:
Please don't use non-text characters in the commit messages.
(Ben, please edit when applying).
mv88e61xx.c:208: warning: dereferencing type-punned pointer will break strict-aliasing rules
This patch fixes the same Patch tested for rd6281a board build
Signed-off-by: Prafulla Wadaskar prafulla@marvell.com
drivers/net/phy/mv88e61xx.c | 4 ++-- 1 files changed, 2 insertions(+), 2 deletions(-)
Except for that:
Acked-by: Wolfgang Denk wd@denx.de
Best regards,
Wolfgang Denk
-----Original Message----- From: Wolfgang Denk [mailto:wd@denx.de] Sent: Thursday, September 24, 2009 3:38 AM To: Prafulla Wadaskar Cc: u-boot@lists.denx.de; Ashish Karkare; Prabhanjan Sarnaik; Ben Warren Subject: Re: [U-Boot] [PATCH] net: phy: mv88e61xx.c : fixed build warning
Dear Prafulla Wadaskar,
In message 1253545099-29437-2-git-send-email-prafulla@marvell.com you wrote:
following build warning was observed
mv88e61xx.c: In function ‘mv88e61xx_busychk’:
Actually I used "'" here those are converted to these non-text chars by git-send-mail Anybody any Idea, how I should enable use of such chars if needed?
Regards.. Prafulla . .
Please don't use non-text characters in the commit messages.
(Ben, please edit when applying).
mv88e61xx.c:208: warning: dereferencing type-punned pointer
will break strict-aliasing rules
This patch fixes the same Patch tested for rd6281a board build
Signed-off-by: Prafulla Wadaskar prafulla@marvell.com
drivers/net/phy/mv88e61xx.c | 4 ++-- 1 files changed, 2 insertions(+), 2 deletions(-)
Except for that:
Acked-by: Wolfgang Denk wd@denx.de
Best regards,
Wolfgang Denk
-- DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd@denx.de Unser Kopf ist rund, damit das Denken die Richtung wechseln kann. -- Francis Picabia
Hi Prafulla,
Prafulla Wadaskar wrote:
following build warning was observed
mv88e61xx.c: In function ‘mv88e61xx_busychk’: mv88e61xx.c:208: warning: dereferencing type-punned pointer will break strict-aliasing rules
This patch fixes the same Patch tested for rd6281a board build
Signed-off-by: Prafulla Wadaskar prafulla@marvell.com
drivers/net/phy/mv88e61xx.c | 4 ++-- 1 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/net/phy/mv88e61xx.c b/drivers/net/phy/mv88e61xx.c index 3754e8b..2d1de02 100644 --- a/drivers/net/phy/mv88e61xx.c +++ b/drivers/net/phy/mv88e61xx.c @@ -201,11 +201,11 @@ static void mv88e61xx_port_vlan_config(struct mv88e61xx_config *swconfig, */ static int mv88e61xx_busychk(char *name) {
- u32 reg = 0;
- u16 reg = 0; u32 timeout = MV88E61XX_PHY_TIMEOUT; do { RD_PHY(name, MV88E61XX_GLB2REG_DEVADR,
MV88E61XX_PHY_CMD, (u16 *) & reg);
MV88E61XX_PHY_CMD, ®);
Applied to net repo.
thanks, Ben
-----Original Message----- From: Prafulla Wadaskar [mailto:prafulla@marvell.com] Sent: Monday, September 21, 2009 8:28 PM To: u-boot@lists.denx.de Cc: Prabhanjan Sarnaik; Ashish Karkare; Prafulla Wadaskar Subject: [PATCH] Kirkwood: rd6281a: Add kwbimage build support
This patch adds kwbimage configuration file (used by mkimage utility) to support u-boot.kwb target on rd6281a platform.
To create Kirkwood boot image to be flashed on NAND, additional parameter u-boot.kwb need to be passed during make.
Signed-off-by: Prafulla Wadaskar prafulla@marvell.com
board/Marvell/rd6281a/config.mk | 3 + board/Marvell/rd6281a/kwbimage.cfg | 167 ++++++++++++++++++++++++++++++++++++ 2 files changed, 170 insertions(+), 0 deletions(-) create mode 100644 board/Marvell/rd6281a/kwbimage.cfg
Applied to u-boot-marvell master branch
Regards.. Prafulla . .
participants (3)
-
Ben Warren -
Prafulla Wadaskar -
Wolfgang Denk