[PATCH 0/7] rockchip: veyron: Synchronize changes for veyron boards
There have been bug fixes and new features for some veyron-based boards which are applicable to others because they share most of the underlying hardware. This series tries to synchronize changes across all veyron boards.
I couldn't personally test these myself as I don't have any of the supported boards, and couldn't spent time to port the veyron-mighty I have yet. Sending so others can test and for the first two patches I think should go in v2023.07, but take with a grain of salt.
Alper Nebi Yasak (7): rockchip: veyron: Enable RESET driver rockchip: veyron: Enable building SPI ROM images rockchip: veyron: Unify u-boot.dtsi bootph-all fragments rockchip: veyron: Add serial, logging, silent console support rockchip: veyron: Use TrueType fonts rockchip: chromebook_jerry: Re-enable MAX98090 codec driver rockchip: chromebook_speedy: Enable sound
arch/arm/dts/rk3288-veyron-speedy-u-boot.dtsi | 30 +++++++++---------- arch/arm/dts/rk3288-veyron-u-boot.dtsi | 4 +++ arch/arm/mach-rockchip/rk3288/Kconfig | 6 ++++ configs/chromebit_mickey_defconfig | 6 ++++ configs/chromebook_jerry_defconfig | 1 + configs/chromebook_minnie_defconfig | 6 +++- configs/chromebook_speedy_defconfig | 7 +++++ 7 files changed, 43 insertions(+), 17 deletions(-)
Commit 70e351bdfeee ("rockchip: jerry: Enable RESET driver") enables DM_RESET for chromebook_jerry to fix its display as required by changes to the Rockchip video drivers. Enable it for other veyron boards as well.
Fixes: cd529f7ad62 ("rockchip: video: edp: Add missing reset support") Fixes: 9749d2ea29e ("rockchip: video: vop: Add reset support") Signed-off-by: Alper Nebi Yasak alpernebiyasak@gmail.com ---
configs/chromebit_mickey_defconfig | 1 + configs/chromebook_minnie_defconfig | 1 + configs/chromebook_speedy_defconfig | 1 + 3 files changed, 3 insertions(+)
diff --git a/configs/chromebit_mickey_defconfig b/configs/chromebit_mickey_defconfig index d4302353c5df..a7c6213a9892 100644 --- a/configs/chromebit_mickey_defconfig +++ b/configs/chromebit_mickey_defconfig @@ -10,6 +10,7 @@ CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x100000 CONFIG_SF_DEFAULT_SPEED=20000000 CONFIG_DEFAULT_DEVICE_TREE="rk3288-veyron-mickey" CONFIG_SPL_TEXT_BASE=0xff704000 +CONFIG_DM_RESET=y CONFIG_SYS_MONITOR_LEN=614400 CONFIG_ROCKCHIP_RK3288=y # CONFIG_SPL_MMC is not set diff --git a/configs/chromebook_minnie_defconfig b/configs/chromebook_minnie_defconfig index 73ab2f62af5e..8a4e1858c8bd 100644 --- a/configs/chromebook_minnie_defconfig +++ b/configs/chromebook_minnie_defconfig @@ -10,6 +10,7 @@ CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x100000 CONFIG_SF_DEFAULT_SPEED=20000000 CONFIG_DEFAULT_DEVICE_TREE="rk3288-veyron-minnie" CONFIG_SPL_TEXT_BASE=0xff704000 +CONFIG_DM_RESET=y CONFIG_SYS_MONITOR_LEN=614400 CONFIG_ROCKCHIP_RK3288=y # CONFIG_SPL_MMC is not set diff --git a/configs/chromebook_speedy_defconfig b/configs/chromebook_speedy_defconfig index 06437aae18d6..45c22f5b103a 100644 --- a/configs/chromebook_speedy_defconfig +++ b/configs/chromebook_speedy_defconfig @@ -10,6 +10,7 @@ CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x100000 CONFIG_SF_DEFAULT_SPEED=20000000 CONFIG_DEFAULT_DEVICE_TREE="rk3288-veyron-speedy" CONFIG_SPL_TEXT_BASE=0xff704000 +CONFIG_DM_RESET=y CONFIG_SYS_MONITOR_LEN=614400 CONFIG_ROCKCHIP_RK3288=y # CONFIG_SPL_MMC is not set
On Fri, 7 Jul 2023 at 13:17, Alper Nebi Yasak alpernebiyasak@gmail.com wrote:
Commit 70e351bdfeee ("rockchip: jerry: Enable RESET driver") enables DM_RESET for chromebook_jerry to fix its display as required by changes to the Rockchip video drivers. Enable it for other veyron boards as well.
Fixes: cd529f7ad62 ("rockchip: video: edp: Add missing reset support") Fixes: 9749d2ea29e ("rockchip: video: vop: Add reset support") Signed-off-by: Alper Nebi Yasak alpernebiyasak@gmail.com
configs/chromebit_mickey_defconfig | 1 + configs/chromebook_minnie_defconfig | 1 + configs/chromebook_speedy_defconfig | 1 + 3 files changed, 3 insertions(+)
Reviewed-by: Simon Glass sjg@chromium.org Tested-by: Simon Glass sjg@chromium.org # chromebook_jerry
On 2023/7/8 03:16, Alper Nebi Yasak wrote:
Commit 70e351bdfeee ("rockchip: jerry: Enable RESET driver") enables DM_RESET for chromebook_jerry to fix its display as required by changes to the Rockchip video drivers. Enable it for other veyron boards as well.
Fixes: cd529f7ad62 ("rockchip: video: edp: Add missing reset support") Fixes: 9749d2ea29e ("rockchip: video: vop: Add reset support") Signed-off-by: Alper Nebi Yasak alpernebiyasak@gmail.com
Reviewed-by: Kever Yang kever.yang@rock-chips.com
Thanks, - Kever
configs/chromebit_mickey_defconfig | 1 + configs/chromebook_minnie_defconfig | 1 + configs/chromebook_speedy_defconfig | 1 + 3 files changed, 3 insertions(+)
diff --git a/configs/chromebit_mickey_defconfig b/configs/chromebit_mickey_defconfig index d4302353c5df..a7c6213a9892 100644 --- a/configs/chromebit_mickey_defconfig +++ b/configs/chromebit_mickey_defconfig @@ -10,6 +10,7 @@ CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x100000 CONFIG_SF_DEFAULT_SPEED=20000000 CONFIG_DEFAULT_DEVICE_TREE="rk3288-veyron-mickey" CONFIG_SPL_TEXT_BASE=0xff704000 +CONFIG_DM_RESET=y CONFIG_SYS_MONITOR_LEN=614400 CONFIG_ROCKCHIP_RK3288=y # CONFIG_SPL_MMC is not set diff --git a/configs/chromebook_minnie_defconfig b/configs/chromebook_minnie_defconfig index 73ab2f62af5e..8a4e1858c8bd 100644 --- a/configs/chromebook_minnie_defconfig +++ b/configs/chromebook_minnie_defconfig @@ -10,6 +10,7 @@ CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x100000 CONFIG_SF_DEFAULT_SPEED=20000000 CONFIG_DEFAULT_DEVICE_TREE="rk3288-veyron-minnie" CONFIG_SPL_TEXT_BASE=0xff704000 +CONFIG_DM_RESET=y CONFIG_SYS_MONITOR_LEN=614400 CONFIG_ROCKCHIP_RK3288=y # CONFIG_SPL_MMC is not set diff --git a/configs/chromebook_speedy_defconfig b/configs/chromebook_speedy_defconfig index 06437aae18d6..45c22f5b103a 100644 --- a/configs/chromebook_speedy_defconfig +++ b/configs/chromebook_speedy_defconfig @@ -10,6 +10,7 @@ CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x100000 CONFIG_SF_DEFAULT_SPEED=20000000 CONFIG_DEFAULT_DEVICE_TREE="rk3288-veyron-speedy" CONFIG_SPL_TEXT_BASE=0xff704000 +CONFIG_DM_RESET=y CONFIG_SYS_MONITOR_LEN=614400 CONFIG_ROCKCHIP_RK3288=y # CONFIG_SPL_MMC is not set
Commit 9b312e26fc77 ("rockchip: Enable building a SPI ROM image on jerry") produces a u-boot.rom file for chromebook_jerry, intended to be written to SPI flash. Build this file for other veyron boards as well, especially because they are already configured only to boot from SPI.
Signed-off-by: Alper Nebi Yasak alpernebiyasak@gmail.com ---
arch/arm/mach-rockchip/rk3288/Kconfig | 6 ++++++ 1 file changed, 6 insertions(+)
diff --git a/arch/arm/mach-rockchip/rk3288/Kconfig b/arch/arm/mach-rockchip/rk3288/Kconfig index ea94ad114247..69a5614b449a 100644 --- a/arch/arm/mach-rockchip/rk3288/Kconfig +++ b/arch/arm/mach-rockchip/rk3288/Kconfig @@ -16,7 +16,9 @@ config TARGET_CHROMEBOOK_JERRY
config TARGET_CHROMEBIT_MICKEY bool "Google/Rockchip Veyron-Mickey Chromebit" + select HAS_ROM select BOARD_LATE_INIT + select ROCKCHIP_SPI_IMAGE help Mickey is a small RK3288-based device with one USB 3.0 port, HDMI and WiFi. It has a separate power port and is designed to connect @@ -26,7 +28,9 @@ config TARGET_CHROMEBIT_MICKEY
config TARGET_CHROMEBOOK_MINNIE bool "Google/Rockchip Veyron-Minnie Chromebook" + select HAS_ROM select BOARD_LATE_INIT + select ROCKCHIP_SPI_IMAGE help Minnie is a RK3288-based convertible clamshell device with 2 USB 3.0 ports, micro HDMI, a 10.1-inch 1280x800 EDP display, micro-SD card, @@ -37,7 +41,9 @@ config TARGET_CHROMEBOOK_MINNIE
config TARGET_CHROMEBOOK_SPEEDY bool "Google/Rockchip Veyron-Speedy Chromebook" + select HAS_ROM select BOARD_LATE_INIT + select ROCKCHIP_SPI_IMAGE help Speedy is a RK3288-based clamshell device with 2 USB 2.0 ports, micro HDMI, an 11.6 inch display, micro-SD card,
On Fri, 7 Jul 2023 at 13:17, Alper Nebi Yasak alpernebiyasak@gmail.com wrote:
Commit 9b312e26fc77 ("rockchip: Enable building a SPI ROM image on jerry") produces a u-boot.rom file for chromebook_jerry, intended to be written to SPI flash. Build this file for other veyron boards as well, especially because they are already configured only to boot from SPI.
Signed-off-by: Alper Nebi Yasak alpernebiyasak@gmail.com
arch/arm/mach-rockchip/rk3288/Kconfig | 6 ++++++ 1 file changed, 6 insertions(+)
Reviewed-by: Simon Glass sjg@chromium.org
On 2023/7/8 03:16, Alper Nebi Yasak wrote:
Commit 9b312e26fc77 ("rockchip: Enable building a SPI ROM image on jerry") produces a u-boot.rom file for chromebook_jerry, intended to be written to SPI flash. Build this file for other veyron boards as well, especially because they are already configured only to boot from SPI.
Signed-off-by: Alper Nebi Yasak alpernebiyasak@gmail.com
Reviewed-by: Kever Yang kever.yang@rock-chips.com
Thanks, - Kever
arch/arm/mach-rockchip/rk3288/Kconfig | 6 ++++++ 1 file changed, 6 insertions(+)
diff --git a/arch/arm/mach-rockchip/rk3288/Kconfig b/arch/arm/mach-rockchip/rk3288/Kconfig index ea94ad114247..69a5614b449a 100644 --- a/arch/arm/mach-rockchip/rk3288/Kconfig +++ b/arch/arm/mach-rockchip/rk3288/Kconfig @@ -16,7 +16,9 @@ config TARGET_CHROMEBOOK_JERRY
config TARGET_CHROMEBIT_MICKEY bool "Google/Rockchip Veyron-Mickey Chromebit"
- select HAS_ROM select BOARD_LATE_INIT
- select ROCKCHIP_SPI_IMAGE help Mickey is a small RK3288-based device with one USB 3.0 port, HDMI and WiFi. It has a separate power port and is designed to connect
@@ -26,7 +28,9 @@ config TARGET_CHROMEBIT_MICKEY
config TARGET_CHROMEBOOK_MINNIE bool "Google/Rockchip Veyron-Minnie Chromebook"
- select HAS_ROM select BOARD_LATE_INIT
- select ROCKCHIP_SPI_IMAGE help Minnie is a RK3288-based convertible clamshell device with 2 USB 3.0 ports, micro HDMI, a 10.1-inch 1280x800 EDP display, micro-SD card,
@@ -37,7 +41,9 @@ config TARGET_CHROMEBOOK_MINNIE
config TARGET_CHROMEBOOK_SPEEDY bool "Google/Rockchip Veyron-Speedy Chromebook"
- select HAS_ROM select BOARD_LATE_INIT
- select ROCKCHIP_SPI_IMAGE help Speedy is a RK3288-based clamshell device with 2 USB 2.0 ports, micro HDMI, an 11.6 inch display, micro-SD card,
The rk3288-veyron-speedy-u-boot.dtsi file duplicates the bootphase dts fragments from rk3288-veyron-u-boot.dtsi even though it #inclues that. Deduplicate these into the latter file, which should also make the eMMC available to the other veyron boards' SPL.
Signed-off-by: Alper Nebi Yasak alpernebiyasak@gmail.com ---
arch/arm/dts/rk3288-veyron-speedy-u-boot.dtsi | 16 ---------------- arch/arm/dts/rk3288-veyron-u-boot.dtsi | 4 ++++ 2 files changed, 4 insertions(+), 16 deletions(-)
diff --git a/arch/arm/dts/rk3288-veyron-speedy-u-boot.dtsi b/arch/arm/dts/rk3288-veyron-speedy-u-boot.dtsi index 90ce9e1395de..2a4ba44e0bf9 100644 --- a/arch/arm/dts/rk3288-veyron-speedy-u-boot.dtsi +++ b/arch/arm/dts/rk3288-veyron-speedy-u-boot.dtsi @@ -15,19 +15,3 @@ &dmc { 0x0 0xc3 0x6 0x1>; rockchip,sdram-params = <0x20D266A4 0x5B6 6 533000000 6 13 0>; }; - -&sdmmc { - bootph-all; -}; - -&emmc { - bootph-all; -}; - -&uart2 { - bootph-all; -}; - -&pinctrl { - bootph-all; -}; diff --git a/arch/arm/dts/rk3288-veyron-u-boot.dtsi b/arch/arm/dts/rk3288-veyron-u-boot.dtsi index ab564e73ed00..4f9c59c67573 100644 --- a/arch/arm/dts/rk3288-veyron-u-boot.dtsi +++ b/arch/arm/dts/rk3288-veyron-u-boot.dtsi @@ -31,6 +31,10 @@ &dmc { >; };
+&emmc { + bootph-all; +}; + &gpio3 { bootph-all; };
On Fri, 7 Jul 2023 at 13:17, Alper Nebi Yasak alpernebiyasak@gmail.com wrote:
The rk3288-veyron-speedy-u-boot.dtsi file duplicates the bootphase dts fragments from rk3288-veyron-u-boot.dtsi even though it #inclues that. Deduplicate these into the latter file, which should also make the eMMC available to the other veyron boards' SPL.
Signed-off-by: Alper Nebi Yasak alpernebiyasak@gmail.com
arch/arm/dts/rk3288-veyron-speedy-u-boot.dtsi | 16 ---------------- arch/arm/dts/rk3288-veyron-u-boot.dtsi | 4 ++++ 2 files changed, 4 insertions(+), 16 deletions(-)
Reviewed-by: Simon Glass sjg@chromium.org
On 2023/7/8 03:16, Alper Nebi Yasak wrote:
The rk3288-veyron-speedy-u-boot.dtsi file duplicates the bootphase dts fragments from rk3288-veyron-u-boot.dtsi even though it #inclues that. Deduplicate these into the latter file, which should also make the eMMC available to the other veyron boards' SPL.
Signed-off-by: Alper Nebi Yasak alpernebiyasak@gmail.com
Reviewed-by: Kever Yang kever.yang@rock-chips.com
Thanks, - Kever
arch/arm/dts/rk3288-veyron-speedy-u-boot.dtsi | 16 ---------------- arch/arm/dts/rk3288-veyron-u-boot.dtsi | 4 ++++ 2 files changed, 4 insertions(+), 16 deletions(-)
diff --git a/arch/arm/dts/rk3288-veyron-speedy-u-boot.dtsi b/arch/arm/dts/rk3288-veyron-speedy-u-boot.dtsi index 90ce9e1395de..2a4ba44e0bf9 100644 --- a/arch/arm/dts/rk3288-veyron-speedy-u-boot.dtsi +++ b/arch/arm/dts/rk3288-veyron-speedy-u-boot.dtsi @@ -15,19 +15,3 @@ &dmc { 0x0 0xc3 0x6 0x1>; rockchip,sdram-params = <0x20D266A4 0x5B6 6 533000000 6 13 0>; };
-&sdmmc {
- bootph-all;
-};
-&emmc {
- bootph-all;
-};
-&uart2 {
- bootph-all;
-};
-&pinctrl {
- bootph-all;
-}; diff --git a/arch/arm/dts/rk3288-veyron-u-boot.dtsi b/arch/arm/dts/rk3288-veyron-u-boot.dtsi index ab564e73ed00..4f9c59c67573 100644 --- a/arch/arm/dts/rk3288-veyron-u-boot.dtsi +++ b/arch/arm/dts/rk3288-veyron-u-boot.dtsi @@ -31,6 +31,10 @@ &dmc {
;
};
+&emmc {
- bootph-all;
+};
- &gpio3 { bootph-all; };
Commit eba768c54587 ("rockchip: jerry: Add serial support") enables ROCKCHIP_SERIAL for chromebook_jerry to make the serial console work correctly. Enable it also for other veyron boards.
Also enable logging and disable scrolling multiple lines at once as in chromebook_jerry, and enable silent console as chromebook_minnie does.
Signed-off-by: Alper Nebi Yasak alpernebiyasak@gmail.com ---
configs/chromebit_mickey_defconfig | 3 +++ configs/chromebook_minnie_defconfig | 3 ++- configs/chromebook_speedy_defconfig | 1 + 3 files changed, 6 insertions(+), 1 deletion(-)
diff --git a/configs/chromebit_mickey_defconfig b/configs/chromebit_mickey_defconfig index a7c6213a9892..f45b14b9d3d1 100644 --- a/configs/chromebit_mickey_defconfig +++ b/configs/chromebit_mickey_defconfig @@ -26,6 +26,8 @@ CONFIG_SPL_PAYLOAD="u-boot.img" CONFIG_DEBUG_UART=y CONFIG_USE_PREBOOT=y CONFIG_DEFAULT_FDT_FILE="rk3288-veyron-mickey.dtb" +CONFIG_SILENT_CONSOLE=y +CONFIG_LOG=y # CONFIG_DISPLAY_CPUINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_BOARD_EARLY_INIT_R=y @@ -96,6 +98,7 @@ CONFIG_RAM=y CONFIG_SPL_RAM=y CONFIG_DEBUG_UART_SHIFT=2 CONFIG_SYS_NS16550_MEM32=y +CONFIG_ROCKCHIP_SERIAL=y CONFIG_ROCKCHIP_SPI=y CONFIG_SYSRESET=y CONFIG_USB=y diff --git a/configs/chromebook_minnie_defconfig b/configs/chromebook_minnie_defconfig index 8a4e1858c8bd..01964d13754e 100644 --- a/configs/chromebook_minnie_defconfig +++ b/configs/chromebook_minnie_defconfig @@ -27,6 +27,7 @@ CONFIG_DEBUG_UART=y CONFIG_USE_PREBOOT=y CONFIG_DEFAULT_FDT_FILE="rk3288-veyron-minnie.dtb" CONFIG_SILENT_CONSOLE=y +CONFIG_LOG=y # CONFIG_DISPLAY_CPUINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_BOARD_EARLY_INIT_R=y @@ -98,6 +99,7 @@ CONFIG_RAM=y CONFIG_SPL_RAM=y CONFIG_DEBUG_UART_SHIFT=2 CONFIG_SYS_NS16550_MEM32=y +CONFIG_ROCKCHIP_SERIAL=y CONFIG_SOUND=y CONFIG_I2S=y CONFIG_I2S_ROCKCHIP=y @@ -114,7 +116,6 @@ CONFIG_DISPLAY=y CONFIG_VIDEO_ROCKCHIP=y CONFIG_DISPLAY_ROCKCHIP_EDP=y CONFIG_DISPLAY_ROCKCHIP_HDMI=y -CONFIG_CONSOLE_SCROLL_LINES=10 CONFIG_SPL_TINY_MEMSET=y CONFIG_CMD_DHRYSTONE=y CONFIG_ERRNO_STR=y diff --git a/configs/chromebook_speedy_defconfig b/configs/chromebook_speedy_defconfig index 45c22f5b103a..f8f2a280f6cf 100644 --- a/configs/chromebook_speedy_defconfig +++ b/configs/chromebook_speedy_defconfig @@ -27,6 +27,7 @@ CONFIG_DEBUG_UART=y CONFIG_USE_PREBOOT=y CONFIG_DEFAULT_FDT_FILE="rk3288-veyron-speedy.dtb" CONFIG_SILENT_CONSOLE=y +CONFIG_LOG=y # CONFIG_DISPLAY_CPUINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_BOARD_EARLY_INIT_R=y
On Fri, 7 Jul 2023 at 13:17, Alper Nebi Yasak alpernebiyasak@gmail.com wrote:
Commit eba768c54587 ("rockchip: jerry: Add serial support") enables ROCKCHIP_SERIAL for chromebook_jerry to make the serial console work correctly. Enable it also for other veyron boards.
Also enable logging and disable scrolling multiple lines at once as in chromebook_jerry, and enable silent console as chromebook_minnie does.
Signed-off-by: Alper Nebi Yasak alpernebiyasak@gmail.com
configs/chromebit_mickey_defconfig | 3 +++ configs/chromebook_minnie_defconfig | 3 ++- configs/chromebook_speedy_defconfig | 1 + 3 files changed, 6 insertions(+), 1 deletion(-)
Reviewed-by: Simon Glass sjg@chromium.org
diff --git a/configs/chromebit_mickey_defconfig b/configs/chromebit_mickey_defconfig index a7c6213a9892..f45b14b9d3d1 100644 --- a/configs/chromebit_mickey_defconfig +++ b/configs/chromebit_mickey_defconfig @@ -26,6 +26,8 @@ CONFIG_SPL_PAYLOAD="u-boot.img" CONFIG_DEBUG_UART=y CONFIG_USE_PREBOOT=y CONFIG_DEFAULT_FDT_FILE="rk3288-veyron-mickey.dtb" +CONFIG_SILENT_CONSOLE=y +CONFIG_LOG=y # CONFIG_DISPLAY_CPUINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_BOARD_EARLY_INIT_R=y @@ -96,6 +98,7 @@ CONFIG_RAM=y CONFIG_SPL_RAM=y CONFIG_DEBUG_UART_SHIFT=2 CONFIG_SYS_NS16550_MEM32=y +CONFIG_ROCKCHIP_SERIAL=y CONFIG_ROCKCHIP_SPI=y CONFIG_SYSRESET=y CONFIG_USB=y diff --git a/configs/chromebook_minnie_defconfig b/configs/chromebook_minnie_defconfig index 8a4e1858c8bd..01964d13754e 100644 --- a/configs/chromebook_minnie_defconfig +++ b/configs/chromebook_minnie_defconfig @@ -27,6 +27,7 @@ CONFIG_DEBUG_UART=y CONFIG_USE_PREBOOT=y CONFIG_DEFAULT_FDT_FILE="rk3288-veyron-minnie.dtb" CONFIG_SILENT_CONSOLE=y +CONFIG_LOG=y # CONFIG_DISPLAY_CPUINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_BOARD_EARLY_INIT_R=y @@ -98,6 +99,7 @@ CONFIG_RAM=y CONFIG_SPL_RAM=y CONFIG_DEBUG_UART_SHIFT=2 CONFIG_SYS_NS16550_MEM32=y +CONFIG_ROCKCHIP_SERIAL=y CONFIG_SOUND=y CONFIG_I2S=y CONFIG_I2S_ROCKCHIP=y @@ -114,7 +116,6 @@ CONFIG_DISPLAY=y CONFIG_VIDEO_ROCKCHIP=y CONFIG_DISPLAY_ROCKCHIP_EDP=y CONFIG_DISPLAY_ROCKCHIP_HDMI=y -CONFIG_CONSOLE_SCROLL_LINES=10 CONFIG_SPL_TINY_MEMSET=y CONFIG_CMD_DHRYSTONE=y CONFIG_ERRNO_STR=y diff --git a/configs/chromebook_speedy_defconfig b/configs/chromebook_speedy_defconfig index 45c22f5b103a..f8f2a280f6cf 100644 --- a/configs/chromebook_speedy_defconfig +++ b/configs/chromebook_speedy_defconfig @@ -27,6 +27,7 @@ CONFIG_DEBUG_UART=y CONFIG_USE_PREBOOT=y CONFIG_DEFAULT_FDT_FILE="rk3288-veyron-speedy.dtb" CONFIG_SILENT_CONSOLE=y +CONFIG_LOG=y # CONFIG_DISPLAY_CPUINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_BOARD_EARLY_INIT_R=y -- 2.40.1
Reviewed-by: Simon Glass sjg@chromium.org
On 2023/7/8 03:16, Alper Nebi Yasak wrote:
Commit eba768c54587 ("rockchip: jerry: Add serial support") enables ROCKCHIP_SERIAL for chromebook_jerry to make the serial console work correctly. Enable it also for other veyron boards.
Also enable logging and disable scrolling multiple lines at once as in chromebook_jerry, and enable silent console as chromebook_minnie does.
Signed-off-by: Alper Nebi Yasak alpernebiyasak@gmail.com
Reviewed-by: Kever Yang kever.yang@rock-chips.com
Thanks, - Kever
configs/chromebit_mickey_defconfig | 3 +++ configs/chromebook_minnie_defconfig | 3 ++- configs/chromebook_speedy_defconfig | 1 + 3 files changed, 6 insertions(+), 1 deletion(-)
diff --git a/configs/chromebit_mickey_defconfig b/configs/chromebit_mickey_defconfig index a7c6213a9892..f45b14b9d3d1 100644 --- a/configs/chromebit_mickey_defconfig +++ b/configs/chromebit_mickey_defconfig @@ -26,6 +26,8 @@ CONFIG_SPL_PAYLOAD="u-boot.img" CONFIG_DEBUG_UART=y CONFIG_USE_PREBOOT=y CONFIG_DEFAULT_FDT_FILE="rk3288-veyron-mickey.dtb" +CONFIG_SILENT_CONSOLE=y +CONFIG_LOG=y # CONFIG_DISPLAY_CPUINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_BOARD_EARLY_INIT_R=y @@ -96,6 +98,7 @@ CONFIG_RAM=y CONFIG_SPL_RAM=y CONFIG_DEBUG_UART_SHIFT=2 CONFIG_SYS_NS16550_MEM32=y +CONFIG_ROCKCHIP_SERIAL=y CONFIG_ROCKCHIP_SPI=y CONFIG_SYSRESET=y CONFIG_USB=y diff --git a/configs/chromebook_minnie_defconfig b/configs/chromebook_minnie_defconfig index 8a4e1858c8bd..01964d13754e 100644 --- a/configs/chromebook_minnie_defconfig +++ b/configs/chromebook_minnie_defconfig @@ -27,6 +27,7 @@ CONFIG_DEBUG_UART=y CONFIG_USE_PREBOOT=y CONFIG_DEFAULT_FDT_FILE="rk3288-veyron-minnie.dtb" CONFIG_SILENT_CONSOLE=y +CONFIG_LOG=y # CONFIG_DISPLAY_CPUINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_BOARD_EARLY_INIT_R=y @@ -98,6 +99,7 @@ CONFIG_RAM=y CONFIG_SPL_RAM=y CONFIG_DEBUG_UART_SHIFT=2 CONFIG_SYS_NS16550_MEM32=y +CONFIG_ROCKCHIP_SERIAL=y CONFIG_SOUND=y CONFIG_I2S=y CONFIG_I2S_ROCKCHIP=y @@ -114,7 +116,6 @@ CONFIG_DISPLAY=y CONFIG_VIDEO_ROCKCHIP=y CONFIG_DISPLAY_ROCKCHIP_EDP=y CONFIG_DISPLAY_ROCKCHIP_HDMI=y -CONFIG_CONSOLE_SCROLL_LINES=10 CONFIG_SPL_TINY_MEMSET=y CONFIG_CMD_DHRYSTONE=y CONFIG_ERRNO_STR=y diff --git a/configs/chromebook_speedy_defconfig b/configs/chromebook_speedy_defconfig index 45c22f5b103a..f8f2a280f6cf 100644 --- a/configs/chromebook_speedy_defconfig +++ b/configs/chromebook_speedy_defconfig @@ -27,6 +27,7 @@ CONFIG_DEBUG_UART=y CONFIG_USE_PREBOOT=y CONFIG_DEFAULT_FDT_FILE="rk3288-veyron-speedy.dtb" CONFIG_SILENT_CONSOLE=y +CONFIG_LOG=y # CONFIG_DISPLAY_CPUINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_BOARD_EARLY_INIT_R=y
Commit 815ed79d8338 ("video: rockchip: Use TrueType fonts with jerry") enables makes chromebook_jerry use TrueType fonts. Make other veyron boards switch to it as well.
Signed-off-by: Alper Nebi Yasak alpernebiyasak@gmail.com --- I have no idea why that commit disables USE_PRIVATE_LIBGCC, but I'm following that change here.
configs/chromebit_mickey_defconfig | 2 ++ configs/chromebook_minnie_defconfig | 2 ++ 2 files changed, 4 insertions(+)
diff --git a/configs/chromebit_mickey_defconfig b/configs/chromebit_mickey_defconfig index f45b14b9d3d1..81efa0fd4cc6 100644 --- a/configs/chromebit_mickey_defconfig +++ b/configs/chromebit_mickey_defconfig @@ -107,9 +107,11 @@ CONFIG_USB_DWC2=y CONFIG_ROCKCHIP_USB2_PHY=y CONFIG_VIDEO=y # CONFIG_VIDEO_BPP8 is not set +CONFIG_CONSOLE_TRUETYPE=y CONFIG_DISPLAY=y CONFIG_VIDEO_ROCKCHIP=y CONFIG_DISPLAY_ROCKCHIP_HDMI=y +# CONFIG_USE_PRIVATE_LIBGCC is not set CONFIG_SPL_TINY_MEMSET=y CONFIG_CMD_DHRYSTONE=y CONFIG_ERRNO_STR=y diff --git a/configs/chromebook_minnie_defconfig b/configs/chromebook_minnie_defconfig index 01964d13754e..e2302074e8b3 100644 --- a/configs/chromebook_minnie_defconfig +++ b/configs/chromebook_minnie_defconfig @@ -112,10 +112,12 @@ CONFIG_USB_DWC2=y CONFIG_ROCKCHIP_USB2_PHY=y CONFIG_VIDEO=y # CONFIG_VIDEO_BPP8 is not set +CONFIG_CONSOLE_TRUETYPE=y CONFIG_DISPLAY=y CONFIG_VIDEO_ROCKCHIP=y CONFIG_DISPLAY_ROCKCHIP_EDP=y CONFIG_DISPLAY_ROCKCHIP_HDMI=y +# CONFIG_USE_PRIVATE_LIBGCC is not set CONFIG_SPL_TINY_MEMSET=y CONFIG_CMD_DHRYSTONE=y CONFIG_ERRNO_STR=y
On Fri, 7 Jul 2023 at 13:17, Alper Nebi Yasak alpernebiyasak@gmail.com wrote:
Commit 815ed79d8338 ("video: rockchip: Use TrueType fonts with jerry") enables makes chromebook_jerry use TrueType fonts. Make other veyron boards switch to it as well.
Signed-off-by: Alper Nebi Yasak alpernebiyasak@gmail.com
I have no idea why that commit disables USE_PRIVATE_LIBGCC, but I'm following that change here.
configs/chromebit_mickey_defconfig | 2 ++ configs/chromebook_minnie_defconfig | 2 ++ 2 files changed, 4 insertions(+)
Reviewed-by: Simon Glass sjg@chromium.org
On 2023/7/8 03:16, Alper Nebi Yasak wrote:
Commit 815ed79d8338 ("video: rockchip: Use TrueType fonts with jerry") enables makes chromebook_jerry use TrueType fonts. Make other veyron boards switch to it as well.
Signed-off-by: Alper Nebi Yasak alpernebiyasak@gmail.com
Reviewed-by: Kever Yang kever.yang@rock-chips.com
Thanks, - Kever
I have no idea why that commit disables USE_PRIVATE_LIBGCC, but I'm following that change here.
configs/chromebit_mickey_defconfig | 2 ++ configs/chromebook_minnie_defconfig | 2 ++ 2 files changed, 4 insertions(+)
diff --git a/configs/chromebit_mickey_defconfig b/configs/chromebit_mickey_defconfig index f45b14b9d3d1..81efa0fd4cc6 100644 --- a/configs/chromebit_mickey_defconfig +++ b/configs/chromebit_mickey_defconfig @@ -107,9 +107,11 @@ CONFIG_USB_DWC2=y CONFIG_ROCKCHIP_USB2_PHY=y CONFIG_VIDEO=y # CONFIG_VIDEO_BPP8 is not set +CONFIG_CONSOLE_TRUETYPE=y CONFIG_DISPLAY=y CONFIG_VIDEO_ROCKCHIP=y CONFIG_DISPLAY_ROCKCHIP_HDMI=y +# CONFIG_USE_PRIVATE_LIBGCC is not set CONFIG_SPL_TINY_MEMSET=y CONFIG_CMD_DHRYSTONE=y CONFIG_ERRNO_STR=y diff --git a/configs/chromebook_minnie_defconfig b/configs/chromebook_minnie_defconfig index 01964d13754e..e2302074e8b3 100644 --- a/configs/chromebook_minnie_defconfig +++ b/configs/chromebook_minnie_defconfig @@ -112,10 +112,12 @@ CONFIG_USB_DWC2=y CONFIG_ROCKCHIP_USB2_PHY=y CONFIG_VIDEO=y # CONFIG_VIDEO_BPP8 is not set +CONFIG_CONSOLE_TRUETYPE=y CONFIG_DISPLAY=y CONFIG_VIDEO_ROCKCHIP=y CONFIG_DISPLAY_ROCKCHIP_EDP=y CONFIG_DISPLAY_ROCKCHIP_HDMI=y +# CONFIG_USE_PRIVATE_LIBGCC is not set CONFIG_SPL_TINY_MEMSET=y CONFIG_CMD_DHRYSTONE=y CONFIG_ERRNO_STR=y
Sound support for chromebook_jerry needs the MAX98090 codec driver. This was enabled in commit 2d0c01b8f0ad ("sound: rockchip: Add sound support for jerry"), but apparently lost in commit 7ae2729401bb ("configs: Resync with savedefconfig"). Enable it again.
Signed-off-by: Alper Nebi Yasak alpernebiyasak@gmail.com ---
configs/chromebook_jerry_defconfig | 1 + 1 file changed, 1 insertion(+)
diff --git a/configs/chromebook_jerry_defconfig b/configs/chromebook_jerry_defconfig index 1a54986d089e..5b601a0b5809 100644 --- a/configs/chromebook_jerry_defconfig +++ b/configs/chromebook_jerry_defconfig @@ -102,6 +102,7 @@ CONFIG_ROCKCHIP_SERIAL=y CONFIG_SOUND=y CONFIG_I2S=y CONFIG_I2S_ROCKCHIP=y +CONFIG_SOUND_MAX98090=y CONFIG_ROCKCHIP_SPI=y CONFIG_SYSRESET=y CONFIG_USB=y
On Fri, 7 Jul 2023 at 13:17, Alper Nebi Yasak alpernebiyasak@gmail.com wrote:
Sound support for chromebook_jerry needs the MAX98090 codec driver. This was enabled in commit 2d0c01b8f0ad ("sound: rockchip: Add sound support for jerry"), but apparently lost in commit 7ae2729401bb ("configs: Resync with savedefconfig"). Enable it again.
Signed-off-by: Alper Nebi Yasak alpernebiyasak@gmail.com
configs/chromebook_jerry_defconfig | 1 + 1 file changed, 1 insertion(+)
Reviewed-by: Simon Glass sjg@chromium.org Tested-by: Simon Glass sjg@chromium.org # chromebook_jerry
On 2023/7/8 03:16, Alper Nebi Yasak wrote:
Sound support for chromebook_jerry needs the MAX98090 codec driver. This was enabled in commit 2d0c01b8f0ad ("sound: rockchip: Add sound support for jerry"), but apparently lost in commit 7ae2729401bb ("configs: Resync with savedefconfig"). Enable it again.
Signed-off-by: Alper Nebi Yasak alpernebiyasak@gmail.com
Reviewed-by: Kever Yang kever.yang@rock-chips.com
Thanks, - Kever
configs/chromebook_jerry_defconfig | 1 + 1 file changed, 1 insertion(+)
diff --git a/configs/chromebook_jerry_defconfig b/configs/chromebook_jerry_defconfig index 1a54986d089e..5b601a0b5809 100644 --- a/configs/chromebook_jerry_defconfig +++ b/configs/chromebook_jerry_defconfig @@ -102,6 +102,7 @@ CONFIG_ROCKCHIP_SERIAL=y CONFIG_SOUND=y CONFIG_I2S=y CONFIG_I2S_ROCKCHIP=y +CONFIG_SOUND_MAX98090=y CONFIG_ROCKCHIP_SPI=y CONFIG_SYSRESET=y CONFIG_USB=y
Commit ec107f04b619 ("rockchip: chromebook_minnie: Enable sound") and commit 2d0c01b8f0ad ("sound: rockchip: Add sound support for jerry") enable audio support for chromebook_minnie and chromebook_jerry. Enable it for chromebook_speedy as well, but put the non-upstream sound node in the board -u-boot.dtsi instead.
Signed-off-by: Alper Nebi Yasak alpernebiyasak@gmail.com --- Not enabling these for chromebit_mickey, as that'd use HDMI in a way I don't know how.
arch/arm/dts/rk3288-veyron-speedy-u-boot.dtsi | 14 ++++++++++++++ configs/chromebook_speedy_defconfig | 5 +++++ 2 files changed, 19 insertions(+)
diff --git a/arch/arm/dts/rk3288-veyron-speedy-u-boot.dtsi b/arch/arm/dts/rk3288-veyron-speedy-u-boot.dtsi index 2a4ba44e0bf9..6bfa84906e35 100644 --- a/arch/arm/dts/rk3288-veyron-speedy-u-boot.dtsi +++ b/arch/arm/dts/rk3288-veyron-speedy-u-boot.dtsi @@ -5,6 +5,20 @@
#include "rk3288-veyron-u-boot.dtsi"
+/ { + sound { + compatible = "rockchip,audio-max98090-jerry"; + + cpu { + sound-dai = <&i2s 0>; + }; + + codec { + sound-dai = <&max98090 0>; + }; + }; +}; + &dmc { rockchip,pctl-timing = <0x215 0xc8 0x0 0x35 0x26 0x2 0x70 0x2000d 0x6 0x0 0x8 0x4 0x17 0x24 0xd 0x6 diff --git a/configs/chromebook_speedy_defconfig b/configs/chromebook_speedy_defconfig index f8f2a280f6cf..15b6e21095db 100644 --- a/configs/chromebook_speedy_defconfig +++ b/configs/chromebook_speedy_defconfig @@ -52,6 +52,7 @@ CONFIG_CMD_USB=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_CACHE=y CONFIG_CMD_TIME=y +CONFIG_CMD_SOUND=y CONFIG_CMD_PMIC=y CONFIG_CMD_REGULATOR=y # CONFIG_SPL_DOS_PARTITION is not set @@ -99,6 +100,10 @@ CONFIG_SPL_RAM=y CONFIG_DEBUG_UART_SHIFT=2 CONFIG_SYS_NS16550_MEM32=y CONFIG_ROCKCHIP_SERIAL=y +CONFIG_SOUND=y +CONFIG_I2S=y +CONFIG_I2S_ROCKCHIP=y +CONFIG_SOUND_MAX98090=y CONFIG_ROCKCHIP_SPI=y CONFIG_SYSRESET=y CONFIG_USB=y
On Fri, 7 Jul 2023 at 13:17, Alper Nebi Yasak alpernebiyasak@gmail.com wrote:
Commit ec107f04b619 ("rockchip: chromebook_minnie: Enable sound") and commit 2d0c01b8f0ad ("sound: rockchip: Add sound support for jerry") enable audio support for chromebook_minnie and chromebook_jerry. Enable it for chromebook_speedy as well, but put the non-upstream sound node in the board -u-boot.dtsi instead.
Signed-off-by: Alper Nebi Yasak alpernebiyasak@gmail.com
Not enabling these for chromebit_mickey, as that'd use HDMI in a way I don't know how.
arch/arm/dts/rk3288-veyron-speedy-u-boot.dtsi | 14 ++++++++++++++ configs/chromebook_speedy_defconfig | 5 +++++ 2 files changed, 19 insertions(+)
Reviewed-by: Simon Glass sjg@chromium.org
On 2023/7/8 03:16, Alper Nebi Yasak wrote:
Commit ec107f04b619 ("rockchip: chromebook_minnie: Enable sound") and commit 2d0c01b8f0ad ("sound: rockchip: Add sound support for jerry") enable audio support for chromebook_minnie and chromebook_jerry. Enable it for chromebook_speedy as well, but put the non-upstream sound node in the board -u-boot.dtsi instead.
Signed-off-by: Alper Nebi Yasak alpernebiyasak@gmail.com
Reviewed-by: Kever Yang kever.yang@rock-chips.com
Thanks, - Kever
Not enabling these for chromebit_mickey, as that'd use HDMI in a way I don't know how.
arch/arm/dts/rk3288-veyron-speedy-u-boot.dtsi | 14 ++++++++++++++ configs/chromebook_speedy_defconfig | 5 +++++ 2 files changed, 19 insertions(+)
diff --git a/arch/arm/dts/rk3288-veyron-speedy-u-boot.dtsi b/arch/arm/dts/rk3288-veyron-speedy-u-boot.dtsi index 2a4ba44e0bf9..6bfa84906e35 100644 --- a/arch/arm/dts/rk3288-veyron-speedy-u-boot.dtsi +++ b/arch/arm/dts/rk3288-veyron-speedy-u-boot.dtsi @@ -5,6 +5,20 @@
#include "rk3288-veyron-u-boot.dtsi"
+/ {
- sound {
compatible = "rockchip,audio-max98090-jerry";cpu {sound-dai = <&i2s 0>;};codec {sound-dai = <&max98090 0>;};- };
+};
- &dmc { rockchip,pctl-timing = <0x215 0xc8 0x0 0x35 0x26 0x2 0x70 0x2000d 0x6 0x0 0x8 0x4 0x17 0x24 0xd 0x6
diff --git a/configs/chromebook_speedy_defconfig b/configs/chromebook_speedy_defconfig index f8f2a280f6cf..15b6e21095db 100644 --- a/configs/chromebook_speedy_defconfig +++ b/configs/chromebook_speedy_defconfig @@ -52,6 +52,7 @@ CONFIG_CMD_USB=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_CACHE=y CONFIG_CMD_TIME=y +CONFIG_CMD_SOUND=y CONFIG_CMD_PMIC=y CONFIG_CMD_REGULATOR=y # CONFIG_SPL_DOS_PARTITION is not set @@ -99,6 +100,10 @@ CONFIG_SPL_RAM=y CONFIG_DEBUG_UART_SHIFT=2 CONFIG_SYS_NS16550_MEM32=y CONFIG_ROCKCHIP_SERIAL=y +CONFIG_SOUND=y +CONFIG_I2S=y +CONFIG_I2S_ROCKCHIP=y +CONFIG_SOUND_MAX98090=y CONFIG_ROCKCHIP_SPI=y CONFIG_SYSRESET=y CONFIG_USB=y
Hi Alper,
On Fri, 7 Jul 2023 at 13:17, Alper Nebi Yasak alpernebiyasak@gmail.com wrote:
There have been bug fixes and new features for some veyron-based boards which are applicable to others because they share most of the underlying hardware. This series tries to synchronize changes across all veyron boards.
I couldn't personally test these myself as I don't have any of the supported boards, and couldn't spent time to port the veyron-mighty I have yet. Sending so others can test and for the first two patches I think should go in v2023.07, but take with a grain of salt.
Alper Nebi Yasak (7): rockchip: veyron: Enable RESET driver rockchip: veyron: Enable building SPI ROM images rockchip: veyron: Unify u-boot.dtsi bootph-all fragments rockchip: veyron: Add serial, logging, silent console support rockchip: veyron: Use TrueType fonts rockchip: chromebook_jerry: Re-enable MAX98090 codec driver rockchip: chromebook_speedy: Enable sound
arch/arm/dts/rk3288-veyron-speedy-u-boot.dtsi | 30 +++++++++---------- arch/arm/dts/rk3288-veyron-u-boot.dtsi | 4 +++ arch/arm/mach-rockchip/rk3288/Kconfig | 6 ++++ configs/chromebit_mickey_defconfig | 6 ++++ configs/chromebook_jerry_defconfig | 1 + configs/chromebook_minnie_defconfig | 6 +++- configs/chromebook_speedy_defconfig | 7 +++++ 7 files changed, 43 insertions(+), 17 deletions(-)
For the series: Tested-by: Simon Glass sjg@chromium.org # chromebook-jerry
Regards, Simon
participants (3)
-
Alper Nebi Yasak -
Kever Yang -
Simon Glass