[U-Boot] [PATCH] vexpress64: use 2nd DRAM bank only on juno
This patch makes the 2nd DRAM bank available on Juno only and not on other vexpress64 targets, eg. the FVP models.
The commit below added a 2nd bank of NOR flash for Juno, but also for all vexpress64 targets:
commit 2d0cee1ca2b9d977fa3214896bb2e30cfec77059 Author: Liviu Dudau Liviu.Dudau@foss.arm.com Date: Mon Oct 19 11:08:31 2015 +0100
vexpress64: Juno: Declare all 8GB of RAM and make them visible to the kernel.
Juno comes with 8GB RAM, but U-Boot only passes 2GB to the kernel. Declare a secondary memory bank and set the sizes correctly.
Signed-off-by: Liviu Dudau Liviu.Dudau@foss.arm.com Reviewed-by: Linus Walleij linus.walleij@linaro.org Reviewed-by: Ryan Harkin ryan.harkin@linaro.org Tested-by: Ryan Harkin ryan.harkin@linaro.org
Unfortunately, I only fully tested on Juno R0, R1 and the FVP Foundation model. Whilst FVP Base AEMV8 models run U-Boot OK, they fail to boot the kernel.
Signed-off-by: Ryan Harkin ryan.harkin@linaro.org --- board/armltd/vexpress64/vexpress64.c | 2 ++ include/configs/vexpress_aemv8a.h | 13 ++++++++++--- 2 files changed, 12 insertions(+), 3 deletions(-)
diff --git a/board/armltd/vexpress64/vexpress64.c b/board/armltd/vexpress64/vexpress64.c index f4e8084..22d7e6c 100644 --- a/board/armltd/vexpress64/vexpress64.c +++ b/board/armltd/vexpress64/vexpress64.c @@ -44,8 +44,10 @@ void dram_init_banksize(void) { gd->bd->bi_dram[0].start = PHYS_SDRAM_1; gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE; +#ifdef PHYS_SDRAM_2 gd->bd->bi_dram[1].start = PHYS_SDRAM_2; gd->bd->bi_dram[1].size = PHYS_SDRAM_2_SIZE; +#endif }
/* diff --git a/include/configs/vexpress_aemv8a.h b/include/configs/vexpress_aemv8a.h index 0f2f1a3..18ab915 100644 --- a/include/configs/vexpress_aemv8a.h +++ b/include/configs/vexpress_aemv8a.h @@ -168,15 +168,22 @@ #define CONFIG_SYS_LOAD_ADDR (V2M_BASE + 0x10000000)
/* Physical Memory Map */ -#define CONFIG_NR_DRAM_BANKS 2 #define PHYS_SDRAM_1 (V2M_BASE) /* SDRAM Bank #1 */ -#define PHYS_SDRAM_2 (0x880000000) /* Top 16MB reserved for secure world use */ #define DRAM_SEC_SIZE 0x01000000 #define PHYS_SDRAM_1_SIZE 0x80000000 - DRAM_SEC_SIZE -#define PHYS_SDRAM_2_SIZE 0x180000000 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
+#ifdef CONFIG_TARGET_VEXPRESS64_JUNO +#define CONFIG_NR_DRAM_BANKS 2 +#define PHYS_SDRAM_2 (0x880000000) +#define PHYS_SDRAM_2_SIZE 0x180000000 +#define CONFIG_NR_DRAM_BANKS_LIST { PHYS_SDRAM_1 , PHYS_SDRAM_2} +#else +#define CONFIG_NR_DRAM_BANKS 1 +#define CONFIG_NR_DRAM_BANKS_LIST { PHYS_SDRAM_1 } +#endif + /* Enable memtest */ #define CONFIG_CMD_MEMTEST #define CONFIG_SYS_MEMTEST_START PHYS_SDRAM_1
On Fri, Oct 23, 2015 at 04:47:04PM +0100, Ryan Harkin wrote:
This patch makes the 2nd DRAM bank available on Juno only and not on other vexpress64 targets, eg. the FVP models.
The commit below added a 2nd bank of NOR flash for Juno, but also for all vexpress64 targets:
commit 2d0cee1ca2b9d977fa3214896bb2e30cfec77059 Author: Liviu Dudau <Liviu.Dudau@foss.arm.com> Date: Mon Oct 19 11:08:31 2015 +0100 vexpress64: Juno: Declare all 8GB of RAM and make them visible to the kernel. Juno comes with 8GB RAM, but U-Boot only passes 2GB to the kernel. Declare a secondary memory bank and set the sizes correctly. Signed-off-by: Liviu Dudau <Liviu.Dudau@foss.arm.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Reviewed-by: Ryan Harkin <ryan.harkin@linaro.org> Tested-by: Ryan Harkin <ryan.harkin@linaro.org>Unfortunately, I only fully tested on Juno R0, R1 and the FVP Foundation model. Whilst FVP Base AEMV8 models run U-Boot OK, they fail to boot the kernel.
Hi Ryan,
Thanks for testing this on FVPs. Only a small question on the patch, otherwise:
Acked-by: Liviu Dudau liviu.dudau@foss.arm.com
Best regards, Liviu
Signed-off-by: Ryan Harkin ryan.harkin@linaro.org
board/armltd/vexpress64/vexpress64.c | 2 ++ include/configs/vexpress_aemv8a.h | 13 ++++++++++--- 2 files changed, 12 insertions(+), 3 deletions(-)
diff --git a/board/armltd/vexpress64/vexpress64.c b/board/armltd/vexpress64/vexpress64.c index f4e8084..22d7e6c 100644 --- a/board/armltd/vexpress64/vexpress64.c +++ b/board/armltd/vexpress64/vexpress64.c @@ -44,8 +44,10 @@ void dram_init_banksize(void) { gd->bd->bi_dram[0].start = PHYS_SDRAM_1; gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE; +#ifdef PHYS_SDRAM_2 gd->bd->bi_dram[1].start = PHYS_SDRAM_2; gd->bd->bi_dram[1].size = PHYS_SDRAM_2_SIZE; +#endif }
/* diff --git a/include/configs/vexpress_aemv8a.h b/include/configs/vexpress_aemv8a.h index 0f2f1a3..18ab915 100644 --- a/include/configs/vexpress_aemv8a.h +++ b/include/configs/vexpress_aemv8a.h @@ -168,15 +168,22 @@ #define CONFIG_SYS_LOAD_ADDR (V2M_BASE + 0x10000000)
/* Physical Memory Map */ -#define CONFIG_NR_DRAM_BANKS 2 #define PHYS_SDRAM_1 (V2M_BASE) /* SDRAM Bank #1 */ -#define PHYS_SDRAM_2 (0x880000000) /* Top 16MB reserved for secure world use */ #define DRAM_SEC_SIZE 0x01000000 #define PHYS_SDRAM_1_SIZE 0x80000000 - DRAM_SEC_SIZE -#define PHYS_SDRAM_2_SIZE 0x180000000 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
+#ifdef CONFIG_TARGET_VEXPRESS64_JUNO +#define CONFIG_NR_DRAM_BANKS 2 +#define PHYS_SDRAM_2 (0x880000000) +#define PHYS_SDRAM_2_SIZE 0x180000000 +#define CONFIG_NR_DRAM_BANKS_LIST { PHYS_SDRAM_1 , PHYS_SDRAM_2}
Here
+#else +#define CONFIG_NR_DRAM_BANKS 1 +#define CONFIG_NR_DRAM_BANKS_LIST { PHYS_SDRAM_1 }
And here. I could not find any other instance of CONFIG_NR_DRAM_BANKS_LIST usage. Is that something that has splilled from Linaro's version?
Best regards, Liviu
+#endif
/* Enable memtest */ #define CONFIG_CMD_MEMTEST
#define CONFIG_SYS_MEMTEST_START PHYS_SDRAM_1
2.1.4
On 26 October 2015 at 10:18, Liviu Dudau Liviu.Dudau@arm.com wrote:
On Fri, Oct 23, 2015 at 04:47:04PM +0100, Ryan Harkin wrote:
This patch makes the 2nd DRAM bank available on Juno only and not on other vexpress64 targets, eg. the FVP models.
The commit below added a 2nd bank of NOR flash for Juno, but also for all vexpress64 targets:
commit 2d0cee1ca2b9d977fa3214896bb2e30cfec77059 Author: Liviu Dudau <Liviu.Dudau@foss.arm.com> Date: Mon Oct 19 11:08:31 2015 +0100 vexpress64: Juno: Declare all 8GB of RAM and make them visible to the kernel. Juno comes with 8GB RAM, but U-Boot only passes 2GB to the kernel. Declare a secondary memory bank and set the sizes correctly. Signed-off-by: Liviu Dudau <Liviu.Dudau@foss.arm.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Reviewed-by: Ryan Harkin <ryan.harkin@linaro.org> Tested-by: Ryan Harkin <ryan.harkin@linaro.org>Unfortunately, I only fully tested on Juno R0, R1 and the FVP Foundation model. Whilst FVP Base AEMV8 models run U-Boot OK, they fail to boot the kernel.
Hi Ryan,
Thanks for testing this on FVPs. Only a small question on the patch, otherwise:
Acked-by: Liviu Dudau liviu.dudau@foss.arm.com
Best regards, Liviu
Signed-off-by: Ryan Harkin ryan.harkin@linaro.org
board/armltd/vexpress64/vexpress64.c | 2 ++ include/configs/vexpress_aemv8a.h | 13 ++++++++++--- 2 files changed, 12 insertions(+), 3 deletions(-)
diff --git a/board/armltd/vexpress64/vexpress64.c b/board/armltd/vexpress64/vexpress64.c index f4e8084..22d7e6c 100644 --- a/board/armltd/vexpress64/vexpress64.c +++ b/board/armltd/vexpress64/vexpress64.c @@ -44,8 +44,10 @@ void dram_init_banksize(void) { gd->bd->bi_dram[0].start = PHYS_SDRAM_1; gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE; +#ifdef PHYS_SDRAM_2 gd->bd->bi_dram[1].start = PHYS_SDRAM_2; gd->bd->bi_dram[1].size = PHYS_SDRAM_2_SIZE; +#endif }
/* diff --git a/include/configs/vexpress_aemv8a.h b/include/configs/vexpress_aemv8a.h index 0f2f1a3..18ab915 100644 --- a/include/configs/vexpress_aemv8a.h +++ b/include/configs/vexpress_aemv8a.h @@ -168,15 +168,22 @@ #define CONFIG_SYS_LOAD_ADDR (V2M_BASE + 0x10000000)
/* Physical Memory Map */ -#define CONFIG_NR_DRAM_BANKS 2 #define PHYS_SDRAM_1 (V2M_BASE) /* SDRAM Bank #1 */ -#define PHYS_SDRAM_2 (0x880000000) /* Top 16MB reserved for secure world use */ #define DRAM_SEC_SIZE 0x01000000 #define PHYS_SDRAM_1_SIZE 0x80000000 - DRAM_SEC_SIZE -#define PHYS_SDRAM_2_SIZE 0x180000000 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
+#ifdef CONFIG_TARGET_VEXPRESS64_JUNO +#define CONFIG_NR_DRAM_BANKS 2 +#define PHYS_SDRAM_2 (0x880000000) +#define PHYS_SDRAM_2_SIZE 0x180000000 +#define CONFIG_NR_DRAM_BANKS_LIST { PHYS_SDRAM_1 , PHYS_SDRAM_2}
Here
+#else +#define CONFIG_NR_DRAM_BANKS 1 +#define CONFIG_NR_DRAM_BANKS_LIST { PHYS_SDRAM_1 }
And here. I could not find any other instance of CONFIG_NR_DRAM_BANKS_LIST usage. Is that something that has splilled from Linaro's version?
Ooops, yes, this is a mistake.
I originally changed vexpress.c to use a list of DRAM banks, a bit like the NOR banks code, but then I realised that I was adding unnecessary complexity to the code when a simple check for PHYS_SDRAM_2 was sufficient.
I'll respin without those two defines.
Best regards, Liviu
+#endif
/* Enable memtest */ #define CONFIG_CMD_MEMTEST
#define CONFIG_SYS_MEMTEST_START PHYS_SDRAM_1
2.1.4
--
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participants (2)
-
Liviu Dudau -
Ryan Harkin