[U-Boot] [PATCH] powerpc/mpc8572ds: Enable bank interleaving to cs0+cs1 for dual-rank DIMMs

The controller interleaving only takes the usable memory mapped to cs0. In the case of bank interleaving not enabled, only half of dual-rank DIMM will be used.
For single-rank DIMM bank interleaving will be auto disabled.
Signed-off-by: Jia Hongtao B38951@freescale.com Signed-off-by: Li Yang leoli@freescale.com --- include/configs/MPC8572DS.h | 2 +- 1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/include/configs/MPC8572DS.h b/include/configs/MPC8572DS.h index a62b7d5..d233365 100644 --- a/include/configs/MPC8572DS.h +++ b/include/configs/MPC8572DS.h @@ -735,7 +735,7 @@ #define CONFIG_BAUDRATE 115200
#define CONFIG_EXTRA_ENV_SETTINGS \ -"hwconfig=fsl_ddr:ctlr_intlv=bank,ecc=off\0" \ +"hwconfig=fsl_ddr:ctlr_intlv=bank,bank_intlv=cs0_cs1,ecc=off\0" \ "netdev=eth0\0" \ "uboot=" __stringify(CONFIG_UBOOTPATH) "\0" \ "tftpflash=tftpboot $loadaddr $uboot; " \
participants (1)
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Jia Hongtao