[U-Boot] [PATCH v2 00/10] spi: Cleanup set
Cleanup set on spi_slave{}
Changes for v2: - Replaced mode, mode_rx out-of structure members position - Added SPI_TX_DUAL patch
Jagan Teki (10): spi: Remove SPI_OPM_RX_EXTN spi: Remove SPI_OPM_RX_DIO|QIOF spi: Rename SPI_OPM_RX_* to SPI_RX_* spi: Rename op_mode_rx to mode_rx spi: Move flags macro's to spi_slave{} members spi: Fix bit assignment with flags spi: Use BIT macro spi: Minor cleanup sf: Make IO modes at last in read modes spi: Add SPI_TX_DUAL mode
drivers/mtd/spi/sf_internal.h | 4 +-- drivers/mtd/spi/spi_flash.c | 4 +-- drivers/spi/ich.c | 2 +- drivers/spi/ti_qspi.c | 2 +- include/spi.h | 65 ++++++++++++++++++++----------------------- 5 files changed, 36 insertions(+), 41 deletions(-)
SPI_OPM_RX_EXTN is a combination of all rx opmode's and spi driver shall use any one of the rx mode at a time not the combination and it is true in case of flash where spi_flash_table mention combination of supported read opmodes so-that the required one will pick based on the rx mode from spi driver.
Cc: Simon Glass sjg@chromium.org Cc: Michal Simek michal.simek@xilinx.com Cc: Siva Durga Prasad Paladugu sivadur@xilinx.com Tested-by: Mugunthan V N mugunthanvnm@ti.com Tested-by: Bin Meng bmeng.cn@gmail.com Tested-by: Jagan Teki jteki@openedev.com Reviewed-by: Bin Meng bmeng.cn@gmail.com Signed-off-by: Jagan Teki jteki@openedev.com --- include/spi.h | 3 --- 1 file changed, 3 deletions(-)
diff --git a/include/spi.h b/include/spi.h index b9a6e6f..bf2ed28 100644 --- a/include/spi.h +++ b/include/spi.h @@ -41,9 +41,6 @@ #define SPI_OPM_RX_DIO (1 << 3) #define SPI_OPM_RX_QOF (1 << 4) #define SPI_OPM_RX_QIOF (1 << 5) -#define SPI_OPM_RX_EXTN (SPI_OPM_RX_AS | SPI_OPM_RX_AF | SPI_OPM_RX_DOUT | \ - SPI_OPM_RX_DIO | SPI_OPM_RX_QOF | \ - SPI_OPM_RX_QIOF)
/* SPI bus connection options - see enum spi_dual_flash */ #define SPI_CONN_DUAL_SHARED (1 << 0)
SPI_OPM_RX_DIO and SPI_OPM_RX_QIOF are rx IO commands/opmodes for dual and quad. Usually IO operation's are referred to flash protocol rather with spi controller protocol, these are still present in flash side for the usage of spi-nor controllers.
Cc: Simon Glass sjg@chromium.org Cc: Michal Simek michal.simek@xilinx.com Cc: Siva Durga Prasad Paladugu sivadur@xilinx.com Tested-by: Mugunthan V N mugunthanvnm@ti.com Tested-by: Bin Meng bmeng.cn@gmail.com Tested-by: Jagan Teki jteki@openedev.com Reviewed-by: Bin Meng bmeng.cn@gmail.com Signed-off-by: Jagan Teki jteki@openedev.com --- include/spi.h | 2 -- 1 file changed, 2 deletions(-)
diff --git a/include/spi.h b/include/spi.h index bf2ed28..3e3480a 100644 --- a/include/spi.h +++ b/include/spi.h @@ -38,9 +38,7 @@ #define SPI_OPM_RX_AS (1 << 0) #define SPI_OPM_RX_AF (1 << 1) #define SPI_OPM_RX_DOUT (1 << 2) -#define SPI_OPM_RX_DIO (1 << 3) #define SPI_OPM_RX_QOF (1 << 4) -#define SPI_OPM_RX_QIOF (1 << 5)
/* SPI bus connection options - see enum spi_dual_flash */ #define SPI_CONN_DUAL_SHARED (1 << 0)
SPI_OPM_RX_AS - SPI_RX_SLOW SPI_OPM_RX_AF - SPI_RX_FAST SPI_OPM_RX_DOUT - SPI_RX_DUAL SPI_OPM_RX_QOF - SPI_RX_QUAD
Cc: Simon Glass sjg@chromium.org Cc: Michal Simek michal.simek@xilinx.com Cc: Siva Durga Prasad Paladugu sivadur@xilinx.com Tested-by: Mugunthan V N mugunthanvnm@ti.com Tested-by: Bin Meng bmeng.cn@gmail.com Tested-by: Jagan Teki jteki@openedev.com Reviewed-by: Bin Meng bmeng.cn@gmail.com Signed-off-by: Jagan Teki jteki@openedev.com --- drivers/spi/ich.c | 2 +- drivers/spi/ti_qspi.c | 2 +- include/spi.h | 8 ++++---- 3 files changed, 6 insertions(+), 6 deletions(-)
diff --git a/drivers/spi/ich.c b/drivers/spi/ich.c index d11132c..7f41763 100644 --- a/drivers/spi/ich.c +++ b/drivers/spi/ich.c @@ -752,7 +752,7 @@ static int ich_spi_child_pre_probe(struct udevice *dev) * and byte program command for SST flash */ if (plat->ich_version == 7) { - slave->op_mode_rx = SPI_OPM_RX_AS; + slave->op_mode_rx = SPI_RX_SLOW; slave->mode = SPI_TX_BYTE; }
diff --git a/drivers/spi/ti_qspi.c b/drivers/spi/ti_qspi.c index 5747ed1..366243c 100644 --- a/drivers/spi/ti_qspi.c +++ b/drivers/spi/ti_qspi.c @@ -115,7 +115,7 @@ static void ti_spi_setup_spi_register(struct ti_qspi_slave *qslave) QSPI_SETUP0_NUM_D_BYTES_8_BITS | QSPI_SETUP0_READ_QUAD | QSPI_CMD_WRITE | QSPI_NUM_DUMMY_BITS); - slave->op_mode_rx = SPI_OPM_RX_QOF; + slave->op_mode_rx = SPI_RX_QUAD; #else memval |= QSPI_CMD_READ | QSPI_SETUP0_NUM_A_BYTES | QSPI_SETUP0_NUM_D_BYTES_NO_BITS | diff --git a/include/spi.h b/include/spi.h index 3e3480a..fd09502 100644 --- a/include/spi.h +++ b/include/spi.h @@ -35,10 +35,10 @@ #define SPI_XFER_U_PAGE (1 << 5)
/* SPI RX operation modes */ -#define SPI_OPM_RX_AS (1 << 0) -#define SPI_OPM_RX_AF (1 << 1) -#define SPI_OPM_RX_DOUT (1 << 2) -#define SPI_OPM_RX_QOF (1 << 4) +#define SPI_RX_SLOW (1 << 0) +#define SPI_RX_FAST (1 << 1) +#define SPI_RX_DUAL (1 << 2) +#define SPI_RX_QUAD (1 << 4)
/* SPI bus connection options - see enum spi_dual_flash */ #define SPI_CONN_DUAL_SHARED (1 << 0)
Since spi rx mode macro's are renamed to simple and meaninfull, this patch will rename the respective structure members.
Cc: Simon Glass sjg@chromium.org Cc: Bin Meng bmeng.cn@gmail.com Cc: Michal Simek michal.simek@xilinx.com Cc: Siva Durga Prasad Paladugu sivadur@xilinx.com Tested-by: Mugunthan V N mugunthanvnm@ti.com Tested-by: Jagan Teki jteki@openedev.com Signed-off-by: Jagan Teki jteki@openedev.com --- drivers/mtd/spi/spi_flash.c | 2 +- drivers/spi/ich.c | 2 +- drivers/spi/ti_qspi.c | 2 +- include/spi.h | 6 +++--- 4 files changed, 6 insertions(+), 6 deletions(-)
diff --git a/drivers/mtd/spi/spi_flash.c b/drivers/mtd/spi/spi_flash.c index 38ed115..691be1a 100644 --- a/drivers/mtd/spi/spi_flash.c +++ b/drivers/mtd/spi/spi_flash.c @@ -1098,7 +1098,7 @@ int spi_flash_scan(struct spi_flash *flash) flash->sector_size = flash->erase_size;
/* Look for the fastest read cmd */ - cmd = fls(params->e_rd_cmd & spi->op_mode_rx); + cmd = fls(params->e_rd_cmd & spi->mode_rx); if (cmd) { cmd = spi_read_cmds_array[cmd - 1]; flash->read_cmd = cmd; diff --git a/drivers/spi/ich.c b/drivers/spi/ich.c index 7f41763..59eaaea 100644 --- a/drivers/spi/ich.c +++ b/drivers/spi/ich.c @@ -752,7 +752,7 @@ static int ich_spi_child_pre_probe(struct udevice *dev) * and byte program command for SST flash */ if (plat->ich_version == 7) { - slave->op_mode_rx = SPI_RX_SLOW; + slave->mode_rx = SPI_RX_SLOW; slave->mode = SPI_TX_BYTE; }
diff --git a/drivers/spi/ti_qspi.c b/drivers/spi/ti_qspi.c index 366243c..26616eb 100644 --- a/drivers/spi/ti_qspi.c +++ b/drivers/spi/ti_qspi.c @@ -115,7 +115,7 @@ static void ti_spi_setup_spi_register(struct ti_qspi_slave *qslave) QSPI_SETUP0_NUM_D_BYTES_8_BITS | QSPI_SETUP0_READ_QUAD | QSPI_CMD_WRITE | QSPI_NUM_DUMMY_BITS); - slave->op_mode_rx = SPI_RX_QUAD; + slave->mode_rx = SPI_RX_QUAD; #else memval |= QSPI_CMD_READ | QSPI_SETUP0_NUM_A_BYTES | QSPI_SETUP0_NUM_D_BYTES_NO_BITS | diff --git a/include/spi.h b/include/spi.h index fd09502..8dabc3d 100644 --- a/include/spi.h +++ b/include/spi.h @@ -34,7 +34,7 @@ #define SPI_XFER_ONCE (SPI_XFER_BEGIN | SPI_XFER_END) #define SPI_XFER_U_PAGE (1 << 5)
-/* SPI RX operation modes */ +/* SPI mode_rx flags */ #define SPI_RX_SLOW (1 << 0) #define SPI_RX_FAST (1 << 1) #define SPI_RX_DUAL (1 << 2) @@ -99,7 +99,7 @@ struct dm_spi_slave_platdata { * bus (bus->seq) so does not need to be stored * @cs: ID of the chip select connected to the slave. * @mode: SPI mode to use for this slave (see SPI mode flags) - * @op_mode_rx: SPI RX operation mode. + * @mode_rx: SPI RX mode to use for this slave (see SPI mode_rx flags) * @wordlen: Size of SPI word in number of bits * @max_write_size: If non-zero, the maximum number of bytes which can * be written at once, excluding command bytes. @@ -117,7 +117,7 @@ struct spi_slave { unsigned int cs; #endif uint mode; - u8 op_mode_rx; + u8 mode_rx; unsigned int wordlen; unsigned int max_write_size; void *memory_map;
This patch moves flags macro's to respective member position on spi_slave{}, for better readabilty and finding the respective member macro's easily.
Cc: Simon Glass sjg@chromium.org Cc: Bin Meng bmeng.cn@gmail.com Cc: Michal Simek michal.simek@xilinx.com Cc: Siva Durga Prasad Paladugu sivadur@xilinx.com Tested-by: Mugunthan V N mugunthanvnm@ti.com Tested-by: Jagan Teki jteki@openedev.com Signed-off-by: Jagan Teki jteki@openedev.com --- include/spi.h | 15 +++++++-------- 1 file changed, 7 insertions(+), 8 deletions(-)
diff --git a/include/spi.h b/include/spi.h index 8dabc3d..de09ac5 100644 --- a/include/spi.h +++ b/include/spi.h @@ -26,14 +26,6 @@ #define SPI_TX_BYTE 0x100 /* transmit with 1 wire byte */ #define SPI_TX_QUAD 0x200 /* transmit with 4 wires */
-/* SPI transfer flags */ -#define SPI_XFER_BEGIN 0x01 /* Assert CS before transfer */ -#define SPI_XFER_END 0x02 /* Deassert CS after transfer */ -#define SPI_XFER_MMAP 0x08 /* Memory Mapped start */ -#define SPI_XFER_MMAP_END 0x10 /* Memory Mapped End */ -#define SPI_XFER_ONCE (SPI_XFER_BEGIN | SPI_XFER_END) -#define SPI_XFER_U_PAGE (1 << 5) - /* SPI mode_rx flags */ #define SPI_RX_SLOW (1 << 0) #define SPI_RX_FAST (1 << 1) @@ -122,7 +114,14 @@ struct spi_slave { unsigned int max_write_size; void *memory_map; u8 option; + u8 flags; +#define SPI_XFER_BEGIN 0x01 /* Assert CS before transfer */ +#define SPI_XFER_END 0x02 /* Deassert CS after transfer */ +#define SPI_XFER_MMAP 0x08 /* Memory Mapped start */ +#define SPI_XFER_MMAP_END 0x10 /* Memory Mapped End */ +#define SPI_XFER_ONCE (SPI_XFER_BEGIN | SPI_XFER_END) +#define SPI_XFER_U_PAGE (1 << 5) };
/**
Fixed bit assignment with flags members on spi_slave{}
Cc: Simon Glass sjg@chromium.org Cc: Michal Simek michal.simek@xilinx.com Cc: Siva Durga Prasad Paladugu sivadur@xilinx.com Tested-by: Mugunthan V N mugunthanvnm@ti.com Tested-by: Bin Meng bmeng.cn@gmail.com Tested-by: Jagan Teki jteki@openedev.com Reviewed-by: Bin Meng bmeng.cn@gmail.com Signed-off-by: Jagan Teki jteki@openedev.com --- include/spi.h | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/include/spi.h b/include/spi.h index de09ac5..82e72ab 100644 --- a/include/spi.h +++ b/include/spi.h @@ -118,10 +118,10 @@ struct spi_slave { u8 flags; #define SPI_XFER_BEGIN 0x01 /* Assert CS before transfer */ #define SPI_XFER_END 0x02 /* Deassert CS after transfer */ -#define SPI_XFER_MMAP 0x08 /* Memory Mapped start */ -#define SPI_XFER_MMAP_END 0x10 /* Memory Mapped End */ #define SPI_XFER_ONCE (SPI_XFER_BEGIN | SPI_XFER_END) -#define SPI_XFER_U_PAGE (1 << 5) +#define SPI_XFER_MMAP 0x04 /* Memory Mapped start */ +#define SPI_XFER_MMAP_END 0x08 /* Memory Mapped End */ +#define SPI_XFER_U_PAGE 0x10 };
/**
Used BIT macro like 1 << nr as BIT(nr) where nr is 0...n
Cc: Simon Glass sjg@chromium.org Cc: Michal Simek michal.simek@xilinx.com Cc: Siva Durga Prasad Paladugu sivadur@xilinx.com Tested-by: Mugunthan V N mugunthanvnm@ti.com Tested-by: Bin Meng bmeng.cn@gmail.com Tested-by: Jagan Teki jteki@openedev.com Reviewed-by: Bin Meng bmeng.cn@gmail.com Signed-off-by: Jagan Teki jteki@openedev.com --- include/spi.h | 38 +++++++++++++++++++------------------- 1 file changed, 19 insertions(+), 19 deletions(-)
diff --git a/include/spi.h b/include/spi.h index 82e72ab..f889249 100644 --- a/include/spi.h +++ b/include/spi.h @@ -11,26 +11,26 @@ #define _SPI_H_
/* SPI mode flags */ -#define SPI_CPHA 0x01 /* clock phase */ -#define SPI_CPOL 0x02 /* clock polarity */ +#define SPI_CPHA BIT(0) /* clock phase */ +#define SPI_CPOL BIT(1) /* clock polarity */ #define SPI_MODE_0 (0|0) /* (original MicroWire) */ #define SPI_MODE_1 (0|SPI_CPHA) #define SPI_MODE_2 (SPI_CPOL|0) #define SPI_MODE_3 (SPI_CPOL|SPI_CPHA) -#define SPI_CS_HIGH 0x04 /* CS active high */ -#define SPI_LSB_FIRST 0x08 /* per-word bits-on-wire */ -#define SPI_3WIRE 0x10 /* SI/SO signals shared */ -#define SPI_LOOP 0x20 /* loopback mode */ -#define SPI_SLAVE 0x40 /* slave mode */ -#define SPI_PREAMBLE 0x80 /* Skip preamble bytes */ -#define SPI_TX_BYTE 0x100 /* transmit with 1 wire byte */ -#define SPI_TX_QUAD 0x200 /* transmit with 4 wires */ +#define SPI_CS_HIGH BIT(2) /* CS active high */ +#define SPI_LSB_FIRST BIT(3) /* per-word bits-on-wire */ +#define SPI_3WIRE BIT(4) /* SI/SO signals shared */ +#define SPI_LOOP BIT(5) /* loopback mode */ +#define SPI_SLAVE BIT(6) /* slave mode */ +#define SPI_PREAMBLE BIT(7) /* Skip preamble bytes */ +#define SPI_TX_BYTE BIT(8) /* transmit with 1 wire byte */ +#define SPI_TX_QUAD BIT(9) /* transmit with 4 wires */
/* SPI mode_rx flags */ -#define SPI_RX_SLOW (1 << 0) -#define SPI_RX_FAST (1 << 1) -#define SPI_RX_DUAL (1 << 2) -#define SPI_RX_QUAD (1 << 4) +#define SPI_RX_SLOW BIT(0) +#define SPI_RX_FAST BIT(1) +#define SPI_RX_DUAL BIT(2) +#define SPI_RX_QUAD BIT(4)
/* SPI bus connection options - see enum spi_dual_flash */ #define SPI_CONN_DUAL_SHARED (1 << 0) @@ -116,12 +116,12 @@ struct spi_slave { u8 option;
u8 flags; -#define SPI_XFER_BEGIN 0x01 /* Assert CS before transfer */ -#define SPI_XFER_END 0x02 /* Deassert CS after transfer */ +#define SPI_XFER_BEGIN BIT(0) /* Assert CS before transfer */ +#define SPI_XFER_END BIT(1) /* Deassert CS after transfer */ #define SPI_XFER_ONCE (SPI_XFER_BEGIN | SPI_XFER_END) -#define SPI_XFER_MMAP 0x04 /* Memory Mapped start */ -#define SPI_XFER_MMAP_END 0x08 /* Memory Mapped End */ -#define SPI_XFER_U_PAGE 0x10 +#define SPI_XFER_MMAP BIT(2) /* Memory Mapped start */ +#define SPI_XFER_MMAP_END BIT(3) /* Memory Mapped End */ +#define SPI_XFER_U_PAGE BIT(4) };
/**
- Add comments on mode_rx - Tab space's
Cc: Simon Glass sjg@chromium.org Cc: Michal Simek michal.simek@xilinx.com Cc: Siva Durga Prasad Paladugu sivadur@xilinx.com Tested-by: Mugunthan V N mugunthanvnm@ti.com Tested-by: Bin Meng bmeng.cn@gmail.com Tested-by: Jagan Teki jteki@openedev.com Reviewed-by: Bin Meng bmeng.cn@gmail.com Signed-off-by: Jagan Teki jteki@openedev.com --- include/spi.h | 32 ++++++++++++++++---------------- 1 file changed, 16 insertions(+), 16 deletions(-)
diff --git a/include/spi.h b/include/spi.h index f889249..80f8523 100644 --- a/include/spi.h +++ b/include/spi.h @@ -11,26 +11,26 @@ #define _SPI_H_
/* SPI mode flags */ -#define SPI_CPHA BIT(0) /* clock phase */ -#define SPI_CPOL BIT(1) /* clock polarity */ -#define SPI_MODE_0 (0|0) /* (original MicroWire) */ -#define SPI_MODE_1 (0|SPI_CPHA) -#define SPI_MODE_2 (SPI_CPOL|0) -#define SPI_MODE_3 (SPI_CPOL|SPI_CPHA) -#define SPI_CS_HIGH BIT(2) /* CS active high */ -#define SPI_LSB_FIRST BIT(3) /* per-word bits-on-wire */ -#define SPI_3WIRE BIT(4) /* SI/SO signals shared */ -#define SPI_LOOP BIT(5) /* loopback mode */ -#define SPI_SLAVE BIT(6) /* slave mode */ -#define SPI_PREAMBLE BIT(7) /* Skip preamble bytes */ +#define SPI_CPHA BIT(0) /* clock phase */ +#define SPI_CPOL BIT(1) /* clock polarity */ +#define SPI_MODE_0 (0|0) /* (original MicroWire) */ +#define SPI_MODE_1 (0|SPI_CPHA) +#define SPI_MODE_2 (SPI_CPOL|0) +#define SPI_MODE_3 (SPI_CPOL|SPI_CPHA) +#define SPI_CS_HIGH BIT(2) /* CS active high */ +#define SPI_LSB_FIRST BIT(3) /* per-word bits-on-wire */ +#define SPI_3WIRE BIT(4) /* SI/SO signals shared */ +#define SPI_LOOP BIT(5) /* loopback mode */ +#define SPI_SLAVE BIT(6) /* slave mode */ +#define SPI_PREAMBLE BIT(7) /* Skip preamble bytes */ #define SPI_TX_BYTE BIT(8) /* transmit with 1 wire byte */ #define SPI_TX_QUAD BIT(9) /* transmit with 4 wires */
/* SPI mode_rx flags */ -#define SPI_RX_SLOW BIT(0) -#define SPI_RX_FAST BIT(1) -#define SPI_RX_DUAL BIT(2) -#define SPI_RX_QUAD BIT(4) +#define SPI_RX_SLOW BIT(0) /* receive with 1 wire slow */ +#define SPI_RX_FAST BIT(1) /* receive with 1 wire fast */ +#define SPI_RX_DUAL BIT(2) /* receive with 2 wires */ +#define SPI_RX_QUAD BIT(4) /* receive with 4 wires */
/* SPI bus connection options - see enum spi_dual_flash */ #define SPI_CONN_DUAL_SHARED (1 << 0)
SLOW, FAST, DUAL, DUAL_IO, QUAD, QUAD_IO changed order to SLOW, FAST, DUAL, QUAD, DUAL_IO, QUAD_IO
Cc: Simon Glass sjg@chromium.org Cc: Bin Meng bmeng.cn@gmail.com Cc: Michal Simek michal.simek@xilinx.com Cc: Siva Durga Prasad Paladugu sivadur@xilinx.com Tested-by: Jagan Teki jteki@openedev.com Signed-off-by: Jagan Teki jteki@openedev.com --- drivers/mtd/spi/sf_internal.h | 4 ++-- drivers/mtd/spi/spi_flash.c | 2 +- include/spi.h | 2 +- 3 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/mtd/spi/sf_internal.h b/drivers/mtd/spi/sf_internal.h index 55ba81e..007a5a0 100644 --- a/drivers/mtd/spi/sf_internal.h +++ b/drivers/mtd/spi/sf_internal.h @@ -25,8 +25,8 @@ enum spi_read_cmds { ARRAY_SLOW = BIT(0), ARRAY_FAST = BIT(1), DUAL_OUTPUT_FAST = BIT(2), - DUAL_IO_FAST = BIT(3), - QUAD_OUTPUT_FAST = BIT(4), + QUAD_OUTPUT_FAST = BIT(3), + DUAL_IO_FAST = BIT(4), QUAD_IO_FAST = BIT(5), };
diff --git a/drivers/mtd/spi/spi_flash.c b/drivers/mtd/spi/spi_flash.c index 691be1a..e92f729 100644 --- a/drivers/mtd/spi/spi_flash.c +++ b/drivers/mtd/spi/spi_flash.c @@ -975,8 +975,8 @@ int spi_flash_scan(struct spi_flash *flash) CMD_READ_ARRAY_SLOW, CMD_READ_ARRAY_FAST, CMD_READ_DUAL_OUTPUT_FAST, - CMD_READ_DUAL_IO_FAST, CMD_READ_QUAD_OUTPUT_FAST, + CMD_READ_DUAL_IO_FAST, CMD_READ_QUAD_IO_FAST };
/* Read the ID codes */ diff --git a/include/spi.h b/include/spi.h index 80f8523..85866a2 100644 --- a/include/spi.h +++ b/include/spi.h @@ -30,7 +30,7 @@ #define SPI_RX_SLOW BIT(0) /* receive with 1 wire slow */ #define SPI_RX_FAST BIT(1) /* receive with 1 wire fast */ #define SPI_RX_DUAL BIT(2) /* receive with 2 wires */ -#define SPI_RX_QUAD BIT(4) /* receive with 4 wires */ +#define SPI_RX_QUAD BIT(3) /* receive with 4 wires */
/* SPI bus connection options - see enum spi_dual_flash */ #define SPI_CONN_DUAL_SHARED (1 << 0)
On Tue, Dec 29, 2015 at 1:32 AM, Jagan Teki jteki@openedev.com wrote:
SLOW, FAST, DUAL, DUAL_IO, QUAD, QUAD_IO changed order to SLOW, FAST, DUAL, QUAD, DUAL_IO, QUAD_IO
Cc: Simon Glass sjg@chromium.org Cc: Bin Meng bmeng.cn@gmail.com Cc: Michal Simek michal.simek@xilinx.com Cc: Siva Durga Prasad Paladugu sivadur@xilinx.com Tested-by: Jagan Teki jteki@openedev.com Signed-off-by: Jagan Teki jteki@openedev.com
drivers/mtd/spi/sf_internal.h | 4 ++-- drivers/mtd/spi/spi_flash.c | 2 +- include/spi.h | 2 +- 3 files changed, 4 insertions(+), 4 deletions(-)
Reviewed-by: Bin Meng bmeng.cn@gmail.com
On 28 December 2015 at 23:02, Jagan Teki jteki@openedev.com wrote:
Cleanup set on spi_slave{}
Changes for v2: - Replaced mode, mode_rx out-of structure members position - Added SPI_TX_DUAL patch
Jagan Teki (10): spi: Remove SPI_OPM_RX_EXTN spi: Remove SPI_OPM_RX_DIO|QIOF spi: Rename SPI_OPM_RX_* to SPI_RX_* spi: Rename op_mode_rx to mode_rx spi: Move flags macro's to spi_slave{} members spi: Fix bit assignment with flags spi: Use BIT macro spi: Minor cleanup sf: Make IO modes at last in read modes spi: Add SPI_TX_DUAL mode
Applied to u-boot-spi/master
thanks!
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Jagan Teki