On Thu, Dec 9, 2021 at 4:12 AM Dylan Hung dylan_hung@aspeedtech.com wrote:

Add support for DM_MDIO to connect to PHY. For the systems that have a stand-alone MDIO hardware block, enable CONFIG_DM_MDIO to use driver model for MDIO devices.

Signed-off-by: Dylan Hung dylan_hung@aspeedtech.com

drivers/net/ftgmac100.c | 20 +++++++++++++++----- 1 file changed, 15 insertions(+), 5 deletions(-)

diff --git a/drivers/net/ftgmac100.c b/drivers/net/ftgmac100.c index 0687230b4bb4..b6e9526c3b9f 100644 --- a/drivers/net/ftgmac100.c +++ b/drivers/net/ftgmac100.c @@ -220,7 +220,11 @@ static int ftgmac100_phy_init(struct udevice *dev) struct phy_device *phydev; int ret;

•   phydev = phy_connect(priv->bus, priv->phy_addr, dev, priv->phy_mode);
  

•   if (IS_ENABLED(CONFIG_DM_MDIO))
  

•           phydev = dm_eth_phy_connect(dev);
  

•   else
  

•           phydev = phy_connect(priv->bus, priv->phy_addr, dev, priv->phy_mode);
  

•   if (!phydev)
            return -ENODEV;
  
  

@@ -589,10 +593,16 @@ static int ftgmac100_probe(struct udevice *dev) if (ret) goto out;

•   ret = ftgmac100_mdio_init(dev);
  

•   if (ret) {
  

•           dev_err(dev, "Failed to initialize mdiobus: %d\n", ret);
  

•           goto out;
  

•   /*
  

•    * If DM MDIO is enabled, the MDIO bus will be initialized later in
  

•    * dm_eth_phy_connect
  

•    */
  

•   if (!IS_ENABLED(CONFIG_DM_MDIO)) {
  

•           ret = ftgmac100_mdio_init(dev);
  

•           if (ret) {
  

•                   dev_err(dev, "Failed to initialize mdiobus: %d\n", ret);
  

•                   goto out;
  

•           }
    }
  
    ret = ftgmac100_phy_init(dev);
  

-- 2.25.1

Reviewed-by: Ramon Fried rfried.dev@gmail.com

On Thu, Dec 9, 2021 at 4:12 AM Dylan Hung dylan_hung@aspeedtech.com wrote:

There are 4 MDIO bus controllers in AST2600 SOC. Each of them can connect to one or more PHY chips and is flexible to work with the 4 MAC devices in AST2600. On AST2600 EVB, MDIO 0,1,2,3 connect to the PHY chips used by MAC 0,1,2,3 respectively.

Signed-off-by: Dylan Hung dylan_hung@aspeedtech.com

arch/arm/dts/ast2600-evb.dts | 68 ++++++++++++++++++++++++++++++++++++ arch/arm/dts/ast2600.dtsi | 46 +++++++++++++++++++++--- 2 files changed, 109 insertions(+), 5 deletions(-)

diff --git a/arch/arm/dts/ast2600-evb.dts b/arch/arm/dts/ast2600-evb.dts index 2abd31341c11..4e256d1e2b4e 100644 --- a/arch/arm/dts/ast2600-evb.dts +++ b/arch/arm/dts/ast2600-evb.dts @@ -163,6 +163,74 @@ pinctrl-0 = <&pinctrl_i2c9_default>; };

+&mdio0 {

•   status = "okay";
  

•   #address-cells = <1>;
  

•   #size-cells = <0>;
  

•   ethphy0: ethernet-phy@0 {
  

•           reg = <0>;
  

•   };
  

+};

+&mdio1 {

•   status = "okay";
  

•   #address-cells = <1>;
  

•   #size-cells = <0>;
  

•   ethphy1: ethernet-phy@0 {
  

•           reg = <0>;
  

•   };
  

+};

+&mdio2 {

•   status = "okay";
  

•   #address-cells = <1>;
  

•   #size-cells = <0>;
  

•   ethphy2: ethernet-phy@0 {
  

•           reg = <0>;
  

•   };
  

+};

+&mdio3 {

•   status = "okay";
  

•   #address-cells = <1>;
  

•   #size-cells = <0>;
  

•   ethphy3: ethernet-phy@0 {
  

•           reg = <0>;
  

•   };
  

+};

+&mac0 {

•   status = "okay";
  

•   phy-mode = "rgmii-rxid";
  

•   phy-handle = <&ethphy0>;
  

•   pinctrl-names = "default";
  

•   pinctrl-0 = <&pinctrl_rgmii1_default>;
  

+};

+&mac1 {

•   status = "okay";
  

•   phy-mode = "rgmii-rxid";
  

•   phy-handle = <&ethphy1>;
  

•   pinctrl-names = "default";
  

•   pinctrl-0 = <&pinctrl_rgmii2_default>;
  

+};

+&mac2 {

•   status = "okay";
  

•   phy-mode = "rgmii";
  

•   phy-handle = <&ethphy2>;
  

•   pinctrl-names = "default";
  

•   pinctrl-0 = <&pinctrl_rgmii3_default>;
  

+};

+&mac3 {

•   status = "okay";
  

•   phy-mode = "rgmii";
  

•   phy-handle = <&ethphy3>;
  

•   pinctrl-names = "default";
  

•   pinctrl-0 = <&pinctrl_rgmii4_default>;
  

+};

&scu { mac0-clk-delay = <0x1d 0x1c 0x10 0x17 diff --git a/arch/arm/dts/ast2600.dtsi b/arch/arm/dts/ast2600.dtsi index f121f547e6d4..bdcca69e060d 100644 --- a/arch/arm/dts/ast2600.dtsi +++ b/arch/arm/dts/ast2600.dtsi @@ -193,11 +193,47 @@ interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>; };

•           mdio: ethernet@1e650000 {
  

•                   compatible = "aspeed,aspeed-mdio";
  

•                   reg = <0x1e650000 0x40>;
  

•                   resets = <&rst ASPEED_RESET_MII>;
  

•                   status = "disabled";
  

•           mdio: bus@1e650000 {
  

•                   compatible = "simple-bus";
  

•                   #address-cells = <1>;
  

•                   #size-cells = <1>;
  

•                   ranges = <0 0x1e650000 0x100>;
  

•                   mdio0: mdio@0 {
  

•                           compatible = "aspeed,ast2600-mdio";
  

•                           reg = <0 0x8>;
  

•                           resets = <&rst ASPEED_RESET_MII>;
  

•                           pinctrl-names = "default";
  

•                           pinctrl-0 = <&pinctrl_mdio1_default>;
  

•                           status = "disabled";
  

•                   };
  

•                   mdio1: mdio@8 {
  

•                           compatible = "aspeed,ast2600-mdio";
  

•                           reg = <0x8 0x8>;
  

•                           resets = <&rst ASPEED_RESET_MII>;
  

•                           pinctrl-names = "default";
  

•                           pinctrl-0 = <&pinctrl_mdio2_default>;
  

•                           status = "disabled";
  

•                   };
  

•                   mdio2: mdio@10 {
  

•                           compatible = "aspeed,ast2600-mdio";
  

•                           reg = <0x10 0x8>;
  

•                           resets = <&rst ASPEED_RESET_MII>;
  

•                           pinctrl-names = "default";
  

•                           pinctrl-0 = <&pinctrl_mdio3_default>;
  

•                           status = "disabled";
  

•                   };
  

•                   mdio3: mdio@18 {
  

•                           compatible = "aspeed,ast2600-mdio";
  

•                           reg = <0x18 0x8>;
  

•                           resets = <&rst ASPEED_RESET_MII>;
  

•                           pinctrl-names = "default";
  

•                           pinctrl-0 = <&pinctrl_mdio4_default>;
  

•                           status = "disabled";
  

•                   };
            };
  
            mac0: ftgmac@1e660000 {
  

-- 2.25.1

Reviewed-by: Ramon Fried rfried.dev@gmail.com

On Thu, Dec 9, 2021 at 4:12 AM Dylan Hung dylan_hung@aspeedtech.com wrote:

The clock delay of the RMII/RGMII interface is controlled by SCU340~35C. These values are obtained by measurement and experiments so we simply use macro to define them.

Signed-off-by: Dylan Hung dylan_hung@aspeedtech.com

drivers/clk/aspeed/clk_ast2600.c | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-)

diff --git a/drivers/clk/aspeed/clk_ast2600.c b/drivers/clk/aspeed/clk_ast2600.c index 3a92739f5cf5..6441fcbbbd4c 100644 --- a/drivers/clk/aspeed/clk_ast2600.c +++ b/drivers/clk/aspeed/clk_ast2600.c @@ -19,11 +19,11 @@ DECLARE_GLOBAL_DATA_PTR; #define CLKIN_25M 25000000UL

/* MAC Clock Delay settings */ -#define MAC12_DEF_DELAY_1G 0x0041b75d -#define MAC12_DEF_DELAY_100M 0x00417410 -#define MAC12_DEF_DELAY_10M 0x00417410 -#define MAC34_DEF_DELAY_1G 0x0010438a -#define MAC34_DEF_DELAY_100M 0x00104208 +#define MAC12_DEF_DELAY_1G 0x0028a410 +#define MAC12_DEF_DELAY_100M 0x00410410 +#define MAC12_DEF_DELAY_10M 0x00410410 +#define MAC34_DEF_DELAY_1G 0x00104208 +#define MAC34_DEF_DELAY_100M 0x00104208 #define MAC34_DEF_DELAY_10M 0x00104208

/*

2.25.1

Reviewed-by: Ramon Fried rfried.dev@gmail.com