Re: [U-Boot] [PATCH] riscv: qemu: Use correct SYS_TEXT_BASE for S-mode on 32bit system

Hi Karsten
From: Karsten Merker [mailto:merker@debian.org] Sent: Friday, April 26, 2019 5:35 PM To: Rick Jian-Zhi Chen(陳建志) Cc: Anup Patel; Bin Meng; Lukas Auer; Tom Rini; U-Boot Mailing List; Palmer Dabbelt Subject: Re: [U-Boot] [PATCH] riscv: qemu: Use correct SYS_TEXT_BASE for S-mode on 32bit system
On Thu, Apr 11, 2019 at 06:52:12AM +0000, Anup Patel wrote:
For 32bit system, the OpenSBI (or BBL) will jump to 0x80400000 address in S-mode whereas for 64bit system it will jump to 0x80200000 address in S-mode.
Currently, the S-mode U-Boot sets SYS_TEXT_BASE to 0x80200000 for both 32bit and 64bit system. This breaks S-mode U-Boot for 32bit system.
This patch sets different SYS_TEXT_BASE for 32bit and 64bit system so that S-mode U-Boot works fine for both.
Signed-off-by: Anup Patel anup.patel@wdc.com
board/emulation/qemu-riscv/Kconfig | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/board/emulation/qemu-riscv/Kconfig b/board/emulation/qemu-riscv/Kconfig index cf057e7de6..20ea6dc59b 100644 --- a/board/emulation/qemu-riscv/Kconfig +++ b/board/emulation/qemu-riscv/Kconfig @@ -14,7 +14,8 @@ config SYS_CONFIG_NAME
config SYS_TEXT_BASE default 0x80000000 if !RISCV_SMODE
- default 0x80200000 if RISCV_SMODE
- default 0x80200000 if RISCV_SMODE && ARCH_RV64I
- default 0x80400000 if RISCV_SMODE && ARCH_RV32I
config BOARD_SPECIFIC_OPTIONS # dummy def_bool y
Hello Rick,
may I kindly ping you regarding this patch (patchwork entry at http://patchwork.ozlabs.org/patch/1083725/)? It would be great if you could commit it soonish as without it the qemu RV32 target is currently non-functional.
The patch has received two reviews and a tested-by and doesn't touch any generic code, so it should be safe to apply.
I have applied to u-boot-riscv/master
Thanks Rick
Regards, Karsten -- Ich widerspreche hiermit ausdrücklich der Nutzung sowie der Weitergabe meiner personenbezogenen Daten für Zwecke der Werbung sowie der Markt- oder Meinungsforschung.
participants (1)
-
Rick Chen