This patch adds support for Beagle Board. Beagle board from TI is a development platform based on TI's OMAP3530 silicon.

You can find more about Beagle Board here: www.beagleboard.org

More on OMAP3530 (including documentation can be found here): http://focus.ti.com/docs/prod/folders/print/omap3530.html

Signed-off-by: Raghavendra KH r-khandenahally@ti.com

--- arch/arm/configs/omap3530_beagle_per_uart_defconfig | 185 +++++++++++++ arch/arm/mach-omap/arch-omap.dox | 1 board/omap/Kconfig | 9 board/omap/Makefile | 1 board/omap/board-beagle.c | 276 ++++++++++++++++++++ 5 files changed, 472 insertions(+)

Index: u-boot-v2/board/omap/board-beagle.c =================================================================== --- /dev/null 1970-01-01 00:00:00.000000000 +0000 +++ u-boot-v2/board/omap/board-beagle.c 2008-06-24 02:26:07.000000000 +0200 @@ -0,0 +1,276 @@ +/** + * @file + * @brief Beagle Specific Board Initialization routines + * + * FileName: board/omap/board-beagle.c + * + * Beagle Board from Texas Instruments as described here: + * http://www.beagleboard.org + * + * This board is based on OMAP3530. + * More on OMAP3530 (including documentation can be found here): + * http://focus.ti.com/docs/prod/folders/print/omap3530.html + * + * This file provides initialization in two stages: + * @li boot time initialization - do basics required to get SDRAM working. + * This is run from SRAM - so no case constructs and global vars can be used. + * @li run time initialization - this is for the rest of the initializations + * such as flash, uart etc. + * + * Boot time initialization includes: + * @li SDRAM initialization. + * @li Pin Muxing relevant for Beagle. + * + * Run time initialization includes + * @li serial @ref serial_ns16550.c driver device definition + * + * Originally from board/omap/board-sdp343x.c + */ +/* + * (C) Copyright 2008 + * Texas Instruments, <www.ti.com> + * Raghavendra KH r-khandenahally@ti.com + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <console.h> +#include <init.h> +#include <driver.h> +#include <asm/io.h> +#include <ns16550.h> +#include <asm/arch/silicon.h> +#include <asm/arch/sdrc.h> +#include <asm/arch/sys_info.h> +#include <asm/arch/syslib.h> +#include <asm/arch/control.h> +#include <asm/arch/omap3-mux.h> +#include "board.h" + +/******************** Board Boot Time *******************/ + +/** + * @brief Do the SDRC initialization for 128Meg Micron DDR for CS0 + * + * @return void + */ +static void sdrc_init(void) +{ + /* SDRAM software reset */ + /* No idle ack and RESET enable */ + __raw_writel(0x1A, SDRC_REG(SYSCONFIG)); + sdelay(100); + /* No idle ack and RESET disable */ + __raw_writel(0x18, SDRC_REG(SYSCONFIG)); + + /* SDRC Sharing register */ + /* 32-bit SDRAM on data lane [31:0] - CS0 */ + /* pin tri-stated = 1 */ + __raw_writel(0x00000100, SDRC_REG(SHARING)); + + /* ----- SDRC Registers Configuration --------- */ + /* SDRC_MCFG0 register */ + __raw_writel(0x02584099, SDRC_REG(MCFG_0)); + + /* SDRC_RFR_CTRL0 register */ + __raw_writel(0x54601, SDRC_REG(RFR_CTRL_0)); + + /* SDRC_ACTIM_CTRLA0 register */ + __raw_writel(0xA29DB4C6, SDRC_REG(ACTIM_CTRLA_0)); + + /* SDRC_ACTIM_CTRLB0 register */ + __raw_writel(0x12214, SDRC_REG(ACTIM_CTRLB_0)); + + /* Disble Power Down of CKE due to 1 CKE on combo part */ + __raw_writel(0x00000081, SDRC_REG(POWER)); + + /* SDRC_MANUAL command register */ + /* NOP command */ + __raw_writel(0x00000000, SDRC_REG(MANUAL_0)); + /* Precharge command */ + __raw_writel(0x00000001, SDRC_REG(MANUAL_0)); + /* Auto-refresh command */ + __raw_writel(0x00000002, SDRC_REG(MANUAL_0)); + /* Auto-refresh command */ + __raw_writel(0x00000002, SDRC_REG(MANUAL_0)); + + /* SDRC MR0 register Burst length=4 */ + __raw_writel(0x00000032, SDRC_REG(MR_0)); + + /* SDRC DLLA control register */ + __raw_writel(0x0000000A, SDRC_REG(DLLA_CTRL)); + + return; +} + +/** + * @brief Do the pin muxing required for Board operation. + * We enable ONLY the pins we require to set. OMAP provides pins which do not + * have alternate modes. Such pins done need to be set. + * + * See @ref MUX_VAL for description of the muxing mode. + * + * @return void + */ +static void mux_config(void) +{ + + /* SDRC_D0 - SDRC_D31 default mux mode is mode0 */ + + /* GPMC */ + MUX_VAL(CP(GPMC_A1), (IDIS | PTD | DIS | M0)); + MUX_VAL(CP(GPMC_A2), (IDIS | PTD | DIS | M0)); + MUX_VAL(CP(GPMC_A3), (IDIS | PTD | DIS | M0)); + MUX_VAL(CP(GPMC_A4), (IDIS | PTD | DIS | M0)); + MUX_VAL(CP(GPMC_A5), (IDIS | PTD | DIS | M0)); + MUX_VAL(CP(GPMC_A6), (IDIS | PTD | DIS | M0)); + MUX_VAL(CP(GPMC_A7), (IDIS | PTD | DIS | M0)); + MUX_VAL(CP(GPMC_A8), (IDIS | PTD | DIS | M0)); + MUX_VAL(CP(GPMC_A9), (IDIS | PTD | DIS | M0)); + MUX_VAL(CP(GPMC_A10), (IDIS | PTD | DIS | M0)); + + /* D0-D7 default mux mode is mode0 */ + MUX_VAL(CP(GPMC_D8), (IEN | PTD | DIS | M0)); + MUX_VAL(CP(GPMC_D9), (IEN | PTD | DIS | M0)); + MUX_VAL(CP(GPMC_D10), (IEN | PTD | DIS | M0)); + MUX_VAL(CP(GPMC_D11), (IEN | PTD | DIS | M0)); + MUX_VAL(CP(GPMC_D12), (IEN | PTD | DIS | M0)); + MUX_VAL(CP(GPMC_D13), (IEN | PTD | DIS | M0)); + MUX_VAL(CP(GPMC_D14), (IEN | PTD | DIS | M0)); + MUX_VAL(CP(GPMC_D15), (IEN | PTD | DIS | M0)); + MUX_VAL(CP(GPMC_CLK), (IDIS | PTD | DIS | M0)); + /* GPMC_NADV_ALE default mux mode is mode0 */ + /* GPMC_NOE default mux mode is mode0 */ + /* GPMC_NWE default mux mode is mode0 */ + /* GPMC_NBE0_CLE default mux mode is mode0 */ + MUX_VAL(CP(GPMC_NBE0_CLE), (IDIS | PTD | DIS | M0)); + MUX_VAL(CP(GPMC_NBE1), (IEN | PTD | DIS | M0)); + MUX_VAL(CP(GPMC_NWP), (IEN | PTD | DIS | M0)); + /* GPMC_WAIT0 default mux mode is mode0 */ + MUX_VAL(CP(GPMC_WAIT1), (IEN | PTU | EN | M0)); + + /* SERIAL INTERFACE */ + MUX_VAL(CP(UART3_CTS_RCTX), (IEN | PTD | EN | M0)); + MUX_VAL(CP(UART3_RTS_SD), (IDIS | PTD | DIS | M0)); + MUX_VAL(CP(UART3_RX_IRRX), (IEN | PTD | DIS | M0)); + MUX_VAL(CP(UART3_TX_IRTX), (IDIS | PTD | DIS | M0)); + MUX_VAL(CP(HSUSB0_CLK), (IEN | PTD | DIS | M0)); + MUX_VAL(CP(HSUSB0_STP), (IDIS | PTU | EN | M0)); + MUX_VAL(CP(HSUSB0_DIR), (IEN | PTD | DIS | M0)); + MUX_VAL(CP(HSUSB0_NXT), (IEN | PTD | DIS | M0)); + MUX_VAL(CP(HSUSB0_DATA0), (IEN | PTD | DIS | M0)); + MUX_VAL(CP(HSUSB0_DATA1), (IEN | PTD | DIS | M0)); + MUX_VAL(CP(HSUSB0_DATA2), (IEN | PTD | DIS | M0)); + MUX_VAL(CP(HSUSB0_DATA3), (IEN | PTD | DIS | M0)); + MUX_VAL(CP(HSUSB0_DATA4), (IEN | PTD | DIS | M0)); + MUX_VAL(CP(HSUSB0_DATA5), (IEN | PTD | DIS | M0)); + MUX_VAL(CP(HSUSB0_DATA6), (IEN | PTD | DIS | M0)); + MUX_VAL(CP(HSUSB0_DATA7), (IEN | PTD | DIS | M0)); + /* I2C1_SCL default mux mode is mode0 */ + /* I2C1_SDA default mux mode is mode0 */ +} + +/** + * @brief The basic entry point for board initialization. + * + * This is called as part of machine init (after arch init). + * This is again called with stack in SRAM, so not too many + * constructs possible here. + * + * @return void + */ +void board_init(void) +{ + int in_sdram = running_in_sdram(); + mux_config(); + /* Dont reconfigure SDRAM while running in SDRAM! */ + if (!in_sdram) + sdrc_init(); +} + +/******************** Board Run Time *******************/ + +#ifdef CONFIG_DRIVER_SERIAL_NS16550 + +static struct NS16550_plat serial_plat = { + .clock = 48000000, /* 48MHz (APLL96/2) */ + .f_caps = CONSOLE_STDIN | CONSOLE_STDOUT | CONSOLE_STDERR, + .reg_read = omap_uart_read, + .reg_write = omap_uart_write, +}; + +static struct device_d beagle_serial_device = { + .name = "serial_ns16550", + .id = "uart3", + .map_base = OMAP_UART3_BASE, + .size = 1024, + .platform_data = (void *)&serial_plat, + .type = DEVICE_TYPE_CONSOLE, +}; + +/** + * @brief UART serial port initialization - remember to enable COM clocks in + * arch + * + * @return result of device registration + */ +static int beagle_console_init(void) +{ + /* Register the serial port */ + return register_device(&beagle_serial_device); +} +console_initcall(beagle_console_init); +#endif /* CONFIG_DRIVER_SERIAL_NS16550 */ + +static struct device_d sdram_dev = { + .name = "ram", + .id = "ram0", + + .map_base = 0x80000000, + .size = 128 * 1024 * 1024, + + .type = DEVICE_TYPE_DRAM, +}; + +#ifndef CONFIG_CMD_MEMORY +static struct driver_d ram_drv = { + .name = "ram", + .probe = dummy_probe, + .open = dev_open_default, + .close = dev_close_default, + .read = mem_read, + .write = mem_write, + .lseek = dev_lseek_default, + .type = DEVICE_TYPE_DRAM, +}; +#endif + +static int beagle_devices_init(void) +{ + int ret; + ret = register_device(&sdram_dev); + if (ret) + goto failed; +#ifndef CONFIG_CMD_MEMORY + ret = register_driver(&ram_drv); + if (ret) + goto failed; +#endif +failed: + return ret; +} +device_initcall(beagle_devices_init); Index: u-boot-v2/board/omap/Kconfig =================================================================== --- u-boot-v2.orig/board/omap/Kconfig 2008-06-24 02:17:03.000000000 +0200 +++ u-boot-v2/board/omap/Kconfig 2008-06-24 02:17:57.000000000 +0200 @@ -23,12 +23,14 @@ config ARCH_TEXT_BASE hex default 0x80e80000 if MACH_OMAP343xSDP + default 0x80e80000 if MACH_BEAGLE

menu "OMAP Platform Features" depends on MACH_OMAP

config BOARDINFO default "Texas Instrument's SDP343x" if MACH_OMAP343xSDP + default "Texas Instrument's Beagle" if MACH_BEAGLE

choice prompt "Select OMAP platform" @@ -39,6 +41,13 @@ select OMAP_CLOCK_ALL help Say Y here if you are using SDP343x platform + +config MACH_BEAGLE + bool "Texas Instrument's Beagle Board" + select MACH_HAS_LOWLEVEL_INIT + select OMAP_CLOCK_ALL + help + Say Y here if you are using Beagle Board endchoice

config MACH_OMAP_ADVANCED_MUX Index: u-boot-v2/board/omap/Makefile =================================================================== --- u-boot-v2.orig/board/omap/Makefile 2008-06-24 02:17:03.000000000 +0200 +++ u-boot-v2/board/omap/Makefile 2008-06-24 02:17:57.000000000 +0200 @@ -22,4 +22,5 @@

obj-$(CONFIG_MACH_DO_LOWLEVEL_INIT) += platform.o obj-$(CONFIG_MACH_OMAP343xSDP) += board-sdp343x.o +obj-$(CONFIG_MACH_BEAGLE) += board-beagle.o

Index: u-boot-v2/arch/arm/mach-omap/arch-omap.dox =================================================================== --- u-boot-v2.orig/arch/arm/mach-omap/arch-omap.dox 2008-06-24 02:17:02.000000000 +0200 +++ u-boot-v2/arch/arm/mach-omap/arch-omap.dox 2008-06-24 02:17:57.000000000 +0200 @@ -18,6 +18,7 @@ @section omap_boards Boards using OMAP processors

@li @subpage board/omap/board-sdp343x.c +@li @subpage board/omap/board-beagle.c

@section omap_arch Documentation for OMAP Architectures files

Index: u-boot-v2/arch/arm/configs/omap3530_beagle_per_uart_defconfig =================================================================== --- /dev/null 1970-01-01 00:00:00.000000000 +0000 +++ u-boot-v2/arch/arm/configs/omap3530_beagle_per_uart_defconfig 2008-06-24 02:23:36.000000000 +0200 @@ -0,0 +1,185 @@ +# +# Automatically generated make config: don't edit +# U-Boot version: 2.0.0-rc5-git +# Tue Jun 24 02:22:41 2008 +# +CONFIG_ARCH_TEXT_BASE=0x80e80000 +CONFIG_BOARDINFO="Texas Instrument's Beagle" +# CONFIG_BOARD_LINKER_SCRIPT is not set +CONFIG_GENERIC_LINKER_SCRIPT=y +CONFIG_ARM=y +CONFIG_ARMCORTEXA8=y +CONFIG_ARCH_OMAP=y +# CONFIG_MACH_MX1ADS is not set +# CONFIG_MACH_SCB9328 is not set +# CONFIG_MACH_PCM038 is not set +# CONFIG_MACH_IMX27ADS is not set +# CONFIG_MACH_ECO920 is not set +# CONFIG_MACH_NXDB500 is not set +# CONFIG_MACH_PCM037 is not set +CONFIG_MACH_OMAP=y +# CONFIG_MACH_AT91SAM9260_EK is not set + +# +# OMAP Features +# +CONFIG_ARCH_OMAP3=y +CONFIG_OMAP_CONFIG_STACKSIZE=0x00008000 +CONFIG_OMAP_MALLOC_LEN=0x00008000 +CONFIG_OMAP_CLOCK_ALL=y +CONFIG_OMAP_CLOCK_SOURCE_S32K=y +CONFIG_OMAP3_CLOCK_CONFIG=y +# CONFIG_OMAP3_COPY_CLOCK_SRAM is not set + +# +# OMAP Platform Features +# +# CONFIG_MACH_OMAP343xSDP is not set +CONFIG_MACH_BEAGLE=y + +# +# Arm specific settings +# +# CONFIG_CMDLINE_TAG is not set +# CONFIG_SETUP_MEMORY_TAGS is not set +# CONFIG_INITRD_TAG is not set +# CONFIG_ARMCORTEXA8_DCACHE_SKIP is not set +CONFIG_HAS_KALLSYMS=y +CONFIG_HAS_MODULES=y +# CONFIG_CMD_MEMORY is not set + +# +# General Settings +# + +# +# memory layout +# +CONFIG_HAVE_CONFIGURABLE_TEXT_BASE=y +CONFIG_TEXT_BASE=0x40200000 +CONFIG_HAVE_CONFIGURABLE_MEMORY_LAYOUT=y +# CONFIG_MEMORY_LAYOUT_DEFAULT is not set +CONFIG_MEMORY_LAYOUT_FIXED=y +CONFIG_STACK_BASE=0x87BF7F10 +CONFIG_STACK_SIZE=0x8000 +CONFIG_MALLOC_BASE=0x87BFFF10 +CONFIG_MALLOC_SIZE=0x400000 +# CONFIG_BROKEN is not set +# CONFIG_EXPERIMENTAL is not set +CONFIG_MACH_HAS_LOWLEVEL_INIT=y +CONFIG_MACH_DO_LOWLEVEL_INIT=y +CONFIG_ARCH_HAS_LOWLEVEL_INIT=y +CONFIG_PROMPT="X-load Beagle>" +CONFIG_BAUDRATE=115200 +# CONFIG_CMDLINE_EDITING is not set +CONFIG_SIMPLE_READLINE=y +CONFIG_LONGHELP=y +CONFIG_CBSIZE=1024 +CONFIG_MAXARGS=16 +# CONFIG_SHELL_HUSH is not set +CONFIG_SHELL_SIMPLE=y +# CONFIG_ERRNO_MESSAGES is not set +# CONFIG_TIMESTAMP is not set +CONFIG_CONSOLE_ACTIVATE_FIRST=y +# CONFIG_OF_FLAT_TREE is not set +# CONFIG_PARTITION is not set +# CONFIG_DEFAULT_ENVIRONMENT is not set + +# +# Debugging +# +# CONFIG_DEBUG_INFO is not set +# CONFIG_ENABLE_FLASH_NOISE is not set +# CONFIG_ENABLE_PARTITION_NOISE is not set +# CONFIG_ENABLE_DEVICE_NOISE is not set + +# +# Commands +# + +# +# scripting +# +# CONFIG_CMD_EDIT is not set +# CONFIG_CMD_EXEC is not set +# CONFIG_CMD_SLEEP is not set +# CONFIG_CMD_SAVEENV is not set +# CONFIG_CMD_LOADENV is not set +# CONFIG_CMD_EXPORT is not set +# CONFIG_CMD_PRINTENV is not set +# CONFIG_CMD_HELP is not set +# CONFIG_CMD_READLINE is not set + +# +# file commands +# +# CONFIG_CMD_LS is not set +# CONFIG_CMD_RM is not set +# CONFIG_CMD_CAT is not set +# CONFIG_CMD_MKDIR is not set +# CONFIG_CMD_RMDIR is not set +# CONFIG_CMD_CP is not set +# CONFIG_CMD_PWD is not set +# CONFIG_CMD_CD is not set +# CONFIG_CMD_MOUNT is not set +# CONFIG_CMD_UMOUNT is not set + +# +# console +# +# CONFIG_CMD_CLEAR is not set +# CONFIG_CMD_ECHO is not set + +# +# memory +# +CONFIG_CMD_LOADB=y +# CONFIG_CMD_MEMINFO is not set +# CONFIG_CMD_CRC is not set +# CONFIG_CMD_MTEST is not set + +# +# flash +# +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_NAND is not set + +# +# booting +# +# CONFIG_CMD_BOOTM is not set +# CONFIG_CMD_RESET is not set +CONFIG_CMD_GO=y +# CONFIG_CMD_TIMEOUT is not set +# CONFIG_CMD_PARTITION is not set +# CONFIG_NET is not set + +# +# Drivers +# + +# +# serial drivers +# +CONFIG_DRIVER_SERIAL_NS16550=y +CONFIG_DRIVER_SERIAL_NS16550_OMAP_EXTENSIONS=y + +# +# SPI drivers +# +# CONFIG_SPI is not set + +# +# flash drivers +# +# CONFIG_DRIVER_CFI is not set +# CONFIG_DRIVER_CFI_OLD is not set +# CONFIG_NAND is not set + +# +# Filesystem support +# +# CONFIG_FS_CRAMFS is not set +CONFIG_FS_RAMFS=y +CONFIG_FS_DEVFS=y +CONFIG_CRC16=y