On Sun, 16 Dec 2018 19:36:28 -0700 Simon Glass sjg@chromium.org wrote:

Sync defconfigs again since USB_STORAGE is the default on these boards.

Signed-off-by: Simon Glass sjg@chromium.org

Changes in v2:

• Add new patch to resync defconfigs for odroid

configs/odroid-xu3_defconfig | 1 - configs/odroid_defconfig | 1 - 2 files changed, 2 deletions(-)

diff --git a/configs/odroid-xu3_defconfig b/configs/odroid-xu3_defconfig index d5c7cc7129d..11796e5bdf4 100644 --- a/configs/odroid-xu3_defconfig +++ b/configs/odroid-xu3_defconfig @@ -47,7 +47,6 @@ CONFIG_USB_EHCI_HCD=y CONFIG_USB_DWC3=y CONFIG_USB_DWC3_GADGET=y CONFIG_USB_DWC3_PHY_SAMSUNG=y -CONFIG_USB_STORAGE=y CONFIG_USB_GADGET=y CONFIG_USB_GADGET_MANUFACTURER="Samsung" CONFIG_USB_GADGET_VENDOR_NUM=0x04e8 diff --git a/configs/odroid_defconfig b/configs/odroid_defconfig index 594800fc50c..cdb033ba780 100644 --- a/configs/odroid_defconfig +++ b/configs/odroid_defconfig @@ -47,7 +47,6 @@ CONFIG_DM_REGULATOR_MAX77686=y CONFIG_USB=y CONFIG_DM_USB=y CONFIG_USB_EHCI_HCD=y -CONFIG_USB_STORAGE=y CONFIG_USB_GADGET=y CONFIG_USB_GADGET_MANUFACTURER="Samsung" CONFIG_USB_GADGET_VENDOR_NUM=0x04e8

Reviewed-by: Lukasz Majewski lukma@denx.de

Best regards,

Lukasz Majewski

--

DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-59 Fax: (+49)-8142-66989-80 Email: lukma@denx.de

On Sun, 16 Dec 2018 19:36:29 -0700 Simon Glass sjg@chromium.org wrote:

This converts the following to Kconfig: CONFIG_BOARD_TYPES

Signed-off-by: Simon Glass sjg@chromium.org

Changes in v2:

• Remove stranded comments in the header files

common/Kconfig | 8 ++++++++ configs/axs101_defconfig | 1 + configs/axs103_defconfig | 1 + configs/odroid-xu3_defconfig | 1 + configs/odroid_defconfig | 1 + include/configs/axs10x.h | 5 ----- include/configs/hsdk.h | 5 ----- include/configs/odroid.h | 1 - include/configs/odroid_xu3.h | 1 - scripts/config_whitelist.txt | 1 - 10 files changed, 12 insertions(+), 13 deletions(-)

diff --git a/common/Kconfig b/common/Kconfig index 57bd16d9623..a118bbb4b65 100644 --- a/common/Kconfig +++ b/common/Kconfig @@ -645,6 +645,14 @@ config DISPLAY_BOARDINFO_LATE the relocation phase. The board function checkboard() is called to do this.

+config BOARD_TYPES

• bool "Call get_board_type() to get and display the board

type"

• help

•  If this option is enabled, checkboard() will call
  

get_board_type()

•  to get a string containing the board type and this will be
  

•  displayed immediately after the model is shown on the
  

console

•  early in boot.
  

menu "Start-up hooks"

config ARCH_EARLY_INIT_R diff --git a/configs/axs101_defconfig b/configs/axs101_defconfig index b4621c359fc..126ee1a3edf 100644 --- a/configs/axs101_defconfig +++ b/configs/axs101_defconfig @@ -8,6 +8,7 @@ CONFIG_DEBUG_UART=y CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS3,115200n8" +CONFIG_BOARD_TYPES=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="AXS# " diff --git a/configs/axs103_defconfig b/configs/axs103_defconfig index e7894d297cd..c50d51b189b 100644 --- a/configs/axs103_defconfig +++ b/configs/axs103_defconfig @@ -8,6 +8,7 @@ CONFIG_DEBUG_UART=y CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS3,115200n8" +CONFIG_BOARD_TYPES=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="AXS# " diff --git a/configs/odroid-xu3_defconfig b/configs/odroid-xu3_defconfig index 11796e5bdf4..f6f05b29483 100644 --- a/configs/odroid-xu3_defconfig +++ b/configs/odroid-xu3_defconfig @@ -2,6 +2,7 @@ CONFIG_ARM=y CONFIG_ARCH_EXYNOS=y CONFIG_SYS_TEXT_BASE=0x43E00000 CONFIG_ARCH_EXYNOS5=y +CONFIG_BOARD_TYPES=y CONFIG_IDENT_STRING=" for ODROID-XU3/XU4/HC1/HC2" CONFIG_DISTRO_DEFAULTS=y CONFIG_NR_DRAM_BANKS=8 diff --git a/configs/odroid_defconfig b/configs/odroid_defconfig index cdb033ba780..184bb62c1c1 100644 --- a/configs/odroid_defconfig +++ b/configs/odroid_defconfig @@ -3,6 +3,7 @@ CONFIG_ARCH_EXYNOS=y CONFIG_SYS_TEXT_BASE=0x43e00000 CONFIG_ARCH_EXYNOS4=y CONFIG_TARGET_ODROID=y +CONFIG_BOARD_TYPES=y CONFIG_DISTRO_DEFAULTS=y CONFIG_NR_DRAM_BANKS=8 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set diff --git a/include/configs/axs10x.h b/include/configs/axs10x.h index 1b2966fd612..79411282ce2 100644 --- a/include/configs/axs10x.h +++ b/include/configs/axs10x.h @@ -31,11 +31,6 @@ #define CONFIG_SYS_BOOTM_LEN SZ_128M #define CONFIG_SYS_LOAD_ADDR 0x82000000

-/*

• • This board might be of different versions so handle it
• */

-#define CONFIG_BOARD_TYPES

/*

• NAND Flash configuration

*/ diff --git a/include/configs/hsdk.h b/include/configs/hsdk.h index cdf4fddd940..d8331206cd9 100644 --- a/include/configs/hsdk.h +++ b/include/configs/hsdk.h @@ -32,11 +32,6 @@ #define CONFIG_SYS_BOOTM_LEN SZ_128M #define CONFIG_SYS_LOAD_ADDR 0x82000000

-/*

• • This board might be of different versions so handle it
• */

-#define CONFIG_BOARD_TYPES

/*

• UART configuration

*/ diff --git a/include/configs/odroid.h b/include/configs/odroid.h index ad77242e380..bc044e069e0 100644 --- a/include/configs/odroid.h +++ b/include/configs/odroid.h @@ -186,7 +186,6 @@

• TODO: Add Odroid X support

*/ #define CONFIG_MISC_COMMON -#define CONFIG_BOARD_TYPES

#undef CONFIG_REVISION_TAG

diff --git a/include/configs/odroid_xu3.h b/include/configs/odroid_xu3.h index f683ee46e39..c2363dd1eef 100644 --- a/include/configs/odroid_xu3.h +++ b/include/configs/odroid_xu3.h @@ -86,7 +86,6 @@ /* Set soc_rev, soc_id, board_rev, boardname, fdtfile */ #define CONFIG_ODROID_REV_AIN 9 #define CONFIG_REVISION_TAG -#define CONFIG_BOARD_TYPES

#undef CONFIG_SYS_BOARD #define CONFIG_SYS_BOARD "odroid" diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt index b8addeaf693..335977b3038 100644 --- a/scripts/config_whitelist.txt +++ b/scripts/config_whitelist.txt @@ -132,7 +132,6 @@ CONFIG_BOARD_POSTCLK_INIT CONFIG_BOARD_REVISION_TAG CONFIG_BOARD_SIZE_LIMIT CONFIG_BOARD_TAURUS -CONFIG_BOARD_TYPES CONFIG_BOOGER CONFIG_BOOTBLOCK CONFIG_BOOTFILE

Reviewed-by: Lukasz Majewski lukma@denx.de

Best regards,

Lukasz Majewski

--

DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-59 Fax: (+49)-8142-66989-80 Email: lukma@denx.de

On Sun, 16 Dec 2018 19:36:30 -0700 Simon Glass sjg@chromium.org wrote:

At present the model is shown twice, once in the generic code and once in the exynos code. Drop the latter.

Signed-off-by: Simon Glass sjg@chromium.org

Changes in v2: None

board/samsung/common/board.c | 14 ++++++-------- include/samsung/misc.h | 2 -- 2 files changed, 6 insertions(+), 10 deletions(-)

diff --git a/board/samsung/common/board.c b/board/samsung/common/board.c index 6fd26a3a919..3391228522c 100644 --- a/board/samsung/common/board.c +++ b/board/samsung/common/board.c @@ -290,15 +290,13 @@ int board_mmc_init(bd_t *bis) #ifdef CONFIG_DISPLAY_BOARDINFO int checkboard(void) {

• const char *board_info;

• if (IS_ENABLED(CONFIG_BOARD_TYPES)) {

• const char *board_info = get_board_type();
  

• if (board_info)
  

• 	printf("Type:  %s\n", board_info);
  

• }

• board_info = fdt_getprop(gd->fdt_blob, 0, "model", NULL);
• printf("Board: %s\n", board_info ? board_info : "unknown");

-#ifdef CONFIG_BOARD_TYPES

• board_info = get_board_type();
• if (board_info)

• printf("Type:  %s\n", board_info);
  

-#endif return 0; } #endif diff --git a/include/samsung/misc.h b/include/samsung/misc.h index 0f957dc3675..017560c2566 100644 --- a/include/samsung/misc.h +++ b/include/samsung/misc.h @@ -32,9 +32,7 @@ void draw_logo(void); char *get_dfu_alt_system(char *interface, char *devstr); char *get_dfu_alt_boot(char *interface, char *devstr); #endif -#ifdef CONFIG_BOARD_TYPES void set_board_type(void); const char *get_board_type(void); -#endif

#endif /* __SAMSUNG_MISC_COMMON_H__ */

Reviewed-by: Lukasz Majewski lukma@denx.de

Best regards,

Lukasz Majewski

--

DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-59 Fax: (+49)-8142-66989-80 Email: lukma@denx.de

On Sun, 16 Dec 2018 19:36:31 -0700 Simon Glass sjg@chromium.org wrote:

Move all exynos boards over to use CONFIG_BLK.

This converts s5p_goni also, but adding dummy functions for pinmux and peripheral ID. This will not function correctly, but gives the maintainer more time to convert the board if desired.

Signed-off-by: Simon Glass sjg@chromium.org

Changes in v2:

• Update to convert s5p_goni also

arch/arm/mach-exynos/Kconfig | 7 +++++++ arch/arm/mach-s5pc1xx/Kconfig | 2 ++ arch/arm/mach-s5pc1xx/Makefile | 1 + arch/arm/mach-s5pc1xx/pinmux.c | 20 ++++++++++++++++++++ 4 files changed, 30 insertions(+) create mode 100644 arch/arm/mach-s5pc1xx/pinmux.c

diff --git a/arch/arm/mach-exynos/Kconfig b/arch/arm/mach-exynos/Kconfig index ed04369cfae..38077703621 100644 --- a/arch/arm/mach-exynos/Kconfig +++ b/arch/arm/mach-exynos/Kconfig @@ -8,6 +8,8 @@ config ARCH_EXYNOS4 bool "Exynos4 SoC family" select BOARD_EARLY_INIT_F select CPU_V7A

• select BLK
• select DM_MMC help Samsung Exynos4 SoC family are based on ARM Cortex-A9 CPU.

There are multiple SoCs in this family including Exynos4210, Exynos4412, @@ -24,6 +26,9 @@ config ARCH_EXYNOS5 imply USB_ETHER_ASIX imply USB_ETHER_RTL8152 imply USB_ETHER_SMSC95XX

• select BLK
• select DM_MMC
• help Samsung Exynos5 SoC family are based on ARM Cortex-A15 CPU

(and Cortex-A7 CPU in big.LITTLE configuration). There are multiple SoCs @@ -33,6 +38,8 @@ config ARCH_EXYNOS7 bool "Exynos7 SoC family" select ARM64 select BOARD_EARLY_INIT_F

• select BLK
• select DM_MMC help Samsung Exynos7 SoC family are based on ARM Cortex-A57 CPU

or Cortex-A53 CPU (and some in a big.LITTLE configuration). There are diff --git a/arch/arm/mach-s5pc1xx/Kconfig b/arch/arm/mach-s5pc1xx/Kconfig index 04acdaad79c..8cffced5512 100644 --- a/arch/arm/mach-s5pc1xx/Kconfig +++ b/arch/arm/mach-s5pc1xx/Kconfig @@ -7,6 +7,8 @@ choice config TARGET_S5P_GONI bool "S5P Goni board" select OF_CONTROL

• select BLK
• select DM_MMC

config TARGET_SMDKC100 bool "Support smdkc100 board" diff --git a/arch/arm/mach-s5pc1xx/Makefile b/arch/arm/mach-s5pc1xx/Makefile index a4be3fcbdae..ab804604d54 100644 --- a/arch/arm/mach-s5pc1xx/Makefile +++ b/arch/arm/mach-s5pc1xx/Makefile @@ -10,3 +10,4 @@ obj-y = cache.o obj-y += reset.o

obj-y += clock.o +obj-y += pinmux.o diff --git a/arch/arm/mach-s5pc1xx/pinmux.c b/arch/arm/mach-s5pc1xx/pinmux.c new file mode 100644 index 00000000000..511e57a28df --- /dev/null +++ b/arch/arm/mach-s5pc1xx/pinmux.c @@ -0,0 +1,20 @@ +// SPDX-License-Identifier: GPL-2.0+ +/*

• • Dummy functions to keep s3p_goni building (although it won't work)

^^^^ s5p_goni

• • Copyright 2018 Google LLC
• • Written by Simon Glass sjg@chromium.org
• */

+#include <common.h> +#include <asm/arch/pinmux.h>

+int exynos_pinmux_config(int peripheral, int flags) +{

• return 0;

+}

+int pinmux_decode_periph_id(const void *blob, int node) +{

• return 0;

+}

Despite the above comment, rest seems Ok.

Reviewed-by: Lukasz Majewski lukma@denx.de

Best regards,

Lukasz Majewski

--

DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-59 Fax: (+49)-8142-66989-80 Email: lukma@denx.de

On Sun, 16 Dec 2018 19:36:32 -0700 Simon Glass sjg@chromium.org wrote:

This chip is used by spring. Add a driver for it and update the samsung_sound driver to pick it up.

Signed-off-by: Simon Glass sjg@chromium.org

Changes in v2: None

drivers/sound/Kconfig | 8 + drivers/sound/Makefile | 1 + drivers/sound/max98088.c | 431 ++++++++++++++++++++++++++++++++++ drivers/sound/max98088.h | 192 +++++++++++++++ drivers/sound/samsung_sound.c | 2 +- 5 files changed, 633 insertions(+), 1 deletion(-) create mode 100644 drivers/sound/max98088.c create mode 100644 drivers/sound/max98088.h

diff --git a/drivers/sound/Kconfig b/drivers/sound/Kconfig index c0d97cca338..6a04a59dada 100644 --- a/drivers/sound/Kconfig +++ b/drivers/sound/Kconfig @@ -31,6 +31,14 @@ config I2S_SAMSUNG option provides an implementation for sound_init() and sound_play().

+config SOUND_MAX98088

• bool "Support Maxim max98088 audio codec"
• depends on I2S_SAMSUNG
• help

•  Enable the max98088 audio codec. This is connected via I2S
  

for

•  audio data and I2C for codec control. At present it only
  

works

•  with the Samsung I2S driver.
  

config SOUND_MAX98090 bool "Support Maxim max98090 audio codec" depends on I2S_SAMSUNG diff --git a/drivers/sound/Makefile b/drivers/sound/Makefile index 1de4346ec7a..238f33bbb40 100644 --- a/drivers/sound/Makefile +++ b/drivers/sound/Makefile @@ -11,5 +11,6 @@ obj-$(CONFIG_I2S_SAMSUNG) += samsung-i2s.o obj-$(CONFIG_SOUND_SANDBOX) += sandbox.o obj-$(CONFIG_I2S_SAMSUNG) += samsung_sound.o obj-$(CONFIG_SOUND_WM8994) += wm8994.o +obj-$(CONFIG_SOUND_MAX98088) += max98088.o maxim_codec.o obj-$(CONFIG_SOUND_MAX98090) += max98090.o maxim_codec.o obj-$(CONFIG_SOUND_MAX98095) += max98095.o maxim_codec.o diff --git a/drivers/sound/max98088.c b/drivers/sound/max98088.c new file mode 100644 index 00000000000..5ddc11ac5c7 --- /dev/null +++ b/drivers/sound/max98088.c @@ -0,0 +1,431 @@ +// SPDX-License-Identifier: GPL-2.0+ +/*

• • max98088.c -- MAX98088 ALSA SoC Audio driver
• • Copyright 2010 Maxim Integrated Products
• • Modified for U-Boot by Chih-Chung Chang (chihchung@chromium.org),
• • following the changes made in max98095.c
• */

+#include <common.h> +#include <audio_codec.h> +#include <div64.h> +#include <dm.h> +#include <i2c.h> +#include <i2s.h> +#include <sound.h> +#include <asm/gpio.h> +#include <asm/io.h> +#include <asm/arch/clk.h> +#include <asm/arch/cpu.h> +#include <asm/arch/power.h> +#include "maxim_codec.h" +#include "max98088.h"

+/* codec mclk clock divider coefficients. Index 0 is reserved. */ +static const int rate_table[] = {0, 8000, 11025, 16000, 22050, 24000, 32000,

• 		 44100, 48000, 88200, 96000};
  

+/*

• • codec mclk clock divider coefficients based on sampling rate
• • @param rate sampling rate
• • @param value address of indexvalue to be stored
• • @return 0 for success or negative error code.
• */

+static int rate_value(int rate, u8 *value) +{

• int i;
• for (i = 1; i < ARRAY_SIZE(rate_table); i++) {

• if (rate_table[i] >= rate) {
  

• 	*value = i;
  

• 	return 0;
  

• }
  

• }
• *value = 1;
• return -1;

Please change the return value to more descriptive name - e.g. -EINVAL, etc (in some parts of this patch you use -EIO, -EINVAL).

Please fix it globally.

+}

+/*

• • Sets hw params for max98088
• • @priv: max98088 information pointer
• • @rate: Sampling rate
• • @bits_per_sample: Bits per sample
• • @return -EIO for error, 0 for success.
• */

+int max98088_hw_params(struct maxim_priv *priv, unsigned int rate,

•        unsigned int bits_per_sample)
  

+{

• int error;
• u8 regval;
• switch (bits_per_sample) {
• case 16:

• error = maxim_bic_or(priv, M98088_REG_DAI1_FORMAT,
  

• 		     M98088_DAI_WS, 0);
  

1> + break;

• case 24:

• error = maxim_bic_or(priv, M98088_REG_DAI1_FORMAT,
  

• 		     M98088_DAI_WS, M98088_DAI_WS);
  

• break;
  

• default:

• debug("%s: Illegal bits per sample %d.\n",
  

•       __func__, bits_per_sample);
  

• return -1;
  

• }
• error |= maxim_bic_or(priv, M98088_REG_PWR_SYS,

M98088_SHDNRUN, 0); +

• if (rate_value(rate, &regval)) {

• debug("%s: Failed to set sample rate to %d.\n",
  

•       __func__, rate);
  

• return -1;
  

• }
• error |= maxim_bic_or(priv, M98088_REG_DAI1_CLKMODE,

• 	      M98088_CLKMODE_MASK, regval << 4);
  

• priv->rate = rate;
• /* Update sample rate mode */
• if (rate < 50000)

• error |= maxim_bic_or(priv, M98088_REG_DAI1_FILTERS,
  

• 		      M98088_DAI_DHF, 0);
  

• else

• error |= maxim_bic_or(priv, M98088_REG_DAI1_FILTERS,
  

• 		      M98088_DAI_DHF,
  

M98088_DAI_DHF); +

• error |= maxim_bic_or(priv, M98088_REG_PWR_SYS,

M98088_SHDNRUN,

• 	      M98088_SHDNRUN);
  

• if (error < 0) {

• debug("%s: Error setting hardware params.\n",
  

__func__);

• return -EIO;
  

• }
• priv->rate = rate;
• return 0;

+}

+/*

• • Configures Audio interface system clock for the given frequency
• • @priv: max98088 information
• • @freq: Sampling frequency in Hz
• • @return -EIO for error, 0 for success.
• */

+int max98088_set_sysclk(struct maxim_priv *priv, unsigned int freq) +{

• int error = 0;
• u8 pwr;
• /* Requested clock frequency is already setup */
• if (freq == priv->sysclk)

• return 0;
  

• /*

• * Setup clocks for slave mode, and using the PLL
  

• * PSCLK = 0x01 (when master clk is 10MHz to 20MHz)
  

• *         0x02 (when master clk is 20MHz to 30MHz)..
  

• */
  

• if (freq >= 10000000 && freq < 20000000) {

• error = maxim_i2c_write(priv, M98088_REG_SYS_CLK,
  

0x10);

• } else if ((freq >= 20000000) && (freq < 30000000)) {

• error = maxim_i2c_write(priv, M98088_REG_SYS_CLK,
  

0x20);

• } else {

• debug("%s: Invalid master clock frequency\n",
  

__func__);

• return -EIO;
  

• }
• error |= maxim_i2c_read(priv, M98088_REG_PWR_SYS, &pwr);
• if (pwr & M98088_SHDNRUN) {

• error |= maxim_bic_or(priv, M98088_REG_PWR_SYS,
  

• 		      M98088_SHDNRUN, 0);
  

• error |= maxim_bic_or(priv, M98088_REG_PWR_SYS,
  

• 		      M98088_SHDNRUN,
  

M98088_SHDNRUN);

• }
• debug("%s: Clock at %uHz\n", __func__, freq);
• if (error < 0)

• return -EIO;
  

• priv->sysclk = freq;
• return 0;

+}

+/*

• • Sets Max98090 I2S format
• • @priv: max98088 information
• • @fmt: i2S format - supports a subset of the options defined in

i2s.h.

• • @return -EIO for error, 0 for success.
• */

+int max98088_set_fmt(struct maxim_priv *priv, int fmt) +{

• u8 reg15val;
• u8 reg14val = 0;
• int error = 0;
• if (fmt == priv->fmt)

• return 0;
  

• priv->fmt = fmt;
• switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
• case SND_SOC_DAIFMT_CBS_CFS:

• /* Slave mode PLL */
  

• error |= maxim_i2c_write(priv,
  

M98088_REG_DAI1_CLKCFG_HI,

• 			    0x80);
  

• error |= maxim_i2c_write(priv,
  

M98088_REG_DAI1_CLKCFG_LO,

• 			    0x00);
  

• break;
  

• case SND_SOC_DAIFMT_CBM_CFM:

• /* Set to master mode */
  

• reg14val |= M98088_DAI_MAS;
  

• break;
  

• case SND_SOC_DAIFMT_CBS_CFM:
• case SND_SOC_DAIFMT_CBM_CFS:
• default:

• debug("%s: Clock mode unsupported\n", __func__);
  

• return -EINVAL;
  

• }
• switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
• case SND_SOC_DAIFMT_I2S:

• reg14val |= M98088_DAI_DLY;
  

• break;
  

• case SND_SOC_DAIFMT_LEFT_J:

• break;
  

• default:

• debug("%s: Unrecognized format.\n", __func__);
  

• return -EINVAL;
  

• }
• switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
• case SND_SOC_DAIFMT_NB_NF:

• break;
  

• case SND_SOC_DAIFMT_NB_IF:

• reg14val |= M98088_DAI_WCI;
  

• break;
  

• case SND_SOC_DAIFMT_IB_NF:

• reg14val |= M98088_DAI_BCI;
  

• break;
  

• case SND_SOC_DAIFMT_IB_IF:

• reg14val |= M98088_DAI_BCI | M98088_DAI_WCI;
  

• break;
  

• default:

• debug("%s: Unrecognized inversion settings.\n",
  

__func__);

• return -EINVAL;
  

• }
• error |= maxim_bic_or(priv, M98088_REG_DAI1_FORMAT,

• 	      M98088_DAI_MAS | M98088_DAI_DLY |
  

M98088_DAI_BCI |

• 	      M98088_DAI_WCI, reg14val);
  

• reg15val = M98088_DAI_BSEL64;
• error |= maxim_i2c_write(priv, M98088_REG_DAI1_CLOCK,

reg15val); +

• if (error < 0) {

• debug("%s: Error setting i2s format.\n", __func__);
  

• return -EIO;
  

• }
• return 0;

+}

+/*

• • max98088_reset() - reset the audio codec
• • @priv: max98088 information
• • @return -EIO for error, 0 for success.
• */

+static int max98088_reset(struct maxim_priv *priv) +{

• int ret, i;
• u8 val;
• /*

• * Reset to hardware default for registers, as there is not
  

a soft

• * reset hardware control register.
  

• */
  

• for (i = M98088_REG_IRQ_ENABLE; i <= M98088_REG_PWR_SYS;

i++) {

• switch (i) {
  

• case M98088_REG_BIAS_CNTL:
  

• 	val = 0xf0;
  

• 	break;
  

• case M98088_REG_DAC_BIAS2:
  

• 	val = 0x0f;
  

• 	break;
  

• default:
  

• 	val = 0;
  

• }
  

• ret = maxim_i2c_write(priv, i, val);
  

• if (ret < 0) {
  

• 	debug("%s: Failed to reset: %d\n", __func__,
  

ret);

• 	return ret;
  

• }
  

• }
• return 0;

+}

+/**

• • max98088_device_init() - Initialise max98088 codec device
• • @priv: max98088 information
• • @return -EIO for error, 0 for success.
• */

+static int max98088_device_init(struct maxim_priv *priv) +{

• unsigned char id;
• int error = 0;
• /* Enable codec clock */
• set_xclkout();
• /* reset the codec, the DSP core, and disable all interrupts

*/

• error = max98088_reset(priv);
• if (error != 0) {

• debug("Reset\n");
  

• return error;
  

• }
• /* initialize private data */
• priv->sysclk = -1U;
• priv->rate = -1U;
• priv->fmt = -1U;
• error = maxim_i2c_read(priv, M98088_REG_REV_ID, &id);
• if (error < 0) {

• debug("%s: Failure reading hardware revision: %d\n",
  

•       __func__, id);
  

• return -EIO;
  

• }
• debug("%s: Hardware revision: %d\n", __func__, id);
• return 0;

+}

+static int max98088_setup_interface(struct maxim_priv *priv) +{

• int error;
• /* Reading interrupt status to clear them */
• error = maxim_i2c_write(priv, M98088_REG_PWR_SYS,

M98088_PWRSV);

• error |= maxim_i2c_write(priv, M98088_REG_IRQ_ENABLE, 0x00);
• /*

• * initialize registers to hardware default configuring audio
  

• * interface2 to DAI1
  

• */
  

• error |= maxim_i2c_write(priv, M98088_REG_MIX_DAC,

• 		 M98088_DAI1L_TO_DACL |
  

M98088_DAI1R_TO_DACR);

• error |= maxim_i2c_write(priv, M98088_REG_BIAS_CNTL, 0xF0);
• error |= maxim_i2c_write(priv, M98088_REG_DAC_BIAS2, 0x0F);
• error |= maxim_i2c_write(priv, M98088_REG_DAI1_IOCFG,

• 		 M98088_S2NORMAL | M98088_SDATA);
  

• /*

• * route DACL and DACR output to headphone and speakers
  

• * Ordering: DACL, DACR, DACL, DACR
  

• */
  

• error |= maxim_i2c_write(priv, M98088_REG_MIX_SPK_LEFT, 1);
• error |= maxim_i2c_write(priv, M98088_REG_MIX_SPK_RIGHT, 1);
• error |= maxim_i2c_write(priv, M98088_REG_MIX_HP_LEFT, 1);
• error |= maxim_i2c_write(priv, M98088_REG_MIX_HP_RIGHT, 1);
• /* set volume: -12db */
• error |= maxim_i2c_write(priv, M98088_REG_LVL_SPK_L, 0x0f);
• error |= maxim_i2c_write(priv, M98088_REG_LVL_SPK_R, 0x0f);
• /* set volume: -22db */
• error |= maxim_i2c_write(priv, M98088_REG_LVL_HP_L, 0x0d);
• error |= maxim_i2c_write(priv, M98088_REG_LVL_HP_R, 0x0d);
• /* power enable */
• error |= maxim_i2c_write(priv, M98088_REG_PWR_EN_OUT,

• 		 M98088_HPLEN | M98088_HPREN |
  

M98088_SPLEN |

• 		 M98088_SPREN | M98088_DALEN |
  

M98088_DAREN);

• if (error < 0)

• return -EIO;
  

• return 0;

+}

+static int max98088_do_init(struct maxim_priv *priv, int sampling_rate,

• 	    int mclk_freq, int bits_per_sample)
  

+{

• int ret = 0;
• ret = max98088_setup_interface(priv);
• if (ret < 0) {

• debug("%s: max98088 setup interface failed\n",
  

__func__);

• return ret;
  

• }
• ret = max98088_set_sysclk(priv, mclk_freq);
• if (ret < 0) {

• debug("%s: max98088 codec set sys clock failed\n",
  

__func__);

• return ret;
  

• }
• ret = max98088_hw_params(priv, sampling_rate,

bits_per_sample); +

• if (ret == 0) {

• ret = max98088_set_fmt(priv, SND_SOC_DAIFMT_I2S |
  

• 		       SND_SOC_DAIFMT_NB_NF |
  

• 		       SND_SOC_DAIFMT_CBS_CFS);
  

• }
• return ret;

+}

+static int max98088_set_params(struct udevice *dev, int interface, int rate,

• 	       int mclk_freq, int bits_per_sample,
  

• 	       uint channels)
  

+{

• struct maxim_priv *priv = dev_get_priv(dev);
• return max98088_do_init(priv, rate, mclk_freq,

bits_per_sample); +}

+static int max98088_probe(struct udevice *dev) +{

• struct maxim_priv *priv = dev_get_priv(dev);
• int ret;
• priv->dev = dev;
• ret = max98088_device_init(priv);
• if (ret < 0) {

• debug("%s: max98088 codec chip init failed\n",
  

__func__);

• return ret;
  

• }
• return 0;

+}

+static const struct audio_codec_ops max98088_ops = {

• .set_params = max98088_set_params,

+};

+static const struct udevice_id max98088_ids[] = {

• { .compatible = "maxim,max98088" },
• { }

+};

+U_BOOT_DRIVER(max98088) = {

• .name = "max98088",
• .id = UCLASS_AUDIO_CODEC,
• .of_match = max98088_ids,
• .probe = max98088_probe,
• .ops = &max98088_ops,
• .priv_auto_alloc_size = sizeof(struct maxim_priv),

+}; diff --git a/drivers/sound/max98088.h b/drivers/sound/max98088.h new file mode 100644 index 00000000000..127d2bda305 --- /dev/null +++ b/drivers/sound/max98088.h @@ -0,0 +1,192 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/*

• • max98088.h -- MAX98088 ALSA SoC Audio driver
• • Copyright 2010 Maxim Integrated Products
• */

+#ifndef _MAX98088_H +#define _MAX98088_H

+/* MAX98088 Registers Definition */ +#define M98088_REG_IRQ_STATUS 0x00 +#define M98088_REG_MIC_STATUS 0x01 +#define M98088_REG_JACK_STAUS 0x02 +#define M98088_REG_BATTERY_VOLTAGE 0x03 +#define M98088_REG_IRQ_ENABLE 0x0f +#define M98088_REG_SYS_CLK 0X10 +#define M98088_REG_DAI1_CLKMODE 0x11 +#define M98088_REG_DAI1_CLKCFG_HI 0x12 +#define M98088_REG_DAI1_CLKCFG_LO 0x13 +#define M98088_REG_DAI1_FORMAT 0x14 +#define M98088_REG_DAI1_CLOCK 0x15 +#define M98088_REG_DAI1_IOCFG 0x16 +#define M98088_REG_DAI1_TDM 0X17 +#define M98088_REG_DAI1_FILTERS 0x18 +#define M98088_REG_DAI2_CLKMODE 0x19 +#define M98088_REG_DAI2_CLKCFG_HI 0x1a +#define M98088_REG_DAI2_CLKCFG_LO 0x1b +#define M98088_REG_DAI2_FORMAT 0x1c +#define M98088_REG_DAI2_CLOCK 0x1d +#define M98088_REG_DAI2_IOCFG 0x1e +#define M98088_REG_DAI2_TDM 0X1f +#define M98088_REG_DAI2_FILTERS 0x20 +#define M98088_REG_SRC 0X21 +#define M98088_REG_MIX_DAC 0X22 +#define M98088_REG_MIX_ADC_LEFT 0x23 +#define M98088_REG_MIX_ADC_RIGHT 0x24 +#define M98088_REG_MIX_HP_LEFT 0x25 +#define M98088_REG_MIX_HP_RIGHT 0x26 +#define M98088_REG_MIX_HP_CNTL 0x27 +#define M98088_REG_MIX_REC_LEFT 0x28 +#define M98088_REG_MIX_REC_RIGHT 0x29 +#define M98088_REG_MIC_REC_CNTL 0x2a +#define M98088_REG_MIX_SPK_LEFT 0x2b +#define M98088_REG_MIX_SPK_RIGHT 0x2c +#define M98088_REG_MIX_SPK_CNTL 0x2d +#define M98088_REG_LVL_SIDETONE 0x2e +#define M98088_REG_LVL_DAI1_PLAY 0x2f +#define M98088_REG_LVL_DAI1_PLAY_EQ 0x30 +#define M98088_REG_LVL_DAI2_PLAY 0x31 +#define M98088_REG_LVL_DAI2_PLAY_EQ 0x32 +#define M98088_REG_LVL_ADC_L 0X33 +#define M98088_REG_LVL_ADC_R 0X34 +#define M98088_REG_LVL_MIC1 0X35 +#define M98088_REG_LVL_MIC2 0X36 +#define M98088_REG_LVL_INA 0X37 +#define M98088_REG_LVL_INB 0X38 +#define M98088_REG_LVL_HP_L 0X39 +#define M98088_REG_LVL_HP_R 0X3a +#define M98088_REG_LVL_REC_L 0X3b +#define M98088_REG_LVL_REC_R 0X3c +#define M98088_REG_LVL_SPK_L 0X3d +#define M98088_REG_LVL_SPK_R 0X3e +#define M98088_REG_MICAGC_CFG 0x3f +#define M98088_REG_MICAGC_THRESH 0x40 +#define M98088_REG_SPKDHP 0X41 +#define M98088_REG_SPKDHP_THRESH 0x42 +#define M98088_REG_SPKALC_COMP 0x43 +#define M98088_REG_PWRLMT_CFG 0x44 +#define M98088_REG_PWRLMT_TIME 0x45 +#define M98088_REG_THDLMT_CFG 0x46 +#define M98088_REG_CFG_AUDIO_IN 0x47 +#define M98088_REG_CFG_MIC 0X48 +#define M98088_REG_CFG_LEVEL 0X49 +#define M98088_REG_CFG_BYPASS 0x4a +#define M98088_REG_CFG_JACKDET 0x4b +#define M98088_REG_PWR_EN_IN 0X4c +#define M98088_REG_PWR_EN_OUT 0x4d +#define M98088_REG_BIAS_CNTL 0X4e +#define M98088_REG_DAC_BIAS1 0X4f +#define M98088_REG_DAC_BIAS2 0X50 +#define M98088_REG_PWR_SYS 0X51 +#define M98088_REG_DAI1_EQ_BASE 0x52 +#define M98088_REG_DAI2_EQ_BASE 0x84 +#define M98088_REG_DAI1_BIQUAD_BASE 0xb6 +#define M98088_REG_DAI2_BIQUAD_BASE 0xc0 +#define M98088_REG_REV_ID 0xff

+#define M98088_REG_CNT (0xff + 1)

+/* MAX98088 Registers Bit Fields */

+/* M98088_REG_11_DAI1_CLKMODE, M98088_REG_19_DAI2_CLKMODE */ +#define M98088_CLKMODE_MASK 0xFF

+/* M98088_REG_14_DAI1_FORMAT, M98088_REG_1C_DAI2_FORMAT */ +#define M98088_DAI_MAS BIT(7) +#define M98088_DAI_WCI BIT(6) +#define M98088_DAI_BCI BIT(5) +#define M98088_DAI_DLY BIT(4) +#define M98088_DAI_TDM BIT(2) +#define M98088_DAI_FSW BIT(1) +#define M98088_DAI_WS BIT(0)

+/* M98088_REG_15_DAI1_CLOCK, M98088_REG_1D_DAI2_CLOCK */ +#define M98088_DAI_BSEL64 BIT(0) +#define M98088_DAI_OSR64 BIT(6)

+/* M98088_REG_16_DAI1_IOCFG, M98088_REG_1E_DAI2_IOCFG */ +#define M98088_S1NORMAL BIT(6) +#define M98088_S2NORMAL (2 << 6) +#define M98088_SDATA (3 << 0)

+/* M98088_REG_18_DAI1_FILTERS, M98088_REG_20_DAI2_FILTERS */ +#define M98088_DAI_DHF BIT(3)

+/* M98088_REG_22_MIX_DAC */ +#define M98088_DAI1L_TO_DACL BIT(7) +#define M98088_DAI1R_TO_DACL BIT(6) +#define M98088_DAI2L_TO_DACL BIT(5) +#define M98088_DAI2R_TO_DACL BIT(4) +#define M98088_DAI1L_TO_DACR BIT(3) +#define M98088_DAI1R_TO_DACR BIT(2) +#define M98088_DAI2L_TO_DACR BIT(1) +#define M98088_DAI2R_TO_DACR BIT(0)

+/* M98088_REG_2A_MIC_REC_CNTL */ +#define M98088_REC_LINEMODE BIT(7) +#define M98088_REC_LINEMODE_MASK BIT(7)

+/* M98088_REG_2D_MIX_SPK_CNTL */ +#define M98088_MIX_SPKR_GAIN_MASK (3 << 2) +#define M98088_MIX_SPKR_GAIN_SHIFT 2 +#define M98088_MIX_SPKL_GAIN_MASK (3 << 0) +#define M98088_MIX_SPKL_GAIN_SHIFT 0

+/* M98088_REG_2F_LVL_DAI1_PLAY, M98088_REG_31_LVL_DAI2_PLAY */ +#define M98088_DAI_MUTE BIT(7) +#define M98088_DAI_MUTE_MASK BIT(7) +#define M98088_DAI_VOICE_GAIN_MASK (3 << 4) +#define M98088_DAI_ATTENUATION_MASK (0xf << 0) +#define M98088_DAI_ATTENUATION_SHIFT 0

+/* M98088_REG_35_LVL_MIC1, M98088_REG_36_LVL_MIC2 */ +#define M98088_MICPRE_MASK (3 << 5) +#define M98088_MICPRE_SHIFT 5

+/* M98088_REG_3A_LVL_HP_R */ +#define M98088_HP_MUTE BIT(7)

+/* M98088_REG_3C_LVL_REC_R */ +#define M98088_REC_MUTE BIT(7)

+/* M98088_REG_3E_LVL_SPK_R */ +#define M98088_SP_MUTE BIT(7)

+/* M98088_REG_48_CFG_MIC */ +#define M98088_EXTMIC_MASK (3 << 0) +#define M98088_DIGMIC_L BIT(5) +#define M98088_DIGMIC_R BIT(4)

+/* M98088_REG_49_CFG_LEVEL */ +#define M98088_VSEN BIT(6) +#define M98088_ZDEN BIT(5) +#define M98088_EQ2EN BIT(1) +#define M98088_EQ1EN BIT(0)

+/* M98088_REG_4C_PWR_EN_IN */ +#define M98088_INAEN BIT(7) +#define M98088_INBEN BIT(6) +#define M98088_MBEN BIT(3) +#define M98088_ADLEN BIT(1) +#define M98088_ADREN BIT(0)

+/* M98088_REG_4D_PWR_EN_OUT */ +#define M98088_HPLEN BIT(7) +#define M98088_HPREN BIT(6) +#define M98088_HPEN (BIT(7) | BIT(6)) +#define M98088_SPLEN BIT(5) +#define M98088_SPREN BIT(4) +#define M98088_RECEN BIT(3) +#define M98088_DALEN BIT(1) +#define M98088_DAREN BIT(0)

+/* M98088_REG_51_PWR_SYS */ +#define M98088_SHDNRUN BIT(7) +#define M98088_PERFMODE BIT(3) +#define M98088_HPPLYBACK BIT(2) +#define M98088_PWRSV8K BIT(1) +#define M98088_PWRSV BIT(0)

+#endif diff --git a/drivers/sound/samsung_sound.c b/drivers/sound/samsung_sound.c index 1d711c87322..84064ebd0fe 100644 --- a/drivers/sound/samsung_sound.c +++ b/drivers/sound/samsung_sound.c @@ -89,7 +89,7 @@ static const struct sound_ops samsung_sound_ops = {

static const struct udevice_id samsung_sound_ids[] = { { .compatible = "google,snow-audio-max98095" },

• { .compatible = "google,spring-audio-max98095" },

• { .compatible = "google,spring-audio-max98088" }, { .compatible = "samsung,smdk5420-audio-wm8994" }, { .compatible = "google,peach-audio-max98090" }, { }

Best regards,

Lukasz Majewski

--

DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-59 Fax: (+49)-8142-66989-80 Email: lukma@denx.de

On Sun, 16 Dec 2018 19:36:33 -0700 Simon Glass sjg@chromium.org wrote:

Update the spring settings to use this codec, which is what it actually shipped with.

Signed-off-by: Simon Glass sjg@chromium.org

Changes in v2: None

arch/arm/dts/exynos5250-spring.dts | 36 +++++++++++++++--------------- configs/spring_defconfig | 1 + 2 files changed, 19 insertions(+), 18 deletions(-)

diff --git a/arch/arm/dts/exynos5250-spring.dts b/arch/arm/dts/exynos5250-spring.dts index 191e12af6a1..942f5027753 100644 --- a/arch/arm/dts/exynos5250-spring.dts +++ b/arch/arm/dts/exynos5250-spring.dts @@ -93,6 +93,22 @@ samsung,vbus-gpio = <&gpx2 7 GPIO_ACTIVE_HIGH>; };

• sound {

• compatible = "google,spring-audio-max98088";
  

• samsung,model = "Spring-I2S-MAX98088";
  

• samsung,audio-codec = <&max98088>;
  

• codec-enable-gpio = <&gpx1 7 0>;
  

• cpu {
  

• 	sound-dai = <&i2s1 0>;
  

• };
  

• codec {
  

• 	sound-dai = <&max98088 0>;
  

• };
  

• };
• spi@12d30000 { spi-max-frequency = <50000000>; firmware_storage_spi: flash@0 {

@@ -638,27 +654,11 @@ }; };

• max98095: soundcodec@10 {

• max98088: soundcodec@10 { reg = <0x10>;

• compatible = "maxim,max98095";
  

• compatible = "maxim,max98088";
  

  #sound-dai-cells = <1>; };

• sound {

• compatible = "google,spring-audio-max98095";
  

• samsung,model = "Spring-I2S-MAX98095";
  

• samsung,audio-codec = <&max98095>;
  

• cpu {
  

• 	sound-dai = <&i2s0 0>;
  

• };
  

• codec {
  

• 	sound-dai = <&max98095 0>;
  

• };
  

• };

};

#include "cros-ec-keyboard.dtsi" diff --git a/configs/spring_defconfig b/configs/spring_defconfig index c089517692e..07ff029a413 100644 --- a/configs/spring_defconfig +++ b/configs/spring_defconfig @@ -62,6 +62,7 @@ CONFIG_DEBUG_UART_S5P=y CONFIG_SOUND=y CONFIG_I2S=y CONFIG_I2S_SAMSUNG=y +CONFIG_SOUND_MAX98088=y CONFIG_SOUND_MAX98095=y CONFIG_SOUND_WM8994=y CONFIG_EXYNOS_SPI=y

Reviewed-by: Lukasz Majewski lukma@denx.de

Best regards,

Lukasz Majewski

--

DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-59 Fax: (+49)-8142-66989-80 Email: lukma@denx.de

On Sun, 16 Dec 2018 19:36:34 -0700 Simon Glass sjg@chromium.org wrote:

Update the flashmap so that this board can be started over USB A-A. It is slightly different from snow.

Signed-off-by: Simon Glass sjg@chromium.org

Changes in v2: None

arch/arm/dts/exynos5250-spring.dts | 41 ++++++++++++++++++++++++++++-- 1 file changed, 39 insertions(+), 2 deletions(-)

diff --git a/arch/arm/dts/exynos5250-spring.dts b/arch/arm/dts/exynos5250-spring.dts index 942f5027753..c7553208ade 100644 --- a/arch/arm/dts/exynos5250-spring.dts +++ b/arch/arm/dts/exynos5250-spring.dts @@ -40,9 +40,46 @@ reg = <0x40000000 0x80000000>; };

• iram {

• reg = <0x02020000 0x60000>;
  

• };
• config {

• samsung,bl1-offset = <0x1400>;
  

• samsung,bl2-offset = <0x3400>;
  

• u-boot-memory = "/memory";
  

• u-boot-offset = <0x3e00000 0x100000>;
  

• };
• flash@0 {

• spl { /* spl size override */
  

• 	size = <0x8000>;
  

• reg = <0 0x100000>;
  

• #address-cells = <1>;
  

• #size-cells = <1>;
  

• pre-boot {
  

• 	label = "bl1 pre-boot";
  

• 	reg = <0 0x2000>;
  

• 	read-only;
  

• 	filename = "e5250.nbl1.bin";
  

• 	type = "blob exynos-bl1";
  

• 	required;
  

• };
  

• spl {
  

• 	label = "bl2 spl";
  

• 	reg = <0x2000 0x8000>;
  

• 	read-only;
  

• 	filename = "bl2.bin";
  

• 	type = "blob exynos-bl2 boot,dtb";
  

• 	payload = "/flash/ro-boot";
  

• 	required;
  

• };
  

• ro-boot {
  

• 	label = "u-boot";
  

• 	reg = <0xa000 0xb0000>;
  

• 	read-only;
  

• 	type = "blob boot,dtb";
  

• 	required;
  

  }; };

Reviewed-by: Lukasz Majewski lukma@denx.de

Best regards,

Lukasz Majewski

--

DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-59 Fax: (+49)-8142-66989-80 Email: lukma@denx.de

On Sun, 16 Dec 2018 19:36:35 -0700 Simon Glass sjg@chromium.org wrote:

This function is not needed now since the audio codecs have been converted to proper drivers. The codec-enable GPIO is handled there.

Signed-off-by: Simon Glass sjg@chromium.org

Changes in v2: None

board/samsung/common/exynos5-dt.c | 29 ----------------------------- 1 file changed, 29 deletions(-)

diff --git a/board/samsung/common/exynos5-dt.c b/board/samsung/common/exynos5-dt.c index c183965b92a..87eb381345d 100644 --- a/board/samsung/common/exynos5-dt.c +++ b/board/samsung/common/exynos5-dt.c @@ -34,37 +34,8 @@

DECLARE_GLOBAL_DATA_PTR;

-static void board_enable_audio_codec(void) -{

• int node, ret;
• struct gpio_desc en_gpio;
• node = fdtdec_next_compatible(gd->fdt_blob, 0,

• COMPAT_SAMSUNG_EXYNOS5_SOUND);
  

• if (node <= 0)

• return;
  

• ret = gpio_request_by_name_nodev(offset_to_ofnode(node),

• 			 "codec-enable-gpio", 0,
  

&en_gpio,

• 			 GPIOD_IS_OUT |
  

GPIOD_IS_OUT_ACTIVE);

• if (ret == -FDT_ERR_NOTFOUND)

• return;
  

• /* Turn on the GPIO which connects to the codec's "enable"

line. */

• gpio_set_pull(gpio_get_number(&en_gpio), S5P_GPIO_PULL_NONE);

-#ifdef CONFIG_SOUND_MAX98095

• /* Enable MAX98095 Codec */
• gpio_request(EXYNOS5_GPIO_X17, "max98095_enable");
• gpio_direction_output(EXYNOS5_GPIO_X17, 1);
• gpio_set_pull(EXYNOS5_GPIO_X17, S5P_GPIO_PULL_NONE);

-#endif -}

int exynos_init(void) {

• board_enable_audio_codec();
• return 0;

}

Reviewed-by: Lukasz Majewski lukma@denx.de

Best regards,

Lukasz Majewski

--

DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-59 Fax: (+49)-8142-66989-80 Email: lukma@denx.de

On Sun, 16 Dec 2018 19:36:36 -0700 Simon Glass sjg@chromium.org wrote:

Now that these boards use driver model we can drop the old code. At present s5p_mmc_init() is still used by goni and smdkv310 so cannot be removed unless we remove those boards.

Signed-off-by: Simon Glass sjg@chromium.org

Changes in v2: None

arch/arm/mach-exynos/include/mach/mmc.h | 2 - board/samsung/common/board.c | 38 ------------------- drivers/mmc/s5p_sdhci.c | 50 ------------------------- 3 files changed, 90 deletions(-)

diff --git a/arch/arm/mach-exynos/include/mach/mmc.h b/arch/arm/mach-exynos/include/mach/mmc.h index ca4e7eda342..eece44ea1aa 100644 --- a/arch/arm/mach-exynos/include/mach/mmc.h +++ b/arch/arm/mach-exynos/include/mach/mmc.h @@ -64,6 +64,4 @@ static inline int s5p_mmc_init(int index, int bus_width) return s5p_sdhci_init(base, index, bus_width); }

-int exynos_mmc_init(const void *blob);

#endif diff --git a/board/samsung/common/board.c b/board/samsung/common/board.c index 3391228522c..96228a86a11 100644 --- a/board/samsung/common/board.c +++ b/board/samsung/common/board.c @@ -249,44 +249,6 @@ int board_eth_init(bd_t *bis) return 0; }

-#ifdef CONFIG_MMC -static int init_mmc(void) -{ -#ifdef CONFIG_MMC_SDHCI

• return exynos_mmc_init(gd->fdt_blob);

-#else

• return 0;

-#endif -}

-static int init_dwmmc(void) -{ -#ifdef CONFIG_MMC_DW

• return exynos_dwmmc_init(gd->fdt_blob);

-#else

• return 0;

-#endif -}

-int board_mmc_init(bd_t *bis) -{

• int ret;
• if (get_boot_mode() == BOOT_MODE_SD) {

• ret = init_mmc();
  

• ret |= init_dwmmc();
  

• } else {

• ret = init_dwmmc();
  

• ret |= init_mmc();
  

• }
• if (ret)

• debug("mmc init failed\n");
  

• return ret;

-} -#endif

#ifdef CONFIG_DISPLAY_BOARDINFO int checkboard(void) { diff --git a/drivers/mmc/s5p_sdhci.c b/drivers/mmc/s5p_sdhci.c index 591a3bce084..9dd0b865eb8 100644 --- a/drivers/mmc/s5p_sdhci.c +++ b/drivers/mmc/s5p_sdhci.c @@ -118,9 +118,6 @@ int s5p_sdhci_init(u32 regbase, int index, int bus_width) return s5p_sdhci_core_init(host); }

-#if CONFIG_IS_ENABLED(OF_CONTROL) -struct sdhci_host sdhci_host[SDHCI_MAX_HOSTS];

static int do_sdhci_init(struct sdhci_host *host) { int dev_id, flag, ret; @@ -191,53 +188,6 @@ static int sdhci_get_config(const void *blob, int node, struct sdhci_host *host) return 0; }

-static int process_nodes(const void *blob, int node_list[], int count) -{

• struct sdhci_host *host;
• int i, node, ret;
• int failed = 0;
• debug("%s: count = %d\n", __func__, count);
• /* build sdhci_host[] for each controller */
• for (i = 0; i < count; i++) {

• node = node_list[i];
  

• if (node <= 0)
  

• 	continue;
  

• host = &sdhci_host[i];
  

• ret = sdhci_get_config(blob, node, host);
  

• if (ret) {
  

• 	printf("%s: failed to decode dev %d
  

(%d)\n", __func__, i, ret);

• 	failed++;
  

• 	continue;
  

• }
  

• ret = do_sdhci_init(host);
  

• if (ret && ret != -ENODEV) {
  

• 	printf("%s: failed to initialize dev %d
  

(%d)\n", __func__, i, ret);

• 	failed++;
  

• }
  

• }
• /* we only consider it an error when all nodes fail */
• return (failed == count ? -1 : 0);

-}

-int exynos_mmc_init(const void *blob) -{

• int count;
• int node_list[SDHCI_MAX_HOSTS];
• count = fdtdec_find_aliases_for_id(blob, "mmc",

• 	COMPAT_SAMSUNG_EXYNOS_MMC, node_list,
  

• 	SDHCI_MAX_HOSTS);
  

• return process_nodes(blob, node_list, count);

-} -#endif

#ifdef CONFIG_DM_MMC static int s5p_sdhci_probe(struct udevice *dev) {

Reviewed-by: Lukasz Majewski lukma@denx.de

Best regards,

Lukasz Majewski

--

DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-59 Fax: (+49)-8142-66989-80 Email: lukma@denx.de

On Sun, 16 Dec 2018 19:36:37 -0700 Simon Glass sjg@chromium.org wrote:

This enum still exists but we can shrink it a little based on recent driver-model conversions with samsung. Update it to remove unused items.

Signed-off-by: Simon Glass sjg@chromium.org

Changes in v2: None

include/fdtdec.h | 6 ------ lib/fdtdec.c | 6 ------ 2 files changed, 12 deletions(-)

diff --git a/include/fdtdec.h b/include/fdtdec.h index f1bcbf837ff..de7dd63b5a4 100644 --- a/include/fdtdec.h +++ b/include/fdtdec.h @@ -133,18 +133,12 @@ enum fdt_compat_id { /* Tegra210 XUSB pad controller */ COMPAT_SMSC_LAN9215, /* SMSC 10/100 Ethernet LAN9215 */ COMPAT_SAMSUNG_EXYNOS5_SROMC, /* Exynos5 SROMC */

• COMPAT_SAMSUNG_S3C2440_I2C, /* Exynos I2C Controller

*/

• COMPAT_SAMSUNG_EXYNOS5_SOUND, /* Exynos Sound */
• COMPAT_WOLFSON_WM8994_CODEC, /* Wolfson WM8994 Sound

Codec */ COMPAT_SAMSUNG_EXYNOS_USB_PHY, /* Exynos phy controller for usb2.0 */ COMPAT_SAMSUNG_EXYNOS5_USB3_PHY,/* Exynos phy controller for usb3.0 */ COMPAT_SAMSUNG_EXYNOS_TMU, /* Exynos TMU */ COMPAT_SAMSUNG_EXYNOS_MIPI_DSI, /* Exynos mipi dsi */ COMPAT_SAMSUNG_EXYNOS_DWMMC, /* Exynos DWMMC controller */

• COMPAT_SAMSUNG_EXYNOS_MMC, /* Exynos MMC controller */ COMPAT_GENERIC_SPI_FLASH, /* Generic SPI Flash chip */
• COMPAT_MAXIM_98095_CODEC, /* MAX98095 Codec */
• COMPAT_SAMSUNG_EXYNOS5_I2C, /* Exynos5 High Speed I2C

Controller */ COMPAT_SAMSUNG_EXYNOS_SYSMMU, /* Exynos sysmmu */ COMPAT_INTEL_MICROCODE, /* Intel microcode update */ COMPAT_AMS_AS3722, /* AMS AS3722 PMIC */ diff --git a/lib/fdtdec.c b/lib/fdtdec.c index 6f8ec0dbed7..18b8bf81955 100644 --- a/lib/fdtdec.c +++ b/lib/fdtdec.c @@ -40,18 +40,12 @@ static const char * const compat_names[COMPAT_COUNT] = { COMPAT(NVIDIA_TEGRA210_XUSB_PADCTL, "nvidia,tegra210-xusb-padctl"), COMPAT(SMSC_LAN9215, "smsc,lan9215"), COMPAT(SAMSUNG_EXYNOS5_SROMC, "samsung,exynos-sromc"),

• COMPAT(SAMSUNG_S3C2440_I2C, "samsung,s3c2440-i2c"),
• COMPAT(SAMSUNG_EXYNOS5_SOUND, "samsung,exynos-sound"),
• COMPAT(WOLFSON_WM8994_CODEC, "wolfson,wm8994-codec"), COMPAT(SAMSUNG_EXYNOS_USB_PHY, "samsung,exynos-usb-phy"), COMPAT(SAMSUNG_EXYNOS5_USB3_PHY,

"samsung,exynos5250-usb3-phy"), COMPAT(SAMSUNG_EXYNOS_TMU, "samsung,exynos-tmu"), COMPAT(SAMSUNG_EXYNOS_MIPI_DSI, "samsung,exynos-mipi-dsi"), COMPAT(SAMSUNG_EXYNOS_DWMMC, "samsung,exynos-dwmmc"),

• COMPAT(SAMSUNG_EXYNOS_MMC, "samsung,exynos-mmc"), COMPAT(GENERIC_SPI_FLASH, "spi-flash"),
• COMPAT(MAXIM_98095_CODEC, "maxim,max98095-codec"),
• COMPAT(SAMSUNG_EXYNOS5_I2C, "samsung,exynos5-hsi2c"), COMPAT(SAMSUNG_EXYNOS_SYSMMU, "samsung,sysmmu-v3.3"), COMPAT(INTEL_MICROCODE, "intel,microcode"), COMPAT(AMS_AS3722, "ams,as3722"),

Reviewed-by: Lukasz Majewski lukma@denx.de

Best regards,

Lukasz Majewski

--

DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-59 Fax: (+49)-8142-66989-80 Email: lukma@denx.de

On Sun, 16 Dec 2018 19:36:38 -0700 Simon Glass sjg@chromium.org wrote:

This is no-longer used. Drop it.

Signed-off-by: Simon Glass sjg@chromium.org

Changes in v2:

• Add new patches as per the cover letter

include/fdtdec.h | 1 - lib/fdtdec.c | 1 - 2 files changed, 2 deletions(-)

diff --git a/include/fdtdec.h b/include/fdtdec.h index de7dd63b5a4..2a8ad960260 100644 --- a/include/fdtdec.h +++ b/include/fdtdec.h @@ -141,7 +141,6 @@ enum fdt_compat_id { COMPAT_GENERIC_SPI_FLASH, /* Generic SPI Flash chip */ COMPAT_SAMSUNG_EXYNOS_SYSMMU, /* Exynos sysmmu */ COMPAT_INTEL_MICROCODE, /* Intel microcode update */

• COMPAT_AMS_AS3722, /* AMS AS3722 PMIC */ COMPAT_INTEL_QRK_MRC, /* Intel Quark MRC */ COMPAT_ALTERA_SOCFPGA_DWMAC, /* SoCFPGA Ethernet

controller */ COMPAT_ALTERA_SOCFPGA_DWMMC, /* SoCFPGA DWMMC controller */ diff --git a/lib/fdtdec.c b/lib/fdtdec.c index 18b8bf81955..e06f2282028 100644 --- a/lib/fdtdec.c +++ b/lib/fdtdec.c @@ -48,7 +48,6 @@ static const char * const compat_names[COMPAT_COUNT] = { COMPAT(GENERIC_SPI_FLASH, "spi-flash"), COMPAT(SAMSUNG_EXYNOS_SYSMMU, "samsung,sysmmu-v3.3"), COMPAT(INTEL_MICROCODE, "intel,microcode"),

• COMPAT(AMS_AS3722, "ams,as3722"), COMPAT(INTEL_QRK_MRC, "intel,quark-mrc"), COMPAT(ALTERA_SOCFPGA_DWMAC, "altr,socfpga-stmmac"), COMPAT(ALTERA_SOCFPGA_DWMMC, "altr,socfpga-dw-mshc"),

Reviewed-by: Lukasz Majewski lukma@denx.de

Best regards,

Lukasz Majewski

--

DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-59 Fax: (+49)-8142-66989-80 Email: lukma@denx.de