[U-Boot] [PATCH] 86xx: Update CPU info output on bootup
- Update style of 86xx CPU information on boot to more closely match 85xx boards - Fix detection of 8641/8641D - Use strmhz() to display frequencies - Display L1 information - Display L2 cache size
== Before == Freescale PowerPC CPU: Core: E600 Core 0, Version: 0.2, (0x80040202) System: Unknown, Version: 2.1, (0x80900121) Clocks: CPU:1066 MHz, MPX: 533 MHz, DDR: 266 MHz, LBC: 133 MHz L2: Enabled Board: X-ES XPedite5170 3U VPX SBC
== After == CPU: 8641D, Version: 2.1, (0x80900121) Core: E600 Core 0, Version: 0.2, (0x80040202) Clock Configuration: CPU:1066.667 MHz, MPX:533.333 MHz DDR:266.667 MHz (533.333 MT/s data rate), LBC:133.333 MHz L1: D-cache 32 KB enabled I-cache 32 KB enabled L2: 512 KB enabled Board: X-ES XPedite5170 3U VPX SBC
Signed-off-by: Peter Tyser ptyser@xes-inc.com --- cpu/mpc86xx/cpu.c | 80 +++++++++++++++++++++++++++++------------------------ 1 files changed, 44 insertions(+), 36 deletions(-)
diff --git a/cpu/mpc86xx/cpu.c b/cpu/mpc86xx/cpu.c index b2a107d..42436ba 100644 --- a/cpu/mpc86xx/cpu.c +++ b/cpu/mpc86xx/cpu.c @@ -50,19 +50,39 @@ checkcpu(void) uint pvr, svr; uint ver; uint major, minor; + char buf1[32], buf2[32]; volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR; volatile ccsr_gur_t *gur = &immap->im_gur;
- puts("Freescale PowerPC\n"); + svr = get_svr(); + ver = SVR_SOC_VER(svr); + major = SVR_MAJ(svr); + minor = SVR_MIN(svr); + + puts("CPU: "); + + switch (ver) { + case SVR_8641: + puts("8641"); + break; + case SVR_8641D: + puts("8641D"); + break; + case SVR_8610: + puts("8610"); + break; + default: + puts("Unknown"); + break; + } + printf(", Version: %d.%d, (0x%08x)\n", major, minor, svr); + puts("Core: ");
pvr = get_pvr(); ver = PVR_VER(pvr); major = PVR_MAJ(pvr); minor = PVR_MIN(pvr);
- puts("CPU:\n"); - puts(" Core: "); - switch (ver) { case PVR_VER(PVR_86xx): { @@ -79,48 +99,36 @@ checkcpu(void) } printf(", Version: %d.%d, (0x%08x)\n", major, minor, pvr);
- svr = get_svr(); - ver = SVR_SOC_VER(svr); - major = SVR_MAJ(svr); - minor = SVR_MIN(svr); - - puts(" System: "); - switch (ver) { - case SVR_8641: - if (SVR_SUBVER(svr) == 1) { - puts("8641D"); - } else { - puts("8641"); - } - break; - case SVR_8610: - puts("8610"); - break; - default: - puts("Unknown"); - break; - } - printf(", Version: %d.%d, (0x%08x)\n", major, minor, svr); - get_sys_info(&sysinfo);
- puts(" Clocks: "); - printf("CPU:%4lu MHz, ", sysinfo.freqProcessor / 1000000); - printf("MPX:%4lu MHz, ", sysinfo.freqSystemBus / 1000000); - printf("DDR:%4lu MHz, ", sysinfo.freqSystemBus / 2000000); + puts("Clock Configuration:\n"); + printf(" CPU:%-4s MHz, ", strmhz(buf1, sysinfo.freqProcessor)); + printf("MPX:%-4s MHz\n", strmhz(buf1, sysinfo.freqSystemBus)); + printf(" DDR:%-4s MHz (%s MT/s data rate), ", + strmhz(buf1, sysinfo.freqSystemBus / 2), + strmhz(buf2, sysinfo.freqSystemBus));
if (sysinfo.freqLocalBus > LCRR_CLKDIV) { - printf("LBC:%4lu MHz\n", sysinfo.freqLocalBus / 1000000); + printf("LBC:%-4s MHz\n", strmhz(buf1, sysinfo.freqLocalBus)); } else { printf("LBC: unknown (LCRR[CLKDIV] = 0x%02lx)\n", sysinfo.freqLocalBus); }
- puts(" L2: "); - if (get_l2cr() & 0x80000000) - puts("Enabled\n"); - else + puts("L1: D-cache 32 KB enabled\n"); + puts(" I-cache 32 KB enabled\n"); + + puts("L2: "); + if (get_l2cr() & 0x80000000) { +#if defined(CONFIG_MPC8610) + puts("256"); +#elif defined(CONFIG_MPC8641) + puts("512"); +#endif + puts(" KB enabled\n"); + } else { puts("Disabled\n"); + }
return 0; }
On Thu, 2009-02-05 at 20:13 -0600, Kumar Gala wrote:
On Feb 5, 2009, at 1:52 PM, Peter Tyser wrote:
CPU: 8641D, Version: 2.1, (0x80900121) Core: E600 Core 0, Version: 0.2, (0x80040202)
Since you are touching things here.. mind fixing the Version print. Its clearly not Version 0.2
Will do.
While we're discussing it I had 2 other questions: 1. Can anyone at Freescale give a hint about how to tell the difference between the 8640 and 8641?
2. Does anyone know how the PVR in IBM's 750 line of processors is parsed? I didn't see it in 750 processor datasheets and wanted to update the following line of code in cpu/74xx_7xx.c while updating the 86xx: - printf ("%s v%d.%d", str, (pvr >> 8) & 0xFF, pvr & 0xFF);
The 86xx and 74xx processors all use the convention below but I wanted to make sure it wouldn't break any 750-based cpus when changing it: - printf ("%s v%d.%d", str, (pvr >> 8) & 0xF, pvr & 0xFF);
Thanks, Peter
On Feb 6, 2009, at 12:41 PM, Peter Tyser wrote:
On Thu, 2009-02-05 at 20:13 -0600, Kumar Gala wrote:
On Feb 5, 2009, at 1:52 PM, Peter Tyser wrote:
CPU: 8641D, Version: 2.1, (0x80900121) Core: E600 Core 0, Version: 0.2, (0x80040202)
Since you are touching things here.. mind fixing the Version print. Its clearly not Version 0.2
Will do.
While we're discussing it I had 2 other questions:
- Can anyone at Freescale give a hint about how to tell the
difference between the 8640 and 8641?
why do you need to? If I'm not mistaken the 8640 is identical to 8641 except for freq and maybe the package.
- Does anyone know how the PVR in IBM's 750 line of processors is
parsed? I didn't see it in 750 processor datasheets and wanted to update the following line of code in cpu/74xx_7xx.c while updating the 86xx:
- printf ("%s v%d.%d", str, (pvr >> 8) & 0xFF, pvr & 0xFF);
The 86xx and 74xx processors all use the convention below but I wanted to make sure it wouldn't break any 750-based cpus when changing it:
- printf ("%s v%d.%d", str, (pvr >> 8) & 0xF, pvr & 0xFF);
take a look at the linux kernel tree (arch/powerpc/kernel/setup- common.c) (I think it does the right thing for 750)
- k
On Fri, 2009-02-06 at 13:01 -0600, Kumar Gala wrote:
On Feb 6, 2009, at 12:41 PM, Peter Tyser wrote:
On Thu, 2009-02-05 at 20:13 -0600, Kumar Gala wrote:
On Feb 5, 2009, at 1:52 PM, Peter Tyser wrote:
CPU: 8641D, Version: 2.1, (0x80900121) Core: E600 Core 0, Version: 0.2, (0x80040202)
Since you are touching things here.. mind fixing the Version print. Its clearly not Version 0.2
Will do.
While we're discussing it I had 2 other questions:
- Can anyone at Freescale give a hint about how to tell the
difference between the 8640 and 8641?
why do you need to? If I'm not mistaken the 8640 is identical to 8641 except for freq and maybe the package.
It would be nice for aesthetic reasons only. My understanding was that the 8640 was just a die shrunk 8641 and that there was no functional difference as you mention.
- Does anyone know how the PVR in IBM's 750 line of processors is
parsed? I didn't see it in 750 processor datasheets and wanted to update the following line of code in cpu/74xx_7xx.c while updating the 86xx:
- printf ("%s v%d.%d", str, (pvr >> 8) & 0xFF, pvr & 0xFF);
The 86xx and 74xx processors all use the convention below but I wanted to make sure it wouldn't break any 750-based cpus when changing it:
- printf ("%s v%d.%d", str, (pvr >> 8) & 0xF, pvr & 0xFF);
take a look at the linux kernel tree (arch/powerpc/kernel/setup- common.c) (I think it does the right thing for 750)
Linux seems to match U-Boot for the 750 PVR, but there are some suspicious question marks in the comments in setup-common.c for the 750 PVR settings which make me wonder...
In any case I'll just modify the 86xx for now.
Thanks, Peter
On Feb 6, 2009, at 1:47 PM, Peter Tyser wrote:
While we're discussing it I had 2 other questions:
- Can anyone at Freescale give a hint about how to tell the
difference between the 8640 and 8641?
why do you need to? If I'm not mistaken the 8640 is identical to 8641 except for freq and maybe the package.
It would be nice for aesthetic reasons only. My understanding was that the 8640 was just a die shrunk 8641 and that there was no functional difference as you mention.
As far as I can tell there is NO software way to tell the two from each other.
- k
participants (2)
-
Kumar Gala -
Peter Tyser