[U-Boot] [PATCH 0/4] serial: pxa: kconfig and optional driver model integration
This series integrates both Kconfig as well as optional driver model support for the PXA serial driver. As I do not have any of the other hardware available for testing for now I only transitioned the Colibri PXA270 to actually make use of DM_SERIAL. As space on this mostly NOR based hardware is rather constrained I decided against also integrating device tree support for now but rather use olde platform data. Your input on this is more than welcome.
Marcel Ziswiler (4): serial: pxa: use kconfig for serial configuration serial: pxa: integrate optional driver model handling colibri_pxa270: drop lzma support for space reason colibri_pxa270: transition to driver model for serial
board/toradex/colibri_pxa270/colibri_pxa270.c | 18 ++- configs/colibri_pxa270_defconfig | 3 + configs/h2200_defconfig | 1 + configs/zipitz2_defconfig | 1 + drivers/serial/Kconfig | 6 + drivers/serial/serial_pxa.c | 181 +++++++++++++++++--------- include/configs/colibri_pxa270.h | 4 - include/configs/h2200.h | 2 - include/configs/zipitz2.h | 1 - include/dm/platform_data/serial_pxa.h | 56 ++++++++ scripts/config_whitelist.txt | 1 - 11 files changed, 201 insertions(+), 73 deletions(-) create mode 100644 include/dm/platform_data/serial_pxa.h
Migrate the PXA serial driver to be configured via Kconfig.
Signed-off-by: Marcel Ziswiler marcel.ziswiler@toradex.com ---
configs/colibri_pxa270_defconfig | 1 + configs/h2200_defconfig | 1 + configs/zipitz2_defconfig | 1 + drivers/serial/Kconfig | 6 ++++++ include/configs/colibri_pxa270.h | 1 - include/configs/h2200.h | 2 -- include/configs/zipitz2.h | 1 - scripts/config_whitelist.txt | 1 - 8 files changed, 9 insertions(+), 5 deletions(-)
diff --git a/configs/colibri_pxa270_defconfig b/configs/colibri_pxa270_defconfig index 9a57041..85740c2 100644 --- a/configs/colibri_pxa270_defconfig +++ b/configs/colibri_pxa270_defconfig @@ -13,6 +13,7 @@ CONFIG_CMD_DHCP=y CONFIG_CMD_PING=y CONFIG_CMD_EXT2=y CONFIG_CMD_FAT=y +CONFIG_PXA_SERIAL=y CONFIG_USB=y CONFIG_USB_STORAGE=y CONFIG_OF_LIBFDT=y diff --git a/configs/h2200_defconfig b/configs/h2200_defconfig index c1b359e..a47159a 100644 --- a/configs/h2200_defconfig +++ b/configs/h2200_defconfig @@ -24,3 +24,4 @@ CONFIG_SYS_PROMPT="> " # CONFIG_CMD_NFS is not set CONFIG_CMD_PING=y # CONFIG_CMD_MISC is not set +CONFIG_PXA_SERIAL=y diff --git a/configs/zipitz2_defconfig b/configs/zipitz2_defconfig index 8eb9be4..5846579 100644 --- a/configs/zipitz2_defconfig +++ b/configs/zipitz2_defconfig @@ -14,6 +14,7 @@ CONFIG_CMD_USB=y CONFIG_CMD_CACHE=y CONFIG_CMD_EXT2=y CONFIG_CMD_FAT=y +CONFIG_PXA_SERIAL=y CONFIG_USB=y CONFIG_USB_STORAGE=y CONFIG_LCD=y diff --git a/drivers/serial/Kconfig b/drivers/serial/Kconfig index 541cf2e..cb6a2a2 100644 --- a/drivers/serial/Kconfig +++ b/drivers/serial/Kconfig @@ -386,4 +386,10 @@ config MSM_SERIAL for example APQ8016 and MSM8916. Single baudrate is supported in current implementation (115200).
+config PXA_SERIAL + bool "PXA serial port support" + help + If you have a machine based on a Marvell XScale PXA2xx CPU you + can enable its onboard serial ports by enabling this option. + endmenu diff --git a/include/configs/colibri_pxa270.h b/include/configs/colibri_pxa270.h index 429f571..5245609 100644 --- a/include/configs/colibri_pxa270.h +++ b/include/configs/colibri_pxa270.h @@ -44,7 +44,6 @@ /* * Serial Console Configuration */ -#define CONFIG_PXA_SERIAL #define CONFIG_FFUART 1 #define CONFIG_CONS_INDEX 3 #define CONFIG_BAUDRATE 115200 diff --git a/include/configs/h2200.h b/include/configs/h2200.h index 8e77982..18b5488 100644 --- a/include/configs/h2200.h +++ b/include/configs/h2200.h @@ -107,8 +107,6 @@ /* * Serial port */ - -#define CONFIG_PXA_SERIAL #define CONFIG_FFUART #define CONFIG_CONS_INDEX 3
diff --git a/include/configs/zipitz2.h b/include/configs/zipitz2.h index ed2c9ac..97dfc0e 100644 --- a/include/configs/zipitz2.h +++ b/include/configs/zipitz2.h @@ -49,7 +49,6 @@ * Serial Console Configuration * STUART - the lower serial port on Colibri board */ -#define CONFIG_PXA_SERIAL #define CONFIG_STUART 1 #define CONFIG_CONS_INDEX 2 #define CONFIG_BAUDRATE 115200 diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt index 11b5a22..1aef1bc 100644 --- a/scripts/config_whitelist.txt +++ b/scripts/config_whitelist.txt @@ -3740,7 +3740,6 @@ CONFIG_PWM_IMX CONFIG_PXA_LCD CONFIG_PXA_MMC_GENERIC CONFIG_PXA_PWR_I2C -CONFIG_PXA_SERIAL CONFIG_PXA_STD_I2C CONFIG_PXA_VGA CONFIG_PXA_VIDEO
Optional driver model handling integration.
Signed-off-by: Marcel Ziswiler marcel.ziswiler@toradex.com ---
drivers/serial/serial_pxa.c | 181 ++++++++++++++++++++++------------ include/dm/platform_data/serial_pxa.h | 56 +++++++++++ 2 files changed, 174 insertions(+), 63 deletions(-) create mode 100644 include/dm/platform_data/serial_pxa.h
diff --git a/drivers/serial/serial_pxa.c b/drivers/serial/serial_pxa.c index 1eb19ec..b927a3e 100644 --- a/drivers/serial/serial_pxa.c +++ b/drivers/serial/serial_pxa.c @@ -14,6 +14,9 @@ * * Copyright (C) 1999 2000 2001 Erik Mouw (J.A.K.Mouw@its.tudelft.nl) * + * Modified to add driver model (DM) support + * (C) Copyright 2016 Marcel Ziswiler marcel.ziswiler@toradex.com + * * SPDX-License-Identifier: GPL-2.0+ */
@@ -21,75 +24,32 @@ #include <asm/arch/pxa-regs.h> #include <asm/arch/regs-uart.h> #include <asm/io.h> +#include <dm.h> +#include <dm/platform_data/serial_pxa.h> #include <linux/compiler.h> #include <serial.h> #include <watchdog.h>
DECLARE_GLOBAL_DATA_PTR;
-/* - * The numbering scheme differs here for PXA25x, PXA27x and PXA3xx so we can - * easily handle enabling of clock. - */ -#ifdef CONFIG_CPU_MONAHANS -#define UART_CLK_BASE CKENA_21_BTUART -#define UART_CLK_REG CKENA -#define BTUART_INDEX 0 -#define FFUART_INDEX 1 -#define STUART_INDEX 2 -#elif CONFIG_CPU_PXA25X -#define UART_CLK_BASE (1 << 4) /* HWUART */ -#define UART_CLK_REG CKEN -#define HWUART_INDEX 0 -#define STUART_INDEX 1 -#define FFUART_INDEX 2 -#define BTUART_INDEX 3 -#else /* PXA27x */ -#define UART_CLK_BASE CKEN5_STUART -#define UART_CLK_REG CKEN -#define STUART_INDEX 0 -#define FFUART_INDEX 1 -#define BTUART_INDEX 2 -#endif - -/* - * Only PXA250 has HWUART, to avoid poluting the code with more macros, - * artificially introduce this. - */ -#ifndef CONFIG_CPU_PXA25X -#define HWUART_INDEX 0xff -#endif - -static uint32_t pxa_uart_get_baud_divider(void) +static uint32_t pxa_uart_get_baud_divider(int baudrate) { - if (gd->baudrate == 1200) + if (baudrate == 1200) return 768; - else if (gd->baudrate == 9600) + else if (baudrate == 9600) return 96; - else if (gd->baudrate == 19200) + else if (baudrate == 19200) return 48; - else if (gd->baudrate == 38400) + else if (baudrate == 38400) return 24; - else if (gd->baudrate == 57600) + else if (baudrate == 57600) return 16; - else if (gd->baudrate == 115200) + else if (baudrate == 115200) return 8; else /* Unsupported baudrate */ return 0; }
-static struct pxa_uart_regs *pxa_uart_index_to_regs(uint32_t uart_index) -{ - switch (uart_index) { - case FFUART_INDEX: return (struct pxa_uart_regs *)FFUART_BASE; - case BTUART_INDEX: return (struct pxa_uart_regs *)BTUART_BASE; - case STUART_INDEX: return (struct pxa_uart_regs *)STUART_BASE; - case HWUART_INDEX: return (struct pxa_uart_regs *)HWUART_BASE; - default: - return NULL; - } -} - static void pxa_uart_toggle_clock(uint32_t uart_index, int enable) { uint32_t clk_reg, clk_offset, reg; @@ -110,20 +70,13 @@ static void pxa_uart_toggle_clock(uint32_t uart_index, int enable) /* * Enable clock and set baud rate, parity etc. */ -void pxa_setbrg_dev(uint32_t uart_index) +void pxa_setbrg_common(struct pxa_uart_regs *uart_regs, int port, int baudrate) { - uint32_t divider = 0; - struct pxa_uart_regs *uart_regs; - - divider = pxa_uart_get_baud_divider(); + uint32_t divider = pxa_uart_get_baud_divider(baudrate); if (!divider) hang();
- uart_regs = pxa_uart_index_to_regs(uart_index); - if (!uart_regs) - hang(); - - pxa_uart_toggle_clock(uart_index, 1); + pxa_uart_toggle_clock(port, 1);
/* Disable interrupts and FIFOs */ writel(0, &uart_regs->ier); @@ -139,13 +92,38 @@ void pxa_setbrg_dev(uint32_t uart_index) writel(IER_UUE, &uart_regs->ier); }
+#ifndef CONFIG_DM_SERIAL +static struct pxa_uart_regs *pxa_uart_index_to_regs(uint32_t uart_index) +{ + switch (uart_index) { + case FFUART_INDEX: return (struct pxa_uart_regs *)FFUART_BASE; + case BTUART_INDEX: return (struct pxa_uart_regs *)BTUART_BASE; + case STUART_INDEX: return (struct pxa_uart_regs *)STUART_BASE; + case HWUART_INDEX: return (struct pxa_uart_regs *)HWUART_BASE; + default: + return NULL; + } +} + +/* + * Enable clock and set baud rate, parity etc. + */ +void pxa_setbrg_dev(uint32_t uart_index) +{ + struct pxa_uart_regs *uart_regs = pxa_uart_index_to_regs(uart_index); + if (!uart_regs) + hang(); + + pxa_setbrg_common(uart_regs, uart_index, gd->baudrate); +} + /* * Initialise the serial port with the given baudrate. The settings * are always 8 data bits, no parity, 1 stop bit, no start bits. */ int pxa_init_dev(unsigned int uart_index) { - pxa_setbrg_dev (uart_index); + pxa_setbrg_dev(uart_index); return 0; }
@@ -297,3 +275,80 @@ void pxa_serial_initialize(void) serial_register(&serial_stuart_device); #endif } +#endif /* CONFIG_DM_SERIAL */ + +#ifdef CONFIG_DM_SERIAL +static int pxa_serial_probe(struct udevice *dev) +{ + struct pxa_serial_platdata *plat = dev->platdata; + + pxa_setbrg_common((struct pxa_uart_regs *)(plat->base), plat->port, + plat->baudrate); + return 0; +} + +static int pxa_serial_putc(struct udevice *dev, const char ch) +{ + struct pxa_serial_platdata *plat = dev->platdata; + struct pxa_uart_regs *uart_regs = (struct pxa_uart_regs *)(plat->base); + + /* Wait for last character to go. */ + if (!(readl(&uart_regs->lsr) & LSR_TEMT)) + return -EAGAIN; + + writel(ch, &uart_regs->thr); + + return 0; +} + +static int pxa_serial_getc(struct udevice *dev) +{ + struct pxa_serial_platdata *plat = dev->platdata; + struct pxa_uart_regs *uart_regs = (struct pxa_uart_regs *)(plat->base); + + /* Wait for a character to arrive. */ + if (!(readl(&uart_regs->lsr) & LSR_DR)) + return -EAGAIN; + + return readl(&uart_regs->rbr) & 0xff; +} + +int pxa_serial_setbrg(struct udevice *dev, int baudrate) +{ + struct pxa_serial_platdata *plat = dev->platdata; + struct pxa_uart_regs *uart_regs = (struct pxa_uart_regs *)(plat->base); + int port = plat->port; + + pxa_setbrg_common(uart_regs, port, baudrate); + + return 0; +} + +static int pxa_serial_pending(struct udevice *dev, bool input) +{ + struct pxa_serial_platdata *plat = dev->platdata; + struct pxa_uart_regs *uart_regs = (struct pxa_uart_regs *)(plat->base); + + if (input) + return readl(&uart_regs->lsr) & LSR_DR ? 1 : 0; + else + return readl(&uart_regs->lsr) & LSR_TEMT ? 0 : 1; + + return 0; +} + +static const struct dm_serial_ops pxa_serial_ops = { + .putc = pxa_serial_putc, + .pending = pxa_serial_pending, + .getc = pxa_serial_getc, + .setbrg = pxa_serial_setbrg, +}; + +U_BOOT_DRIVER(serial_pxa) = { + .name = "serial_pxa", + .id = UCLASS_SERIAL, + .probe = pxa_serial_probe, + .ops = &pxa_serial_ops, + .flags = DM_FLAG_PRE_RELOC, +}; +#endif /* CONFIG_DM_SERIAL */ diff --git a/include/dm/platform_data/serial_pxa.h b/include/dm/platform_data/serial_pxa.h new file mode 100644 index 0000000..f08fc13 --- /dev/null +++ b/include/dm/platform_data/serial_pxa.h @@ -0,0 +1,56 @@ +/* + * Copyright (c) 2016 Marcel Ziswiler marcel.ziswiler@toradex.com + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __serial_pxa_h +#define __serial_pxa_h + +/* + * The numbering scheme differs here for PXA25x, PXA27x and PXA3xx so we can + * easily handle enabling of clock. + */ +#ifdef CONFIG_CPU_MONAHANS +#define UART_CLK_BASE CKENA_21_BTUART +#define UART_CLK_REG CKENA +#define BTUART_INDEX 0 +#define FFUART_INDEX 1 +#define STUART_INDEX 2 +#elif CONFIG_CPU_PXA25X +#define UART_CLK_BASE (1 << 4) /* HWUART */ +#define UART_CLK_REG CKEN +#define HWUART_INDEX 0 +#define STUART_INDEX 1 +#define FFUART_INDEX 2 +#define BTUART_INDEX 3 +#else /* PXA27x */ +#define UART_CLK_BASE CKEN5_STUART +#define UART_CLK_REG CKEN +#define STUART_INDEX 0 +#define FFUART_INDEX 1 +#define BTUART_INDEX 2 +#endif + +/* + * Only PXA250 has HWUART, to avoid poluting the code with more macros, + * artificially introduce this. + */ +#ifndef CONFIG_CPU_PXA25X +#define HWUART_INDEX 0xff +#endif + +/* + * struct pxa_serial_platdata - information about a PXA port + * + * @base: Uart port base register address + * @port: Uart port index, for cpu with pinmux for uart / gpio + * baudrtatre: Uart port baudrate + */ +struct pxa_serial_platdata { + struct pxa_uart_regs *base; + int port; + int baudrate; +}; + +#endif /* __serial_pxa_h */
On 10/28/2016 10:50 PM, Marcel Ziswiler wrote:
Optional driver model handling integration.
Signed-off-by: Marcel Ziswiler marcel.ziswiler@toradex.com
drivers/serial/serial_pxa.c | 181 ++++++++++++++++++++++------------ include/dm/platform_data/serial_pxa.h | 56 +++++++++++ 2 files changed, 174 insertions(+), 63 deletions(-) create mode 100644 include/dm/platform_data/serial_pxa.h
diff --git a/drivers/serial/serial_pxa.c b/drivers/serial/serial_pxa.c index 1eb19ec..b927a3e 100644 --- a/drivers/serial/serial_pxa.c +++ b/drivers/serial/serial_pxa.c @@ -14,6 +14,9 @@
- Copyright (C) 1999 2000 2001 Erik Mouw (J.A.K.Mouw@its.tudelft.nl)
- Modified to add driver model (DM) support
- (C) Copyright 2016 Marcel Ziswiler marcel.ziswiler@toradex.com
*/
- SPDX-License-Identifier: GPL-2.0+
@@ -21,75 +24,32 @@ #include <asm/arch/pxa-regs.h> #include <asm/arch/regs-uart.h> #include <asm/io.h> +#include <dm.h> +#include <dm/platform_data/serial_pxa.h> #include <linux/compiler.h> #include <serial.h> #include <watchdog.h>
DECLARE_GLOBAL_DATA_PTR;
-/*
- The numbering scheme differs here for PXA25x, PXA27x and PXA3xx so we can
- easily handle enabling of clock.
- */
-#ifdef CONFIG_CPU_MONAHANS -#define UART_CLK_BASE CKENA_21_BTUART -#define UART_CLK_REG CKENA -#define BTUART_INDEX 0 -#define FFUART_INDEX 1 -#define STUART_INDEX 2 -#elif CONFIG_CPU_PXA25X -#define UART_CLK_BASE (1 << 4) /* HWUART */ -#define UART_CLK_REG CKEN -#define HWUART_INDEX 0 -#define STUART_INDEX 1 -#define FFUART_INDEX 2 -#define BTUART_INDEX 3 -#else /* PXA27x */ -#define UART_CLK_BASE CKEN5_STUART -#define UART_CLK_REG CKEN -#define STUART_INDEX 0 -#define FFUART_INDEX 1 -#define BTUART_INDEX 2 -#endif
-/*
- Only PXA250 has HWUART, to avoid poluting the code with more macros,
- artificially introduce this.
- */
-#ifndef CONFIG_CPU_PXA25X -#define HWUART_INDEX 0xff -#endif
-static uint32_t pxa_uart_get_baud_divider(void) +static uint32_t pxa_uart_get_baud_divider(int baudrate) {
While at it:
/* Do we even need this check ? */ if (baudrate != 1200 || baudrate != 9600 || baudrate != 19200 || baudrate != 38400 || baudrate != 57600 || baudrate != 115200) return 0;
return 921600 / baudrate;
- if (gd->baudrate == 1200)
- if (baudrate == 1200) return 768;
- else if (gd->baudrate == 9600)
- else if (baudrate == 9600) return 96;
- else if (gd->baudrate == 19200)
- else if (baudrate == 19200) return 48;
- else if (gd->baudrate == 38400)
- else if (baudrate == 38400) return 24;
- else if (gd->baudrate == 57600)
- else if (baudrate == 57600) return 16;
- else if (gd->baudrate == 115200)
- else if (baudrate == 115200) return 8; else /* Unsupported baudrate */ return 0;
}
-static struct pxa_uart_regs *pxa_uart_index_to_regs(uint32_t uart_index) -{
- switch (uart_index) {
- case FFUART_INDEX: return (struct pxa_uart_regs *)FFUART_BASE;
- case BTUART_INDEX: return (struct pxa_uart_regs *)BTUART_BASE;
- case STUART_INDEX: return (struct pxa_uart_regs *)STUART_BASE;
- case HWUART_INDEX: return (struct pxa_uart_regs *)HWUART_BASE;
- default:
return NULL;- }
-}
static void pxa_uart_toggle_clock(uint32_t uart_index, int enable) { uint32_t clk_reg, clk_offset, reg; @@ -110,20 +70,13 @@ static void pxa_uart_toggle_clock(uint32_t uart_index, int enable) /*
- Enable clock and set baud rate, parity etc.
*/ -void pxa_setbrg_dev(uint32_t uart_index) +void pxa_setbrg_common(struct pxa_uart_regs *uart_regs, int port, int baudrate) {
- uint32_t divider = 0;
- struct pxa_uart_regs *uart_regs;
- divider = pxa_uart_get_baud_divider();
- uint32_t divider = pxa_uart_get_baud_divider(baudrate); if (!divider) hang();
- uart_regs = pxa_uart_index_to_regs(uart_index);
- if (!uart_regs)
hang();- pxa_uart_toggle_clock(uart_index, 1);
pxa_uart_toggle_clock(port, 1);
/* Disable interrupts and FIFOs */ writel(0, &uart_regs->ier);
@@ -139,13 +92,38 @@ void pxa_setbrg_dev(uint32_t uart_index) writel(IER_UUE, &uart_regs->ier); }
+#ifndef CONFIG_DM_SERIAL +static struct pxa_uart_regs *pxa_uart_index_to_regs(uint32_t uart_index) +{
- switch (uart_index) {
- case FFUART_INDEX: return (struct pxa_uart_regs *)FFUART_BASE;
- case BTUART_INDEX: return (struct pxa_uart_regs *)BTUART_BASE;
- case STUART_INDEX: return (struct pxa_uart_regs *)STUART_BASE;
- case HWUART_INDEX: return (struct pxa_uart_regs *)HWUART_BASE;
- default:
return NULL;- }
+}
+/*
- Enable clock and set baud rate, parity etc.
- */
+void pxa_setbrg_dev(uint32_t uart_index) +{
- struct pxa_uart_regs *uart_regs = pxa_uart_index_to_regs(uart_index);
- if (!uart_regs)
hang();
Can we handle the failure gracefully ?
- pxa_setbrg_common(uart_regs, uart_index, gd->baudrate);
+}
/*
- Initialise the serial port with the given baudrate. The settings
- are always 8 data bits, no parity, 1 stop bit, no start bits.
*/ int pxa_init_dev(unsigned int uart_index) {
- pxa_setbrg_dev (uart_index);
- pxa_setbrg_dev(uart_index); return 0;
}
@@ -297,3 +275,80 @@ void pxa_serial_initialize(void) serial_register(&serial_stuart_device); #endif } +#endif /* CONFIG_DM_SERIAL */
+#ifdef CONFIG_DM_SERIAL +static int pxa_serial_probe(struct udevice *dev) +{
- struct pxa_serial_platdata *plat = dev->platdata;
- pxa_setbrg_common((struct pxa_uart_regs *)(plat->base), plat->port,
The parenthesis around plat->base is superfluous .
plat->baudrate);- return 0;
+}
[...]
diff --git a/include/dm/platform_data/serial_pxa.h b/include/dm/platform_data/serial_pxa.h new file mode 100644 index 0000000..f08fc13 --- /dev/null +++ b/include/dm/platform_data/serial_pxa.h @@ -0,0 +1,56 @@ +/*
- Copyright (c) 2016 Marcel Ziswiler marcel.ziswiler@toradex.com
- SPDX-License-Identifier: GPL-2.0+
- */
+#ifndef __serial_pxa_h +#define __serial_pxa_h
This should be in caps.
+/*
- The numbering scheme differs here for PXA25x, PXA27x and PXA3xx so we can
- easily handle enabling of clock.
- */
+#ifdef CONFIG_CPU_MONAHANS
Please drop the #define[tab]FOO and replace it with #define[space]FOO
+#define UART_CLK_BASE CKENA_21_BTUART +#define UART_CLK_REG CKENA +#define BTUART_INDEX 0 +#define FFUART_INDEX 1 +#define STUART_INDEX 2 +#elif CONFIG_CPU_PXA25X +#define UART_CLK_BASE (1 << 4) /* HWUART */ +#define UART_CLK_REG CKEN +#define HWUART_INDEX 0 +#define STUART_INDEX 1 +#define FFUART_INDEX 2 +#define BTUART_INDEX 3 +#else /* PXA27x */ +#define UART_CLK_BASE CKEN5_STUART +#define UART_CLK_REG CKEN +#define STUART_INDEX 0 +#define FFUART_INDEX 1 +#define BTUART_INDEX 2 +#endif
Thanks!
As the upcoming driver model integration takes up some more precious flash space first make sure to drop expensive LZMA support.
Signed-off-by: Marcel Ziswiler marcel.ziswiler@toradex.com ---
include/configs/colibri_pxa270.h | 1 - 1 file changed, 1 deletion(-)
diff --git a/include/configs/colibri_pxa270.h b/include/configs/colibri_pxa270.h index 5245609..b16abdc 100644 --- a/include/configs/colibri_pxa270.h +++ b/include/configs/colibri_pxa270.h @@ -39,7 +39,6 @@ #define CONFIG_TIMESTAMP #define CONFIG_CMDLINE_TAG #define CONFIG_SETUP_MEMORY_TAGS -#define CONFIG_LZMA /* LZMA compression support */
/* * Serial Console Configuration
On Fri, Oct 28, 2016 at 10:50:23PM +0200, Marcel Ziswiler wrote:
As the upcoming driver model integration takes up some more precious flash space first make sure to drop expensive LZMA support.
Signed-off-by: Marcel Ziswiler marcel.ziswiler@toradex.com
Applied to u-boot/master, thanks!
Add serial platform data to board file. Enable driver model for PXA serial driver.
Signed-off-by: Marcel Ziswiler marcel.ziswiler@toradex.com
---
board/toradex/colibri_pxa270/colibri_pxa270.c | 18 ++++++++++++++++-- configs/colibri_pxa270_defconfig | 2 ++ include/configs/colibri_pxa270.h | 2 -- 3 files changed, 18 insertions(+), 4 deletions(-)
diff --git a/board/toradex/colibri_pxa270/colibri_pxa270.c b/board/toradex/colibri_pxa270/colibri_pxa270.c index 3def0a6..2e3e03a 100644 --- a/board/toradex/colibri_pxa270/colibri_pxa270.c +++ b/board/toradex/colibri_pxa270/colibri_pxa270.c @@ -8,10 +8,13 @@
#include <common.h> #include <asm/arch/hardware.h> -#include <asm/arch/regs-mmc.h> #include <asm/arch/pxa.h> -#include <netdev.h> +#include <asm/arch/regs-mmc.h> +#include <asm/arch/regs-uart.h> #include <asm/io.h> +#include <dm/platdata.h> +#include <dm/platform_data/serial_pxa.h> +#include <netdev.h> #include <serial.h> #include <usb.h>
@@ -105,3 +108,14 @@ int board_mmc_init(bd_t *bis) return 0; } #endif + +static const struct pxa_serial_platdata serial_platdata = { + .base = (struct pxa_uart_regs *)FFUART_BASE, + .port = FFUART_INDEX, + .baudrate = CONFIG_BAUDRATE, +}; + +U_BOOT_DEVICE(pxa_serials) = { + .name = "serial_pxa", + .platdata = &serial_platdata, +}; diff --git a/configs/colibri_pxa270_defconfig b/configs/colibri_pxa270_defconfig index 85740c2..46b3137 100644 --- a/configs/colibri_pxa270_defconfig +++ b/configs/colibri_pxa270_defconfig @@ -13,6 +13,8 @@ CONFIG_CMD_DHCP=y CONFIG_CMD_PING=y CONFIG_CMD_EXT2=y CONFIG_CMD_FAT=y +CONFIG_DM=y +CONFIG_DM_SERIAL=y CONFIG_PXA_SERIAL=y CONFIG_USB=y CONFIG_USB_STORAGE=y diff --git a/include/configs/colibri_pxa270.h b/include/configs/colibri_pxa270.h index b16abdc..66dba74 100644 --- a/include/configs/colibri_pxa270.h +++ b/include/configs/colibri_pxa270.h @@ -43,8 +43,6 @@ /* * Serial Console Configuration */ -#define CONFIG_FFUART 1 -#define CONFIG_CONS_INDEX 3 #define CONFIG_BAUDRATE 115200
/*
participants (3)
-
Marcel Ziswiler -
Marek Vasut -
Tom Rini