[U-Boot] fdtgrep results in Segmentation fault for 64bit DT

Hi Simon,
I am working on U-Boot support on my new ARMv8 SoC. I was hit by a problem with fdtgrep.
(Note: CONFIG_SPL_OF_CONTROL is on UniPhier SoC family)
CC spl/lib/time.o CC spl/lib/rand.o CC spl/lib/vsprintf.o CC spl/lib/panic.o CC spl/lib/strto.o LD spl/lib/built-in.o LDS spl/u-boot-spl.lds LD spl/u-boot-spl OBJCOPY spl/u-boot-spl-nodtb.bin FDTGREP spl/u-boot-spl.dtb Error: FDT_ERR_BADMAGIC make[2]: *** [spl/u-boot-spl.dtb] Error 1 make[1]: *** [spl/u-boot-spl] Error 2 make[1]: Leaving directory `/home/yamada/workspace/u-boot-unph' make: *** [u-boot] Error 2
On my command line,
$ tools/fdtgrep -b u-boot,dm-pre-reloc -RT dts/dt.dtb -n /chosen -O dtb Segmentation fault (core dumped)
Could you take a look?
My DT looks like follows: (It was taken from linux/arch/arm/boot/dts/socionext/uniphier-ph1-ld10-ref.dts, and it is working on Linux. I just added "u-boot,dm-pre-reloc" to some nodes. So it should be correct.)
yamada@beagle:~/workspace/u-boot-unph$ fdtdump dts/dt.dtb /dts-v1/; // magic: 0xd00dfeed // totalsize: 0x18f8 (6392) // off_dt_struct: 0x38 // off_dt_strings: 0x178c // off_mem_rsvmap: 0x28 // version: 17 // last_comp_version: 16 // boot_cpuid_phys: 0x0 // size_dt_strings: 0x16c // size_dt_struct: 0x1754
/ { compatible = "socionext,ph1-ld10-ref", "socionext,ph1-ld10"; #address-cells = <0x00000002>; #size-cells = <0x00000002>; interrupt-parent = <0x00000001>; model = "UniPhier PH1-LD10 Reference Board"; cpus { #address-cells = <0x00000002>; #size-cells = <0x00000000>; cpu-map { cluster0 { core0 { cpu = <0x00000002>; }; core1 { cpu = <0x00000003>; }; }; cluster1 { core0 { cpu = <0x00000004>; }; core1 { cpu = <0x00000005>; }; }; }; cpu@0 { device_type = "cpu"; compatible = "arm,cortex-a72", "arm,armv8"; reg = <0x00000000 0x00000000>; enable-method = "spin-table"; cpu-release-addr = <0x00000000 0x80000100>; linux,phandle = <0x00000002>; phandle = <0x00000002>; }; cpu@1 { device_type = "cpu"; compatible = "arm,cortex-a72", "arm,armv8"; reg = <0x00000000 0x00000001>; enable-method = "spin-table"; cpu-release-addr = <0x00000000 0x80000100>; linux,phandle = <0x00000003>; phandle = <0x00000003>; }; cpu@100 { device_type = "cpu"; compatible = "arm,cortex-a53", "arm,armv8"; reg = <0x00000000 0x00000100>; enable-method = "spin-table"; cpu-release-addr = <0x00000000 0x80000100>; linux,phandle = <0x00000004>; phandle = <0x00000004>; }; cpu@101 { device_type = "cpu"; compatible = "arm,cortex-a53", "arm,armv8"; reg = <0x00000000 0x00000101>; enable-method = "spin-table"; cpu-release-addr = <0x00000000 0x80000100>; linux,phandle = <0x00000005>; phandle = <0x00000005>; }; }; clocks { uart_clk { #clock-cells = <0x00000000>; compatible = "fixed-clock"; clock-frequency = <0x038185a0>; linux,phandle = <0x00000007>; phandle = <0x00000007>; }; i2c_clk { #clock-cells = <0x00000000>; compatible = "fixed-clock"; clock-frequency = <0x02faf080>; linux,phandle = <0x0000000c>; phandle = <0x0000000c>; }; }; timer { compatible = "arm,armv8-timer"; interrupts = <0x00000001 0x0000000d 0x00000f01 0x00000001 0x0000000e 0x00000f01 0x00000001 0x0000000b 0x00000f01 0x00000001 0x0000000a 0x00000f01>; }; soc { compatible = "simple-bus"; #address-cells = <0x00000001>; #size-cells = <0x00000001>; ranges = <0x00000000 0x00000000 0x00000000 0xffffffff>; u-boot,dm-pre-reloc; serial@54006800 { compatible = "socionext,uniphier-uart"; status = "okay"; reg = <0x54006800 0x00000040>; interrupts = <0x00000000 0x00000021 0x00000004>; pinctrl-names = "default"; pinctrl-0 = <0x00000006>; clocks = <0x00000007>; u-boot,dm-pre-reloc; }; serial@54006900 { compatible = "socionext,uniphier-uart"; status = "disabled"; reg = <0x54006900 0x00000040>; interrupts = <0x00000000 0x00000023 0x00000004>; pinctrl-names = "default"; pinctrl-0 = <0x00000008>; clocks = <0x00000007>; }; serial@54006a00 { compatible = "socionext,uniphier-uart"; status = "disabled"; reg = <0x54006a00 0x00000040>; interrupts = <0x00000000 0x00000025 0x00000004>; pinctrl-names = "default"; pinctrl-0 = <0x00000009>; clocks = <0x00000007>; }; serial@54006b00 { compatible = "socionext,uniphier-uart"; status = "disabled"; reg = <0x54006b00 0x00000040>; interrupts = <0x00000000 0x000000b1 0x00000004>; pinctrl-names = "default"; pinctrl-0 = <0x0000000a>; clocks = <0x00000007>; }; i2c@58780000 { compatible = "socionext,uniphier-fi2c"; status = "okay"; reg = <0x58780000 0x00000080>; #address-cells = <0x00000001>; #size-cells = <0x00000000>; interrupts = <0x00000000 0x00000029 0x00000004>; pinctrl-names = "default"; pinctrl-0 = <0x0000000b>; clocks = <0x0000000c>; clock-frequency = <0x000186a0>; }; i2c@58781000 { compatible = "socionext,uniphier-fi2c"; status = "disabled"; reg = <0x58781000 0x00000080>; #address-cells = <0x00000001>; #size-cells = <0x00000000>; interrupts = <0x00000000 0x0000002a 0x00000004>; pinctrl-names = "default"; pinctrl-0 = <0x0000000d>; clocks = <0x0000000c>; clock-frequency = <0x000186a0>; }; i2c@58782000 { compatible = "socionext,uniphier-fi2c"; status = "disabled"; reg = <0x58782000 0x00000080>; #address-cells = <0x00000001>; #size-cells = <0x00000000>; interrupts = <0x00000000 0x0000002b 0x00000004>; pinctrl-names = "default"; pinctrl-0 = <0x0000000e>; clocks = <0x0000000c>; clock-frequency = <0x000186a0>; }; i2c@58783000 { compatible = "socionext,uniphier-fi2c"; status = "disabled"; reg = <0x58783000 0x00000080>; #address-cells = <0x00000001>; #size-cells = <0x00000000>; interrupts = <0x00000000 0x0000002c 0x00000004>; pinctrl-names = "default"; pinctrl-0 = <0x0000000f>; clocks = <0x0000000c>; clock-frequency = <0x000186a0>; }; i2c@58784000 { compatible = "socionext,uniphier-fi2c"; reg = <0x58784000 0x00000080>; #address-cells = <0x00000001>; #size-cells = <0x00000000>; interrupts = <0x00000000 0x0000002d 0x00000004>; clocks = <0x0000000c>; clock-frequency = <0x00061a80>; }; i2c@58785000 { compatible = "socionext,uniphier-fi2c"; reg = <0x58785000 0x00000080>; #address-cells = <0x00000001>; #size-cells = <0x00000000>; interrupts = <0x00000000 0x00000019 0x00000004>; clocks = <0x0000000c>; clock-frequency = <0x00061a80>; }; i2c@58786000 { compatible = "socionext,uniphier-fi2c"; reg = <0x58786000 0x00000080>; #address-cells = <0x00000001>; #size-cells = <0x00000000>; interrupts = <0x00000000 0x0000001a 0x00000004>; clocks = <0x0000000c>; clock-frequency = <0x00061a80>; }; system-bus@58c00000 { compatible = "socionext,uniphier-system-bus"; reg = <0x58c00000 0x00000400>; #address-cells = <0x00000002>; #size-cells = <0x00000001>; }; smpctrl@59800000 { compatible = "socionext,uniphier-smpctrl"; reg = <0x59801000 0x00000400>; }; pinctrl@5f801000 { compatible = "socionext,ph1-ld10-pinctrl", "syscon"; reg = <0x5f801000 0x00000e00>; u-boot,dm-pre-reloc; emmc_grp { groups = "emmc", "emmc_dat8"; function = "emmc"; }; emmc_grp_1v8 { groups = "emmc", "emmc_dat8"; function = "emmc"; }; i2c0_grp { groups = "i2c0"; function = "i2c0"; linux,phandle = <0x0000000b>; phandle = <0x0000000b>; }; i2c1_grp { groups = "i2c1"; function = "i2c1"; linux,phandle = <0x0000000d>; phandle = <0x0000000d>; }; i2c2_grp { groups = "i2c2"; function = "i2c2"; linux,phandle = <0x0000000e>; phandle = <0x0000000e>; }; i2c3_grp { groups = "i2c3"; function = "i2c3"; linux,phandle = <0x0000000f>; phandle = <0x0000000f>; }; sd_grp { groups = "sd"; function = "sd"; }; sd_grp_1v8 { groups = "sd"; function = "sd"; }; sd1_grp { groups = "sd1"; function = "sd1"; }; sd1_grp_1v8 { groups = "sd1"; function = "sd1"; }; uart0_grp { groups = "uart0"; function = "uart0"; u-boot,dm-pre-reloc; linux,phandle = <0x00000006>; phandle = <0x00000006>; }; uart1_grp { groups = "uart1"; function = "uart1"; linux,phandle = <0x00000008>; phandle = <0x00000008>; }; uart2_grp { groups = "uart2"; function = "uart2"; linux,phandle = <0x00000009>; phandle = <0x00000009>; }; uart3_grp { groups = "uart3"; function = "uart3"; linux,phandle = <0x0000000a>; phandle = <0x0000000a>; }; usb0_grp { groups = "usb0"; function = "usb0"; }; usb1_grp { groups = "usb1"; function = "usb1"; }; usb2_grp { groups = "usb2"; function = "usb2"; }; usb3_grp { groups = "usb3"; function = "usb3"; }; }; interrupt-controller@5fe00000 { compatible = "arm,gic-v3"; reg = <0x5fe00000 0x00010000 0x5fe80000 0x00080000>; interrupt-controller; #interrupt-cells = <0x00000003>; interrupts = <0x00000001 0x00000009 0x00000004>; linux,phandle = <0x00000001>; phandle = <0x00000001>; }; }; memory { device_type = "memory"; reg = <0x00000000 0x80000000 0x00000000 0xc0000000>; }; chosen { stdout-path = "serial0:115200n8"; }; aliases { serial0 = "/soc/serial@54006800"; serial1 = "/soc/serial@54006900"; serial2 = "/soc/serial@54006a00"; serial3 = "/soc/serial@54006b00"; i2c0 = "/soc/i2c@58780000"; i2c1 = "/soc/i2c@58781000"; i2c2 = "/soc/i2c@58782000"; i2c3 = "/soc/i2c@58783000"; i2c4 = "/soc/i2c@58784000"; i2c5 = "/soc/i2c@58785000"; i2c6 = "/soc/i2c@58786000"; }; };

Hi Masahiro,
On 17 February 2016 at 20:36, Masahiro Yamada yamada.masahiro@socionext.com wrote:
Hi Simon,
I am working on U-Boot support on my new ARMv8 SoC. I was hit by a problem with fdtgrep.
(Note: CONFIG_SPL_OF_CONTROL is on UniPhier SoC family)
OK thanks for the report. I will take a look at the end of this week.
- Simon
[snip]
participants (2)
-
Masahiro Yamada
-
Simon Glass