[U-Boot] [PATCH 01/10] ARM Add New Board GEC2410
New Board GEC2410 Setup.
Signed-off-by: Hui.Tang zetalabs@gmail.com --- board/gec/gec2410/Makefile | 54 +++++ board/gec/gec2410/README | 85 ++++++++ board/gec/gec2410/config.mk | 32 +++ board/gec/gec2410/flash.c | 417 +++++++++++++++++++++++++++++++++++++ board/gec/gec2410/gec2410.c | 150 +++++++++++++ board/gec/gec2410/lowlevel_init.S | 171 +++++++++++++++ board/gec/gec2410/u-boot-nand.lds | 61 ++++++ 7 files changed, 970 insertions(+), 0 deletions(-) create mode 100644 board/gec/gec2410/Makefile create mode 100644 board/gec/gec2410/README create mode 100644 board/gec/gec2410/config.mk create mode 100644 board/gec/gec2410/flash.c create mode 100644 board/gec/gec2410/gec2410.c create mode 100644 board/gec/gec2410/lowlevel_init.S create mode 100644 board/gec/gec2410/u-boot-nand.lds
diff --git a/board/gec/gec2410/Makefile b/board/gec/gec2410/Makefile new file mode 100644 index 0000000..b0a216f --- /dev/null +++ b/board/gec/gec2410/Makefile @@ -0,0 +1,54 @@ +# +# (C) Copyright 2000-2006 +# Wolfgang Denk, DENX Software Engineering, wd@denx.de. +# +# (C) Copyright 2009 +# Hui Tang zetalabs@gmail.com +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +include $(TOPDIR)/config.mk + +LIB = $(obj)lib$(BOARD).a + +COBJS := gec2410.o flash.o +SOBJS := lowlevel_init.o + +SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS)) +SOBJS := $(addprefix $(obj),$(SOBJS)) + +$(LIB): $(obj).depend $(OBJS) $(SOBJS) + $(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS) + +clean: + rm -f $(SOBJS) $(OBJS) + +distclean: clean + rm -f $(LIB) core *.bak $(obj).depend + +######################################################################### + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +######################################################################### diff --git a/board/gec/gec2410/README b/board/gec/gec2410/README new file mode 100644 index 0000000..952aae8 --- /dev/null +++ b/board/gec/gec2410/README @@ -0,0 +1,85 @@ +U-Boot for GEC2410 + +------------------------------------------------ +The supported features of the GEC2410 board are: + CPU (Samsung S3C2410 SoC) + SDRAM (64 MB , 2 pcs K4S561632, 32 bit) + NAND FLASH (64MB , 1 pcs K9F1208) + NOR FLASH (only on rev1.1 board, 2MB , 1 pcs SST39VF1601) + ETHERNET (10M , 1 pcs CS8900) + + +------------------------------------------------ +Memory Map from CPU point of view: + +for NAND FLASH boot: + Start Size Access to + ----------------------------------------------------- + 0x00000000 64MB NAND FLASH (first 4K SRAM for stepptingstone) + 0x19000300 CS8900 I/O base + 0x30000000 64MB SDRAM + 0x48000000 128MB Special Function Registers Area + + +for NOR FLASH boot: + Start Size Access to + ----------------------------------------------------- + 0x00000000 2MB NOR FLASH + 0x19000300 CS8900 I/O base + 0x30000000 64MB SDRAM + 0x40000000 4KB BootSRAM + 0x48000000 128MB Special Function Registers Area + + +------------------------------------------------ +Setting the board Jumpers & Switches: + + In order to get the board running with the default configuration the + jumpers need to be set as follows: + + Core board Jumpers: + JP1 close (Set boot mode, close for booting from NAND FLASH, + otherwise from NOR FLASH) + + Main board Jumpers: + J1 close (Set beep, close for enabling beep, or disabling beep) + J18 1-2 (1-2 set RXD2 as UART; 2-3 set RXD2 as IrDA) + J9,J10 2-3 (1-2 set USB HOST 1 to Host mode; + 2-3 set USB HOST 1 to Device mode) + J13 1-2 (1-2 set LCD working power to 5V; + 2-3 set LCD working power to 3.3V) + + Core board Switches: + S1 open (Reset button) + + Main board Switches: + K1~K16 open (4x4 keyboard) + + +------------------------------------------------ +LED & Connector Interfaces: + + Core board LEDs: + D1,D2 I/O port + D3 PWREN pin LED + D4 Core board power + + Main board LEDs: + D1~D4 GPIO + D5,D6 Ethernet + D11 Main board power + + Core board Connector Interfaces: + J1 JTAG (20 pins) + + Main board Connector Interfaces: + RJ1 Ethernet (RJ45) + J2 Audio In + J3 Audio Out + J4 Serial Port 1 + J5 Serial Port 2 + U4 IrDA Port + J7 USB HOST 0 + J9 USB HOST 1 / USB DEVICE + J11 USB DEVICE + J20 GPIO Pins diff --git a/board/gec/gec2410/config.mk b/board/gec/gec2410/config.mk new file mode 100644 index 0000000..9c8e291 --- /dev/null +++ b/board/gec/gec2410/config.mk @@ -0,0 +1,32 @@ +# +# (C) Copyright 2002 +# Gary Jennejohn, DENX Software Engineering, garyj@denx.de +# David Mueller, ELSOFT AG, d.mueller@elsoft.ch +# +# GuangDong Embedded Software Center GEC2410 board with S3C2410X (ARM920T) cpu +# +# see http://www.gd-emb.com/sales_detail/menu-2410.html for more information on GEC2410 +# + +# +# GEC2410 has 1 bank of 64 MB DRAM +# +# 3000'0000 to 3400'0000 +# +# Linux-Kernel is expected to be at 3000'8000, entry 3000'8000 +# optionally with a ramdisk at 3080'0000 +# +# we load ourself to 33e0'0000 +# +# download area is 3300'c000 +# + +sinclude $(OBJTREE)/board/$(BOARDDIR)/config.tmp + +ifndef CONFIG_NAND_SPL +TEXT_BASE = $(RAM_TEXT) +else +TEXT_BASE = 0 +endif + +LDSCRIPT := $(SRCTREE)/board/$(BOARDDIR)/u-boot-nand.lds diff --git a/board/gec/gec2410/flash.c b/board/gec/gec2410/flash.c new file mode 100644 index 0000000..ab418b1 --- /dev/null +++ b/board/gec/gec2410/flash.c @@ -0,0 +1,417 @@ +/* + * (C) Copyright 2002 + * Sysgo Real-Time Solutions, GmbH <www.elinos.com> + * Alex Zuepke azu@sysgo.de + * + * (C) Copyright 2009 + * Hui Tang zetalabs@gmail.com + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> + +#define FLASH_BANK_SIZE PHYS_FLASH_SIZE +#define MAIN_SECT_SIZE 0x10000 /* 64 KB */ + +flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS]; + +#define CMD_READ_ARRAY 0x000000F0 +#define CMD_UNLOCK1 0x000000AA +#define CMD_UNLOCK2 0x00000055 +#define CMD_ERASE_SETUP 0x00000080 +#define CMD_ERASE_CONFIRM 0x00000030 +#define CMD_PROGRAM 0x000000A0 +#define CMD_UNLOCK_BYPASS 0x00000020 + +#define MEM_FLASH_ADDR1 (*(volatile u16 *)(CONFIG_SYS_FLASH_BASE + (0x00000555 << 1))) +#define MEM_FLASH_ADDR2 (*(volatile u16 *)(CONFIG_SYS_FLASH_BASE + (0x000002AA << 1))) + +#define BIT_ERASE_DONE 0x00000080 +#define BIT_RDY_MASK 0x00000080 +#define BIT_PROGRAM_ERROR 0x00000020 +#define BIT_TIMEOUT 0x80000000 /* our flag */ + +#define READY 1 +#define ERR 2 +#define TMO 4 + +/*----------------------------------------------------------------------- + */ + +ulong flash_init(void) +{ + int i, j; + ulong size = 0; + + for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; i++) { + ulong flashbase = 0; + + flash_info[i].flash_id = + (SST_MANUFACT & FLASH_VENDMASK) | + (SST_ID_xF1601 & FLASH_TYPEMASK); + flash_info[i].size = FLASH_BANK_SIZE; + flash_info[i].sector_count = CONFIG_SYS_MAX_FLASH_SECT; + memset(flash_info[i].protect, 0, CONFIG_SYS_MAX_FLASH_SECT); + if (i == 0) + flashbase = PHYS_FLASH_1; + else + panic("configured too many flash banks!\n"); + for (j = 0; j < flash_info[i].sector_count; j++) { + if (j <= 3) { + /* 1st one is 16 KB */ + if (j == 0) { + flash_info[i].start[j] = + flashbase + 0; + } + + /* 2nd and 3rd are both 8 KB */ + if ((j == 1) || (j == 2)) { + flash_info[i].start[j] = + flashbase + 0x4000 + (j - + 1) * + 0x2000; + } + + /* 4th 32 KB */ + if (j == 3) { + flash_info[i].start[j] = + flashbase + 0x8000; + } + } else { + flash_info[i].start[j] = + flashbase + (j - 3) * MAIN_SECT_SIZE; + } + } + size += flash_info[i].size; + } + + flash_protect(FLAG_PROTECT_SET, + CONFIG_SYS_FLASH_BASE, + CONFIG_SYS_FLASH_BASE + monitor_flash_len - 1, + &flash_info[0]); + + flash_protect(FLAG_PROTECT_SET, + CONFIG_ENV_ADDR, + CONFIG_ENV_ADDR + CONFIG_ENV_SIZE - 1, &flash_info[0]); + + return size; +} + +/*----------------------------------------------------------------------- + */ +void flash_print_info(flash_info_t *info) +{ + int i; + + switch (info->flash_id & FLASH_VENDMASK) { + case (SST_MANUFACT & FLASH_VENDMASK): + printf("SST: "); + break; + default: + printf("Unknown Vendor "); + break; + } + + switch (info->flash_id & FLASH_TYPEMASK) { + case (SST_ID_xF1601 & FLASH_TYPEMASK): + printf("1x SST39xF1601 (16Mbit)\n"); + break; + default: + printf("Unknown Chip Type\n"); + goto Done; + break; + } + + printf(" Size: %ld MB in %d Sectors\n", + info->size >> 20, info->sector_count); + + printf(" Sector Start Addresses:"); + for (i = 0; i < info->sector_count; i++) { + if ((i % 5) == 0) + printf("\n "); + printf(" %08lX%s", info->start[i], + info->protect[i] ? " (RO)" : " "); + } + printf("\n"); + +Done:; +} + +/*----------------------------------------------------------------------- + */ + +int flash_erase(flash_info_t *info, int s_first, int s_last) +{ + ushort result; + int iflag, cflag, prot, sect; + int rc = ERR_OK; + int chip; + + /* first look for protection bits */ + + if (info->flash_id == FLASH_UNKNOWN) + return ERR_UNKNOWN_FLASH_TYPE; + + if ((s_first < 0) || (s_first > s_last)) + return ERR_INVAL; + + if ((info->flash_id & FLASH_VENDMASK) != + (SST_MANUFACT & FLASH_VENDMASK)) + return ERR_UNKNOWN_FLASH_VENDOR; + + prot = 0; + for (sect = s_first; sect <= s_last; ++sect) { + if (info->protect[sect]) + prot++; + } + if (prot) + return ERR_PROTECTED; + + /* + * Disable interrupts which might cause a timeout + * here. Remember that our exception vectors are + * at address 0 in the flash, and we don't want a + * (ticker) exception to happen while the flash + * chip is in programming mode. + */ + cflag = icache_status(); + icache_disable(); + iflag = disable_interrupts(); + + /* Start erase on unprotected sectors */ + for (sect = s_first; sect <= s_last && !ctrlc(); sect++) { + printf("Erasing sector %2d ... ", sect); + + /* arm simple, non interrupt dependent timer */ + reset_timer_masked(); + + if (info->protect[sect] == 0) { /* not protected */ + vu_short *addr = (vu_short *) (info->start[sect]); + + MEM_FLASH_ADDR1 = CMD_UNLOCK1; + MEM_FLASH_ADDR2 = CMD_UNLOCK2; + MEM_FLASH_ADDR1 = CMD_ERASE_SETUP; + + MEM_FLASH_ADDR1 = CMD_UNLOCK1; + MEM_FLASH_ADDR2 = CMD_UNLOCK2; + *addr = CMD_ERASE_CONFIRM; + + /* wait until flash is ready */ + chip = 0; + + do { + result = *addr; + + /* check timeout */ + if (get_timer_masked() > + CONFIG_SYS_FLASH_ERASE_TOUT) { + MEM_FLASH_ADDR1 = CMD_READ_ARRAY; + chip = TMO; + break; + } + + if (!chip + && (result & 0xFFFF) & BIT_ERASE_DONE) + chip = READY; + + if (!chip + && (result & 0xFFFF) & BIT_PROGRAM_ERROR) + chip = ERR; + + } while (!chip); + + MEM_FLASH_ADDR1 = CMD_READ_ARRAY; + + if (chip == ERR) { + rc = ERR_PROG_ERROR; + goto outahere; + } + if (chip == TMO) { + rc = ERR_TIMOUT; + goto outahere; + } + + printf("ok.\n"); + } else { /* it was protected */ + + printf("protected!\n"); + } + } + + if (ctrlc()) + printf("User Interrupt!\n"); + +outahere: + /* allow flash to settle - wait 10 ms */ + udelay_masked(10000); + + if (iflag) + enable_interrupts(); + + if (cflag) + icache_enable(); + + return rc; +} + +/*----------------------------------------------------------------------- + * Copy memory to flash + */ + +static int write_hword(flash_info_t *info, ulong dest, ushort data) +{ + vu_short *addr = (vu_short *) dest; + ushort result; + int rc = ERR_OK; + int cflag, iflag; + int chip; + + /* + * Check if Flash is (sufficiently) erased + */ + result = *addr; + if ((result & data) != data) + return ERR_NOT_ERASED; + + + /* + * Disable interrupts which might cause a timeout + * here. Remember that our exception vectors are + * at address 0 in the flash, and we don't want a + * (ticker) exception to happen while the flash + * chip is in programming mode. + */ + cflag = icache_status(); + icache_disable(); + iflag = disable_interrupts(); + + MEM_FLASH_ADDR1 = CMD_UNLOCK1; + MEM_FLASH_ADDR2 = CMD_UNLOCK2; + MEM_FLASH_ADDR1 = CMD_UNLOCK_BYPASS; + *addr = CMD_PROGRAM; + *addr = data; + + /* arm simple, non interrupt dependent timer */ + reset_timer_masked(); + + /* wait until flash is ready */ + chip = 0; + do { + result = *addr; + + /* check timeout */ + if (get_timer_masked() > CONFIG_SYS_FLASH_ERASE_TOUT) { + chip = ERR | TMO; + break; + } + if (!chip && ((result & 0x80) == (data & 0x80))) + chip = READY; + + if (!chip && ((result & 0xFFFF) & BIT_PROGRAM_ERROR)) { + result = *addr; + + if ((result & 0x80) == (data & 0x80)) + chip = READY; + else + chip = ERR; + } + + } while (!chip); + + *addr = CMD_READ_ARRAY; + + if (chip == ERR || *addr != data) + rc = ERR_PROG_ERROR; + + if (iflag) + enable_interrupts(); + + if (cflag) + icache_enable(); + + return rc; +} + +/*----------------------------------------------------------------------- + * Copy memory to flash. + */ + +int write_buff(flash_info_t *info, uchar *src, ulong addr, ulong cnt) +{ + ulong cp, wp; + int l; + int i, rc; + ushort data; + + wp = (addr & ~1); /* get lower word aligned address */ + + /* + * handle unaligned start bytes + */ + l = addr - wp; + if (l != 0) { + data = 0; + for (i = 0, cp = wp; i < l; ++i, ++cp) + data = (data >> 8) | (*(uchar *) cp << 8); + + for (; i < 2 && cnt > 0; ++i) { + data = (data >> 8) | (*src++ << 8); + --cnt; + ++cp; + } + + for (; cnt == 0 && i < 2; ++i, ++cp) + data = (data >> 8) | (*(uchar *) cp << 8); + + rc = write_hword(info, wp, data); + if (rc != 0) + return rc; + wp += 2; + } + + /* + * handle word aligned part + */ + while (cnt >= 2) { + data = *((vu_short *) src); + rc = write_hword(info, wp, data); + if (rc != 0) + return rc; + src += 2; + wp += 2; + cnt -= 2; + } + + if (cnt == 0) + return ERR_OK; + + /* + * handle unaligned tail bytes + */ + data = 0; + for (i = 0, cp = wp; i < 2 && cnt > 0; ++i, ++cp) { + data = (data >> 8) | (*src++ << 8); + --cnt; + } + for (; i < 2; ++i, ++cp) + data = (data >> 8) | (*(uchar *) cp << 8); + + return write_hword(info, wp, data); +} diff --git a/board/gec/gec2410/gec2410.c b/board/gec/gec2410/gec2410.c new file mode 100644 index 0000000..543ceeb --- /dev/null +++ b/board/gec/gec2410/gec2410.c @@ -0,0 +1,150 @@ +/* + * (C) Copyright 2002 + * Sysgo Real-Time Solutions, GmbH <www.elinos.com> + * Marius Groeger mgroeger@sysgo.de + * + * (C) Copyright 2002 + * David Mueller, ELSOFT AG, d.mueller@elsoft.ch + * + * (C) Copyright 2009 + * Hui Tang, zetalabs@gmail.com + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <netdev.h> +#include <s3c2410.h> + +DECLARE_GLOBAL_DATA_PTR; + +#define FCLK_SPEED 1 + +#if FCLK_SPEED == 0 /* Fout = 203MHz, Fin = 12MHz for Audio */ +#define M_MDIV 0xC3 +#define M_PDIV 0x4 +#define M_SDIV 0x1 +#elif FCLK_SPEED == 1 /* Fout = 202.8MHz */ +#define M_MDIV 0xA1 +#define M_PDIV 0x3 +#define M_SDIV 0x1 +#endif + +#define USB_CLOCK 1 + +#if USB_CLOCK == 0 +#define U_M_MDIV 0xA1 +#define U_M_PDIV 0x3 +#define U_M_SDIV 0x1 +#elif USB_CLOCK == 1 +#define U_M_MDIV 0x48 +#define U_M_PDIV 0x3 +#define U_M_SDIV 0x2 +#endif + +static inline void delay(unsigned long loops) +{ + __asm__ volatile ("1:\n" + "subs %0, %1, #1\n" + "bne 1b" : "=r" (loops) : "0" (loops)); +} + +/* + * Miscellaneous platform dependent initialisations + */ + +int board_init(void) +{ + struct s3c24x0_clock_power * const clk_power = + s3c24x0_get_base_clock_power(); + struct s3c24x0_gpio * const gpio = s3c24x0_get_base_gpio(); + + /* to reduce PLL lock time, adjust the LOCKTIME register */ + clk_power->LOCKTIME = 0xFFFFFF; + + /* configure MPLL */ + clk_power->MPLLCON = ((M_MDIV << 12) + (M_PDIV << 4) + M_SDIV); + + /* some delay between MPLL and UPLL */ + delay(4000); + + /* configure UPLL */ + clk_power->UPLLCON = ((U_M_MDIV << 12) + (U_M_PDIV << 4) + U_M_SDIV); + + /* some delay between MPLL and UPLL */ + delay(8000); + + /* set up the I/O ports */ + gpio->GPACON = 0x007FFFFF; + gpio->GPBCON = 0x00044555; + gpio->GPBUP = 0x000007FF; + gpio->GPCCON = 0xAAAAAAAA; + gpio->GPCUP = 0x0000FFFF; + gpio->GPDCON = 0xAAAAAAAA; + gpio->GPDUP = 0x0000FFFF; + gpio->GPECON = 0xAAAAAAAA; + gpio->GPEUP = 0x0000FFFF; + gpio->GPFCON = 0x000055AA; + gpio->GPFUP = 0x000000FF; + gpio->GPGCON = 0xFF95FFBA; + gpio->GPGUP = 0x0000FFFF; + gpio->GPHCON = 0x002AFAAA; + gpio->GPHUP = 0x000007FF; + + /* arch number of GEC2410-Board */ + gd->bd->bi_arch_number = MACH_TYPE_GEC2410; + + /* adress of boot parameters */ + gd->bd->bi_boot_params = 0x30000100; + + icache_enable(); + dcache_enable(); + + return 0; +} + +int dram_init(void) +{ + gd->bd->bi_dram[0].start = PHYS_SDRAM_1; + gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE; + + return 0; +} + +ulong board_flash_get_legacy(ulong base, int banknum, flash_info_t *info) +{ + if (banknum == 0) { /* non-CFI boot flash */ + info->portwidth = FLASH_CFI_16BIT; + info->chipwidth = FLASH_CFI_BY16; + info->interface = FLASH_CFI_X16; + return 1; + } else + return 0; +} + +#ifdef CONFIG_CMD_NET +int board_eth_init(bd_t *bis) +{ + int rc = 0; +#ifdef CONFIG_CS8900 + rc = cs8900_initialize(0, CONFIG_CS8900_BASE); +#endif + return rc; +} +#endif diff --git a/board/gec/gec2410/lowlevel_init.S b/board/gec/gec2410/lowlevel_init.S new file mode 100644 index 0000000..4664ac4 --- /dev/null +++ b/board/gec/gec2410/lowlevel_init.S @@ -0,0 +1,171 @@ +/* + * Memory Setup stuff - taken from blob memsetup.S + * + * Copyright (C) 1999 2000 2001 Erik Mouw (J.A.K.Mouw@its.tudelft.nl) and + * Jan-Derk Bakker (J.D.Bakker@its.tudelft.nl) + * + * Modified for the Samsung SMDK2410 by + * (C) Copyright 2002 + * David Mueller, ELSOFT AG, d.mueller@elsoft.ch + * + * Copyright (C) 2009 Hui Tang zetalabs@gmail.com + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + + +#include <config.h> +#include <version.h> + + +/* some parameters for the board */ + +/* + * + * Taken from linux/arch/arm/boot/compressed/head-s3c2410.S + * + * Copyright (C) 2002 Samsung Electronics SW.LEE hitchcar@sec.samsung.com + * + */ + +#define BWSCON 0x48000000 + +/* BWSCON */ +#define DW8 (0x0) +#define DW16 (0x1) +#define DW32 (0x2) +#define WAIT (0x1<<2) +#define UBLB (0x1<<3) + +#define B1_BWSCON (DW32) +#define B2_BWSCON (DW16) +#define B3_BWSCON (DW16 + WAIT + UBLB) +#define B4_BWSCON (DW16) +#define B5_BWSCON (DW16) +#define B6_BWSCON (DW32) +#define B7_BWSCON (DW32) + +/* BANK0CON */ +#define B0_Tacs 0x0 /* 0clk */ +#define B0_Tcos 0x0 /* 0clk */ +#define B0_Tacc 0x7 /* 14clk */ +#define B0_Tcoh 0x0 /* 0clk */ +#define B0_Tah 0x0 /* 0clk */ +#define B0_Tacp 0x0 +#define B0_PMC 0x0 /* normal */ + +/* BANK1CON */ +#define B1_Tacs 0x0 /* 0clk */ +#define B1_Tcos 0x0 /* 0clk */ +#define B1_Tacc 0x7 /* 14clk */ +#define B1_Tcoh 0x0 /* 0clk */ +#define B1_Tah 0x0 /* 0clk */ +#define B1_Tacp 0x0 +#define B1_PMC 0x0 + +#define B2_Tacs 0x0 +#define B2_Tcos 0x0 +#define B2_Tacc 0x7 +#define B2_Tcoh 0x0 +#define B2_Tah 0x0 +#define B2_Tacp 0x0 +#define B2_PMC 0x0 + +#define B3_Tacs 0x0 /* 0clk */ +#define B3_Tcos 0x3 /* 4clk */ +#define B3_Tacc 0x7 /* 14clk */ +#define B3_Tcoh 0x1 /* 1clk */ +#define B3_Tah 0x0 /* 0clk */ +#define B3_Tacp 0x3 /* 6clk */ +#define B3_PMC 0x0 /* normal */ + +#define B4_Tacs 0x0 /* 0clk */ +#define B4_Tcos 0x0 /* 0clk */ +#define B4_Tacc 0x7 /* 14clk */ +#define B4_Tcoh 0x0 /* 0clk */ +#define B4_Tah 0x0 /* 0clk */ +#define B4_Tacp 0x0 +#define B4_PMC 0x0 /* normal */ + +#define B5_Tacs 0x0 /* 0clk */ +#define B5_Tcos 0x0 /* 0clk */ +#define B5_Tacc 0x7 /* 14clk */ +#define B5_Tcoh 0x0 /* 0clk */ +#define B5_Tah 0x0 /* 0clk */ +#define B5_Tacp 0x0 +#define B5_PMC 0x0 /* normal */ + +#define B6_MT 0x3 /* SDRAM */ +#define B6_Trcd 0x1 +#define B6_SCAN 0x1 /* 9bit */ + +#define B7_MT 0x3 /* SDRAM */ +#define B7_Trcd 0x1 /* 3clk */ +#define B7_SCAN 0x1 /* 9bit */ + +/* REFRESH parameter */ +#define REFEN 0x1 /* Refresh enable */ +#define TREFMD 0x0 /* CBR(CAS before RAS)/Auto refresh */ +#define Trp 0x0 /* 2clk */ +#define Trc 0x3 /* 7clk */ +#define Tchr 0x2 /* 3clk */ +#define REFCNT 1113 /* period=15.6us, HCLK=60Mhz, (2048+1-15.6*60) */ +/**************************************/ + +_TEXT_BASE: + .word TEXT_BASE + +.globl lowlevel_init +lowlevel_init: +#if defined(CONFIG_NAND_SPL) || !defined(CONFIG_BOOT_NAND) + /* memory control configuration */ + /* make r0 relative the current location so that it */ + /* reads SMRDATA out of FLASH rather than memory ! */ + ldr r0, =SMRDATA + ldr r1, _TEXT_BASE + sub r0, r0, r1 + ldr r1, =BWSCON /* Bus Width Status Controller */ + add r2, r0, #13*4 +0: + ldr r3, [r0], #4 + str r3, [r1], #4 + cmp r2, r0 + bne 0b +#endif /* CONFIG_NAND_SPL */ + + /* everything is fine now */ + mov pc, lr + + .ltorg +/* the literal pools origin */ + +SMRDATA: + .word (0+(B1_BWSCON<<4)+(B2_BWSCON<<8)+(B3_BWSCON<<12)+(B4_BWSCON<<16)+(B5_BWSCON<<20)+(B6_BWSCON<<24)+(B7_BWSCON<<28)) + .word ((B0_Tacs<<13)+(B0_Tcos<<11)+(B0_Tacc<<8)+(B0_Tcoh<<6)+(B0_Tah<<4)+(B0_Tacp<<2)+(B0_PMC)) + .word ((B1_Tacs<<13)+(B1_Tcos<<11)+(B1_Tacc<<8)+(B1_Tcoh<<6)+(B1_Tah<<4)+(B1_Tacp<<2)+(B1_PMC)) + .word ((B2_Tacs<<13)+(B2_Tcos<<11)+(B2_Tacc<<8)+(B2_Tcoh<<6)+(B2_Tah<<4)+(B2_Tacp<<2)+(B2_PMC)) + .word ((B3_Tacs<<13)+(B3_Tcos<<11)+(B3_Tacc<<8)+(B3_Tcoh<<6)+(B3_Tah<<4)+(B3_Tacp<<2)+(B3_PMC)) + .word ((B4_Tacs<<13)+(B4_Tcos<<11)+(B4_Tacc<<8)+(B4_Tcoh<<6)+(B4_Tah<<4)+(B4_Tacp<<2)+(B4_PMC)) + .word ((B5_Tacs<<13)+(B5_Tcos<<11)+(B5_Tacc<<8)+(B5_Tcoh<<6)+(B5_Tah<<4)+(B5_Tacp<<2)+(B5_PMC)) + .word ((B6_MT<<15)+(B6_Trcd<<2)+(B6_SCAN)) + .word ((B7_MT<<15)+(B7_Trcd<<2)+(B7_SCAN)) + .word ((REFEN<<23)+(TREFMD<<22)+(Trp<<20)+(Trc<<18)+(Tchr<<16)+REFCNT) + .word 0x32 + .word 0x30 + .word 0x30 diff --git a/board/gec/gec2410/u-boot-nand.lds b/board/gec/gec2410/u-boot-nand.lds new file mode 100644 index 0000000..a30ece3 --- /dev/null +++ b/board/gec/gec2410/u-boot-nand.lds @@ -0,0 +1,61 @@ +/* + * (C) Copyright 2002 + * Gary Jennejohn, DENX Software Engineering, garyj@denx.de + * + * (C) Copyright 2008 + * Guennadi Liakhovetki, DENX Software Engineering, lg@denx.de + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm") +OUTPUT_ARCH(arm) +ENTRY(_start) +SECTIONS +{ + . = 0x00000000; + + . = ALIGN(4); + .text : + { + cpu/arm920t/start.o (.text) + *(.text) + } + + . = ALIGN(4); + .rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) } + + . = ALIGN(4); + .data : { *(.data) } + + . = ALIGN(4); + .got : { *(.got) } + + __u_boot_cmd_start = .; + .u_boot_cmd : { *(.u_boot_cmd) } + __u_boot_cmd_end = .; + + . = ALIGN(4); + .mmudata : { *(.mmudata) } + + . = ALIGN(4); + __bss_start = .; + .bss : { *(.bss) . = ALIGN(4); } + _end = .; +}
GEC2410 boot from NAND FLASH.
Signed-off-by: Hui.Tang zetalabs@gmail.com --- nand_spl/board/gec/gec2410/Makefile | 102 +++++++++++++++++++++++++++++++++ nand_spl/board/gec/gec2410/config.mk | 40 +++++++++++++ nand_spl/board/gec/gec2410/u-boot.lds | 60 +++++++++++++++++++ 3 files changed, 202 insertions(+), 0 deletions(-) create mode 100644 nand_spl/board/gec/gec2410/Makefile create mode 100644 nand_spl/board/gec/gec2410/config.mk create mode 100644 nand_spl/board/gec/gec2410/u-boot.lds
diff --git a/nand_spl/board/gec/gec2410/Makefile b/nand_spl/board/gec/gec2410/Makefile new file mode 100644 index 0000000..1d4cb18 --- /dev/null +++ b/nand_spl/board/gec/gec2410/Makefile @@ -0,0 +1,102 @@ +# +# (C) Copyright 2006-2007 +# Stefan Roese, DENX Software Engineering, sr@denx.de. +# +# (C) Copyright 2008 +# Guennadi Liakhovetki, DENX Software Engineering, lg@denx.de +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +CONFIG_NAND_SPL = y + +include $(TOPDIR)/config.mk +include $(TOPDIR)/nand_spl/board/$(BOARDDIR)/config.mk + +LDSCRIPT= $(TOPDIR)/nand_spl/board/$(BOARDDIR)/u-boot.lds +LDFLAGS = -Bstatic -T $(nandobj)u-boot.lds -Ttext $(TEXT_BASE) $(PLATFORM_LDFLAGS) +AFLAGS += -DCONFIG_NAND_SPL +CFLAGS += -DCONFIG_NAND_SPL + +SOBJS = start.o lowlevel_init.o +COBJS = nand_boot.o s3c2410_nand.o + +SRCS := $(addprefix $(obj),$(SOBJS:.o=.S) $(COBJS:.o=.c)) +OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS)) +__OBJS := $(SOBJS) $(COBJS) +LNDIR := $(OBJTREE)/nand_spl/board/$(BOARDDIR) + +nandobj := $(OBJTREE)/nand_spl/ + +ALL = $(nandobj)u-boot-spl $(nandobj)u-boot-spl.bin $(nandobj)u-boot-spl-16k.bin + +all: $(obj).depend $(ALL) + +$(nandobj)u-boot-spl-16k.bin: $(nandobj)u-boot-spl + $(OBJCOPY) ${OBJCFLAGS} --pad-to=$(PAD_TO) -O binary $< $@ + +$(nandobj)u-boot-spl.bin: $(nandobj)u-boot-spl + $(OBJCOPY) ${OBJCFLAGS} -O binary $< $@ + +$(nandobj)u-boot-spl: $(OBJS) $(nandobj)u-boot.lds + cd $(LNDIR) && $(LD) $(LDFLAGS) $(__OBJS) \ + -Map $(nandobj)u-boot-spl.map \ + -o $(nandobj)u-boot-spl + +$(nandobj)u-boot.lds: $(LDSCRIPT) + $(CPP) $(CPPFLAGS) $(LDPPFLAGS) -ansi -D__ASSEMBLY__ -P - <$^ >$@ + +# create symbolic links for common files + +# from cpu directory +$(obj)start.S: + @rm -f $@ + @ln -s $(TOPDIR)/cpu/arm920t/start.S $@ + +# from SoC directory + +# from board directory +$(obj)lowlevel_init.S: + @rm -f $@ + @ln -s $(TOPDIR)/board/gec/gec2410/lowlevel_init.S $@ + +# from nand_spl directory +$(obj)nand_boot.c: + @rm -f $@ + @ln -s $(TOPDIR)/nand_spl/nand_boot.c $@ + +# from drivers/mtd/nand directory +$(obj)s3c2410_nand.c: + @rm -f $@ + @ln -s $(TOPDIR)/drivers/mtd/nand/s3c2410_nand.c $@ + +######################################################################### + +$(obj)%.o: $(obj)%.S + $(CC) $(AFLAGS) -c -o $@ $< + +$(obj)%.o: $(obj)%.c + $(CC) $(CFLAGS) -c -o $@ $< + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +######################################################################### diff --git a/nand_spl/board/gec/gec2410/config.mk b/nand_spl/board/gec/gec2410/config.mk new file mode 100644 index 0000000..7db7fd1 --- /dev/null +++ b/nand_spl/board/gec/gec2410/config.mk @@ -0,0 +1,40 @@ +# +# (C) Copyright 2006 +# Stefan Roese, DENX Software Engineering, sr@denx.de. +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# +# +# GEC2410 Study Platform (gec2410) board + +# TEXT_BASE for SPL: +# +# On S3C2410 platforms the SPL is located in SRAM at 0. +# +TEXT_BASE = 0 + +include $(TOPDIR)/board/$(BOARDDIR)/config.mk + +# PAD_TO used to generate a 4kByte binary needed for the combined image +# -> PAD_TO = TEXT_BASE + 4096 +PAD_TO := 0x00001000 + +ifeq ($(debug),1) +PLATFORM_CPPFLAGS += -DDEBUG +endif diff --git a/nand_spl/board/gec/gec2410/u-boot.lds b/nand_spl/board/gec/gec2410/u-boot.lds new file mode 100644 index 0000000..5871f7e --- /dev/null +++ b/nand_spl/board/gec/gec2410/u-boot.lds @@ -0,0 +1,60 @@ +/* + * (C) Copyright 2002 + * Gary Jennejohn, DENX Software Engineering, garyj@denx.de + * + * (C) Copyright 2008 + * Guennadi Liakhovetki, DENX Software Engineering, lg@denx.de + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm") +OUTPUT_ARCH(arm) +ENTRY(_start) +SECTIONS +{ + . = 0x00000000; + + . = ALIGN(4); + .text : + { + start.o (.text) + nand_boot.o (.text) + + *(.text) + } + + . = ALIGN(4); + .rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) } + + . = ALIGN(4); + .data : { *(.data) } + + . = ALIGN(4); + .got : { *(.got) } + + __u_boot_cmd_start = .; + .u_boot_cmd : { *(.u_boot_cmd) } + __u_boot_cmd_end = .; + + . = ALIGN(4); + __bss_start = .; + .bss : { *(.bss) . = ALIGN(4); } + _end = .; +}
Add GEC2410 default config.
Signed-off-by: Hui.Tang zetalabs@gmail.com --- include/configs/gec2410.h | 275 +++++++++++++++++++++++++++++++++++++++++++++ 1 files changed, 275 insertions(+), 0 deletions(-) create mode 100644 include/configs/gec2410.h
diff --git a/include/configs/gec2410.h b/include/configs/gec2410.h new file mode 100644 index 0000000..98c8040 --- /dev/null +++ b/include/configs/gec2410.h @@ -0,0 +1,275 @@ +/* + * (C) Copyright 2002 + * Sysgo Real-Time Solutions, GmbH <www.elinos.com> + * Marius Groeger mgroeger@sysgo.de + * Gary Jennejohn garyj@denx.de + * David Mueller d.mueller@elsoft.ch + * + * Configuation settings for the GD-Embedded Software Center GEC2410 board. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef __CONFIG_H +#define __CONFIG_H + +/* + * High Level Configuration Options + * (easy to change) + */ +#define CONFIG_ARM920T 1 /* This is an ARM920T Core */ +#define CONFIG_S3C2410 1 /* in a SAMSUNG S3C2410 SoC */ +#define CONFIG_GEC2410 1 /* on a GD-Embedded Software Center GEC2410 Board */ + +#define CONFIG_SYS_SDRAM_BASE 0x30000000 + +/* input clock of PLL */ +#define CONFIG_SYS_CLK_FREQ 12000000/* the GEC2410 has 12MHz input clock */ + +#if !defined(CONFIG_NAND_SPL) && (TEXT_BASE >= 0xc0000000) +#define CONFIG_ENABLE_MMU +#endif + +#define CONFIG_MEMORY_UPPER_CODE + +#define CONFIG_SETUP_MEMORY_TAGS +#define CONFIG_CMDLINE_TAG +#define CONFIG_INITRD_TAG + +#define USE_920T_MMU 1 +#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */ + +#undef CONFIG_SKIP_RELOCATE_UBOOT + +/* + * Size of malloc() pool + */ +#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 1024 * 1024) +#define CONFIG_SYS_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */ + +/* + * Hardware drivers + */ +#define CONFIG_NET_MULTI +#define CONFIG_CS8900 /* we have a CS8900 on-board */ +#define CONFIG_CS8900_BASE 0x19000300 +#define CONFIG_CS8900_BUS16 /* the Linux driver does accesses as shorts */ + +/* + * select serial console configuration + */ +#define CONFIG_S3C24X0_SERIAL 1 +#define CONFIG_SERIAL1 1 /* we use SERIAL 1 on GEC2410 */ + +/************************************************************ + * RTC + ************************************************************/ +#define CONFIG_RTC_S3C24X0 1 + +/* allow to overwrite serial and ethaddr */ +#define CONFIG_ENV_OVERWRITE + +#define CONFIG_BAUDRATE 115200 + + +/* + * BOOTP options + */ +#define CONFIG_BOOTP_BOOTFILESIZE +#define CONFIG_BOOTP_BOOTPATH +#define CONFIG_BOOTP_GATEWAY +#define CONFIG_BOOTP_HOSTNAME + + +/* + * Command line configuration. + */ +#include <config_cmd_default.h> + +#define CONFIG_CMD_CACHE +#define CONFIG_CMD_SAVEENV +#define CONFIG_CMD_NAND +#if defined(CONFIG_BOOT_ONENAND) +#define CONFIG_CMD_ONENAND +#endif +#define CONFIG_CMD_PING +#define CONFIG_CMD_ELF +#define CONFIG_CMD_FAT + +#define CONFIG_BOOTDELAY 3 +/*#define CONFIG_BOOTARGS "root=ramfs devfs=mount console=ttySA0,9600" */ +#define CONFIG_ETHADDR 08:00:3e:26:0a:5b +#define CONFIG_NETMASK 255.255.255.0 +#define CONFIG_IPADDR 192.168.1.10 +#define CONFIG_SERVERIP 192.168.1.254 +/*#define CONFIG_BOOTFILE "elinos-lart" */ +/*#define CONFIG_BOOTCOMMAND "tftp; bootm" */ + +#if defined(CONFIG_CMD_KGDB) +#define CONFIG_KGDB_BAUDRATE 115200 /* speed to run kgdb serial port */ +/* what's this ? it's not used anywhere */ +#define CONFIG_KGDB_SER_INDEX 1 /* which serial port to use */ +#endif + +/* + * Miscellaneous configurable options + */ +#define CONFIG_SYS_LONGHELP /* undef to save memory */ +#define CONFIG_SYS_PROMPT "GEC2410#" /* Monitor Command Prompt */ +#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ +#define CONFIG_SYS_PBSIZE 384 /* Print Buffer Size */ +#define CONFIG_SYS_MAXARGS 16 /* max number of command args */ +#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */ + +#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE /* memtest works on */ +#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x3e00000) /* 62 MB in DRAM */ + +#define CONFIG_SYS_LOAD_ADDR CONFIG_SYS_SDRAM_BASE /* default load address */ + +/* the PWM TImer 4 uses a counter of 15625 for 10 ms, so we need */ +/* it to wrap 100 times (total 1562500) to get 1 sec. */ +#define CONFIG_SYS_HZ 1562500 + +/* valid baudrates */ +#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 } + +/*----------------------------------------------------------------------- + * Stack sizes + * + * The stack sizes are set up in start.S using the settings below + */ +#define CONFIG_STACKSIZE 0x40000 /* regular stack 256KB */ +#ifdef CONFIG_USE_IRQ +#define CONFIG_STACKSIZE_IRQ (4*1024) /* IRQ stack */ +#define CONFIG_STACKSIZE_FIQ (4*1024) /* FIQ stack */ +#endif + +/*----------------------------------------------------------------------- + * Physical Memory Map + */ +#define CONFIG_NR_DRAM_BANKS 1 +#define PHYS_SDRAM_1 CONFIG_SYS_SDRAM_BASE /* SDRAM Bank #1 */ +#define PHYS_SDRAM_1_SIZE 0x04000000 /* 64 MB */ + +#define CONFIG_SYS_FLASH_BASE 0x00000000 +#define CONFIG_SYS_MONITOR_BASE 0x00000000 + +#define PHYS_FLASH_1 CONFIG_SYS_FLASH_BASE + +/*----------------------------------------------------------------------- + * FLASH and environment organization + */ +#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */ +#define CONFIG_SYS_MAX_FLASH_SECT 512 /* max number of sectors on one chip */ + +#define CONFIG_SYS_FLASH_CFI 1 /* Use CFI parameters (needed?) */ +/* Use drivers/cfi_flash.c, even though the flash is not CFI-compliant */ +#define CONFIG_FLASH_CFI_DRIVER 1 +#define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT +#define CONFIG_FLASH_CFI_LEGACY + +#define PHYS_FLASH_SIZE 0x00200000 /* 2MB */ +#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0x0F0000) /* addr of environment */ + +/* timeout values are in ticks */ +#define CONFIG_SYS_FLASH_ERASE_TOUT (5 * CONFIG_SYS_HZ) /* Timeout for Flash Erase */ +#define CONFIG_SYS_FLASH_WRITE_TOUT (5 * CONFIG_SYS_HZ) /* Timeout for Flash Write */ + +#define CONFIG_ENV_SIZE 0x4000 /* Total Size of Environment Sector */ + +/* + * GEC2410 board specific data + */ + +#define CONFIG_IDENT_STRING " for GEC2410" + +/* base address for uboot */ +#define CONFIG_SYS_PHY_UBOOT_BASE (CONFIG_SYS_SDRAM_BASE + 0x03e00000) +/* total memory available to uboot */ +#define CONFIG_SYS_UBOOT_SIZE (1024 * 1024) + +/* Put environment copies after the end of U-Boot owned RAM */ +#define CONFIG_NAND_ENV_DST (CONFIG_SYS_UBOOT_BASE + CONFIG_SYS_UBOOT_SIZE) + +#ifdef CONFIG_ENABLE_MMU +#define CONFIG_SYS_MAPPED_RAM_BASE 0xc0000000 +#define CONFIG_BOOTCOMMAND "nand read 0xc0008000 0x60000 0x1a0000;" \ + "bootm 0xc0008000" +#else +#define CONFIG_SYS_MAPPED_RAM_BASE CONFIG_SYS_SDRAM_BASE +#define CONFIG_BOOTCOMMAND "nand read 0x30008000 0x60000 0x1a0000;" \ + "bootm 0x30008000" +#endif + +/* NAND U-Boot load and start address */ +#define CONFIG_SYS_UBOOT_BASE (CONFIG_SYS_MAPPED_RAM_BASE + 0x03e00000) + +#define CONFIG_ENV_OFFSET 0x0040000 /* Offset of Environment Sector */ + +/* NAND configuration */ +#define CONFIG_SYS_MAX_NAND_DEVICE 1 +#define CONFIG_SYS_NAND_BASE 0x4e00000c /* NFDATA 0x4e00000c R/W NAND Flash data register */ +/* #define CONFIG_SYS_S3C_NAND_HWECC */ +#define CONFIG_S3C2410_NAND_HWECC +#define CONFIG_S3C2410_NAND_BBT + +#define CONFIG_SYS_NAND_U_BOOT_DST CONFIG_SYS_PHY_UBOOT_BASE /* NUB load-addr */ +#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_NAND_U_BOOT_DST /* NUB start-addr */ + +#define CONFIG_SYS_NAND_U_BOOT_OFFS (4 * 1024) /* Offset to RAM U-Boot image */ +#define CONFIG_SYS_NAND_U_BOOT_SIZE (252 * 1024) /* Size of RAM U-Boot image */ + +/* NAND chip page size */ +#define CONFIG_SYS_NAND_PAGE_SIZE 512 +/* NAND chip block size */ +#define CONFIG_SYS_NAND_BLOCK_SIZE (16 * 1024) +/* NAND chip page per block count */ +#define CONFIG_SYS_NAND_PAGE_COUNT 32 +/* Location of the bad-block label */ +#define CONFIG_SYS_NAND_BAD_BLOCK_POS 0 +/* Extra address cycle for > 32MiB */ +#define CONFIG_SYS_NAND_4_ADDR_CYCLE 1 /* Fourth addr used (>32MB) */ + + +/* Size of the block protected by one OOB (Spare Area in Samsung terminology) */ +#define CONFIG_SYS_NAND_ECCSIZE CONFIG_SYS_NAND_PAGE_SIZE +/* Number of ECC bytes per OOB - S3C2410 calculates 4 bytes ECC in 1-bit mode */ +#define CONFIG_SYS_NAND_ECCBYTES 3 +/* Number of ECC-blocks per NAND page */ +#define CONFIG_SYS_NAND_ECCSTEPS (CONFIG_SYS_NAND_PAGE_SIZE / CONFIG_SYS_NAND_ECCSIZE) +/* Size of a single OOB region */ +#define CONFIG_SYS_NAND_OOBSIZE 16 +/* Number of ECC bytes per page */ +#define CONFIG_SYS_NAND_ECCTOTAL (CONFIG_SYS_NAND_ECCBYTES * CONFIG_SYS_NAND_ECCSTEPS) +/* ECC byte positions */ +#define CONFIG_SYS_NAND_ECCPOS {0, 1, 2} + +#define CONFIG_SYS_64BIT_VSPRINTF /* needed for nand_util.c */ + +/* Boot configuration (define only one of next 3) */ +#define CONFIG_BOOT_NAND + +#define CONFIG_NAND +#define CONFIG_NAND_S3C2410 1 + +/* Settings as above boot configuration */ +#define CONFIG_ENV_IS_IN_NAND +#define CONFIG_BOOTARGS "console=ttySAC,115200" + +#endif /* __CONFIG_H */
Add gec2410_config option for GEC2410
Signed-off-by: Hui.Tang zetalabs@gmail.com --- Makefile | 7 +++++++ 1 files changed, 7 insertions(+), 0 deletions(-)
diff --git a/Makefile b/Makefile index bcb3fe9..2de0b1d 100644 --- a/Makefile +++ b/Makefile @@ -2951,6 +2951,13 @@ davinci_dm365evm_config : unconfig davinci_dm6467evm_config : unconfig @$(MKCONFIG) $(@:_config=) arm arm926ejs dm6467evm davinci davinci
+gec2410_config : unconfig + @mkdir -p $(obj)include $(obj)board/gec/gec2410 + @mkdir -p $(obj)nand_spl/board/gec/gec2410 + @echo "RAM_TEXT = 0x33e00000" >> $(obj)board/gec/gec2410/config.tmp + @$(MKCONFIG) $(@:_config=) arm arm920t gec2410 gec s3c24x0 + @echo "CONFIG_NAND_U_BOOT = y" >> $(obj)include/config.mk + imx27lite_config: unconfig @$(MKCONFIG) $(@:_config=) arm arm926ejs imx27lite logicpd mx27
Add GEC2410 Clock Setting.
Signed-off-by: Hui.Tang zetalabs@gmail.com --- cpu/arm920t/s3c24x0/timer.c | 1 + 1 files changed, 1 insertions(+), 0 deletions(-)
diff --git a/cpu/arm920t/s3c24x0/timer.c b/cpu/arm920t/s3c24x0/timer.c index 20cedd4..d4787b9 100644 --- a/cpu/arm920t/s3c24x0/timer.c +++ b/cpu/arm920t/s3c24x0/timer.c @@ -188,6 +188,7 @@ ulong get_tbclk(void) tbclk = timer_load_val * 100; #elif defined(CONFIG_SBC2410X) || \ defined(CONFIG_SMDK2410) || \ + defined(CONFIG_GEC2410) || \ defined(CONFIG_VCMA9) tbclk = CONFIG_SYS_HZ; #else
GEC2410 Boot from NAND FLASH.
Signed-off-by: Hui.Tang zetalabs@gmail.com --- cpu/arm920t/start.S | 36 ++++++++++++++++++++++++++++++++++++ 1 files changed, 36 insertions(+), 0 deletions(-)
diff --git a/cpu/arm920t/start.S b/cpu/arm920t/start.S index 114427a..d8b832a 100644 --- a/cpu/arm920t/start.S +++ b/cpu/arm920t/start.S @@ -27,6 +27,10 @@ #include <common.h> #include <config.h>
+#if !defined(CONFIG_ENABLE_MMU) && !defined(CONFIG_SYS_PHY_UBOOT_BASE) +#define CONFIG_SYS_PHY_UBOOT_BASE CONFIG_SYS_UBOOT_BASE +#endif + /* ************************************************************************* * @@ -38,6 +42,7 @@
.globl _start _start: b start_code +#ifndef CONFIG_NAND_SPL ldr pc, _undefined_instruction ldr pc, _software_interrupt ldr pc, _prefetch_abort @@ -53,7 +58,13 @@ _data_abort: .word data_abort _not_used: .word not_used _irq: .word irq _fiq: .word fiq +_pad: .word 0x12345678 /* now 16*4=64 */ +#else + . = _start + 64 +#endif
+.global _end_vect +_end_vect: .balignl 16,0xdeadbeef
@@ -73,6 +84,14 @@ _fiq: .word fiq _TEXT_BASE: .word TEXT_BASE
+/* + * Below variable is very important because we use MMU in U-Boot. + * Without it, we cannot run code correctly before MMU is ON. + * by scsuh. + */ +_TEXT_PHY_BASE: + .word CONFIG_SYS_PHY_UBOOT_BASE + .globl _armboot_start _armboot_start: .word _start @@ -114,8 +133,10 @@ start_code: orr r0, r0, #0xd3 msr cpsr, r0
+#ifndef CONFIG_NAND_SPL bl coloured_LED_init bl red_LED_on +#endif
#if defined(CONFIG_AT91RM9200DK) || defined(CONFIG_AT91RM9200EK) /* @@ -176,6 +197,7 @@ copyex: bl cpu_init_crit #endif
+#ifndef CONFIG_NAND_SPL #ifndef CONFIG_SKIP_RELOCATE_UBOOT relocate: /* relocate U-Boot to RAM */ adr r0, _start /* r0 <- current position of code */ @@ -194,9 +216,13 @@ copy_loop: cmp r0, r2 /* until source end addreee [r2] */ ble copy_loop #endif /* CONFIG_SKIP_RELOCATE_UBOOT */ +#endif /* CONFIG_NAND_SPL */
/* Set up the stack */ stack_setup: +#ifdef CONFIG_MEMORY_UPPER_CODE + ldr sp, =(CONFIG_SYS_UBOOT_BASE + CONFIG_SYS_UBOOT_SIZE - 0xc) +#else ldr r0, _TEXT_BASE /* upper 128 KiB: relocated uboot */ sub r0, r0, #CONFIG_SYS_MALLOC_LEN /* malloc area */ sub r0, r0, #CONFIG_SYS_GBL_DATA_SIZE /* bdinfo */ @@ -204,6 +230,7 @@ stack_setup: sub r0, r0, #(CONFIG_STACKSIZE_IRQ+CONFIG_STACKSIZE_FIQ) #endif sub sp, r0, #12 /* leave 3 words for abort-stack */ +#endif /* CONFIG_MEMORY_UPPER_CODE */
clear_bss: ldr r0, _bss_start /* find start of bss segment */ @@ -215,9 +242,14 @@ clbss_l:str r2, [r0] /* clear loop... */ cmp r0, r1 ble clbss_l
+#ifndef CONFIG_NAND_SPL ldr pc, _start_armboot
_start_armboot: .word start_armboot +#else + b nand_boot +/* .word nand_boot */ +#endif
/* @@ -234,6 +266,7 @@ _start_armboot: .word start_armboot
#ifndef CONFIG_SKIP_LOWLEVEL_INIT cpu_init_crit: +#ifndef CONFIG_NAND_SPL /* * flush v4 I/D caches */ @@ -251,6 +284,7 @@ cpu_init_crit: orr r0, r0, #0x00001000 @ set bit 12 (I) I-Cache mcr p15, 0, r0, c1, c0, 0
+#endif /* CONFIG_NAND_SPL */ /* * before relocating, we have to setup RAM timing * because memory timing is board-dependend, you will @@ -264,6 +298,7 @@ cpu_init_crit: mov pc, lr #endif /* CONFIG_SKIP_LOWLEVEL_INIT */
+#ifndef CONFIG_NAND_SPL /* ************************************************************************* * @@ -434,3 +469,4 @@ fiq: bl do_fiq
#endif +#endif /* CONFIG_NAND_SPL */
Fix CS8900 dev->priv not init issue.
Signed-off-by: Hui.Tang zetalabs@gmail.com --- drivers/net/cs8900.c | 2 +- 1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/drivers/net/cs8900.c b/drivers/net/cs8900.c index 587f7f6..962b74c 100644 --- a/drivers/net/cs8900.c +++ b/drivers/net/cs8900.c @@ -320,12 +320,12 @@ int cs8900_initialize(u8 dev_num, int base_addr) } memset(priv, 0, sizeof(*priv)); priv->regs = (struct cs8900_regs *)base_addr; + dev->priv = priv;
/* Load MAC address from EEPROM */ cs8900_get_enetaddr(dev);
dev->iobase = base_addr; - dev->priv = priv; dev->init = cs8900_init; dev->halt = cs8900_halt; dev->send = cs8900_send;
Add missing function for CONFIG_NAND_SPL
Signed-off-by: Hui.Tang zetalabs@gmail.com --- drivers/mtd/nand/s3c2410_nand.c | 29 ++++++++++++++++++++++++----- 1 files changed, 24 insertions(+), 5 deletions(-)
diff --git a/drivers/mtd/nand/s3c2410_nand.c b/drivers/mtd/nand/s3c2410_nand.c index f2f3e72..7fefe10 100644 --- a/drivers/mtd/nand/s3c2410_nand.c +++ b/drivers/mtd/nand/s3c2410_nand.c @@ -36,6 +36,17 @@ #define S3C2410_ADDR_NALE 4 #define S3C2410_ADDR_NCLE 8
+#ifdef CONFIG_NAND_SPL +static void nand_read_buf(struct mtd_info *mtd, u_char *buf, int len) +{ + int i; + struct nand_chip *this = mtd->priv; + + for (i = 0; i < len; i++) + buf[i] = readb(this->IO_ADDR_R); +} +#endif + static void s3c2410_hwcontrol(struct mtd_info *mtd, int cmd, unsigned int ctrl) { struct nand_chip *chip = mtd->priv; @@ -83,9 +94,10 @@ void s3c2410_nand_enable_hwecc(struct mtd_info *mtd, int mode) static int s3c2410_nand_calculate_ecc(struct mtd_info *mtd, const u_char *dat, u_char *ecc_code) { - ecc_code[0] = NFECC0; - ecc_code[1] = NFECC1; - ecc_code[2] = NFECC2; + struct s3c2410_nand *nand = s3c2410_get_base_nand(); + ecc_code[0] = readb(&nand->NFECC); + ecc_code[1] = readb(&nand->NFECC + 1); + ecc_code[2] = readb(&nand->NFECC + 2); debugX(1, "s3c2410_nand_calculate_hwecc(%p,): 0x%02x 0x%02x 0x%02x\n", mtd , ecc_code[0], ecc_code[1], ecc_code[2]);
@@ -100,7 +112,7 @@ static int s3c2410_nand_correct_data(struct mtd_info *mtd, u_char *dat, read_ecc[2] == calc_ecc[2]) return 0;
- printf("s3c2410_nand_correct_data: not implemented\n"); + debugX(1, "s3c2410_nand_correct_data: not implemented\n"); return -1; } #endif @@ -130,8 +142,13 @@ int board_nand_init(struct nand_chip *nand) /* initialize nand_chip data structure */ nand->IO_ADDR_R = nand->IO_ADDR_W = (void *)&nand_reg->NFDATA;
+ nand->select_chip = NULL; + /* read_buf and write_buf are default */ /* read_byte and write_byte are default */ +#ifdef CONFIG_NAND_SPL + nand->read_buf = nand_read_buf; +#endif
/* hwcontrol always must be implemented */ nand->cmd_ctrl = s3c2410_hwcontrol; @@ -142,7 +159,9 @@ int board_nand_init(struct nand_chip *nand) nand->ecc.hwctl = s3c2410_nand_enable_hwecc; nand->ecc.calculate = s3c2410_nand_calculate_ecc; nand->ecc.correct = s3c2410_nand_correct_data; - nand->ecc.mode = NAND_ECC_HW3_512; + nand->ecc.mode = NAND_ECC_HW; + nand->ecc.size = CONFIG_SYS_NAND_ECCSIZE; + nand->ecc.bytes = CONFIG_SYS_NAND_ECCBYTES; #else nand->ecc.mode = NAND_ECC_SOFT; #endif
Add GEC2410 Maintainers.
Signed-off-by: Hui.Tang zetalabs@gmail.com --- MAINTAINERS | 4 ++++ 1 files changed, 4 insertions(+), 0 deletions(-)
diff --git a/MAINTAINERS b/MAINTAINERS index d70a9d2..6ecba41 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -429,6 +429,10 @@ Timur Tabi timur@freescale.com MPC8349E-mITX MPC8349 MPC8349E-mITX-GP MPC8349
+Hui Tang zetalabs@gmail.com + + gec2410 ARM920T + Erik Theisen etheisen@mindspring.com
W7OLMC PPC4xx
Add gec2410 in MAKEALL.
Signed-off-by: Hui.Tang zetalabs@gmail.com --- MAKEALL | 1 + 1 files changed, 1 insertions(+), 0 deletions(-)
diff --git a/MAKEALL b/MAKEALL index d63c5c2..fffa58a 100755 --- a/MAKEALL +++ b/MAKEALL @@ -548,6 +548,7 @@ LIST_ARM9=" \ cp926ejs \ cp946es \ cp966 \ + gec2410 \ imx27lite \ lpd7a400 \ mv88f6281gtw_ge \
Dear "Hui.Tang",
In message b094fc749d72fa04a4dd7c1bf74734479da7b753.1256898456.git.zetalabs@gmail.com you wrote:
Add gec2410 in MAKEALL.
Signed-off-by: Hui.Tang zetalabs@gmail.com
MAKEALL | 1 + 1 files changed, 1 insertions(+), 0 deletions(-)
This belongs into the single commit that adds board support.
Best regards,
Wolfgang Denk
Dear "Hui.Tang",
In message b8b6695ccef23f57ed7f570d5ec956dcf6187881.1256898456.git.zetalabs@gmail.com you wrote:
Add GEC2410 Maintainers.
Signed-off-by: Hui.Tang zetalabs@gmail.com
MAINTAINERS | 4 ++++ 1 files changed, 4 insertions(+), 0 deletions(-)
This belongs into the single commit that adds board support.
Best regards,
Wolfgang Denk
Dear "Hui.Tang",
In message b6deb9fff2cf29d9091e6f8b4e89d3b023b7a882.1256898456.git.zetalabs@gmail.com you wrote:
Add missing function for CONFIG_NAND_SPL
...
- printf("s3c2410_nand_correct_data: not implemented\n");
- debugX(1, "s3c2410_nand_correct_data: not implemented\n");
I think this should remain a printf().
Best regards,
Wolfgang Denk
Dear Wolfgang,
- printf("s3c2410_nand_correct_data: not implemented\n");
- debugX(1, "s3c2410_nand_correct_data: not implemented\n");
I think this should remain a printf().
Since when booting from nand flash, the printf() is not available in the early stage, here I replace printf() with debugX() to avoid using the undefined function.
BR. Hui.
Dear Hui Tang,
In message f9f0f3cf0911030414s2ca8525bs47a02010e03aa5d5@mail.gmail.com you wrote:
Dear Wolfgang,
- printf("s3c2410_nand_correct_data: not implemented\n");
- debugX(1, "s3c2410_nand_correct_data: not implemented\n");
I think this should remain a printf().
Since when booting from nand flash, the printf() is not available in the early stage, here I replace printf() with debugX() to avoid using the undefined function.
But this is wrong. When you enable debuging, the same problem would be present again.
Best regards,
Wolfgang Denk
Hui.Tang,
On Fri, Oct 30, 2009 at 3:39 AM, Hui.Tang zetalabs@gmail.com wrote:
Fix CS8900 dev->priv not init issue.
Signed-off-by: Hui.Tang zetalabs@gmail.com
drivers/net/cs8900.c | 2 +- 1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/drivers/net/cs8900.c b/drivers/net/cs8900.c index 587f7f6..962b74c 100644 --- a/drivers/net/cs8900.c +++ b/drivers/net/cs8900.c @@ -320,12 +320,12 @@ int cs8900_initialize(u8 dev_num, int base_addr) } memset(priv, 0, sizeof(*priv)); priv->regs = (struct cs8900_regs *)base_addr;
dev->priv = priv; /* Load MAC address from EEPROM */ cs8900_get_enetaddr(dev); dev->iobase = base_addr;
dev->priv = priv; dev->init = cs8900_init; dev->halt = cs8900_halt; dev->send = cs8900_send;
Since you've decided to re-send this, please do so again. This time, do it this way:
- - /* Load MAC address from EEPROM */ http://git.denx.de/?p=u-boot.git;a=blob;f=drivers/net/cs8900.c;h=587f7f62a760308fc3c39331d68f600056d42e35;hb=HEAD#l325- cs8900_get_enetaddr(dev); http://git.denx.de/?p=u-boot.git;a=blob;f=drivers/net/cs8900.c;h=587f7f62a760308fc3c39331d68f600056d42e35;hb=HEAD#l326 http://git.denx.de/?p=u-boot.git;a=blob;f=drivers/net/cs8900.c;h=587f7f62a760308fc3c39331d68f600056d42e35;hb=HEAD#l327 dev->iobase = base_addr; http://git.denx.de/?p=u-boot.git;a=blob;f=drivers/net/cs8900.c;h=587f7f62a760308fc3c39331d68f600056d42e35;hb=HEAD#l328 dev->priv = priv; http://git.denx.de/?p=u-boot.git;a=blob;f=drivers/net/cs8900.c;h=587f7f62a760308fc3c39331d68f600056d42e35;hb=HEAD#l329 dev->init = cs8900_init; http://git.denx.de/?p=u-boot.git;a=blob;f=drivers/net/cs8900.c;h=587f7f62a760308fc3c39331d68f600056d42e35;hb=HEAD#l330 dev->halt = cs8900_halt; http://git.denx.de/?p=u-boot.git;a=blob;f=drivers/net/cs8900.c;h=587f7f62a760308fc3c39331d68f600056d42e35;hb=HEAD#l331 dev->send = cs8900_send; http://git.denx.de/?p=u-boot.git;a=blob;f=drivers/net/cs8900.c;h=587f7f62a760308fc3c39331d68f600056d42e35;hb=HEAD#l332 dev->recv = cs8900_recv; + + /* Load MAC address from EEPROM */ http://git.denx.de/?p=u-boot.git;a=blob;f=drivers/net/cs8900.c;h=587f7f62a760308fc3c39331d68f600056d42e35;hb=HEAD#l325+ cs8900_get_enetaddr(dev); http://git.denx.de/?p=u-boot.git;a=blob;f=drivers/net/cs8900.c;h=587f7f62a760308fc3c39331d68f600056d42e35;hb=HEAD#l333 sprintf(dev->name, "%s-%hu", CS8900_DRIVERNAME, dev_num);
-- 1.6.0.4
Since this fixes a bug, it may get in the current release. The other parts
of you submission will have to wait.
regards, Ben
Dear "Hui.Tang",
In message 28c8c0b4de93d8f48e61ff560c4537768b4e1455.1256898456.git.zetalabs@gmail.com you wrote:
GEC2410 Boot from NAND FLASH.
Signed-off-by: Hui.Tang zetalabs@gmail.com
cpu/arm920t/start.S | 36 ++++++++++++++++++++++++++++++++++++ 1 files changed, 36 insertions(+), 0 deletions(-)
diff --git a/cpu/arm920t/start.S b/cpu/arm920t/start.S index 114427a..d8b832a 100644 --- a/cpu/arm920t/start.S +++ b/cpu/arm920t/start.S @@ -27,6 +27,10 @@ #include <common.h> #include <config.h>
+#if !defined(CONFIG_ENABLE_MMU) && !defined(CONFIG_SYS_PHY_UBOOT_BASE) +#define CONFIG_SYS_PHY_UBOOT_BASE CONFIG_SYS_UBOOT_BASE +#endif
Please don't add such defines to global code. Also, CONFIG_SYS_* variables get set in board config files, not in some low level source code.
+/*
- Below variable is very important because we use MMU in U-Boot.
do we?
- Without it, we cannot run code correctly before MMU is ON.
- by scsuh.
What does "by scsuh." mean?
+_TEXT_PHY_BASE:
- .word CONFIG_SYS_PHY_UBOOT_BASE
Why would that be needed?
+#ifndef CONFIG_NAND_SPL bl coloured_LED_init bl red_LED_on +#endif
in which way do LED's depend on NAND booting?
+#ifndef CONFIG_NAND_SPL #ifndef CONFIG_SKIP_RELOCATE_UBOOT relocate: /* relocate U-Boot to RAM */ adr r0, _start /* r0 <- current position of code */ @@ -194,9 +216,13 @@ copy_loop: cmp r0, r2 /* until source end addreee [r2] */ ble copy_loop #endif /* CONFIG_SKIP_RELOCATE_UBOOT */ +#endif /* CONFIG_NAND_SPL */
/* Set up the stack */ stack_setup: +#ifdef CONFIG_MEMORY_UPPER_CODE
- ldr sp, =(CONFIG_SYS_UBOOT_BASE + CONFIG_SYS_UBOOT_SIZE - 0xc)
+#else
I don;t really like this growing amount of #ifdefs in this global code. Isn't there some better way to implement this?
Best regards,
Wolfgang Denk
Dear "Hui.Tang",
In message b9e3f7a01cba3bcd76dc29d8bad2369dc8ac0349.1256898456.git.zetalabs@gmail.com you wrote:
Add GEC2410 Clock Setting.
Signed-off-by: Hui.Tang zetalabs@gmail.com
cpu/arm920t/s3c24x0/timer.c | 1 + 1 files changed, 1 insertions(+), 0 deletions(-)
diff --git a/cpu/arm920t/s3c24x0/timer.c b/cpu/arm920t/s3c24x0/timer.c index 20cedd4..d4787b9 100644 --- a/cpu/arm920t/s3c24x0/timer.c +++ b/cpu/arm920t/s3c24x0/timer.c @@ -188,6 +188,7 @@ ulong get_tbclk(void) tbclk = timer_load_val * 100; #elif defined(CONFIG_SBC2410X) || \ defined(CONFIG_SMDK2410) || \
defined(CONFIG_GEC2410) || \ defined(CONFIG_VCMA9)
Instead of adding more and more board names here, we should define a feature dependency instead - I understand this is s3c2400 versus x3c2410 code, right? So why don't we use this instead? In any case, such lists should always be kept sorted.
Best regards,
Wolfgang Denk
Dear "Hui.Tang",
In message 6c7a9a5dcafb1f535ed33cb29d579db993846325.1256898456.git.zetalabs@gmail.com you wrote:
Add gec2410_config option for GEC2410
Signed-off-by: Hui.Tang zetalabs@gmail.com
Makefile | 7 +++++++ 1 files changed, 7 insertions(+), 0 deletions(-)
This belongs all in one commit.
index bcb3fe9..2de0b1d 100644 --- a/Makefile +++ b/Makefile @@ -2951,6 +2951,13 @@ davinci_dm365evm_config : unconfig davinci_dm6467evm_config : unconfig @$(MKCONFIG) $(@:_config=) arm arm926ejs dm6467evm davinci davinci
+gec2410_config : unconfig
- @mkdir -p $(obj)include $(obj)board/gec/gec2410
- @mkdir -p $(obj)nand_spl/board/gec/gec2410
- @echo "RAM_TEXT = 0x33e00000" >> $(obj)board/gec/gec2410/config.tmp
- @$(MKCONFIG) $(@:_config=) arm arm920t gec2410 gec s3c24x0
- @echo "CONFIG_NAND_U_BOOT = y" >> $(obj)include/config.mk
imx27lite_config: unconfig @$(MKCONFIG) $(@:_config=) arm arm926ejs imx27lite logicpd mx27
An ARM920 board does not belong into the arm926ejs block.
Best regards,
Wolfgang Denk
Dear Wolfgang,
2009/11/1 Wolfgang Denk wd@denx.de:
Dear "Hui.Tang",
In message 6c7a9a5dcafb1f535ed33cb29d579db993846325.1256898456.git.zetalabs@gmail.com you wrote:
Add gec2410_config option for GEC2410
Signed-off-by: Hui.Tang zetalabs@gmail.com
Makefile | 7 +++++++ 1 files changed, 7 insertions(+), 0 deletions(-)
This belongs all in one commit.
index bcb3fe9..2de0b1d 100644 --- a/Makefile +++ b/Makefile @@ -2951,6 +2951,13 @@ davinci_dm365evm_config : unconfig davinci_dm6467evm_config : unconfig @$(MKCONFIG) $(@:_config=) arm arm926ejs dm6467evm davinci davinci
+gec2410_config : unconfig
- @mkdir -p $(obj)include $(obj)board/gec/gec2410
- @mkdir -p $(obj)nand_spl/board/gec/gec2410
- @echo "RAM_TEXT = 0x33e00000" >> $(obj)board/gec/gec2410/config.tmp
- @$(MKCONFIG) $(@:_config=) arm arm920t gec2410 gec s3c24x0
- @echo "CONFIG_NAND_U_BOOT = y" >> $(obj)include/config.mk
imx27lite_config: unconfig @$(MKCONFIG) $(@:_config=) arm arm926ejs imx27lite logicpd mx27
An ARM920 board does not belong into the arm926ejs block.
I have put the board config in the part of
######################################################################## ## ARM Integrator boards - see doc/README-integrator for more info.
as the sbc2410x_config does,
Would you please give me some advice where should I put the gec2410 board config?
Thanks.
BR. Hui.
Dear Hui Tang
2009/11/3 Hui Tang zetalabs@gmail.com:
Dear Wolfgang,
2009/11/1 Wolfgang Denk wd@denx.de:
Dear "Hui.Tang",
In message 6c7a9a5dcafb1f535ed33cb29d579db993846325.1256898456.git.zetalabs@gmail.com you wrote:
Add gec2410_config option for GEC2410
Signed-off-by: Hui.Tang zetalabs@gmail.com
Makefile | 7 +++++++ 1 files changed, 7 insertions(+), 0 deletions(-)
This belongs all in one commit.
index bcb3fe9..2de0b1d 100644 --- a/Makefile +++ b/Makefile @@ -2951,6 +2951,13 @@ davinci_dm365evm_config : unconfig davinci_dm6467evm_config : unconfig @$(MKCONFIG) $(@:_config=) arm arm926ejs dm6467evm davinci davinci
+gec2410_config : unconfig
- @mkdir -p $(obj)include $(obj)board/gec/gec2410
- @mkdir -p $(obj)nand_spl/board/gec/gec2410
- @echo "RAM_TEXT = 0x33e00000" >> $(obj)board/gec/gec2410/config.tmp
- @$(MKCONFIG) $(@:_config=) arm arm920t gec2410 gec s3c24x0
- @echo "CONFIG_NAND_U_BOOT = y" >> $(obj)include/config.mk
imx27lite_config: unconfig @$(MKCONFIG) $(@:_config=) arm arm926ejs imx27lite logicpd mx27
An ARM920 board does not belong into the arm926ejs block.
I have put the board config in the part of
######################################################################## ## ARM Integrator boards - see doc/README-integrator for more info.
as the sbc2410x_config does,
Would you please give me some advice where should I put the gec2410 board config?
I think, It is better to put bottom of s3c24x0 board series. (next to VCMA9)
Thanks.
BR. Hui. _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Thanks Minkyu Kang
Dear Minkyu Kang,
In message 1f3430fb0911030227t2c204fd6s52a0685628748636@mail.gmail.com you wrote:
Would you please give me some advice where should I put the gec2410 board config?
I think, It is better to put bottom of s3c24x0 board series. (next to VCMA9)
This is definitely wrong.
Lists shall be kept sorted.
Best regards,
Wolfgang Denk
Dear Hui Tang,
In message f9f0f3cf0911022008y57023adfrfc877ec48909515@mail.gmail.com you wrote:
An ARM920 board does not belong into the arm926ejs block.
...
Would you please give me some advice where should I put the gec2410 board config?
Sorry, I was wrong here. Please ignore this comment.
Best regards,
Wolfgang Denk
Hui.Tang,
On Fri, Oct 30, 2009 at 3:39 AM, Hui.Tang zetalabs@gmail.com wrote:
Add GEC2410 default config.
Signed-off-by: Hui.Tang zetalabs@gmail.com
include/configs/gec2410.h | 275 +++++++++++++++++++++++++++++++++++++++++++++
<snip>
+ +#define CONFIG_BOOTDELAY 3 +/*#define CONFIG_BOOTARGS "root=ramfs devfs=mount console=ttySA0,9600" */ +#define CONFIG_ETHADDR 08:00:3e:26:0a:5b +#define CONFIG_NETMASK 255.255.255.0 +#define CONFIG_IPADDR 192.168.1.10 +#define CONFIG_SERVERIP 192.168.1.254 Please remove all default network parameters. <snip>
regards, Ben 1.6.0.4
_______________________________________________ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Dear "Hui.Tang",
In message abdf4f47f4822a58409a4b819f470dc1a540774c.1256898456.git.zetalabs@gmail.com you wrote:
Add GEC2410 default config.
...
diff --git a/include/configs/gec2410.h b/include/configs/gec2410.h new file mode 100644 index 0000000..98c8040 --- /dev/null +++ b/include/configs/gec2410.h
...
+#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */
+#undef CONFIG_SKIP_RELOCATE_UBOOT
Don't #undef what is not defined anyway.
+/*#define CONFIG_BOOTARGS "root=ramfs devfs=mount console=ttySA0,9600" */
Don;t add dead code.
+#define CONFIG_ETHADDR 08:00:3e:26:0a:5b +#define CONFIG_NETMASK 255.255.255.0 +#define CONFIG_IPADDR 192.168.1.10 +#define CONFIG_SERVERIP 192.168.1.254
As Ben already commented: strict NAK on this.
+/*#define CONFIG_BOOTFILE "elinos-lart" */ +/*#define CONFIG_BOOTCOMMAND "tftp; bootm" */
Don';t add dead code - please fix globally.
+/* what's this ? it's not used anywhere */ +#define CONFIG_KGDB_SER_INDEX 1 /* which serial port to use */
Then why do you add it?
+/* the PWM TImer 4 uses a counter of 15625 for 10 ms, so we need */ +/* it to wrap 100 times (total 1562500) to get 1 sec. */ +#define CONFIG_SYS_HZ 1562500
NAK.
CONFIG_SYS_HZ is a constant and must be defined as 1000 on all systems.
+/* Use drivers/cfi_flash.c, even though the flash is not CFI-compliant */
????
Didn't you add your own driver board/gec/gec2410/flash.c ?
So does the CFI driver work, or not? And if not, then why exactly not?
+#define CONFIG_ENV_SIZE 0x4000 /* Total Size of Environment Sector */
Wrong comment? CONFIG_ENV_SIZE is the size of the envrionment, NOT the sector size.
Best regards,
Wolfgang Denk
Dear "Hui.Tang",
In message abdf4f47f4822a58409a4b819f470dc1a540774c.1256898456.git.zetalabs@gmail.com you wrote:
Add GEC2410 default config.
Note: it makes no sense to split board support in so many separate patches. Submit it as one commit, please.
Best regards,
Wolfgang Denk
Dear "Hui.Tang",
In message e934d0d28a38c4eec2b08862b258bf4b1e5e3403.1256898456.git.zetalabs@gmail.com you wrote:
New Board GEC2410 Setup.
Please see below for checkpatch.pl output for your patch series (note that you should have resolved all tehse issues _before_ submitting the patches).
Signed-off-by: Hui.Tang zetalabs@gmail.com
board/gec/gec2410/Makefile | 54 +++++ board/gec/gec2410/README | 85 ++++++++ board/gec/gec2410/config.mk | 32 +++ board/gec/gec2410/flash.c | 417 +++++++++++++++++++++++++++++++++++++ board/gec/gec2410/gec2410.c | 150 +++++++++++++ board/gec/gec2410/lowlevel_init.S | 171 +++++++++++++++ board/gec/gec2410/u-boot-nand.lds | 61 ++++++ 7 files changed, 970 insertions(+), 0 deletions(-) create mode 100644 board/gec/gec2410/Makefile create mode 100644 board/gec/gec2410/README create mode 100644 board/gec/gec2410/config.mk create mode 100644 board/gec/gec2410/flash.c create mode 100644 board/gec/gec2410/gec2410.c create mode 100644 board/gec/gec2410/lowlevel_init.S create mode 100644 board/gec/gec2410/u-boot-nand.lds
For a new board support, entries to the top level Makefile and to the MAINTAINERS and MAKEALL files are missing.
diff --git a/board/gec/gec2410/flash.c b/board/gec/gec2410/flash.c new file mode 100644 index 0000000..ab418b1 --- /dev/null +++ b/board/gec/gec2410/flash.c
This looks very much like a CFI compatible flash device. Why do you think you need a custom flash driver?
diff --git a/board/gec/gec2410/gec2410.c b/board/gec/gec2410/gec2410.c new file mode 100644 index 0000000..543ceeb --- /dev/null +++ b/board/gec/gec2410/gec2410.c @@ -0,0 +1,150 @@ +/*
- (C) Copyright 2002
- Sysgo Real-Time Solutions, GmbH <www.elinos.com>
- Marius Groeger mgroeger@sysgo.de
- (C) Copyright 2002
- David Mueller, ELSOFT AG, d.mueller@elsoft.ch
- (C) Copyright 2009
- Hui Tang, zetalabs@gmail.com
- See file CREDITS for list of people who contributed to this
- project.
- This program is free software; you can redistribute it and/or
- modify it under the terms of the GNU General Public License as
- published by the Free Software Foundation; either version 2 of
- the License, or (at your option) any later version.
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- MA 02111-1307 USA
- */
+#include <common.h> +#include <netdev.h> +#include <s3c2410.h>
+DECLARE_GLOBAL_DATA_PTR;
+#define FCLK_SPEED 1
+#if FCLK_SPEED == 0 /* Fout = 203MHz, Fin = 12MHz for Audio */ +#define M_MDIV 0xC3 +#define M_PDIV 0x4 +#define M_SDIV 0x1 +#elif FCLK_SPEED == 1 /* Fout = 202.8MHz */ +#define M_MDIV 0xA1 +#define M_PDIV 0x3 +#define M_SDIV 0x1 +#endif
+#define USB_CLOCK 1
+#if USB_CLOCK == 0 +#define U_M_MDIV 0xA1 +#define U_M_PDIV 0x3 +#define U_M_SDIV 0x1 +#elif USB_CLOCK == 1 +#define U_M_MDIV 0x48 +#define U_M_PDIV 0x3 +#define U_M_SDIV 0x2 +#endif
+static inline void delay(unsigned long loops) +{
- __asm__ volatile ("1:\n"
"subs %0, %1, #1\n""bne 1b" : "=r" (loops) : "0" (loops));+}
+/*
- Miscellaneous platform dependent initialisations
- */
+int board_init(void) +{
- struct s3c24x0_clock_power * const clk_power =
s3c24x0_get_base_clock_power();- struct s3c24x0_gpio * const gpio = s3c24x0_get_base_gpio();
- /* to reduce PLL lock time, adjust the LOCKTIME register */
- clk_power->LOCKTIME = 0xFFFFFF;
- /* configure MPLL */
- clk_power->MPLLCON = ((M_MDIV << 12) + (M_PDIV << 4) + M_SDIV);
- /* some delay between MPLL and UPLL */
- delay(4000);
- /* configure UPLL */
- clk_power->UPLLCON = ((U_M_MDIV << 12) + (U_M_PDIV << 4) + U_M_SDIV);
Please use I/O accessors to access device registers, here and everwhere else in this patch series.
- /* set up the I/O ports */
- gpio->GPACON = 0x007FFFFF;
- gpio->GPBCON = 0x00044555;
- gpio->GPBUP = 0x000007FF;
- gpio->GPCCON = 0xAAAAAAAA;
- gpio->GPCUP = 0x0000FFFF;
- gpio->GPDCON = 0xAAAAAAAA;
- gpio->GPDUP = 0x0000FFFF;
- gpio->GPECON = 0xAAAAAAAA;
- gpio->GPEUP = 0x0000FFFF;
- gpio->GPFCON = 0x000055AA;
- gpio->GPFUP = 0x000000FF;
- gpio->GPGCON = 0xFF95FFBA;
- gpio->GPGUP = 0x0000FFFF;
- gpio->GPHCON = 0x002AFAAA;
- gpio->GPHUP = 0x000007FF;
Please define some symbolic constants for these data (in your board config file), and explain in comments what these mean.
+int dram_init(void) +{
- gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
- gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
Please use get_ram_size() for auto-sizing and memory testing.
+ulong board_flash_get_legacy(ulong base, int banknum, flash_info_t *info) +{
- if (banknum == 0) { /* non-CFI boot flash */
info->portwidth = FLASH_CFI_16BIT;info->chipwidth = FLASH_CFI_BY16;info->interface = FLASH_CFI_X16;return 1;- } else
return 0;+}
Why would that be needed?
diff --git a/board/gec/gec2410/lowlevel_init.S b/board/gec/gec2410/lowlevel_init.S new file mode 100644
...
+#include <config.h> +#include <version.h>
+/* some parameters for the board */
What is this comment supposed to explain?
+/*
- Taken from linux/arch/arm/boot/compressed/head-s3c2410.S
- Copyright (C) 2002 Samsung Electronics SW.LEE hitchcar@sec.samsung.com
- */
+#define BWSCON 0x48000000
+/* BWSCON */ +#define DW8 (0x0) +#define DW16 (0x1) +#define DW32 (0x2) +#define WAIT (0x1<<2) +#define UBLB (0x1<<3)
+#define B1_BWSCON (DW32) +#define B2_BWSCON (DW16) +#define B3_BWSCON (DW16 + WAIT + UBLB) +#define B4_BWSCON (DW16) +#define B5_BWSCON (DW16) +#define B6_BWSCON (DW32) +#define B7_BWSCON (DW32)
+/* BANK0CON */ +#define B0_Tacs 0x0 /* 0clk */ +#define B0_Tcos 0x0 /* 0clk */ +#define B0_Tacc 0x7 /* 14clk */ +#define B0_Tcoh 0x0 /* 0clk */ +#define B0_Tah 0x0 /* 0clk */ +#define B0_Tacp 0x0 +#define B0_PMC 0x0 /* normal */
+/* BANK1CON */ +#define B1_Tacs 0x0 /* 0clk */ +#define B1_Tcos 0x0 /* 0clk */ +#define B1_Tacc 0x7 /* 14clk */ +#define B1_Tcoh 0x0 /* 0clk */ +#define B1_Tah 0x0 /* 0clk */ +#define B1_Tacp 0x0 +#define B1_PMC 0x0
+#define B2_Tacs 0x0 +#define B2_Tcos 0x0 +#define B2_Tacc 0x7 +#define B2_Tcoh 0x0 +#define B2_Tah 0x0 +#define B2_Tacp 0x0 +#define B2_PMC 0x0
+#define B3_Tacs 0x0 /* 0clk */ +#define B3_Tcos 0x3 /* 4clk */ +#define B3_Tacc 0x7 /* 14clk */ +#define B3_Tcoh 0x1 /* 1clk */ +#define B3_Tah 0x0 /* 0clk */ +#define B3_Tacp 0x3 /* 6clk */ +#define B3_PMC 0x0 /* normal */
+#define B4_Tacs 0x0 /* 0clk */ +#define B4_Tcos 0x0 /* 0clk */ +#define B4_Tacc 0x7 /* 14clk */ +#define B4_Tcoh 0x0 /* 0clk */ +#define B4_Tah 0x0 /* 0clk */ +#define B4_Tacp 0x0 +#define B4_PMC 0x0 /* normal */
+#define B5_Tacs 0x0 /* 0clk */ +#define B5_Tcos 0x0 /* 0clk */ +#define B5_Tacc 0x7 /* 14clk */ +#define B5_Tcoh 0x0 /* 0clk */ +#define B5_Tah 0x0 /* 0clk */ +#define B5_Tacp 0x0 +#define B5_PMC 0x0 /* normal */
+#define B6_MT 0x3 /* SDRAM */ +#define B6_Trcd 0x1 +#define B6_SCAN 0x1 /* 9bit */
+#define B7_MT 0x3 /* SDRAM */ +#define B7_Trcd 0x1 /* 3clk */ +#define B7_SCAN 0x1 /* 9bit */
+/* REFRESH parameter */ +#define REFEN 0x1 /* Refresh enable */ +#define TREFMD 0x0 /* CBR(CAS before RAS)/Auto refresh */ +#define Trp 0x0 /* 2clk */ +#define Trc 0x3 /* 7clk */ +#define Tchr 0x2 /* 3clk */ +#define REFCNT 1113 /* period=15.6us, HCLK=60Mhz, (2048+1-15.6*60) */
These #defines belong into some header file.
+SMRDATA:
- .word (0+(B1_BWSCON<<4)+(B2_BWSCON<<8)+(B3_BWSCON<<12)+(B4_BWSCON<<16)+(B5_BWSCON<<20)+(B6_BWSCON<<24)+(B7_BWSCON<<28))
- .word ((B0_Tacs<<13)+(B0_Tcos<<11)+(B0_Tacc<<8)+(B0_Tcoh<<6)+(B0_Tah<<4)+(B0_Tacp<<2)+(B0_PMC))
- .word ((B1_Tacs<<13)+(B1_Tcos<<11)+(B1_Tacc<<8)+(B1_Tcoh<<6)+(B1_Tah<<4)+(B1_Tacp<<2)+(B1_PMC))
- .word ((B2_Tacs<<13)+(B2_Tcos<<11)+(B2_Tacc<<8)+(B2_Tcoh<<6)+(B2_Tah<<4)+(B2_Tacp<<2)+(B2_PMC))
- .word ((B3_Tacs<<13)+(B3_Tcos<<11)+(B3_Tacc<<8)+(B3_Tcoh<<6)+(B3_Tah<<4)+(B3_Tacp<<2)+(B3_PMC))
- .word ((B4_Tacs<<13)+(B4_Tcos<<11)+(B4_Tacc<<8)+(B4_Tcoh<<6)+(B4_Tah<<4)+(B4_Tacp<<2)+(B4_PMC))
- .word ((B5_Tacs<<13)+(B5_Tcos<<11)+(B5_Tacc<<8)+(B5_Tcoh<<6)+(B5_Tah<<4)+(B5_Tacp<<2)+(B5_PMC))
Lines too long. Please fix globally.
PATCH 01/10:
WARNING: line over 80 characters #336: FILE: board/gec/gec2410/flash.c:43: +#define MEM_FLASH_ADDR1 (*(volatile u16 *)(CONFIG_SYS_FLASH_BASE + (0x00000555 << 1)))
WARNING: Use of volatile is usually wrong: see Documentation/volatile-considered-harmful.txt #336: FILE: board/gec/gec2410/flash.c:43: +#define MEM_FLASH_ADDR1 (*(volatile u16 *)(CONFIG_SYS_FLASH_BASE + (0x00000555 << 1)))
WARNING: line over 80 characters #337: FILE: board/gec/gec2410/flash.c:44: +#define MEM_FLASH_ADDR2 (*(volatile u16 *)(CONFIG_SYS_FLASH_BASE + (0x000002AA << 1)))
WARNING: Use of volatile is usually wrong: see Documentation/volatile-considered-harmful.txt #337: FILE: board/gec/gec2410/flash.c:44: +#define MEM_FLASH_ADDR2 (*(volatile u16 *)(CONFIG_SYS_FLASH_BASE + (0x000002AA << 1)))
WARNING: line over 80 characters #1000: FILE: board/gec/gec2410/lowlevel_init.S:128: +#define REFCNT 1113 /* period=15.6us, HCLK=60Mhz, (2048+1-15.6*60) */
WARNING: line over 80 characters #1031: FILE: board/gec/gec2410/lowlevel_init.S:159: + .word (0+(B1_BWSCON<<4)+(B2_BWSCON<<8)+(B3_BWSCON<<12)+(B4_BWSCON<<16)+(B5_BWSCON<<20)+(B6_BWSCON<<24)+(B7_BWSCON<<28))
WARNING: line over 80 characters #1032: FILE: board/gec/gec2410/lowlevel_init.S:160: + .word ((B0_Tacs<<13)+(B0_Tcos<<11)+(B0_Tacc<<8)+(B0_Tcoh<<6)+(B0_Tah<<4)+(B0_Tacp<<2)+(B0_PMC))
WARNING: line over 80 characters #1033: FILE: board/gec/gec2410/lowlevel_init.S:161: + .word ((B1_Tacs<<13)+(B1_Tcos<<11)+(B1_Tacc<<8)+(B1_Tcoh<<6)+(B1_Tah<<4)+(B1_Tacp<<2)+(B1_PMC))
WARNING: line over 80 characters #1034: FILE: board/gec/gec2410/lowlevel_init.S:162: + .word ((B2_Tacs<<13)+(B2_Tcos<<11)+(B2_Tacc<<8)+(B2_Tcoh<<6)+(B2_Tah<<4)+(B2_Tacp<<2)+(B2_PMC))
WARNING: line over 80 characters #1035: FILE: board/gec/gec2410/lowlevel_init.S:163: + .word ((B3_Tacs<<13)+(B3_Tcos<<11)+(B3_Tacc<<8)+(B3_Tcoh<<6)+(B3_Tah<<4)+(B3_Tacp<<2)+(B3_PMC))
WARNING: line over 80 characters #1036: FILE: board/gec/gec2410/lowlevel_init.S:164: + .word ((B4_Tacs<<13)+(B4_Tcos<<11)+(B4_Tacc<<8)+(B4_Tcoh<<6)+(B4_Tah<<4)+(B4_Tacp<<2)+(B4_PMC))
WARNING: line over 80 characters #1037: FILE: board/gec/gec2410/lowlevel_init.S:165: + .word ((B5_Tacs<<13)+(B5_Tcos<<11)+(B5_Tacc<<8)+(B5_Tcoh<<6)+(B5_Tah<<4)+(B5_Tacp<<2)+(B5_PMC))
total: 0 errors, 12 warnings, 970 lines checked
PATCH 01/10 has style problems, please review. If any of these errors are false positives report them to the maintainer, see CHECKPATCH in MAINTAINERS.
PATCH 03/10
WARNING: line over 80 characters #135: FILE: include/configs/gec2410.h:38: +#define CONFIG_GEC2410 1 /* on a GD-Embedded Software Center GEC2410 Board */
WARNING: line over 80 characters #161: FILE: include/configs/gec2410.h:64: +#define CONFIG_SYS_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */
ERROR: spaces required around that ':' (ctx:VxV) #214: FILE: include/configs/gec2410.h:117: +#define CONFIG_ETHADDR 08:00:3e:26:0a:5b ^
ERROR: spaces required around that ':' (ctx:VxV) #214: FILE: include/configs/gec2410.h:117: +#define CONFIG_ETHADDR 08:00:3e:26:0a:5b ^
ERROR: spaces required around that ':' (ctx:VxV) #214: FILE: include/configs/gec2410.h:117: +#define CONFIG_ETHADDR 08:00:3e:26:0a:5b ^
ERROR: spaces required around that ':' (ctx:VxV) #214: FILE: include/configs/gec2410.h:117: +#define CONFIG_ETHADDR 08:00:3e:26:0a:5b ^
ERROR: spaces required around that ':' (ctx:VxV) #214: FILE: include/configs/gec2410.h:117: +#define CONFIG_ETHADDR 08:00:3e:26:0a:5b ^
WARNING: line over 80 characters #222: FILE: include/configs/gec2410.h:125: +#define CONFIG_KGDB_BAUDRATE 115200 /* speed to run kgdb serial port */
WARNING: line over 80 characters #230: FILE: include/configs/gec2410.h:133: +#define CONFIG_SYS_LONGHELP /* undef to save memory */
WARNING: line over 80 characters #231: FILE: include/configs/gec2410.h:134: +#define CONFIG_SYS_PROMPT "GEC2410#" /* Monitor Command Prompt */
WARNING: line over 80 characters #232: FILE: include/configs/gec2410.h:135: +#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
WARNING: line over 80 characters #233: FILE: include/configs/gec2410.h:136: +#define CONFIG_SYS_PBSIZE 384 /* Print Buffer Size */
WARNING: line over 80 characters #234: FILE: include/configs/gec2410.h:137: +#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
WARNING: line over 80 characters #235: FILE: include/configs/gec2410.h:138: +#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
WARNING: line over 80 characters #237: FILE: include/configs/gec2410.h:140: +#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE /* memtest works on */
WARNING: line over 80 characters #238: FILE: include/configs/gec2410.h:141: +#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x3e00000) /* 62 MB in DRAM */
WARNING: line over 80 characters #240: FILE: include/configs/gec2410.h:143: +#define CONFIG_SYS_LOAD_ADDR CONFIG_SYS_SDRAM_BASE /* default load address */
WARNING: line over 80 characters #264: FILE: include/configs/gec2410.h:167: +#define PHYS_SDRAM_1 CONFIG_SYS_SDRAM_BASE /* SDRAM Bank #1 */
WARNING: line over 80 characters #275: FILE: include/configs/gec2410.h:178: +#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */
WARNING: line over 80 characters #276: FILE: include/configs/gec2410.h:179: +#define CONFIG_SYS_MAX_FLASH_SECT 512 /* max number of sectors on one chip */
WARNING: line over 80 characters #278: FILE: include/configs/gec2410.h:181: +#define CONFIG_SYS_FLASH_CFI 1 /* Use CFI parameters (needed?) */
WARNING: line over 80 characters #285: FILE: include/configs/gec2410.h:188: +#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0x0F0000) /* addr of environment */
WARNING: line over 80 characters #288: FILE: include/configs/gec2410.h:191: +#define CONFIG_SYS_FLASH_ERASE_TOUT (5 * CONFIG_SYS_HZ) /* Timeout for Flash Erase */
WARNING: line over 80 characters #289: FILE: include/configs/gec2410.h:192: +#define CONFIG_SYS_FLASH_WRITE_TOUT (5 * CONFIG_SYS_HZ) /* Timeout for Flash Write */
WARNING: line over 80 characters #318: FILE: include/configs/gec2410.h:221: +#define CONFIG_SYS_UBOOT_BASE (CONFIG_SYS_MAPPED_RAM_BASE + 0x03e00000)
WARNING: line over 80 characters #320: FILE: include/configs/gec2410.h:223: +#define CONFIG_ENV_OFFSET 0x0040000 /* Offset of Environment Sector */
WARNING: line over 80 characters #324: FILE: include/configs/gec2410.h:227: +#define CONFIG_SYS_NAND_BASE 0x4e00000c /* NFDATA 0x4e00000c R/W NAND Flash data register */
WARNING: line over 80 characters #329: FILE: include/configs/gec2410.h:232: +#define CONFIG_SYS_NAND_U_BOOT_DST CONFIG_SYS_PHY_UBOOT_BASE /* NUB load-addr */
WARNING: line over 80 characters #330: FILE: include/configs/gec2410.h:233: +#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_NAND_U_BOOT_DST /* NUB start-addr */
WARNING: line over 80 characters #332: FILE: include/configs/gec2410.h:235: +#define CONFIG_SYS_NAND_U_BOOT_OFFS (4 * 1024) /* Offset to RAM U-Boot image */
WARNING: line over 80 characters #333: FILE: include/configs/gec2410.h:236: +#define CONFIG_SYS_NAND_U_BOOT_SIZE (252 * 1024) /* Size of RAM U-Boot image */
WARNING: line over 80 characters #344: FILE: include/configs/gec2410.h:247: +#define CONFIG_SYS_NAND_4_ADDR_CYCLE 1 /* Fourth addr used (>32MB) */
WARNING: line over 80 characters #352: FILE: include/configs/gec2410.h:255: +#define CONFIG_SYS_NAND_ECCSTEPS (CONFIG_SYS_NAND_PAGE_SIZE / CONFIG_SYS_NAND_ECCSIZE)
WARNING: line over 80 characters #356: FILE: include/configs/gec2410.h:259: +#define CONFIG_SYS_NAND_ECCTOTAL (CONFIG_SYS_NAND_ECCBYTES * CONFIG_SYS_NAND_ECCSTEPS)
total: 5 errors, 29 warnings, 275 lines checked
PATCH 03/10 has style problems, please review. If any of these errors are false positives report them to the maintainer, see CHECKPATCH in MAINTAINERS.
Best regards,
Wolfgang Denk
participants (5)
-
Ben Warren -
Hui Tang -
Hui.Tang
-
Minkyu Kang -
Wolfgang Denk