[PATCH] mips: cmd: go: Flush cache before jumping to app/image

It has been noticed on MT7628/88 platforms, that booting the RAM image does not work reliably. Sometimes it works and sometimes not. Debugging showed that this "might" be a cache related issue as very strange errors occurred (e.g. output corrupted etc).
This patch adds a cache flush for the complete SDRAM area to the go cmd before jumping to the entry point for the MIPS architecture. The complete area is flushed as we don't know at this point, how big the area of the "application" really is.
Signed-off-by: Stefan Roese sr@denx.de Cc: Daniel Schwierzeck daniel.schwierzeck@gmail.com Cc: Mauro Condarelli mc5686@mclink.it Cc: Weijie Gao weijie.gao@mediatek.com --- arch/mips/lib/Makefile | 1 + arch/mips/lib/boot.c | 23 +++++++++++++++++++++++ 2 files changed, 24 insertions(+) create mode 100644 arch/mips/lib/boot.c
diff --git a/arch/mips/lib/Makefile b/arch/mips/lib/Makefile index 589bc651f9..24a72d9c97 100644 --- a/arch/mips/lib/Makefile +++ b/arch/mips/lib/Makefile @@ -11,5 +11,6 @@ obj-y += stack.o obj-y += traps.o
obj-$(CONFIG_CMD_BOOTM) += bootm.o +obj-$(CONFIG_CMD_GO) += boot.o
lib-$(CONFIG_USE_PRIVATE_LIBGCC) += ashldi3.o ashrdi3.o lshrdi3.o diff --git a/arch/mips/lib/boot.c b/arch/mips/lib/boot.c new file mode 100644 index 0000000000..6186f72090 --- /dev/null +++ b/arch/mips/lib/boot.c @@ -0,0 +1,23 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2020 Stefan Roese sr@denx.de + */ + +#include <common.h> +#include <command.h> +#include <cpu_func.h> + +DECLARE_GLOBAL_DATA_PTR; + +unsigned long do_go_exec(ulong (*entry)(int, char * const []), + int argc, char * const argv[]) +{ + /* + * Flush cache before jumping to application. Let's flush the + * whole SDRAM area, since we don't know the size of the image + * that was loaded. + */ + flush_cache(gd->bd->bi_memstart, gd->bd->bi_memsize); + + return entry(argc, argv); +}

Tested on VoCore2 board. RAM loading seems to work flawlessly.
Tested-by: Mauro Condarelli mc5686@mclink.it
Regards Mauro
On 2/12/20 3:26 PM, Stefan Roese wrote:
It has been noticed on MT7628/88 platforms, that booting the RAM image does not work reliably. Sometimes it works and sometimes not. Debugging showed that this "might" be a cache related issue as very strange errors occurred (e.g. output corrupted etc).
This patch adds a cache flush for the complete SDRAM area to the go cmd before jumping to the entry point for the MIPS architecture. The complete area is flushed as we don't know at this point, how big the area of the "application" really is.
Signed-off-by: Stefan Roese sr@denx.de Cc: Daniel Schwierzeck daniel.schwierzeck@gmail.com Cc: Mauro Condarelli mc5686@mclink.it Cc: Weijie Gao weijie.gao@mediatek.com
arch/mips/lib/Makefile | 1 + arch/mips/lib/boot.c | 23 +++++++++++++++++++++++ 2 files changed, 24 insertions(+) create mode 100644 arch/mips/lib/boot.c
diff --git a/arch/mips/lib/Makefile b/arch/mips/lib/Makefile index 589bc651f9..24a72d9c97 100644 --- a/arch/mips/lib/Makefile +++ b/arch/mips/lib/Makefile @@ -11,5 +11,6 @@ obj-y += stack.o obj-y += traps.o
obj-$(CONFIG_CMD_BOOTM) += bootm.o +obj-$(CONFIG_CMD_GO) += boot.o
lib-$(CONFIG_USE_PRIVATE_LIBGCC) += ashldi3.o ashrdi3.o lshrdi3.o diff --git a/arch/mips/lib/boot.c b/arch/mips/lib/boot.c new file mode 100644 index 0000000000..6186f72090 --- /dev/null +++ b/arch/mips/lib/boot.c @@ -0,0 +1,23 @@ +// SPDX-License-Identifier: GPL-2.0+ +/*
- Copyright (C) 2020 Stefan Roese sr@denx.de
- */
+#include <common.h> +#include <command.h> +#include <cpu_func.h>
+DECLARE_GLOBAL_DATA_PTR;
+unsigned long do_go_exec(ulong (*entry)(int, char * const []),
int argc, char * const argv[])
+{
- /*
* Flush cache before jumping to application. Let's flush the
* whole SDRAM area, since we don't know the size of the image
* that was loaded.
*/
- flush_cache(gd->bd->bi_memstart, gd->bd->bi_memsize);
- return entry(argc, argv);
+}

On Wed, Feb 12, 2020 at 3:26 PM Stefan Roese sr@denx.de wrote:
It has been noticed on MT7628/88 platforms, that booting the RAM image does not work reliably. Sometimes it works and sometimes not. Debugging showed that this "might" be a cache related issue as very strange errors occurred (e.g. output corrupted etc).
This patch adds a cache flush for the complete SDRAM area to the go cmd before jumping to the entry point for the MIPS architecture. The complete area is flushed as we don't know at this point, how big the area of the "application" really is.
Signed-off-by: Stefan Roese sr@denx.de Cc: Daniel Schwierzeck daniel.schwierzeck@gmail.com Cc: Mauro Condarelli mc5686@mclink.it Cc: Weijie Gao weijie.gao@mediatek.com
arch/mips/lib/Makefile | 1 + arch/mips/lib/boot.c | 23 +++++++++++++++++++++++ 2 files changed, 24 insertions(+) create mode 100644 arch/mips/lib/boot.c
diff --git a/arch/mips/lib/Makefile b/arch/mips/lib/Makefile index 589bc651f9..24a72d9c97 100644 --- a/arch/mips/lib/Makefile +++ b/arch/mips/lib/Makefile @@ -11,5 +11,6 @@ obj-y += stack.o obj-y += traps.o
obj-$(CONFIG_CMD_BOOTM) += bootm.o +obj-$(CONFIG_CMD_GO) += boot.o
lib-$(CONFIG_USE_PRIVATE_LIBGCC) += ashldi3.o ashrdi3.o lshrdi3.o diff --git a/arch/mips/lib/boot.c b/arch/mips/lib/boot.c new file mode 100644 index 0000000000..6186f72090 --- /dev/null +++ b/arch/mips/lib/boot.c @@ -0,0 +1,23 @@ +// SPDX-License-Identifier: GPL-2.0+ +/*
- Copyright (C) 2020 Stefan Roese sr@denx.de
- */
+#include <common.h> +#include <command.h> +#include <cpu_func.h>
+DECLARE_GLOBAL_DATA_PTR;
+unsigned long do_go_exec(ulong (*entry)(int, char * const []),
int argc, char * const argv[])
+{
/*
* Flush cache before jumping to application. Let's flush the
* whole SDRAM area, since we don't know the size of the image
* that was loaded.
*/
flush_cache(gd->bd->bi_memstart, gd->bd->bi_memsize);
please replace gd->bd->bi_memsize with gd->ram_top. One reason is described in
https://patchwork.ozlabs.org/patch/677363/
This also covers MIPS platforms with 64 Bit or multiple or non-linear memory mappings. Thanks.
Otherwise:
Reviewed-by: Daniel Schwierzeck daniel.schwierzeck@gmail.com
return entry(argc, argv);
+}
2.25.0
participants (3)
-
Daniel Schwierzeck
-
Mauro Condarelli
-
Stefan Roese