[U-Boot] [PATCH 1/5] armv8: ls1088a: The ls1088a platform supports the I2C driver model.
DM_I2C_COMPAT is a compatibility layer that allows using the non-DM I2C API when DM_I2C is used.When DM_I2C_COMPAT is not enabled for compilation, a compilation error will be generated. This patch solves the problem that the i2c-related api of the ls1088a platform does not support dm.
Signed-off-by: Chuanhua Han chuanhua.han@nxp.com --- depends on: - http://patchwork.ozlabs.org/project/uboot/list/?series=110856 - http://patchwork.ozlabs.org/project/uboot/list/?series=109459
arch/arm/cpu/armv8/fsl-layerscape/Kconfig | 4 - board/freescale/ls1088a/ls1088a.c | 148 ++++++++++++++++++++++ include/configs/ls1088a_common.h | 3 - include/configs/ls1088ardb.h | 2 - 4 files changed, 148 insertions(+), 9 deletions(-)
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig index f3eaab960b..f0527e9aeb 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig +++ b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig @@ -154,10 +154,6 @@ config ARCH_LS1088A select ARCH_EARLY_INIT_R select BOARD_EARLY_INIT_F select SYS_I2C_MXC - select SYS_I2C_MXC_I2C1 - select SYS_I2C_MXC_I2C2 - select SYS_I2C_MXC_I2C3 - select SYS_I2C_MXC_I2C4 imply SCSI imply PANIC_HANG
diff --git a/board/freescale/ls1088a/ls1088a.c b/board/freescale/ls1088a/ls1088a.c index 6d11a134dc..2bac0708af 100644 --- a/board/freescale/ls1088a/ls1088a.c +++ b/board/freescale/ls1088a/ls1088a.c @@ -373,7 +373,15 @@ int select_i2c_ch_pca9547(u8 ch) { int ret;
+#ifndef CONFIG_DM_I2C ret = i2c_write(I2C_MUX_PCA_ADDR_PRI, 0, 1, &ch, 1); +#else + struct udevice *dev; + + ret = i2c_get_chip_for_busnum(0, I2C_MUX_PCA_ADDR_PRI, 1, &dev); + if (!ret) + ret = dm_i2c_write(dev, 0, &ch, 1); +#endif if (ret) { puts("PCA: failed to select proper channel\n"); return ret; @@ -392,38 +400,89 @@ void board_retimer_init(void)
/* Access to Control/Shared register */ reg = 0x0; +#ifndef CONFIG_DM_I2C i2c_write(I2C_RETIMER_ADDR, 0xff, 1, ®, 1); +#else + struct udevice *dev; + + i2c_get_chip_for_busnum(0, I2C_RETIMER_ADDR, 1, &dev); + dm_i2c_write(dev, 0xff, ®, 1); +#endif
/* Read device revision and ID */ +#ifndef CONFIG_DM_I2C i2c_read(I2C_RETIMER_ADDR, 1, 1, ®, 1); +#else + dm_i2c_read(dev, 1, ®, 1); +#endif debug("Retimer version id = 0x%x\n", reg);
/* Enable Broadcast. All writes target all channel register sets */ reg = 0x0c; +#ifndef CONFIG_DM_I2C i2c_write(I2C_RETIMER_ADDR, 0xff, 1, ®, 1); +#else + dm_i2c_write(dev, 0xff, ®, 1); +#endif
/* Reset Channel Registers */ +#ifndef CONFIG_DM_I2C i2c_read(I2C_RETIMER_ADDR, 0, 1, ®, 1); +#else + dm_i2c_read(dev, 0, ®, 1); +#endif reg |= 0x4; +#ifndef CONFIG_DM_I2C i2c_write(I2C_RETIMER_ADDR, 0, 1, ®, 1); +#else + dm_i2c_write(dev, 0, ®, 1); +#endif
/* Set data rate as 10.3125 Gbps */ reg = 0x90; +#ifndef CONFIG_DM_I2C i2c_write(I2C_RETIMER_ADDR, 0x60, 1, ®, 1); +#else + dm_i2c_write(dev, 0x60, ®, 1); +#endif reg = 0xb3; +#ifndef CONFIG_DM_I2C i2c_write(I2C_RETIMER_ADDR, 0x61, 1, ®, 1); +#else + dm_i2c_write(dev, 0x61, ®, 1); +#endif reg = 0x90; +#ifndef CONFIG_DM_I2C i2c_write(I2C_RETIMER_ADDR, 0x62, 1, ®, 1); +#else + dm_i2c_write(dev, 0x62, ®, 1); +#endif reg = 0xb3; +#ifndef CONFIG_DM_I2C i2c_write(I2C_RETIMER_ADDR, 0x63, 1, ®, 1); +#else + dm_i2c_write(dev, 0x63, ®, 1); +#endif reg = 0xcd; +#ifndef CONFIG_DM_I2C i2c_write(I2C_RETIMER_ADDR, 0x64, 1, ®, 1); +#else + dm_i2c_write(dev, 0x64, ®, 1); +#endif
/* Select VCO Divider to full rate (000) */ +#ifndef CONFIG_DM_I2C i2c_read(I2C_RETIMER_ADDR, 0x2F, 1, ®, 1); +#else + dm_i2c_read(dev, 0x2F, ®, 1); +#endif reg &= 0x0f; reg |= 0x70; +#ifndef CONFIG_DM_I2C i2c_write(I2C_RETIMER_ADDR, 0x2F, 1, ®, 1); +#else + dm_i2c_write(dev, 0x2F, ®, 1); +#endif
#ifdef CONFIG_TARGET_LS1088AQDS /* Retimer is connected to I2C1_CH5 */ @@ -431,38 +490,88 @@ void board_retimer_init(void)
/* Access to Control/Shared register */ reg = 0x0; +#ifndef CONFIG_DM_I2C i2c_write(I2C_RETIMER_ADDR2, 0xff, 1, ®, 1); +#else + i2c_get_chip_for_busnum(0, I2C_RETIMER_ADDR2, 1, &dev); + dm_i2c_write(dev, 0xff, ®, 1); +#endif
/* Read device revision and ID */ +#ifndef CONFIG_DM_I2C i2c_read(I2C_RETIMER_ADDR2, 1, 1, ®, 1); +#else + dm_i2c_read(dev, 1, ®, 1); +#endif debug("Retimer version id = 0x%x\n", reg);
/* Enable Broadcast. All writes target all channel register sets */ reg = 0x0c; +#ifndef CONFIG_DM_I2C i2c_write(I2C_RETIMER_ADDR2, 0xff, 1, ®, 1); +#else + dm_i2c_write(dev, 0xff, ®, 1); +#endif
/* Reset Channel Registers */ +#ifndef CONFIG_DM_I2C i2c_read(I2C_RETIMER_ADDR2, 0, 1, ®, 1); +#else + dm_i2c_read(dev, 0, ®, 1); +#endif reg |= 0x4; +#ifndef CONFIG_DM_I2C i2c_write(I2C_RETIMER_ADDR2, 0, 1, ®, 1); +#else + dm_i2c_write(dev, 0, ®, 1); +#endif
/* Set data rate as 10.3125 Gbps */ reg = 0x90; +#ifndef CONFIG_DM_I2C i2c_write(I2C_RETIMER_ADDR2, 0x60, 1, ®, 1); +#else + dm_i2c_write(dev, 0x60, ®, 1); +#endif reg = 0xb3; +#ifndef CONFIG_DM_I2C i2c_write(I2C_RETIMER_ADDR2, 0x61, 1, ®, 1); +#else + dm_i2c_write(dev, 0x61, ®, 1); +#endif reg = 0x90; +#ifndef CONFIG_DM_I2C i2c_write(I2C_RETIMER_ADDR2, 0x62, 1, ®, 1); +#else + dm_i2c_write(dev, 0x62, ®, 1); +#endif reg = 0xb3; +#ifndef CONFIG_DM_I2C i2c_write(I2C_RETIMER_ADDR2, 0x63, 1, ®, 1); +#else + dm_i2c_write(dev, 0x63, ®, 1); +#endif reg = 0xcd; +#ifndef CONFIG_DM_I2C i2c_write(I2C_RETIMER_ADDR2, 0x64, 1, ®, 1); +#else + dm_i2c_write(dev, 0x64, ®, 1); +#endif
/* Select VCO Divider to full rate (000) */ +#ifndef CONFIG_DM_I2C i2c_read(I2C_RETIMER_ADDR2, 0x2F, 1, ®, 1); +#else + dm_i2c_read(dev, 0x2F, ®, 1); +#endif reg &= 0x0f; reg |= 0x70; +#ifndef CONFIG_DM_I2C i2c_write(I2C_RETIMER_ADDR2, 0x2F, 1, ®, 1); +#else + dm_i2c_write(dev, 0x2F, ®, 1); +#endif + #endif /*return the default channel*/ select_i2c_ch_pca9547(I2C_MUX_CH_DEFAULT); @@ -499,16 +608,30 @@ int get_serdes_volt(void) u8 chan = PWM_CHANNEL0;
/* Select the PAGE 0 using PMBus commands PAGE for VDD */ +#ifndef CONFIG_DM_I2C ret = i2c_write(I2C_SVDD_MONITOR_ADDR, PMBUS_CMD_PAGE, 1, &chan, 1); +#else + struct udevice *dev; + + ret = i2c_get_chip_for_busnum(0, I2C_SVDD_MONITOR_ADDR, 1, &dev); + if (!ret) + ret = dm_i2c_write(dev, PMBUS_CMD_PAGE, + &chan, 1); +#endif + if (ret) { printf("VID: failed to select VDD Page 0\n"); return ret; }
/* Read the output voltage using PMBus command READ_VOUT */ +#ifndef CONFIG_DM_I2C ret = i2c_read(I2C_SVDD_MONITOR_ADDR, PMBUS_CMD_READ_VOUT, 1, (void *)&vcode, 2); +#else + dm_i2c_read(dev, PMBUS_CMD_READ_VOUT, (void *)&vcode, 2); +#endif if (ret) { printf("VID: failed to read the volatge\n"); return ret; @@ -524,8 +647,17 @@ int set_serdes_volt(int svdd) svdd & 0xFF, (svdd & 0xFF00) >> 8};
/* Write the desired voltage code to the SVDD regulator */ +#ifndef CONFIG_DM_I2C ret = i2c_write(I2C_SVDD_MONITOR_ADDR, PMBUS_CMD_PAGE_PLUS_WRITE, 1, (void *)&buff, 5); +#else + struct udevice *dev; + + ret = i2c_get_chip_for_busnum(0, I2C_SVDD_MONITOR_ADDR, 1, &dev); + if (!ret) + ret = dm_i2c_write(dev, PMBUS_CMD_PAGE_PLUS_WRITE, + (void *)&buff, 5); +#endif if (ret) { printf("VID: I2C failed to write to the volatge regulator\n"); return -1; @@ -556,8 +688,18 @@ int set_serdes_volt(int svdd) printf("SVDD changing of RDB\n");
/* Read the BRDCFG54 via CLPD */ +#ifndef CONFIG_DM_I2C ret = i2c_read(CONFIG_SYS_I2C_FPGA_ADDR, QIXIS_BRDCFG4_OFFSET, 1, (void *)&brdcfg4, 1); +#else + struct udevice *dev; + + ret = i2c_get_chip_for_busnum(0, CONFIG_SYS_I2C_FPGA_ADDR, 1, &dev); + if (!ret) + ret = dm_i2c_read(dev, QIXIS_BRDCFG4_OFFSET, + (void *)&brdcfg4, 1); +#endif + if (ret) { printf("VID: I2C failed to read the CPLD BRDCFG4\n"); return -1; @@ -566,8 +708,14 @@ int set_serdes_volt(int svdd) brdcfg4 = brdcfg4 | 0x08;
/* Write to the BRDCFG4 */ +#ifndef CONFIG_DM_I2C ret = i2c_write(CONFIG_SYS_I2C_FPGA_ADDR, QIXIS_BRDCFG4_OFFSET, 1, (void *)&brdcfg4, 1); +#else + ret = dm_i2c_write(dev, QIXIS_BRDCFG4_OFFSET, + (void *)&brdcfg4, 1); +#endif + if (ret) { debug("VID: I2C failed to set the SVDD CPLD BRDCFG4\n"); return -1; diff --git a/include/configs/ls1088a_common.h b/include/configs/ls1088a_common.h index e8e1dc2d92..53e0b4b368 100644 --- a/include/configs/ls1088a_common.h +++ b/include/configs/ls1088a_common.h @@ -66,9 +66,6 @@ /* Size of malloc() pool */ #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 2048 * 1024)
-/* I2C */ -#define CONFIG_SYS_I2C - /* Serial Port */ #define CONFIG_SYS_NS16550_SERIAL #define CONFIG_SYS_NS16550_REG_SIZE 1 diff --git a/include/configs/ls1088ardb.h b/include/configs/ls1088ardb.h index 322adb530a..b71f70426c 100644 --- a/include/configs/ls1088ardb.h +++ b/include/configs/ls1088ardb.h @@ -269,9 +269,7 @@ * RTC configuration */ #define RTC -#define CONFIG_RTC_PCF8563 1 #define CONFIG_SYS_I2C_RTC_ADDR 0x51 /* Channel 3*/ -#define CONFIG_CMD_DATE #endif
/* EEPROM */
As no gpio.h is defined for this architecture, to avoid compilation failure, do not include <asm/arch/gpio.h> for arch ls1088a.
Signed-off-by: Chuanhua Han chuanhua.han@nxp.com --- depends on: - http://patchwork.ozlabs.org/project/uboot/list/?series=110856 - http://patchwork.ozlabs.org/project/uboot/list/?series=109459
arch/arm/include/asm/gpio.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/include/asm/gpio.h b/arch/arm/include/asm/gpio.h index f78b976e10..0ca15c9749 100644 --- a/arch/arm/include/asm/gpio.h +++ b/arch/arm/include/asm/gpio.h @@ -1,7 +1,7 @@ #if !defined(CONFIG_ARCH_UNIPHIER) && !defined(CONFIG_ARCH_STI) && \ !defined(CONFIG_ARCH_K3) && !defined(CONFIG_ARCH_BCM6858) && \ !defined(CONFIG_ARCH_BCM63158) && !defined(CONFIG_ARCH_ROCKCHIP) && \ - !defined(CONFIG_ARCH_LX2160A) + !defined(CONFIG_ARCH_LX2160A) && !defined(CONFIG_ARCH_LS1088A) #include <asm/arch/gpio.h> #endif #include <asm-generic/gpio.h>
-----Original Message----- From: Chuanhua Han chuanhua.han@nxp.com Sent: Tuesday, June 11, 2019 9:55 AM To: albert.u.boot@aribaud.net; Prabhakar Kushwaha prabhakar.kushwaha@nxp.com; Ashish Kumar ashish.kumar@nxp.com; Rajesh Bhagat rajesh.bhagat@nxp.com Cc: u-boot@lists.denx.de; Chuanhua Han chuanhua.han@nxp.com Subject: [PATCH 2/5] gpio: do not include <asm/arch/gpio.h> on ARCH_LS1088A
As no gpio.h is defined for this architecture, to avoid compilation failure, do not include <asm/arch/gpio.h> for arch ls1088a.
Signed-off-by: Chuanhua Han chuanhua.han@nxp.com
depends on:
This patch has been applied to fsl-qoriq master, awaiting upstream.
--pk
Enable related configs to support pcf2127 rtc DM feature for ls1088ardb board.
Signed-off-by: Chuanhua Han chuanhua.han@nxp.com --- depends on: - http://patchwork.ozlabs.org/project/uboot/list/?series=110856 - http://patchwork.ozlabs.org/project/uboot/list/?series=109459
configs/ls1088ardb_tfa_SECURE_BOOT_defconfig | 8 +++++++- configs/ls1088ardb_tfa_defconfig | 8 +++++++- 2 files changed, 14 insertions(+), 2 deletions(-)
diff --git a/configs/ls1088ardb_tfa_SECURE_BOOT_defconfig b/configs/ls1088ardb_tfa_SECURE_BOOT_defconfig index 3c4437dffa..364fc5904f 100644 --- a/configs/ls1088ardb_tfa_SECURE_BOOT_defconfig +++ b/configs/ls1088ardb_tfa_SECURE_BOOT_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_TARGET_LS1088ARDB=y +CONFIG_SYS_MALLOC_F_LEN=0x6000 CONFIG_SYS_TEXT_BASE=0x82000000 CONFIG_SECURE_BOOT=y CONFIG_QSPI_AHB_INIT=y @@ -9,7 +10,6 @@ CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT=y CONFIG_SEC_FIRMWARE_ARMV8_PSCI=y CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y -# CONFIG_SYS_MALLOC_F is not set CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y @@ -63,3 +63,9 @@ CONFIG_RSA=y CONFIG_SPL_RSA=y CONFIG_RSA_SOFTWARE_EXP=y CONFIG_EFI_LOADER_BOUNCE_BUFFER=y +CONFIG_DM_I2C=y +CONFIG_DM_RTC=y +CONFIG_DM_GPIO=y +CONFIG_RTC_PCF2127=y +CONFIG_I2C_MUX=y +CONFIG_I2C_MUX_PCA954x=y diff --git a/configs/ls1088ardb_tfa_defconfig b/configs/ls1088ardb_tfa_defconfig index 8cea8c7a24..eb35782f3a 100644 --- a/configs/ls1088ardb_tfa_defconfig +++ b/configs/ls1088ardb_tfa_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_TARGET_LS1088ARDB=y +CONFIG_SYS_MALLOC_F_LEN=0x6000 CONFIG_SYS_TEXT_BASE=0x82000000 CONFIG_QSPI_AHB_INIT=y CONFIG_TFABOOT=y @@ -8,7 +9,6 @@ CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT=y CONFIG_SEC_FIRMWARE_ARMV8_PSCI=y CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y -# CONFIG_SYS_MALLOC_F is not set CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y @@ -61,3 +61,9 @@ CONFIG_USB_XHCI_DWC3=y CONFIG_USB_DWC3=y CONFIG_USB_GADGET=y CONFIG_EFI_LOADER_BOUNCE_BUFFER=y +CONFIG_DM_I2C=y +CONFIG_DM_RTC=y +CONFIG_DM_GPIO=y +CONFIG_RTC_PCF2127=y +CONFIG_I2C_MUX=y +CONFIG_I2C_MUX_PCA954x=y
One ls1088a, there is four I2C controllers. This patch is to add I2C node for ls1088a.
Signed-off-by: Chuanhua Han chuanhua.han@nxp.com --- depends on: - http://patchwork.ozlabs.org/project/uboot/list/?series=110856 - http://patchwork.ozlabs.org/project/uboot/list/?series=109459
arch/arm/dts/fsl-ls1088a.dtsi | 32 ++++++++++++++++++++++++++++++++ 1 file changed, 32 insertions(+)
diff --git a/arch/arm/dts/fsl-ls1088a.dtsi b/arch/arm/dts/fsl-ls1088a.dtsi index 7c705858fd..4be1ab87d2 100644 --- a/arch/arm/dts/fsl-ls1088a.dtsi +++ b/arch/arm/dts/fsl-ls1088a.dtsi @@ -34,6 +34,38 @@ <1 10 0x8>; /* Hypervisor PPI, active-low */ };
+ i2c0: i2c@2000000 { + compatible = "fsl,vf610-i2c"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x0 0x2000000 0x0 0x10000>; + interrupts = <0 34 4>; + }; + + i2c1: i2c@2010000 { + compatible = "fsl,vf610-i2c"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x0 0x2010000 0x0 0x10000>; + interrupts = <0 34 4>; + }; + + i2c2: i2c@2020000 { + compatible = "fsl,vf610-i2c"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x0 0x2020000 0x0 0x10000>; + interrupts = <0 35 4>; + }; + + i2c3: i2c@2030000 { + compatible = "fsl,vf610-i2c"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x0 0x2030000 0x0 0x10000>; + interrupts = <0 35 4>; + }; + serial0: serial@21c0500 { device_type = "serial"; compatible = "fsl,ns16550", "ns16550a";
-----Original Message----- From: Chuanhua Han chuanhua.han@nxp.com Sent: Tuesday, June 11, 2019 9:55 AM To: albert.u.boot@aribaud.net; Prabhakar Kushwaha prabhakar.kushwaha@nxp.com; Ashish Kumar ashish.kumar@nxp.com; Rajesh Bhagat rajesh.bhagat@nxp.com Cc: u-boot@lists.denx.de; Chuanhua Han chuanhua.han@nxp.com Subject: [PATCH 4/5] armv8: dts: fsl-ls1088a: add I2C node support
One ls1088a, there is four I2C controllers. This patch is to add I2C node for ls1088a.
Signed-off-by: Chuanhua Han chuanhua.han@nxp.com
depends on:
This patch has been applied to fsl-qoriq master, awaiting upstream.
--pk
This patch adds some slave nodes to support the i2c dm on the device side under the i2c0 controller.
Signed-off-by: Chuanhua Han chuanhua.han@nxp.com --- depends on: - http://patchwork.ozlabs.org/project/uboot/list/?series=110856 - http://patchwork.ozlabs.org/project/uboot/list/?series=109459
arch/arm/dts/fsl-ls1088a-rdb.dts | 40 ++++++++++++++++++++++++++++++++ 1 file changed, 40 insertions(+)
diff --git a/arch/arm/dts/fsl-ls1088a-rdb.dts b/arch/arm/dts/fsl-ls1088a-rdb.dts index 765d1e3d74..c09f79c3c9 100644 --- a/arch/arm/dts/fsl-ls1088a-rdb.dts +++ b/arch/arm/dts/fsl-ls1088a-rdb.dts @@ -17,6 +17,46 @@ }; };
+&i2c0 { + status = "okay"; + u-boot,dm-pre-reloc; + + i2c-mux@77 { + compatible = "nxp,pca9547"; + reg = <0x77>; + #address-cells = <1>; + #size-cells = <0>; + + i2c@2 { + #address-cells = <1>; + #size-cells = <0>; + reg = <0x2>; + + ina220@40 { + compatible = "ti,ina220"; + reg = <0x40>; + shunt-resistor = <1000>; + }; + }; + + i2c@3 { + #address-cells = <1>; + #size-cells = <0>; + reg = <0x3>; + + temp-sensor@4c { + compatible = "adi,adt7461a"; + reg = <0x4c>; + }; + + rtc@51 { + compatible = "pcf2127-rtc"; + reg = <0x51>; + }; + }; + }; +}; + &qspi { bus-num = <0>; status = "okay";
participants (2)
-
Chuanhua Han -
Prabhakar Kushwaha