[U-Boot] [PATCH 1/3] powerpc/85xx: Update setting of SRIO LIODNs
Properly set the LIODN values associated with SRIO controller. On P4080/P3060 we have an LIODN per port and one for the RMU. On P2041/P3041/P5020 we have 2 LIODNs per port.
Update the tables for all of these devices to properly handle both styles.
Signed-off-by: Kumar Gala galak@kernel.crashing.org --- arch/powerpc/cpu/mpc85xx/liodn.c | 18 ++++++++++++++++++ arch/powerpc/cpu/mpc85xx/p2041_ids.c | 6 ++++++ arch/powerpc/cpu/mpc85xx/p3041_ids.c | 6 ++++++ arch/powerpc/cpu/mpc85xx/p3060_ids.c | 10 +++++++--- arch/powerpc/cpu/mpc85xx/p4080_ids.c | 10 +++++++--- arch/powerpc/cpu/mpc85xx/p5020_ids.c | 6 ++++++ arch/powerpc/include/asm/fsl_liodn.h | 22 ++++++++++++++++++++++ 7 files changed, 72 insertions(+), 6 deletions(-)
diff --git a/arch/powerpc/cpu/mpc85xx/liodn.c b/arch/powerpc/cpu/mpc85xx/liodn.c index e0ea502..e14de9d 100644 --- a/arch/powerpc/cpu/mpc85xx/liodn.c +++ b/arch/powerpc/cpu/mpc85xx/liodn.c @@ -40,6 +40,21 @@ int get_dpaa_liodn(enum fsl_dpaa_dev dpaa_dev, u32 *liodns, int liodn_offset) return liodn_bases[dpaa_dev].num_ids; }
+static void set_srio_liodn(struct srio_liodn_id_table *tbl, int size) +{ + int i; + + for (i = 0; i < size; i++) { + unsigned long reg_off = tbl[i].reg_offset[0]; + out_be32((u32 *)reg_off, tbl[i].id[0]); + + if (tbl[i].num_ids == 2) { + reg_off = tbl[i].reg_offset[1]; + out_be32((u32 *)reg_off, tbl[i].id[1]); + } + } +} + static void set_liodn(struct liodn_id_table *tbl, int size) { int i; @@ -138,6 +153,9 @@ void set_liodns(void) /* setup general liodn offsets */ set_liodn(liodn_tbl, liodn_tbl_sz);
+ /* setup SRIO port liodns */ + set_srio_liodn(srio_liodn_tbl, srio_liodn_tbl_sz); + /* setup SEC block liodn bases & offsets if we have one */ if (IS_E_PROCESSOR(get_svr())) { set_liodn(sec_liodn_tbl, sec_liodn_tbl_sz); diff --git a/arch/powerpc/cpu/mpc85xx/p2041_ids.c b/arch/powerpc/cpu/mpc85xx/p2041_ids.c index 8d25496..8d7c354 100644 --- a/arch/powerpc/cpu/mpc85xx/p2041_ids.c +++ b/arch/powerpc/cpu/mpc85xx/p2041_ids.c @@ -40,6 +40,12 @@ struct qportal_info qp_info[CONFIG_SYS_QMAN_NUM_PORTALS] = { }; #endif
+struct srio_liodn_id_table srio_liodn_tbl[] = { + SET_SRIO_LIODN_2(1, 199, 200), + SET_SRIO_LIODN_2(2, 201, 202), +}; +int srio_liodn_tbl_sz = ARRAY_SIZE(srio_liodn_tbl); + struct liodn_id_table liodn_tbl[] = { #ifdef CONFIG_SYS_DPAA_QBMAN SET_QMAN_LIODN(31), diff --git a/arch/powerpc/cpu/mpc85xx/p3041_ids.c b/arch/powerpc/cpu/mpc85xx/p3041_ids.c index 96f3272..7ce9fc4 100644 --- a/arch/powerpc/cpu/mpc85xx/p3041_ids.c +++ b/arch/powerpc/cpu/mpc85xx/p3041_ids.c @@ -40,6 +40,12 @@ struct qportal_info qp_info[CONFIG_SYS_QMAN_NUM_PORTALS] = { }; #endif
+struct srio_liodn_id_table srio_liodn_tbl[] = { + SET_SRIO_LIODN_2(1, 199, 200), + SET_SRIO_LIODN_2(2, 201, 202), +}; +int srio_liodn_tbl_sz = ARRAY_SIZE(srio_liodn_tbl); + struct liodn_id_table liodn_tbl[] = { #ifdef CONFIG_SYS_DPAA_QBMAN SET_QMAN_LIODN(31), diff --git a/arch/powerpc/cpu/mpc85xx/p3060_ids.c b/arch/powerpc/cpu/mpc85xx/p3060_ids.c index 07703d4..d32142f 100644 --- a/arch/powerpc/cpu/mpc85xx/p3060_ids.c +++ b/arch/powerpc/cpu/mpc85xx/p3060_ids.c @@ -40,6 +40,12 @@ struct qportal_info qp_info[CONFIG_SYS_QMAN_NUM_PORTALS] = { }; #endif
+struct srio_liodn_id_table srio_liodn_tbl[] = { + SET_SRIO_LIODN_1(1, 198), + SET_SRIO_LIODN_1(2, 199), +}; +int srio_liodn_tbl_sz = ARRAY_SIZE(srio_liodn_tbl); + struct liodn_id_table liodn_tbl[] = { SET_USB_LIODN(1, "fsl-usb2-mph", 127), SET_USB_LIODN(2, "fsl-usb2-dr", 157), @@ -50,9 +56,7 @@ struct liodn_id_table liodn_tbl[] = { SET_DMA_LIODN(1, 196), SET_DMA_LIODN(2, 197),
- SET_GUTS_LIODN("fsl,rapidio-delta", 198, rio1liodnr, 0), - SET_GUTS_LIODN(NULL, 199, rio2liodnr, 0), - SET_GUTS_LIODN(NULL, 200, rmuliodnr, 0), + SET_GUTS_LIODN("fsl,srio-rmu", 200, rmuliodnr, 0xd3000),
#ifdef CONFIG_SYS_DPAA_QBMAN SET_QMAN_LIODN(31), diff --git a/arch/powerpc/cpu/mpc85xx/p4080_ids.c b/arch/powerpc/cpu/mpc85xx/p4080_ids.c index 560c02a..a6ea6af 100644 --- a/arch/powerpc/cpu/mpc85xx/p4080_ids.c +++ b/arch/powerpc/cpu/mpc85xx/p4080_ids.c @@ -40,6 +40,12 @@ struct qportal_info qp_info[CONFIG_SYS_QMAN_NUM_PORTALS] = { }; #endif
+struct srio_liodn_id_table srio_liodn_tbl[] = { + SET_SRIO_LIODN_1(1, 198), + SET_SRIO_LIODN_1(2, 199), +}; +int srio_liodn_tbl_sz = ARRAY_SIZE(srio_liodn_tbl); + struct liodn_id_table liodn_tbl[] = { SET_USB_LIODN(1, "fsl-usb2-mph", 127), SET_USB_LIODN(2, "fsl-usb2-dr", 157), @@ -53,9 +59,7 @@ struct liodn_id_table liodn_tbl[] = { SET_DMA_LIODN(1, 196), SET_DMA_LIODN(2, 197),
- SET_GUTS_LIODN("fsl,rapidio-delta", 198, rio1liodnr, 0), - SET_GUTS_LIODN(NULL, 199, rio2liodnr, 0), - SET_GUTS_LIODN(NULL, 200, rmuliodnr, 0), + SET_GUTS_LIODN("fsl,srio-rmu", 200, rmuliodnr, 0xd3000),
#ifdef CONFIG_SYS_DPAA_QBMAN SET_QMAN_LIODN(31), diff --git a/arch/powerpc/cpu/mpc85xx/p5020_ids.c b/arch/powerpc/cpu/mpc85xx/p5020_ids.c index 4254dd5..65d8775 100644 --- a/arch/powerpc/cpu/mpc85xx/p5020_ids.c +++ b/arch/powerpc/cpu/mpc85xx/p5020_ids.c @@ -40,6 +40,12 @@ struct qportal_info qp_info[CONFIG_SYS_QMAN_NUM_PORTALS] = { }; #endif
+struct srio_liodn_id_table srio_liodn_tbl[] = { + SET_SRIO_LIODN_2(1, 199, 200), + SET_SRIO_LIODN_2(2, 201, 202), +}; +int srio_liodn_tbl_sz = ARRAY_SIZE(srio_liodn_tbl); + struct liodn_id_table liodn_tbl[] = { #ifdef CONFIG_SYS_DPAA_QBMAN SET_QMAN_LIODN(31), diff --git a/arch/powerpc/include/asm/fsl_liodn.h b/arch/powerpc/include/asm/fsl_liodn.h index 9ad104e..c65f763 100644 --- a/arch/powerpc/include/asm/fsl_liodn.h +++ b/arch/powerpc/include/asm/fsl_liodn.h @@ -25,6 +25,26 @@
#include <asm/types.h>
+struct srio_liodn_id_table { + u32 id[2]; + unsigned long reg_offset[2]; + u8 num_ids; + u8 portid; +}; +#define SET_SRIO_LIODN_1(port, idA) \ + { .id = { idA }, .num_ids = 1, .portid = port, \ + .reg_offset[0] = offsetof(ccsr_gur_t, rio##port##liodnr) \ + + CONFIG_SYS_MPC85xx_GUTS_OFFSET + CONFIG_SYS_CCSRBAR, \ + } + +#define SET_SRIO_LIODN_2(port, idA, idB) \ + { .id = { idA, idB }, .num_ids = 2, .portid = port, \ + .reg_offset[0] = offsetof(ccsr_gur_t, rio##port##liodnr) \ + + CONFIG_SYS_MPC85xx_GUTS_OFFSET + CONFIG_SYS_CCSRBAR, \ + .reg_offset[1] = offsetof(ccsr_gur_t, rio##port##maintliodnr) \ + + CONFIG_SYS_MPC85xx_GUTS_OFFSET + CONFIG_SYS_CCSRBAR, \ + } + struct liodn_id_table { const char * compat; u32 id[2]; @@ -158,7 +178,9 @@ extern void fdt_fixup_liodn(void *blob); extern struct liodn_id_table liodn_tbl[], liodn_bases[], sec_liodn_tbl[]; extern struct liodn_id_table raide_liodn_tbl[]; extern struct liodn_id_table fman1_liodn_tbl[], fman2_liodn_tbl[]; +extern struct srio_liodn_id_table srio_liodn_tbl[]; extern int liodn_tbl_sz, sec_liodn_tbl_sz, raide_liodn_tbl_sz; extern int fman1_liodn_tbl_sz, fman2_liodn_tbl_sz; +extern int srio_liodn_tbl_sz;
#endif
Update device tree handling for SRIO controller to support updated fsl,srio device tree binding.
We handle disabling of individual ports, the whole controller, RMU, and RMAN. Additionally, we setup the SRIO related LIODNs in the device tree.
Signed-off-by: Kumar Gala galak@kernel.crashing.org --- arch/powerpc/cpu/mpc85xx/liodn.c | 31 ++++++++++++++++ arch/powerpc/cpu/mpc8xxx/fdt.c | 72 ++++++++++++++++++++++++++++++++----- 2 files changed, 93 insertions(+), 10 deletions(-)
diff --git a/arch/powerpc/cpu/mpc85xx/liodn.c b/arch/powerpc/cpu/mpc85xx/liodn.c index e14de9d..8df9f8e 100644 --- a/arch/powerpc/cpu/mpc85xx/liodn.c +++ b/arch/powerpc/cpu/mpc85xx/liodn.c @@ -184,6 +184,35 @@ void set_liodns(void) #endif }
+static void fdt_fixup_srio_liodn(void *blob, struct srio_liodn_id_table *tbl) +{ + int i, srio_off; + + /* search for srio node, if doesn't exist just return - nothing todo */ + srio_off = fdt_node_offset_by_compatible(blob, -1, "fsl,srio"); + if (srio_off < 0) + return ; + + for (i = 0; i < srio_liodn_tbl_sz; i++) { + int off, portid = tbl[i].portid; + + off = fdt_node_offset_by_prop_value(blob, srio_off, + "cell-index", &portid, 4); + if (off >= 0) { + off = fdt_setprop(blob, off, "fsl,liodn", + &tbl[i].id[0], + sizeof(u32) * tbl[i].num_ids); + if (off > 0) + printf("WARNING unable to set fsl,liodn for " + "fsl,srio port %d: %s\n", + portid, fdt_strerror(off)); + } else { + debug("WARNING: couldn't set fsl,liodn for srio: %s.\n", + fdt_strerror(off)); + } + } +} + static void fdt_fixup_liodn_tbl(void *blob, struct liodn_id_table *tbl, int sz) { int i; @@ -213,6 +242,8 @@ static void fdt_fixup_liodn_tbl(void *blob, struct liodn_id_table *tbl, int sz)
void fdt_fixup_liodn(void *blob) { + fdt_fixup_srio_liodn(blob, srio_liodn_tbl); + fdt_fixup_liodn_tbl(blob, liodn_tbl, liodn_tbl_sz); #ifdef CONFIG_SYS_DPAA_FMAN fdt_fixup_liodn_tbl(blob, fman1_liodn_tbl, fman1_liodn_tbl_sz); diff --git a/arch/powerpc/cpu/mpc8xxx/fdt.c b/arch/powerpc/cpu/mpc8xxx/fdt.c index 5bb9f53..112c603 100644 --- a/arch/powerpc/cpu/mpc8xxx/fdt.c +++ b/arch/powerpc/cpu/mpc8xxx/fdt.c @@ -275,21 +275,73 @@ int fdt_fixup_phy_connection(void *blob, int offset, phy_interface_t phyc) }
#ifdef CONFIG_SYS_SRIO +static inline void ft_disable_srio_port(void *blob, int srio_off, int port) +{ + int off = fdt_node_offset_by_prop_value(blob, srio_off, + "cell-index", &port, 4); + if (off >= 0) { + off = fdt_setprop_string(blob, off, "status", "disabled"); + if (off > 0) + printf("WARNING unable to set status for fsl,srio " + "port %d: %s\n", port, fdt_strerror(off)); + } +} + +static inline void ft_disable_rman(void *blob) +{ + int off = fdt_node_offset_by_compatible(blob, -1, "fsl,rman"); + if (off >= 0) { + off = fdt_setprop_string(blob, off, "status", "disabled"); + if (off > 0) + printf("WARNING unable to set status for fsl,rman %s\n", + fdt_strerror(off)); + } +} + +static inline void ft_disable_rmu(void *blob) +{ + int off = fdt_node_offset_by_compatible(blob, -1, "fsl,srio-rmu"); + if (off >= 0) { + off = fdt_setprop_string(blob, off, "status", "disabled"); + if (off > 0) + printf("WARNING unable to set status for " + "fsl,srio-rmu %s\n", fdt_strerror(off)); + } +} + void ft_srio_setup(void *blob) { + int srio1_used = 0, srio2_used = 0; + int srio_off; + + /* search for srio node, if doesn't exist just return - nothing todo */ + srio_off = fdt_node_offset_by_compatible(blob, -1, "fsl,srio"); + if (srio_off < 0) + return ; + #ifdef CONFIG_SRIO1 - if (!is_serdes_configured(SRIO1)) { - fdt_del_node_and_alias(blob, "rio0"); - } -#else - fdt_del_node_and_alias(blob, "rio0"); + if (is_serdes_configured(SRIO1)) + srio1_used = 1; #endif #ifdef CONFIG_SRIO2 - if (!is_serdes_configured(SRIO2)) { - fdt_del_node_and_alias(blob, "rio1"); - } -#else - fdt_del_node_and_alias(blob, "rio1"); + if (is_serdes_configured(SRIO2)) + srio2_used = 1; #endif + + /* mark port1 disabled */ + if (!srio1_used) + ft_disable_srio_port(blob, srio_off, 1); + + /* mark port2 disabled */ + if (!srio2_used) + ft_disable_srio_port(blob, srio_off, 2); + + /* if both ports not used, disable controller, rmu and rman */ + if (!srio1_used && !srio2_used) { + fdt_setprop_string(blob, srio_off, "status", "disabled"); + + ft_disable_rman(blob); + ft_disable_rmu(blob); + } } #endif
From: Minghuan Lian Minghuan.Lian@freescale.com
This patch is intended to initialize RMan LIODN related registers on P2041, P304S and P5020 SocS. It also adds the "rman@0" child node to qman-portal nodes, adds "fsl,liodn" property to RMan inbound block nodes.
Signed-off-by: Minghuan Lian Minghuan.Lian@freescale.com Signed-off-by: Kumar Gala galak@kernel.crashing.org --- arch/powerpc/cpu/mpc85xx/liodn.c | 39 ++++++++++++++++++++++++++++++++ arch/powerpc/cpu/mpc85xx/p2041_ids.c | 14 +++++++++++ arch/powerpc/cpu/mpc85xx/p3041_ids.c | 14 +++++++++++ arch/powerpc/cpu/mpc85xx/p5020_ids.c | 14 +++++++++++ arch/powerpc/cpu/mpc85xx/portals.c | 6 +++++ arch/powerpc/include/asm/fsl_liodn.h | 8 ++++++ arch/powerpc/include/asm/fsl_portals.h | 4 +++ arch/powerpc/include/asm/immap_85xx.h | 13 ++++++++++ include/configs/P2041RDB.h | 1 + include/configs/P3041DS.h | 1 + include/configs/P5020DS.h | 1 + 11 files changed, 115 insertions(+), 0 deletions(-)
diff --git a/arch/powerpc/cpu/mpc85xx/liodn.c b/arch/powerpc/cpu/mpc85xx/liodn.c index 8df9f8e..11881c9 100644 --- a/arch/powerpc/cpu/mpc85xx/liodn.c +++ b/arch/powerpc/cpu/mpc85xx/liodn.c @@ -148,6 +148,34 @@ static void setup_raide_liodn_base(void) } #endif
+#ifdef CONFIG_SYS_DPAA_RMAN +static void set_rman_liodn(struct liodn_id_table *tbl, int size) +{ + int i; + struct ccsr_rman *rman = (void *)CONFIG_SYS_FSL_CORENET_RMAN_ADDR; + + for (i = 0; i < size; i++) { + /* write the RMan block number */ + out_be32(&rman->mmitar, i); + /* write the liodn offset corresponding to the block */ + out_be32((u32 *)(tbl[i].reg_offset), tbl[i].id[0]); + } +} + +static void setup_rman_liodn_base(struct liodn_id_table *tbl, int size) +{ + int i; + struct ccsr_rman *rman = (void *)CONFIG_SYS_FSL_CORENET_RMAN_ADDR; + u32 base = liodn_bases[FSL_HW_PORTAL_RMAN].id[0]; + + out_be32(&rman->mmliodnbr, base); + + /* update liodn offset */ + for (i = 0; i < size; i++) + tbl[i].id[0] += base; +} +#endif + void set_liodns(void) { /* setup general liodn offsets */ @@ -182,6 +210,13 @@ void set_liodns(void) set_liodn(raide_liodn_tbl, raide_liodn_tbl_sz); setup_raide_liodn_base(); #endif + +#ifdef CONFIG_SYS_DPAA_RMAN + /* setup RMan liodn offsets */ + set_rman_liodn(rman_liodn_tbl, rman_liodn_tbl_sz); + /* setup RMan liodn base */ + setup_rman_liodn_base(rman_liodn_tbl, rman_liodn_tbl_sz); +#endif }
static void fdt_fixup_srio_liodn(void *blob, struct srio_liodn_id_table *tbl) @@ -256,4 +291,8 @@ void fdt_fixup_liodn(void *blob) #ifdef CONFIG_SYS_FSL_RAID_ENGINE fdt_fixup_liodn_tbl(blob, raide_liodn_tbl, raide_liodn_tbl_sz); #endif + +#ifdef CONFIG_SYS_DPAA_RMAN + fdt_fixup_liodn_tbl(blob, rman_liodn_tbl, rman_liodn_tbl_sz); +#endif } diff --git a/arch/powerpc/cpu/mpc85xx/p2041_ids.c b/arch/powerpc/cpu/mpc85xx/p2041_ids.c index 8d7c354..b99b54d 100644 --- a/arch/powerpc/cpu/mpc85xx/p2041_ids.c +++ b/arch/powerpc/cpu/mpc85xx/p2041_ids.c @@ -104,6 +104,17 @@ struct liodn_id_table sec_liodn_tbl[] = { }; int sec_liodn_tbl_sz = ARRAY_SIZE(sec_liodn_tbl);
+#ifdef CONFIG_SYS_DPAA_RMAN +struct liodn_id_table rman_liodn_tbl[] = { + /* Set RMan block 0-3 liodn offset */ + SET_RMAN_LIODN(0, 6), + SET_RMAN_LIODN(1, 7), + SET_RMAN_LIODN(2, 8), + SET_RMAN_LIODN(3, 9), +}; +int rman_liodn_tbl_sz = ARRAY_SIZE(rman_liodn_tbl); +#endif + struct liodn_id_table liodn_bases[] = { [FSL_HW_PORTAL_SEC] = SET_LIODN_BASE_2(64, 100), #ifdef CONFIG_SYS_DPAA_FMAN @@ -112,4 +123,7 @@ struct liodn_id_table liodn_bases[] = { #ifdef CONFIG_SYS_DPAA_PME [FSL_HW_PORTAL_PME] = SET_LIODN_BASE_2(136, 172), #endif +#ifdef CONFIG_SYS_DPAA_RMAN + [FSL_HW_PORTAL_RMAN] = SET_LIODN_BASE_1(80), +#endif }; diff --git a/arch/powerpc/cpu/mpc85xx/p3041_ids.c b/arch/powerpc/cpu/mpc85xx/p3041_ids.c index 7ce9fc4..c50b442 100644 --- a/arch/powerpc/cpu/mpc85xx/p3041_ids.c +++ b/arch/powerpc/cpu/mpc85xx/p3041_ids.c @@ -103,6 +103,17 @@ struct liodn_id_table sec_liodn_tbl[] = { }; int sec_liodn_tbl_sz = ARRAY_SIZE(sec_liodn_tbl);
+#ifdef CONFIG_SYS_DPAA_RMAN +struct liodn_id_table rman_liodn_tbl[] = { + /* Set RMan block 0-3 liodn offset */ + SET_RMAN_LIODN(0, 6), + SET_RMAN_LIODN(1, 7), + SET_RMAN_LIODN(2, 8), + SET_RMAN_LIODN(3, 9), +}; +int rman_liodn_tbl_sz = ARRAY_SIZE(rman_liodn_tbl); +#endif + struct liodn_id_table liodn_bases[] = { [FSL_HW_PORTAL_SEC] = SET_LIODN_BASE_2(64, 100), #ifdef CONFIG_SYS_DPAA_FMAN @@ -111,4 +122,7 @@ struct liodn_id_table liodn_bases[] = { #ifdef CONFIG_SYS_DPAA_PME [FSL_HW_PORTAL_PME] = SET_LIODN_BASE_2(136, 172), #endif +#ifdef CONFIG_SYS_DPAA_RMAN + [FSL_HW_PORTAL_RMAN] = SET_LIODN_BASE_1(80), +#endif }; diff --git a/arch/powerpc/cpu/mpc85xx/p5020_ids.c b/arch/powerpc/cpu/mpc85xx/p5020_ids.c index 65d8775..ff57a19 100644 --- a/arch/powerpc/cpu/mpc85xx/p5020_ids.c +++ b/arch/powerpc/cpu/mpc85xx/p5020_ids.c @@ -113,6 +113,17 @@ struct liodn_id_table raide_liodn_tbl[] = { int raide_liodn_tbl_sz = ARRAY_SIZE(raide_liodn_tbl); #endif
+#ifdef CONFIG_SYS_DPAA_RMAN +struct liodn_id_table rman_liodn_tbl[] = { + /* Set RMan block 0-3 liodn offset */ + SET_RMAN_LIODN(0, 6), + SET_RMAN_LIODN(1, 7), + SET_RMAN_LIODN(2, 8), + SET_RMAN_LIODN(3, 9), +}; +int rman_liodn_tbl_sz = ARRAY_SIZE(rman_liodn_tbl); +#endif + struct liodn_id_table liodn_bases[] = { [FSL_HW_PORTAL_SEC] = SET_LIODN_BASE_2(64, 100), #ifdef CONFIG_SYS_DPAA_FMAN @@ -124,4 +135,7 @@ struct liodn_id_table liodn_bases[] = { #ifdef CONFIG_SYS_FSL_RAID_ENGINE [FSL_HW_PORTAL_RAID_ENGINE] = SET_LIODN_BASE_1(47), #endif +#ifdef CONFIG_SYS_DPAA_RMAN + [FSL_HW_PORTAL_RMAN] = SET_LIODN_BASE_1(80), +#endif }; diff --git a/arch/powerpc/cpu/mpc85xx/portals.c b/arch/powerpc/cpu/mpc85xx/portals.c index 418dd9d..6199633 100644 --- a/arch/powerpc/cpu/mpc85xx/portals.c +++ b/arch/powerpc/cpu/mpc85xx/portals.c @@ -245,6 +245,12 @@ void fdt_fixup_qportals(void *blob) goto err; } #endif +#ifdef CONFIG_SYS_DPAA_RMAN + err = fdt_qportal(blob, off, i, "rman@0", + FSL_HW_PORTAL_RMAN, 1); + if (err < 0) + goto err; +#endif
err: if (err < 0) { diff --git a/arch/powerpc/include/asm/fsl_liodn.h b/arch/powerpc/include/asm/fsl_liodn.h index c65f763..a9973b8 100644 --- a/arch/powerpc/include/asm/fsl_liodn.h +++ b/arch/powerpc/include/asm/fsl_liodn.h @@ -175,12 +175,20 @@ extern void fdt_fixup_liodn(void *blob); offsetof(struct ccsr_raide, jq[jqNum].ring[rNum].cfg0) + \ CONFIG_SYS_FSL_RAID_ENGINE_OFFSET)
+#define SET_RMAN_LIODN(ibNum, liodn) \ + SET_LIODN_ENTRY_1("fsl,rman-inbound-block", liodn, \ + offsetof(struct ccsr_rman, mmitdr) + \ + CONFIG_SYS_FSL_CORENET_RMAN_OFFSET, \ + CONFIG_SYS_FSL_CORENET_RMAN_OFFSET + ibNum * 0x1000) + extern struct liodn_id_table liodn_tbl[], liodn_bases[], sec_liodn_tbl[]; extern struct liodn_id_table raide_liodn_tbl[]; extern struct liodn_id_table fman1_liodn_tbl[], fman2_liodn_tbl[]; extern struct srio_liodn_id_table srio_liodn_tbl[]; +extern struct liodn_id_table rman_liodn_tbl[]; extern int liodn_tbl_sz, sec_liodn_tbl_sz, raide_liodn_tbl_sz; extern int fman1_liodn_tbl_sz, fman2_liodn_tbl_sz; extern int srio_liodn_tbl_sz; +extern int rman_liodn_tbl_sz;
#endif diff --git a/arch/powerpc/include/asm/fsl_portals.h b/arch/powerpc/include/asm/fsl_portals.h index 8c3ea0b..5644044 100644 --- a/arch/powerpc/include/asm/fsl_portals.h +++ b/arch/powerpc/include/asm/fsl_portals.h @@ -38,6 +38,10 @@ enum fsl_dpaa_dev { #ifdef CONFIG_SYS_FSL_RAID_ENGINE FSL_HW_PORTAL_RAID_ENGINE, #endif +#ifdef CONFIG_SYS_DPAA_RMAN + FSL_HW_PORTAL_RMAN, +#endif + };
struct qportal_info { diff --git a/arch/powerpc/include/asm/immap_85xx.h b/arch/powerpc/include/asm/immap_85xx.h index 9a5e38f..d294761 100644 --- a/arch/powerpc/include/asm/immap_85xx.h +++ b/arch/powerpc/include/asm/immap_85xx.h @@ -2350,6 +2350,16 @@ struct ccsr_raide { }; #endif
+#ifdef CONFIG_SYS_DPAA_RMAN +struct ccsr_rman { + u8 res0[0xf64]; + u32 mmliodnbr; /* Message Manager LIODN Base Register */ + u32 mmitar; /* RMAN Inbound Translation Address Register */ + u32 mmitdr; /* RMAN Inbound Translation Data Register */ + u8 res4[0x1f090]; +}; +#endif + #ifdef CONFIG_SECURE_BOOT typedef struct ccsr_sfp_regs { u8 reserved0[0x40]; @@ -2398,6 +2408,7 @@ typedef struct ccsr_snvs_regs { #define CONFIG_SYS_MPC85xx_ESDHC_OFFSET 0x114000 #define CONFIG_SYS_MPC85xx_LBC_OFFSET 0x124000 #define CONFIG_SYS_MPC85xx_GPIO_OFFSET 0x130000 +#define CONFIG_SYS_FSL_CORENET_RMAN_OFFSET 0x1e0000 #define CONFIG_SYS_MPC85xx_PCIE1_OFFSET 0x200000 #define CONFIG_SYS_MPC85xx_PCIE2_OFFSET 0x201000 #define CONFIG_SYS_MPC85xx_PCIE3_OFFSET 0x202000 @@ -2489,6 +2500,8 @@ typedef struct ccsr_snvs_regs { (CONFIG_SYS_IMMR + CONFIG_SYS_FSL_CORENET_PME_OFFSET) #define CONFIG_SYS_FSL_RAID_ENGINE_ADDR \ (CONFIG_SYS_IMMR + CONFIG_SYS_FSL_RAID_ENGINE_OFFSET) +#define CONFIG_SYS_FSL_CORENET_RMAN_ADDR \ + (CONFIG_SYS_IMMR + CONFIG_SYS_FSL_CORENET_RMAN_OFFSET) #define CONFIG_SYS_MPC85xx_GUTS_ADDR \ (CONFIG_SYS_IMMR + CONFIG_SYS_MPC85xx_GUTS_OFFSET) #define CONFIG_SYS_FSL_CORENET_CCM_ADDR \ diff --git a/include/configs/P2041RDB.h b/include/configs/P2041RDB.h index c7f0761..a2b50e6 100644 --- a/include/configs/P2041RDB.h +++ b/include/configs/P2041RDB.h @@ -66,6 +66,7 @@ #define CONFIG_SYS_SRIO #define CONFIG_SRIO1 /* SRIO port 1 */ #define CONFIG_SRIO2 /* SRIO port 2 */ +#define CONFIG_SYS_DPAA_RMAN /* RMan */
#define CONFIG_FSL_LAW /* Use common FSL init code */
diff --git a/include/configs/P3041DS.h b/include/configs/P3041DS.h index e4d1fe5..57d5de5 100644 --- a/include/configs/P3041DS.h +++ b/include/configs/P3041DS.h @@ -35,6 +35,7 @@ #define CONFIG_FSL_SATA_V2 #define CONFIG_PCIE3 #define CONFIG_PCIE4 +#define CONFIG_SYS_DPAA_RMAN
#define CONFIG_ICS307_REFCLK_HZ 25000000 /* ICS307 ref clk freq */
diff --git a/include/configs/P5020DS.h b/include/configs/P5020DS.h index 618d1a4..a9cee23 100644 --- a/include/configs/P5020DS.h +++ b/include/configs/P5020DS.h @@ -36,6 +36,7 @@ #define CONFIG_PCIE3 #define CONFIG_PCIE4 #define CONFIG_SYS_FSL_RAID_ENGINE +#define CONFIG_SYS_DPAA_RMAN
#define CONFIG_ICS307_REFCLK_HZ 25000000 /* ICS307 ref clk freq */
On Oct 14, 2011, at 12:07 AM, Kumar Gala wrote:
From: Minghuan Lian Minghuan.Lian@freescale.com
This patch is intended to initialize RMan LIODN related registers on P2041, P304S and P5020 SocS. It also adds the "rman@0" child node to qman-portal nodes, adds "fsl,liodn" property to RMan inbound block nodes.
Signed-off-by: Minghuan Lian Minghuan.Lian@freescale.com Signed-off-by: Kumar Gala galak@kernel.crashing.org
arch/powerpc/cpu/mpc85xx/liodn.c | 39 ++++++++++++++++++++++++++++++++ arch/powerpc/cpu/mpc85xx/p2041_ids.c | 14 +++++++++++ arch/powerpc/cpu/mpc85xx/p3041_ids.c | 14 +++++++++++ arch/powerpc/cpu/mpc85xx/p5020_ids.c | 14 +++++++++++ arch/powerpc/cpu/mpc85xx/portals.c | 6 +++++ arch/powerpc/include/asm/fsl_liodn.h | 8 ++++++ arch/powerpc/include/asm/fsl_portals.h | 4 +++ arch/powerpc/include/asm/immap_85xx.h | 13 ++++++++++ include/configs/P2041RDB.h | 1 + include/configs/P3041DS.h | 1 + include/configs/P5020DS.h | 1 + 11 files changed, 115 insertions(+), 0 deletions(-)
applied to 85xx
- k
On Oct 14, 2011, at 12:07 AM, Kumar Gala wrote:
Update device tree handling for SRIO controller to support updated fsl,srio device tree binding.
We handle disabling of individual ports, the whole controller, RMU, and RMAN. Additionally, we setup the SRIO related LIODNs in the device tree.
Signed-off-by: Kumar Gala galak@kernel.crashing.org
arch/powerpc/cpu/mpc85xx/liodn.c | 31 ++++++++++++++++ arch/powerpc/cpu/mpc8xxx/fdt.c | 72 ++++++++++++++++++++++++++++++++----- 2 files changed, 93 insertions(+), 10 deletions(-)
applied to 85xx
- k
On Oct 14, 2011, at 12:07 AM, Kumar Gala wrote:
Properly set the LIODN values associated with SRIO controller. On P4080/P3060 we have an LIODN per port and one for the RMU. On P2041/P3041/P5020 we have 2 LIODNs per port.
Update the tables for all of these devices to properly handle both styles.
Signed-off-by: Kumar Gala galak@kernel.crashing.org
arch/powerpc/cpu/mpc85xx/liodn.c | 18 ++++++++++++++++++ arch/powerpc/cpu/mpc85xx/p2041_ids.c | 6 ++++++ arch/powerpc/cpu/mpc85xx/p3041_ids.c | 6 ++++++ arch/powerpc/cpu/mpc85xx/p3060_ids.c | 10 +++++++--- arch/powerpc/cpu/mpc85xx/p4080_ids.c | 10 +++++++--- arch/powerpc/cpu/mpc85xx/p5020_ids.c | 6 ++++++ arch/powerpc/include/asm/fsl_liodn.h | 22 ++++++++++++++++++++++ 7 files changed, 72 insertions(+), 6 deletions(-)
applied to 85xx
- k
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Kumar Gala