[U-Boot] [PATCH 00/15] i386 Modifications and new board (eNET)
The following patch series follows from a previous set of preliminary i386 patches (see http://lists.denx.de/pipermail/u-boot/2008-November/043681.html)
This set of patches adds supports for the board I am developing with (eNET) and makes a few changes to the arrangement of the i386 code in U-Boot. These changes are intended to provide better hooks for cpu and board specific functionality. This patch series includes support for the SC520 MMCR reset functionality which was implied by the configuration options but never implemented.
A couple of minor tidy-ups have been performed (moved ali512x.h to a more logical location, changed the configuration settings to CONFIG_SYS_ for example). This patch set, however, is not a full scale style cleanup. There may be places where non-conforming style has been used - For the time being, I am focusing on getting code into the right place. A more complete coding style cleanup will follow.
Regards,
Graeme
Signed-off-by: Graeme Russ graeme.russ@gmail.com --- MAKEALL | 1 + Makefile | 3 + board/eNET/Makefile | 57 ++++++++++ board/eNET/config.mk | 24 +++++ board/eNET/eNET.c | 167 ++++++++++++++++++++++++++++++ board/eNET/eNET_start.S | 50 +++++++++ board/eNET/eNET_start16.S | 90 ++++++++++++++++ board/eNET/hardware.h | 35 +++++++ board/eNET/u-boot.lds | 90 ++++++++++++++++ include/configs/eNET.h | 249 +++++++++++++++++++++++++++++++++++++++++++++ 10 files changed, 766 insertions(+), 0 deletions(-) create mode 100644 board/eNET/Makefile create mode 100644 board/eNET/config.mk create mode 100644 board/eNET/eNET.c create mode 100644 board/eNET/eNET_start.S create mode 100644 board/eNET/eNET_start16.S create mode 100644 board/eNET/hardware.h create mode 100644 board/eNET/u-boot.lds create mode 100644 include/configs/eNET.h
diff --git a/MAKEALL b/MAKEALL index dbed268..ee0697a 100755 --- a/MAKEALL +++ b/MAKEALL @@ -647,6 +647,7 @@ LIST_mips_el=" \
LIST_I486=" \ sc520_cdp \ + sc520_eNET \ sc520_spunk \ sc520_spunk_rel \ " diff --git a/Makefile b/Makefile index fd521b6..abdb0fd 100644 --- a/Makefile +++ b/Makefile @@ -2909,6 +2909,9 @@ smdk6400_config : unconfig sc520_cdp_config : unconfig @$(MKCONFIG) $(@:_config=) i386 i386 sc520_cdp
+eNET_config : unconfig + @$(MKCONFIG) $(@:_config=) i386 i386 eNET + sc520_spunk_config : unconfig @$(MKCONFIG) $(@:_config=) i386 i386 sc520_spunk
diff --git a/board/eNET/Makefile b/board/eNET/Makefile new file mode 100644 index 0000000..6a892e9 --- /dev/null +++ b/board/eNET/Makefile @@ -0,0 +1,57 @@ +# +# (C) Copyright 2008 +# Graeme Russ, graeme.russ@gmail.com. +# +# (C) Copyright 2006 +# Wolfgang Denk, DENX Software Engineering, wd@denx.de. +# +# (C) Copyright 2002 +# Daniel Engström, Omicron Ceti AB, daniel@omicron.se. +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +include $(TOPDIR)/config.mk + +LIB = $(obj)lib$(BOARD).a + +COBJS := eNET.o +SOBJS := eNET_start16.o eNET_start.o + +SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS)) +SOBJS := $(addprefix $(obj),$(SOBJS)) + +$(LIB): $(obj).depend $(OBJS) $(SOBJS) + $(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS) + +clean: + rm -f $(SOBJS) $(OBJS) + +distclean: clean + rm -f $(LIB) core *.bak $(obj).depend + +######################################################################### + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +######################################################################### diff --git a/board/eNET/config.mk b/board/eNET/config.mk new file mode 100644 index 0000000..de8eb89 --- /dev/null +++ b/board/eNET/config.mk @@ -0,0 +1,24 @@ +# +# (C) Copyright 2002 +# Daniel Engström, Omicron Ceti AB, daniel@omicron.se. +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +TEXT_BASE = 0x38040000 diff --git a/board/eNET/eNET.c b/board/eNET/eNET.c new file mode 100644 index 0000000..57dd635 --- /dev/null +++ b/board/eNET/eNET.c @@ -0,0 +1,167 @@ +/* + * (C) Copyright 2008 + * Graeme Russ, graeme.russ@gmail.com. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <asm/io.h> +#include <asm/ic/sc520.h> + +#ifdef CONFIG_HW_WATCHDOG +#include <watchdog.h> +#endif + +#include "hardware.h" + +DECLARE_GLOBAL_DATA_PTR; + +#undef SC520_CDP_DEBUG + +#ifdef SC520_CDP_DEBUG +#define PRINTF(fmt,args...) printf (fmt ,##args) +#else +#define PRINTF(fmt,args...) +#endif + +unsigned long monitor_flash_len = CONFIG_SYS_MONITOR_LEN; + +void init_sc520_enet (void) +{ + /* Set CPU Speed to 100MHz */ + write_mmcr_byte(SC520_CPUCTL, 1); + gd->cpu_clk = 100000000; + + /* wait at least one millisecond */ + asm("movl $0x2000,%%ecx\n" + "wait_loop: pushl %%ecx\n" + "popl %%ecx\n" + "loop wait_loop\n": : : "ecx"); + + /* turn on the SDRAM write buffer */ + write_mmcr_byte(SC520_DBCTL, 0x11); + + /* turn on the cache and disable write through */ + asm("movl %%cr0, %%eax\n" + "andl $0x9fffffff, %%eax\n" + "movl %%eax, %%cr0\n" : : : "eax"); +} + +/* + * Miscellaneous platform dependent initializations + */ +int board_init(void) +{ + init_sc520_enet(); + + write_mmcr_byte(SC520_GPCSRT, 0x01); /* GP Chip Select Recovery Time */ + write_mmcr_byte(SC520_GPCSPW, 0x07); /* GP Chip Select Pulse Width */ + write_mmcr_byte(SC520_GPCSOFF, 0x00); /* GP Chip Select Offset */ + write_mmcr_byte(SC520_GPRDW, 0x05); /* GP Read pulse width */ + write_mmcr_byte(SC520_GPRDOFF, 0x01); /* GP Read offset */ + write_mmcr_byte(SC520_GPWRW, 0x05); /* GP Write pulse width */ + write_mmcr_byte(SC520_GPWROFF, 0x01); /* GP Write offset */ + + write_mmcr_word(SC520_PIODATA15_0, 0x0630); /* PIO15_PIO0 Data */ + write_mmcr_word(SC520_PIODATA31_16, 0x2000); /* PIO31_PIO16 Data */ + write_mmcr_word(SC520_PIODIR31_16, 0x2000); /* GPIO Direction */ + write_mmcr_word(SC520_PIODIR15_0, 0x87b5); /* GPIO Direction */ + write_mmcr_word(SC520_PIOPFS31_16, 0x0dfe); /* GPIO pin function 31-16 reg */ + write_mmcr_word(SC520_PIOPFS15_0, 0x200a); /* GPIO pin function 15-0 reg */ + write_mmcr_byte(SC520_CSPFS, 0x00f8); /* Chip Select Pin Function Select */ + + write_mmcr_long(SC520_PAR2, 0x200713f8); /* Uart A (GPCS0, 0x013f8, 8 Bytes) */ + write_mmcr_long(SC520_PAR3, 0x2c0712f8); /* Uart B (GPCS3, 0x012f8, 8 Bytes) */ + write_mmcr_long(SC520_PAR4, 0x300711f8); /* Uart C (GPCS4, 0x011f8, 8 Bytes) */ + write_mmcr_long(SC520_PAR5, 0x340710f8); /* Uart D (GPCS5, 0x010f8, 8 Bytes) */ + write_mmcr_long(SC520_PAR6, 0xe3ffc000); /* SDRAM (0x00000000, 128MB) */ + write_mmcr_long(SC520_PAR7, 0xaa3fd000); /* StrataFlash (ROMCS1, 0x10000000, 16MB) */ + write_mmcr_long(SC520_PAR8, 0xca3fd100); /* StrataFlash (ROMCS2, 0x11000000, 16MB) */ + write_mmcr_long(SC520_PAR9, 0x4203d900); /* SRAM (GPCS0, 0x19000000, 1MB) */ + write_mmcr_long(SC520_PAR10, 0x4e03d910); /* SRAM (GPCS3, 0x19100000, 1MB) */ + write_mmcr_long(SC520_PAR11, 0x50018100); /* DP-RAM (GPCS4, 0x18100000, 4kB) */ + write_mmcr_long(SC520_PAR12, 0x54020000); /* CFLASH1 (0x200000000, 4kB) */ + write_mmcr_long(SC520_PAR13, 0x5c020001); /* CFLASH2 (0x200010000, 4kB) */ +/* write_mmcr_long(SC520_PAR14, 0x8bfff800); */ /* BOOTCS at 0x18000000 */ +/* write_mmcr_long(SC520_PAR15, 0x38201000); */ /* LEDs etc (GPCS6, 0x1000, 20 Bytes */ + + /* Disable Watchdog */ + write_mmcr_word(0x0cb0, 0x3333); + write_mmcr_word(0x0cb0, 0xcccc); + write_mmcr_word(0x0cb0, 0x0000); + + /* Chip Select Configuration */ + write_mmcr_word(SC520_BOOTCSCTL, 0x0033); + write_mmcr_word(SC520_ROMCS1CTL, 0x0615); + write_mmcr_word(SC520_ROMCS2CTL, 0x0615); + + write_mmcr_byte(SC520_ADDDECCTL, 0x02); + write_mmcr_byte(SC520_UART1CTL, 0x07); + write_mmcr_byte(SC520_SYSARBCTL,0x06); + write_mmcr_word(SC520_SYSARBMENB, 0x0003); + + /* Crystal is 33.000MHz */ + gd->bus_clk = 33000000; + + return 0; +} + +int dram_init(void) +{ + init_sc520_dram(); + return 0; +} + +void show_boot_progress(int val) +{ + uchar led_mask; + + led_mask = 0x00; + + if (val < 0) + led_mask |= LED_ERR_BITMASK; + + led_mask |= (uchar)(val & 0x001f); + outb(led_mask, LED_LATCH_ADDRESS); +} + + +int last_stage_init(void) +{ + int minor; + int major; + + major = minor = 0; + + printf("Serck Controls eNET\n"); + + return 0; +} + +ulong board_flash_get_legacy (ulong base, int banknum, flash_info_t * info) +{ + if (banknum == 0) { /* non-CFI boot flash */ + info->portwidth = FLASH_CFI_8BIT; + info->chipwidth = FLASH_CFI_BY8; + info->interface = FLASH_CFI_X8; + return 1; + } else + return 0; +} diff --git a/board/eNET/eNET_start.S b/board/eNET/eNET_start.S new file mode 100644 index 0000000..1b07d62 --- /dev/null +++ b/board/eNET/eNET_start.S @@ -0,0 +1,50 @@ +/* + * (C) Copyright 2008 + * Graeme Russ, graeme.russ@gmail.com. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include "hardware.h" + +/* board early intialization */ +.globl early_board_init +early_board_init: + /* No 32-bit board specific initialisation */ + jmp *%ebp /* return to caller */ + +.globl show_boot_progress_asm +show_boot_progress_asm: + + movb %al, %dl /* Create Working Copy */ + andb $0x80, %dl /* Mask in only Error bit */ + shrb $0x02, %dl /* Shift Error bit to Error LED */ + andb $0x0f, %al /* Mask out 'Error' bit */ + orb %dl, %al /* Mask in ERR LED */ + movw $LED_LATCH_ADDRESS, %dx + outb %al, %dx + jmp *%ebp /* return to caller */ + +.globl cpu_halt_asm +cpu_halt_asm: + movb $0x0f, %al + movw $LED_LATCH_ADDRESS, %dx + outb %al, %dx + hlt + jmp cpu_halt_asm diff --git a/board/eNET/eNET_start16.S b/board/eNET/eNET_start16.S new file mode 100644 index 0000000..48e4d83 --- /dev/null +++ b/board/eNET/eNET_start16.S @@ -0,0 +1,90 @@ +/* + * (C) Copyright 2008 + * Graeme Russ, graeme.russ@gmail.com. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +/* + * 16bit initialization code. + * This code have to map the area of the boot flash + * that is used by U-boot to its final destination. + */ + +/* #include <asm/ic/sc520_defs.h> */ + +#include "hardware.h" + +.text +.section .start16, "ax" +.code16 +.globl board_init16 +board_init16: + /* Alias MMCR to 0xdf000 */ + movw $0xfffc, %dx + movl $0x800df0cb, %eax + outl %eax, %dx + + /* Set ds to point to MMCR alias */ + movw $0xdf00, %ax + movw %ax, %ds + + /* Map PAR for Boot Flash (BOOTCS, 512kB @ 0x380000000) */ + movl $0x00c0, %edi /* SC520_PAR14 */ + movl $0x8bfff800, %eax /* TODO: Check this */ + movl %eax, (%di) + + /* Map PAR for LED, Hex Switches (GPCS6, 20 Bytes @ 0x1000) */ + movl $0x00c4, %edi /* SC520_PAR15 */ + movl $0x38201000, %eax + movl %eax, (%di) + + /* Disable SDRAM write buffer */ + movw $0x0040, %di /* SC520_DBCTL */ + xorw %ax, %ax + movb %al, (%di) + + /* Disabe MMCR alias */ + movw $0xfffc, %dx + movl $0x000000cb, %eax + outl %eax, %dx + + /* the return address is stored in bp */ + jmp *%bp + +.section .bios, "ax" +.code16 +.globl realmode_reset +realmode_reset: + /* Alias MMCR to 0xdf000 */ + movw $0xfffc, %dx + movl $0x800df0cb, %eax + outl %eax, %dx + + /* Set ds to point to MMCR alias */ + movw $0xdf00, %ax + movw %ax, %ds + + /* issue software reset thorugh MMCR */ + movl $0xd72, %edi + movb $0x01, %al + movb %al, (%di) + +1: hlt + jmp 1 diff --git a/board/eNET/hardware.h b/board/eNET/hardware.h new file mode 100644 index 0000000..42474a6 --- /dev/null +++ b/board/eNET/hardware.h @@ -0,0 +1,35 @@ +/* + * (C) Copyright 2008 + * Graeme Russ, graeme.russ@gmail.com. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef HARDWARE_H_ +#define HARDWARE_H_ + +#define LED_LATCH_ADDRESS 0x1002 +#define LED_RUN_BITMASK 0x01 +#define LED_1_BITMASK 0x02 +#define LED_2_BITMASK 0x04 +#define LED_RX_BITMASK 0x08 +#define LED_TX_BITMASK 0x10 +#define LED_ERR_BITMASK 0x20 + +#endif /* HARDWARE_H_ */ diff --git a/board/eNET/u-boot.lds b/board/eNET/u-boot.lds new file mode 100644 index 0000000..2dafbb5 --- /dev/null +++ b/board/eNET/u-boot.lds @@ -0,0 +1,90 @@ +/* + * (C) Copyright 2002 + * Daniel Engström, Omicron Ceti AB, daniel@omicron.se. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +OUTPUT_FORMAT("elf32-i386", "elf32-i386", "elf32-i386") +OUTPUT_ARCH(i386) +ENTRY(_start) + +SECTIONS +{ + . = 0x38040000; /* Location of bootcode in flash */ + .text : { *(.text); } + + . = ALIGN(4); + .rodata : { *(.rodata) *(.rodata.str1.1) *(.rodata.str1.32) } + + _i386boot_text_size = SIZEOF(.text) + SIZEOF(.rodata); + + . = 0x03FF0000; /* Ram data segment to use */ + _i386boot_romdata_dest = ABSOLUTE(.); + .data : AT ( LOADADDR(.rodata) + SIZEOF(.rodata) ) { *(.data) } + _i386boot_romdata_start = LOADADDR(.data); + + . = ALIGN(4); + .got : AT ( LOADADDR(.data) + SIZEOF(.data) ) { *(.got) } + + . = ALIGN(4); + __u_boot_cmd_start = .; + .u_boot_cmd : { *(.u_boot_cmd) } + __u_boot_cmd_end = .; + _i386boot_cmd_start = LOADADDR(.u_boot_cmd); + + _i386boot_romdata_size = SIZEOF(.data) + SIZEOF(.got) + SIZEOF(.u_boot_cmd); + + . = ALIGN(4); + _i386boot_bss_start = ABSOLUTE(.); + .bss (NOLOAD) : { *(.bss) } + _i386boot_bss_size = SIZEOF(.bss); + + /* 16bit realmode trampoline code */ + .realmode 0x7c0 : AT ( LOADADDR(.got) + SIZEOF(.got) + SIZEOF(.u_boot_cmd)) { *(.realmode) } + + _i386boot_realmode = LOADADDR(.realmode); + _i386boot_realmode_size = SIZEOF(.realmode); + + /* 16bit BIOS emulation code (just enough to boot Linux) */ + .bios 0 : AT ( LOADADDR(.realmode) + SIZEOF(.realmode) ) { *(.bios) } + + _i386boot_bios = LOADADDR(.bios); + _i386boot_bios_size = SIZEOF(.bios); + + /* The load addresses below assumes that the flash + * will be mapped so that 0x387f0000 == 0xffff0000 + * at reset time + * + * The fe00 and ff00 offsets of the start32 and start16 + * segments are arbitrary, the just have to be mapped + * at reset and the code have to fit. + * The fff0 offset of reset is important, however. + */ + + . = 0xfffffe00; + .start32 : AT (0x3807fe00) { *(.start32); } + + . = 0xf800; + .start16 : AT (0x3807f800) { *(.start16); } + + . = 0xfff0; + .reset : AT (0x3807fff0) { *(.reset); } + _i386boot_end = (LOADADDR(.reset) + SIZEOF(.reset) ); +} diff --git a/include/configs/eNET.h b/include/configs/eNET.h new file mode 100644 index 0000000..87d2908 --- /dev/null +++ b/include/configs/eNET.h @@ -0,0 +1,249 @@ +/* + * (C) Copyright 2008 + * Graeme Russ, graeme.russ@gmail.com. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +/* + * board/config.h - configuration options, board specific + */ + +#ifndef __CONFIG_H +#define __CONFIG_H + +/* + * Stuff still to be dealt with - + */ +#define CONFIG_RTC_MC146818 + +/* + * High Level Configuration Options + * (easy to change) + */ +#define DEBUG_PARSER + +#define CONFIG_X86 1 /* Intel X86 CPU */ +#define CONFIG_SC520 1 /* AMD SC520 */ +#define CONFIG_SC520_SSI +#define CONFIG_SHOW_BOOT_PROGRESS 1 +#define CONFIG_LAST_STAGE_INIT 1 + +/* + * If CONFIG_HW_WATCHDOG is not defined, the watchdog jumper on the + * bottom (processor) board MUST be removed! + */ +#undef CONFIG_WATCHDOG +#undef CONFIG_HW_WATCHDOG + + /*----------------------------------------------------------------------- + * Video Configuration + */ +#undef CONFIG_VIDEO /* No Video Hardware */ +#undef CONFIG_CFB_CONSOLE + +/* + * Size of malloc() pool + */ +#define CONFIG_MALLOC_SIZE (CONFIG_SYS_ENV_SIZE + 128*1024) + +#define CONFIG_BAUDRATE 9600 + +/*----------------------------------------------------------------------- + * Command line configuration. + */ +#include <config_cmd_default.h> + +#define CONFIG_CMD_AUTOSCRIPT /* Autoscript Support */ +#define CONFIG_CMD_BDI /* bdinfo */ +#define CONFIG_CMD_BOOTD /* bootd */ +#define CONFIG_CMD_CONSOLE /* coninfo */ +#define CONFIG_CMD_ECHO /* echo arguments */ +#define CONFIG_CMD_ENV /* saveenv */ +#define CONFIG_CMD_FLASH /* flinfo, erase, protect */ +#define CONFIG_CMD_FPGA /* FPGA configuration Support */ +#define CONFIG_CMD_IMI /* iminfo */ +#define CONFIG_CMD_IMLS /* List all found images */ +#define CONFIG_CMD_ITEST /* Integer (and string) test */ +#define CONFIG_CMD_LOADB /* loadb */ +#define CONFIG_CMD_LOADS /* loads */ +#define CONFIG_CMD_MEMORY /* md mm nm mw cp cmp crc base loop mtest */ +#define CONFIG_CMD_MISC /* Misc functions like sleep etc*/ +#undef CONFIG_CMD_NET /* bootp, tftpboot, rarpboot */ +#undef CONFIG_CMD_NFS /* NFS support */ +#define CONFIG_CMD_RUN /* run command in env variable */ +#define CONFIG_CMD_SETGETDCR /* DCR support on 4xx */ +#define CONFIG_CMD_XIMG /* Load part of Multi Image */ +#undef CONFIG_CMD_IRQ /* IRQ Information */ + +#define CONFIG_BOOTDELAY 15 +#define CONFIG_BOOTARGS "root=/dev/mtdblock0 console=ttyS0,9600" +/* #define CONFIG_BOOTCOMMAND "bootm 38000000" */ + +#if defined(CONFIG_CMD_KGDB) +#define CONFIG_KGDB_BAUDRATE 115200 /* speed to run kgdb serial port */ +#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ +#endif + +/* + * Miscellaneous configurable options + */ +#define CONFIG_SYS_LONGHELP /* undef to save memory */ +#define CONFIG_SYS_PROMPT "boot > " /* Monitor Command Prompt */ +#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ +#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ + sizeof(CONFIG_SYS_PROMPT) + \ + 16) /* Print Buffer Size */ +#define CONFIG_SYS_MAXARGS 16 /* max number of command args */ +#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */ + +#define CONFIG_SYS_MEMTEST_START 0x00100000 /* memtest works on */ +#define CONFIG_SYS_MEMTEST_END 0x01000000 /* 1 ... 16 MB in DRAM */ + +#undef CONFIG_SYS_CLKS_IN_HZ /* everything, incl board info, in Hz */ + +#define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */ + +#define CONFIG_SYS_HZ 1024 /* incrementer freq: 1kHz */ + + /* valid baudrates */ +#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 } + +/*----------------------------------------------------------------------- + * SDRAM Configuration + */ +#define CONFIG_SYS_SDRAM_DRCTMCTL 0x18 +#define CONFIG_NR_DRAM_BANKS 4 + +/* CONFIG_SYS_SDRAM_DRCTMCTL Overrides the following*/ +#undef CONFIG_SYS_SDRAM_PRECHARGE_DELAY +#undef CONFIG_SYS_SDRAM_REFRESH_RATE +#undef CONFIG_SYS_SDRAM_RAS_CAS_DELAY +#undef CONFIG_SYS_SDRAM_CAS_LATENCY_2T +#undef CONFIG_SYS_SDRAM_CAS_LATENCY_3T + +/*----------------------------------------------------------------------- + * CPU Features + */ +#define CONFIG_SYS_SC520_HIGH_SPEED 0 /* 100 or 133MHz */ +#define CONFIG_SYS_RESET_GENERIC /* use triple-fault to reset cpu */ +#undef CONFIG_SYS_RESET_SC520 /* use SC520 MMCR's to reset cpu */ +#define CONFIG_SYS_TIMER_SC520 /* use SC520 swtimers */ +#undef CONFIG_SYS_TIMER_GENERIC /* use the i8254 PIT timers */ +#undef CONFIG_SYS_TIMER_TSC /* use the Pentium TSC timers */ +#define CONFIG_SYS_USE_SIO_UART 0 /* prefer the uarts on the SIO to those + * in the SC520 on the CDP */ + +/*----------------------------------------------------------------------- + * Memory organization + */ +#define CONFIG_SYS_STACK_SIZE 0x8000 /* Size of bootloader stack */ +#define CONFIG_SYS_BL_START_FLASH 0x38040000 /* Address of relocated code */ +#define CONFIG_SYS_BL_START_RAM 0x03fd0000 /* Address of relocated code */ +#define CONFIG_SYS_MONITOR_BASE TEXT_BASE +#define CONFIG_SYS_MONITOR_LEN (256 * 1024) /* Reserve 256 kB for Mon */ +#define CONFIG_SYS_FLASH_BASE 0x38000000 /* Boot Flash */ +#define CONFIG_SYS_FLASH_BASE_1 0x10000000 /* StrataFlash 1 */ +#define CONFIG_SYS_FLASH_BASE_2 0x11000000 /* StrataFlash 2 */ + +/* timeout values are in ticks */ +#define CONFIG_SYS_FLASH_ERASE_TOUT (2*CONFIG_SYS_HZ) /* Timeout for Flash Erase */ +#define CONFIG_SYS_FLASH_WRITE_TOUT (2*CONFIG_SYS_HZ) /* Timeout for Flash Write */ + +/* allow to overwrite serial and ethaddr */ +#define CONFIG_ENV_OVERWRITE + + /*----------------------------------------------------------------------- + * FLASH configuration + */ +#define CONFIG_FLASH_CFI_DRIVER /* Use the common driver */ +#define CONFIG_FLASH_CFI_LEGACY +#define CONFIG_SYS_FLASH_CFI /* Flash is CFI conformant */ +#define CONFIG_SYS_MAX_FLASH_BANKS 3 /* max number of memory banks */ +#define CONFIG_SYS_FLASH_BANKS_LIST {CONFIG_SYS_FLASH_BASE, \ + CONFIG_SYS_FLASH_BASE_1, \ + CONFIG_SYS_FLASH_BASE_2} +#define CONFIG_SYS_FLASH_EMPTY_INFO +#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE +#define CONFIG_SYS_MAX_FLASH_SECT 128 /* max number of sectors on one chip */ +#define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_8BIT +#define CONFIG_SYS_FLASH_LEGACY_512Kx8 + + /*----------------------------------------------------------------------- + * Environment configuration + */ +#define CONFIG_ENV_IS_IN_FLASH 1 +#define CONFIG_ENV_OFFSET 0x20000 /* Offset of Environment Sector */ +#define CONFIG_ENV_SIZE 0x08000 /* Total Size of Environment Sector */ +#define CONFIG_ENV_SECT_SIZE 0x20000 /* Total Size of Environment Sector */ +#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE_1 + \ + CONFIG_ENV_OFFSET) +#define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + \ + CONFIG_ENV_SECT_SIZE) +#define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SIZE) + + + /*----------------------------------------------------------------------- + * PCI configuration + */ +#undef CONFIG_PCI /* include pci support */ +#undef CONFIG_PCI_PNP /* pci plug-and-play */ +#undef CONFIG_PCI_SCAN_SHOW +#undef CONFIG_SYS_FIRST_PCI_IRQ +#undef CONFIG_SYS_SECOND_PCI_IRQ +#undef CONFIG_SYS_THIRD_PCI_IRQ +#undef CONFIG_SYS_FORTH_PCI_IRQ + +/*----------------------------------------------------------------------- + * Hardware watchdog configuration + */ +#define CONFIG_SYS_WATCHDOG_PIO_BIT 0x8000 +#define CONFIG_SYS_WATCHDIG_PIO_DATA SC520_PIODATA15_0 +#define CONFIG_SYS_WATCHDIG_PIO_CLR SC520_PIOCLR15_0 +#define CONFIG_SYS_WATCHDIG_PIO_SET SC520_PIOSET15_0 + +/*----------------------------------------------------------------------- + * FPGA configuration + */ +#define CONFIG_SYS_FPGA_PROGRAM_PIO_BIT 0x2000 +#define CONFIG_SYS_FPGA_INIT_PIO_BIT 0x4000 +#define CONFIG_SYS_FPGA_DONE_PIO_BIT 0x8000 +#define CONFIG_SYS_FPGA_PIO_DATA SC520_PIODATA31_16 +#define CONFIG_SYS_FPGA_PIO_DIRECTION SC520_PIODIR31_16 +#define CONFIG_SYS_FPGA_PIO_CLR SC520_PIOCLR31_16 +#define CONFIG_SYS_FPGA_PIO_SET SC520_PIOSET31_16 +#define CONFIG_SYS_FPGA_PROGRAM_BIT_DROP_TIME 1 /* milliseconds */ +#define CONFIG_SYS_FPGA_MAX_INIT_TIME 10 /* milliseconds */ +#define CONFIG_SYS_FPGA_MAX_FINALISE_TIME 10 /* milliseconds */ +#define CONFIG_SYS_FPGA_SSI_DATA_RATE 8333 /* kHz (33.3333MHz xtal) */ + +#ifndef __ASSEMBLER__ +extern unsigned long ip; + +#define PRINTIP asm ("call next_line\n" \ + "next_line:\n" \ + "pop %%eax\n" \ + "movl %%eax, %0\n" \ + :"=r"(ip) \ + : /* No Input Registers */ \ + :"%eax"); \ + printf("IP: 0x%08lx (File: %s, Line: %d)\n", ip, __FILE__, __LINE__); + +#endif +#endif /* __CONFIG_H */ -- 1.5.4.3
Brings i386 in line with other CPUs with a reset vector and frees up reset.c for CPU reset functions
Signed-off-by: Graeme Russ graeme.russ@gmail.com --- Makefile | 2 +- board/sc520_cdp/u-boot.lds | 6 +++--- board/sc520_spunk/u-boot.lds | 6 +++--- cpu/i386/Makefile | 2 +- cpu/i386/reset.S | 37 ------------------------------------- cpu/i386/resetvec.S | 37 +++++++++++++++++++++++++++++++++++++ 6 files changed, 45 insertions(+), 45 deletions(-) delete mode 100644 cpu/i386/reset.S create mode 100644 cpu/i386/resetvec.S
diff --git a/Makefile b/Makefile index abdb0fd..8ad23a4 100644 --- a/Makefile +++ b/Makefile @@ -191,7 +191,7 @@ include $(TOPDIR)/config.mk OBJS = cpu/$(CPU)/start.o ifeq ($(CPU),i386) OBJS += cpu/$(CPU)/start16.o -OBJS += cpu/$(CPU)/reset.o +OBJS += cpu/$(CPU)/resetvec.o endif ifeq ($(CPU),ppc4xx) OBJS += cpu/$(CPU)/resetvec.o diff --git a/board/sc520_cdp/u-boot.lds b/board/sc520_cdp/u-boot.lds index 719ecba..0f5011a 100644 --- a/board/sc520_cdp/u-boot.lds +++ b/board/sc520_cdp/u-boot.lds @@ -75,7 +75,7 @@ SECTIONS * The fe00 and ff00 offsets of the start32 and start16 * segments are arbitrary, the just have to be mapped * at reset and the code have to fit. - * The fff0 offset of reset is important, however. + * The fff0 offset of resetvec is important, however. */
@@ -86,6 +86,6 @@ SECTIONS .start16 : AT (0x387fff00) { *(.start16); }
. = 0xfff0; - .reset : AT (0x387ffff0) { *(.reset); } - _i386boot_end = (LOADADDR(.reset) + SIZEOF(.reset) ); + .resetvec : AT (0x387ffff0) { *(.resetvec); } + _i386boot_end = (LOADADDR(.resetvec) + SIZEOF(.resetvec) ); } diff --git a/board/sc520_spunk/u-boot.lds b/board/sc520_spunk/u-boot.lds index 4d6603c..d2436bc 100644 --- a/board/sc520_spunk/u-boot.lds +++ b/board/sc520_spunk/u-boot.lds @@ -76,7 +76,7 @@ SECTIONS * The fe00 and ff00 offsets of the start32 and start16 * segments are arbitrary, the just have to be mapped * at reset and the code have to fit. - * The fff0 offset of reset is important, however. + * The fff0 offset of resetvec is important, however. */
@@ -87,6 +87,6 @@ SECTIONS .start16 : AT (0x387fff00) { *(.start16); }
. = 0xfff0; - .reset : AT (0x387ffff0) { *(.reset); } - _i386boot_end = (LOADADDR(.reset) + SIZEOF(.reset) ); + .resetvec : AT (0x387ffff0) { *(.resetvec); } + _i386boot_end = (LOADADDR(.resetvec) + SIZEOF(.resetvec) ); } diff --git a/cpu/i386/Makefile b/cpu/i386/Makefile index 50534b6..f20675a 100644 --- a/cpu/i386/Makefile +++ b/cpu/i386/Makefile @@ -28,7 +28,7 @@ include $(TOPDIR)/config.mk
LIB = $(obj)lib$(CPU).a
-START = start.o start16.o reset.o +START = start.o start16.o resetvec.o COBJS = serial.o interrupts.o cpu.o timer.o sc520.o SOBJS = sc520_asm.o
diff --git a/cpu/i386/reset.S b/cpu/i386/reset.S deleted file mode 100644 index 07a7384..0000000 --- a/cpu/i386/reset.S +++ /dev/null @@ -1,37 +0,0 @@ -/* - * U-boot - i386 Startup Code - * - * Copyright (c) 2002 Omicron Ceti AB, Daniel Engström denaiel@omicron.se - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -/* Reset vector, jumps to start16.S */ - -.extern start16 - -.section .reset, "ax" -.code16 -reset_vector: - cli - cld - jmp start16 - - .org 0xf - nop diff --git a/cpu/i386/resetvec.S b/cpu/i386/resetvec.S new file mode 100644 index 0000000..d9222dd --- /dev/null +++ b/cpu/i386/resetvec.S @@ -0,0 +1,37 @@ +/* + * U-boot - i386 Startup Code + * + * Copyright (c) 2002 Omicron Ceti AB, Daniel Engström denaiel@omicron.se + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +/* Reset vector, jumps to start16.S */ + +.extern start16 + +.section .resetvec, "ax" +.code16 +reset_vector: + cli + cld + jmp start16 + + .org 0xf + nop -- 1.5.4.3
Signed-off-by: Graeme Russ graeme.russ@gmail.com --- board/eNET/u-boot.lds | 6 +++--- 1 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/board/eNET/u-boot.lds b/board/eNET/u-boot.lds index 2dafbb5..9e02326 100644 --- a/board/eNET/u-boot.lds +++ b/board/eNET/u-boot.lds @@ -75,7 +75,7 @@ SECTIONS * The fe00 and ff00 offsets of the start32 and start16 * segments are arbitrary, the just have to be mapped * at reset and the code have to fit. - * The fff0 offset of reset is important, however. + * The fff0 offset of resetvec is important, however. */
. = 0xfffffe00; @@ -85,6 +85,6 @@ SECTIONS .start16 : AT (0x3807f800) { *(.start16); }
. = 0xfff0; - .reset : AT (0x3807fff0) { *(.reset); } - _i386boot_end = (LOADADDR(.reset) + SIZEOF(.reset) ); + .resetvec : AT (0x3807fff0) { *(.resetvec); } + _i386boot_end = (LOADADDR(.resetvec) + SIZEOF(.resetvec) ); } -- 1.5.4.3
Signed-off-by: Graeme Russ graeme.russ@gmail.com --- Makefile | 8 +++--- cpu/i386/Makefile | 3 +- cpu/i386/sc520/Makefile | 52 ++++++++++++++++++++++++++++++++++++++ cpu/i386/{ => sc520}/sc520.c | 0 cpu/i386/{ => sc520}/sc520_asm.S | 0 5 files changed, 57 insertions(+), 6 deletions(-) create mode 100644 cpu/i386/sc520/Makefile rename cpu/i386/{ => sc520}/sc520.c (100%) rename cpu/i386/{ => sc520}/sc520_asm.S (100%)
diff --git a/Makefile b/Makefile index 28cc6c7..d830403 100644 --- a/Makefile +++ b/Makefile @@ -2908,16 +2908,16 @@ smdk6400_config : unconfig ## AMD SC520 CDP ######################################################################### sc520_cdp_config : unconfig - @$(MKCONFIG) $(@:_config=) i386 i386 sc520_cdp + @$(MKCONFIG) $(@:_config=) i386 i386 sc520_cdp NULL sc520
eNET_config : unconfig - @$(MKCONFIG) $(@:_config=) i386 i386 eNET + @$(MKCONFIG) $(@:_config=) i386 i386 eNET NULL sc520
sc520_spunk_config : unconfig - @$(MKCONFIG) $(@:_config=) i386 i386 sc520_spunk + @$(MKCONFIG) $(@:_config=) i386 i386 sc520_spunk NULL sc520
sc520_spunk_rel_config : unconfig - @$(MKCONFIG) $(@:_config=) i386 i386 sc520_spunk + @$(MKCONFIG) $(@:_config=) i386 i386 sc520_spunk NULL sc520
#======================================================================== # MIPS diff --git a/cpu/i386/Makefile b/cpu/i386/Makefile index f20675a..761c4f6 100644 --- a/cpu/i386/Makefile +++ b/cpu/i386/Makefile @@ -29,8 +29,7 @@ include $(TOPDIR)/config.mk LIB = $(obj)lib$(CPU).a
START = start.o start16.o resetvec.o -COBJS = serial.o interrupts.o cpu.o timer.o sc520.o -SOBJS = sc520_asm.o +COBJS = serial.o interrupts.o cpu.o timer.o
SRCS := $(START:.o=.S) $(SOBJS:.o=.S) $(COBJS:.o=.c) OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS)) diff --git a/cpu/i386/sc520/Makefile b/cpu/i386/sc520/Makefile new file mode 100644 index 0000000..47519ec --- /dev/null +++ b/cpu/i386/sc520/Makefile @@ -0,0 +1,52 @@ +# +# (C) Copyright 2008 +# Graeme Russ, graeme.russ@gmail.com. +# +# (C) Copyright 2006 +# Wolfgang Denk, DENX Software Engineering, wd@denx.de. +# +# (C) Copyright 2002 +# Daniel Engström, Omicron Ceti AB, daniel@omicron.se. +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +include $(TOPDIR)/config.mk + +LIB := $(obj)lib$(SOC).a + +COBJS-$(CONFIG_SC520) += sc520.o +SOBJS-$(CONFIG_SC520) += sc520_asm.o + +SRCS := $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c) +OBJS := $(addprefix $(obj),$(SOBJS-y) $(COBJS-y)) + +all: $(obj).depend $(LIB) + +$(LIB): $(OBJS) + $(AR) $(ARFLAGS) $@ $(OBJS) + +######################################################################### + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +######################################################################### diff --git a/cpu/i386/sc520.c b/cpu/i386/sc520/sc520.c similarity index 100% rename from cpu/i386/sc520.c rename to cpu/i386/sc520/sc520.c diff --git a/cpu/i386/sc520_asm.S b/cpu/i386/sc520/sc520_asm.S similarity index 100% rename from cpu/i386/sc520_asm.S rename to cpu/i386/sc520/sc520_asm.S -- 1.5.4.3
Signed-off-by: Graeme Russ graeme.russ@gmail.com --- This allows for future tidy ups and functionality that will require set_vector () --- cpu/i386/interrupts.c | 3 ++- include/asm-i386/interrupt.h | 29 +++++++++++++++++++++++++++++ 2 files changed, 31 insertions(+), 1 deletions(-) create mode 100644 include/asm-i386/interrupt.h
diff --git a/cpu/i386/interrupts.c b/cpu/i386/interrupts.c index f6dbcca..ba9e89d 100644 --- a/cpu/i386/interrupts.c +++ b/cpu/i386/interrupts.c @@ -26,6 +26,7 @@ #include <asm/io.h> #include <asm/i8259.h> #include <asm/ibmpc.h> +#include <asm/interrupt.h>
struct idt_entry { @@ -376,7 +377,7 @@ asm ("idt_ptr:\n" ".long idt\n" /* offset */ ".word 0x18\n");/* data segment */
-static void set_vector(int intnum, void *routine) +void set_vector(int intnum, void *routine) { idt[intnum].base_high = (u16)((u32)(routine)>>16); idt[intnum].base_low = (u16)((u32)(routine)&0xffff); diff --git a/include/asm-i386/interrupt.h b/include/asm-i386/interrupt.h new file mode 100644 index 0000000..315b400 --- /dev/null +++ b/include/asm-i386/interrupt.h @@ -0,0 +1,29 @@ +/* + * (C) Copyright 2008 + * Graeme Russ, graeme.russ@gmail.com + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef __ASM_INTERRUPT_H_ +#define __ASM_INTERRUPT_H_ 1 + +void set_vector(int intnum, void *routine); + +#endif -- 1.5.4.3
Moved from interrupts.c to cpu.c and made into a weak function to allow vendor specific override
Signed-off-by: Graeme Russ graeme.russ@gmail.com --- Vendor specific CPU reset (like the AMD SC520 MMCR reset) can now be added to the vendor specific code without the need to remember to #undef usage of the generic method and if you forget to include your custom reset method, you will always get the default --- cpu/i386/cpu.c | 17 +++++++++++++++++ cpu/i386/interrupts.c | 16 ---------------- 2 files changed, 17 insertions(+), 16 deletions(-)
diff --git a/cpu/i386/cpu.c b/cpu/i386/cpu.c index 5fd37c7..b9af5f8 100644 --- a/cpu/i386/cpu.c +++ b/cpu/i386/cpu.c @@ -35,6 +35,7 @@
#include <common.h> #include <command.h> +#include <asm/interrupt.h>
int cpu_init(void) { @@ -64,3 +65,19 @@ void flush_cache (unsigned long dummy1, unsigned long dummy2) asm("wbinvd\n"); return; } + +void __attribute__ ((regparm(0))) generate_gpf(void); + +/* segment 0x70 is an arbitrary segment which does not exist */ +asm(".globl generate_gpf\n" + "generate_gpf:\n" + "ljmp $0x70, $0x47114711\n"); + +void __reset_cpu(ulong addr) +{ + printf("Resetting using i386 Triple Fault\n"); + set_vector(13, generate_gpf); /* general protection fault handler */ + set_vector(8, generate_gpf); /* double fault handler */ + generate_gpf(); /* start the show */ +} +void reset_cpu(ulong addr) __attribute__((weak, alias("__reset_cpu"))); diff --git a/cpu/i386/interrupts.c b/cpu/i386/interrupts.c index ba9e89d..badb30b 100644 --- a/cpu/i386/interrupts.c +++ b/cpu/i386/interrupts.c @@ -508,19 +508,3 @@ int disable_interrupts(void)
return (flags&0x200); /* IE flags is bit 9 */ } - - -#ifdef CONFIG_SYS_RESET_GENERIC - -void __attribute__ ((regparm(0))) generate_gpf(void); -asm(".globl generate_gpf\n" - "generate_gpf:\n" - "ljmp $0x70, $0x47114711\n"); /* segment 0x70 is an arbitrary segment which does not - * exist */ -void reset_cpu(ulong addr) -{ - set_vector(13, generate_gpf); /* general protection fault handler */ - set_vector(8, generate_gpf); /* double fault handler */ - generate_gpf(); /* start the show */ -} -#endif -- 1.5.4.3
Reset function specific to AMD SC520 microcontroller - Is more of a 'hard reset' that the triple fault.
Signed-off-by: Graeme Russ graeme.russ@gmail.com -- Requires CONFIG_SYS_RESET_SC520 to be defined in config
I would have liked to add this to a new file (cpu/i386/sc520/reset.c) but ld requires that a object file in a library arhive MUST contain at least one function which does not override a weak function (and is called from outside the object file) in order for that object file to be extracted from the archive. This would be the only function on the new file, and hence, will never get linked in. --- cpu/i386/sc520/sc520.c | 10 ++++++++++ 1 files changed, 10 insertions(+), 0 deletions(-)
diff --git a/cpu/i386/sc520/sc520.c b/cpu/i386/sc520/sc520.c index cb6bc03..50bd8ef 100644 --- a/cpu/i386/sc520/sc520.c +++ b/cpu/i386/sc520/sc520.c @@ -507,4 +507,14 @@ u8 ssi_rx_byte(void) return read_mmcr_byte(SC520_SSIRCV); }
+#ifdef CONFIG_SYS_RESET_SC520 +void reset_cpu(ulong addr) +{ + printf("Resetting using SC520 MMCR\n"); + /* Write a '1' to the SYS_RST of the RESCFG MMCR */ + write_mmcr_word(SC520_RESCFG, 0x0001); + + /* NOTREACHED */ +} +#endif #endif /* CONFIG_SC520 */ -- 1.5.4.3
CONFIG_SC520 is now used for conditional compile
Signed-off-by: Graeme Russ graeme.russ@gmail.com --- cpu/i386/sc520/sc520.c | 4 ---- 1 files changed, 0 insertions(+), 4 deletions(-)
diff --git a/cpu/i386/sc520/sc520.c b/cpu/i386/sc520/sc520.c index 50bd8ef..12e8f38 100644 --- a/cpu/i386/sc520/sc520.c +++ b/cpu/i386/sc520/sc520.c @@ -25,9 +25,6 @@ * but idependent of implementation */
#include <config.h> - -#ifdef CONFIG_SC520 - #include <common.h> #include <config.h> #include <pci.h> @@ -517,4 +514,3 @@ void reset_cpu(ulong addr) /* NOTREACHED */ } #endif -#endif /* CONFIG_SC520 */ -- 1.5.4.3
Generic i386 reset - #define made redundant by weak function
Signed-off-by: Graeme Russ graeme.russ@gmail.com --- include/configs/eNET.h | 1 - include/configs/sc520_cdp.h | 1 - include/configs/sc520_spunk.h | 1 - 3 files changed, 0 insertions(+), 3 deletions(-)
diff --git a/include/configs/eNET.h b/include/configs/eNET.h index 87d2908..8f9e972 100644 --- a/include/configs/eNET.h +++ b/include/configs/eNET.h @@ -142,7 +142,6 @@ * CPU Features */ #define CONFIG_SYS_SC520_HIGH_SPEED 0 /* 100 or 133MHz */ -#define CONFIG_SYS_RESET_GENERIC /* use triple-fault to reset cpu */ #undef CONFIG_SYS_RESET_SC520 /* use SC520 MMCR's to reset cpu */ #define CONFIG_SYS_TIMER_SC520 /* use SC520 swtimers */ #undef CONFIG_SYS_TIMER_GENERIC /* use the i8254 PIT timers */ diff --git a/include/configs/sc520_cdp.h b/include/configs/sc520_cdp.h index bf8693e..9f2357b 100644 --- a/include/configs/sc520_cdp.h +++ b/include/configs/sc520_cdp.h @@ -47,7 +47,6 @@ #define CONFIG_SYS_SDRAM_CAS_LATENCY_3T
#define CONFIG_SYS_SC520_HIGH_SPEED 0 /* 100 or 133MHz */ -#define CONFIG_SYS_RESET_GENERIC 1 /* use tripple-fault to reset cpu */ #undef CONFIG_SYS_RESET_SC520 /* use SC520 MMCR's to reset cpu */ #undef CONFIG_SYS_TIMER_SC520 /* use SC520 swtimers */ #define CONFIG_SYS_TIMER_GENERIC 1 /* use the i8254 PIT timers */ diff --git a/include/configs/sc520_spunk.h b/include/configs/sc520_spunk.h index fbdbedd..50af732 100644 --- a/include/configs/sc520_spunk.h +++ b/include/configs/sc520_spunk.h @@ -45,7 +45,6 @@ #define CONFIG_SYS_SDRAM_CAS_LATENCY_3T
#define CONFIG_SYS_SC520_HIGH_SPEED 0 /* 100 or 133MHz */ -#define CONFIG_SYS_RESET_GENERIC 1 /* use tripple-fault to reset cpu */ #undef CONFIG_SYS_RESET_SC520 /* use SC520 MMCR's to reset cpu */ #undef CONFIG_SYS_TIMER_SC520 /* use SC520 swtimers */ #define CONFIG_SYS_TIMER_GENERIC 1 /* use the i8254 PIT timers */ -- 1.5.4.3
Options are now all uniformly CONFIG_SYS_SC520_<option>
Signed-off-by: Graeme Russ graeme.russ@gmail.com --- board/sc520_cdp/sc520_cdp.c | 16 ++++++++-------- cpu/i386/sc520/Makefile | 4 ++-- cpu/i386/sc520/sc520.c | 6 +++--- cpu/i386/sc520/sc520_asm.S | 4 ++-- include/configs/eNET.h | 6 +++--- include/configs/sc520_cdp.h | 10 +++++----- include/configs/sc520_spunk.h | 6 +++--- 7 files changed, 26 insertions(+), 26 deletions(-)
diff --git a/board/sc520_cdp/sc520_cdp.c b/board/sc520_cdp/sc520_cdp.c index 779f957..1ddce7e 100644 --- a/board/sc520_cdp/sc520_cdp.c +++ b/board/sc520_cdp/sc520_cdp.c @@ -575,10 +575,10 @@ int spi_eeprom_write(int x, int offset, uchar *buffer, int len)
void spi_init_f(void) { -#ifdef CONFIG_SC520_CDP_USE_SPI +#ifdef CONFIG_SYS_SC520_CDP_USE_SPI spi_eeprom_probe(1); #endif -#ifdef CONFIG_SC520_CDP_USE_MW +#ifdef CONFIG_SYS_SC520_CDP_USE_MW mw_eeprom_probe(2); #endif } @@ -595,13 +595,13 @@ ssize_t spi_read(uchar *addr, int alen, uchar *buffer, int len) offset |= addr[i]; }
-#ifdef CONFIG_SC520_CDP_USE_SPI +#ifdef CONFIG_SYS_SC520_CDP_USE_SPI res = spi_eeprom_read(1, offset, buffer, len); #endif -#ifdef CONFIG_SC520_CDP_USE_MW +#ifdef CONFIG_SYS_SC520_CDP_USE_MW res = mw_eeprom_read(2, offset, buffer, len); #endif -#if !defined(CONFIG_SC520_CDP_USE_SPI) && !defined(CONFIG_SC520_CDP_USE_MW) +#if !defined(CONFIG_SYS_SC520_CDP_USE_SPI) && !defined(CONFIG_SYS_SC520_CDP_USE_MW) res = 0; #endif return res; @@ -619,13 +619,13 @@ ssize_t spi_write(uchar *addr, int alen, uchar *buffer, int len) offset |= addr[i]; }
-#ifdef CONFIG_SC520_CDP_USE_SPI +#ifdef CONFIG_SYS_SC520_CDP_USE_SPI res = spi_eeprom_write(1, offset, buffer, len); #endif -#ifdef CONFIG_SC520_CDP_USE_MW +#ifdef CONFIG_SYS_SC520_CDP_USE_MW res = mw_eeprom_write(2, offset, buffer, len); #endif -#if !defined(CONFIG_SC520_CDP_USE_SPI) && !defined(CONFIG_SC520_CDP_USE_MW) +#if !defined(CONFIG_SYS_SC520_CDP_USE_SPI) && !defined(CONFIG_SYS_SC520_CDP_USE_MW) res = 0; #endif return res; diff --git a/cpu/i386/sc520/Makefile b/cpu/i386/sc520/Makefile index 47519ec..178bb76 100644 --- a/cpu/i386/sc520/Makefile +++ b/cpu/i386/sc520/Makefile @@ -31,8 +31,8 @@ include $(TOPDIR)/config.mk
LIB := $(obj)lib$(SOC).a
-COBJS-$(CONFIG_SC520) += sc520.o -SOBJS-$(CONFIG_SC520) += sc520_asm.o +COBJS-$(CONFIG_SYS_SC520) += sc520.o +SOBJS-$(CONFIG_SYS_SC520) += sc520_asm.o
SRCS := $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c) OBJS := $(addprefix $(obj),$(SOBJS-y) $(COBJS-y)) diff --git a/cpu/i386/sc520/sc520.c b/cpu/i386/sc520/sc520.c index 12e8f38..39b70d5 100644 --- a/cpu/i386/sc520/sc520.c +++ b/cpu/i386/sc520/sc520.c @@ -28,7 +28,7 @@ #include <common.h> #include <config.h> #include <pci.h> -#ifdef CONFIG_SC520_SSI +#ifdef CONFIG_SYS_SC520_SSI #include <asm/ic/ssi.h> #endif #include <asm/io.h> @@ -390,7 +390,7 @@ void pci_sc520_init(struct pci_controller *hose)
#endif
-#ifdef CONFIG_SYS_TIMER_SC520 +#ifdef CONFIG_SYS_SC520_TIMER
void reset_timer(void) @@ -504,7 +504,7 @@ u8 ssi_rx_byte(void) return read_mmcr_byte(SC520_SSIRCV); }
-#ifdef CONFIG_SYS_RESET_SC520 +#ifdef CONFIG_SYS_SC520_RESET void reset_cpu(ulong addr) { printf("Resetting using SC520 MMCR\n"); diff --git a/cpu/i386/sc520/sc520_asm.S b/cpu/i386/sc520/sc520_asm.S index 59ed2b8..481a30a 100644 --- a/cpu/i386/sc520/sc520_asm.S +++ b/cpu/i386/sc520/sc520_asm.S @@ -105,7 +105,7 @@ */
#include <config.h> -#ifdef CONFIG_SC520 +#ifdef CONFIG_SYS_SC520
.section .text .equ DRCCTL, 0x0fffef010 /* DRAM control register */ @@ -581,4 +581,4 @@ out: movl %ebx, %eax jmp *%ebp
-#endif /* CONFIG_SC520 */ +#endif /* CONFIG_SYS_SC520 */ diff --git a/include/configs/eNET.h b/include/configs/eNET.h index 8f9e972..7d4e21f 100644 --- a/include/configs/eNET.h +++ b/include/configs/eNET.h @@ -40,8 +40,8 @@ #define DEBUG_PARSER
#define CONFIG_X86 1 /* Intel X86 CPU */ -#define CONFIG_SC520 1 /* AMD SC520 */ -#define CONFIG_SC520_SSI +#define CONFIG_SYS_SC520 1 /* AMD SC520 */ +#define CONFIG_SYS_SC520_SSI #define CONFIG_SHOW_BOOT_PROGRESS 1 #define CONFIG_LAST_STAGE_INIT 1
@@ -142,7 +142,7 @@ * CPU Features */ #define CONFIG_SYS_SC520_HIGH_SPEED 0 /* 100 or 133MHz */ -#undef CONFIG_SYS_RESET_SC520 /* use SC520 MMCR's to reset cpu */ +#undef CONFIG_SYS_SC520_RESET /* use SC520 MMCR's to reset cpu */ #define CONFIG_SYS_TIMER_SC520 /* use SC520 swtimers */ #undef CONFIG_SYS_TIMER_GENERIC /* use the i8254 PIT timers */ #undef CONFIG_SYS_TIMER_TSC /* use the Pentium TSC timers */ diff --git a/include/configs/sc520_cdp.h b/include/configs/sc520_cdp.h index 9f2357b..167bc9e 100644 --- a/include/configs/sc520_cdp.h +++ b/include/configs/sc520_cdp.h @@ -35,7 +35,7 @@ */
#define CONFIG_X86 1 /* This is a X86 CPU */ -#define CONFIG_SC520 1 /* Include support for AMD SC520 */ +#define CONFIG_SYS_SC520 1 /* Include support for AMD SC520 */ #define CONFIG_ALI152X 1 /* Include support for Ali 152x SIO */
#define CONFIG_SYS_SDRAM_PRECHARGE_DELAY 6 /* 6T */ @@ -47,8 +47,8 @@ #define CONFIG_SYS_SDRAM_CAS_LATENCY_3T
#define CONFIG_SYS_SC520_HIGH_SPEED 0 /* 100 or 133MHz */ -#undef CONFIG_SYS_RESET_SC520 /* use SC520 MMCR's to reset cpu */ -#undef CONFIG_SYS_TIMER_SC520 /* use SC520 swtimers */ +#undef CONFIG_SYS_SC520_RESET /* use SC520 MMCR's to reset cpu */ +#undef CONFIG_SYS_SC520_TIMER /* use SC520 swtimers */ #define CONFIG_SYS_TIMER_GENERIC 1 /* use the i8254 PIT timers */ #undef CONFIG_SYS_TIMER_TSC /* use the Pentium TSC timers */ #define CONFIG_SYS_USE_SIO_UART 0 /* prefer the uarts on the SIO to those @@ -147,8 +147,8 @@ #define CONFIG_SPI #define CONFIG_ENV_SIZE 0x4000 /* Total Size of Environment EEPROM 16k is SPI is used or 128 bytes if MW is used*/ #define CONFIG_ENV_OFFSET 0 -#define CONFIG_SC520_CDP_USE_SPI /* Store configuration in the SPI part */ -#undef CONFIG_SC520_CDP_USE_MW /* Store configuration in the MicroWire part */ +#define CONFIG_SYS_SC520_CDP_USE_SPI /* Store configuration in the SPI part */ +#undef CONFIG_SYS_SC520_CDP_USE_MW /* Store configuration in the MicroWire part */ #define CONFIG_SPI_X 1
/* diff --git a/include/configs/sc520_spunk.h b/include/configs/sc520_spunk.h index 50af732..11a69f5 100644 --- a/include/configs/sc520_spunk.h +++ b/include/configs/sc520_spunk.h @@ -34,7 +34,7 @@ */
#define CONFIG_X86 1 /* This is a X86 CPU */ -#define CONFIG_SC520 1 /* Include support for AMD SC520 */ +#define CONFIG_SYS_SC520 1 /* Include support for AMD SC520 */
#define CONFIG_SYS_SDRAM_PRECHARGE_DELAY 6 /* 6T */ #define CONFIG_SYS_SDRAM_REFRESH_RATE 78 /* 7.8uS (choices are 7.8, 15.6, 31.2 or 62.5uS) */ @@ -45,8 +45,8 @@ #define CONFIG_SYS_SDRAM_CAS_LATENCY_3T
#define CONFIG_SYS_SC520_HIGH_SPEED 0 /* 100 or 133MHz */ -#undef CONFIG_SYS_RESET_SC520 /* use SC520 MMCR's to reset cpu */ -#undef CONFIG_SYS_TIMER_SC520 /* use SC520 swtimers */ +#undef CONFIG_SYS_SC520_RESET /* use SC520 MMCR's to reset cpu */ +#undef CONFIG_SYS_SC520_TIMER /* use SC520 swtimers */ #define CONFIG_SYS_TIMER_GENERIC 1 /* use the i8254 PIT timers */ #undef CONFIG_SYS_TIMER_TSC /* use the Pentium TSC timers */
-- 1.5.4.3
Handled by conditional compile
Signed-off-by: Graeme Russ graeme.russ@gmail.com --- cpu/i386/sc520/sc520_asm.S | 3 --- 1 files changed, 0 insertions(+), 3 deletions(-)
diff --git a/cpu/i386/sc520/sc520_asm.S b/cpu/i386/sc520/sc520_asm.S index 481a30a..2042d9b 100644 --- a/cpu/i386/sc520/sc520_asm.S +++ b/cpu/i386/sc520/sc520_asm.S @@ -105,7 +105,6 @@ */
#include <config.h> -#ifdef CONFIG_SYS_SC520
.section .text .equ DRCCTL, 0x0fffef010 /* DRAM control register */ @@ -580,5 +579,3 @@ set_ecc: out: movl %ebx, %eax jmp *%ebp - -#endif /* CONFIG_SYS_SC520 */ -- 1.5.4.3
Forgotten in commit d1f2d102a266804a50ff0cd9794459791f057c94
Signed-off-by: Graeme Russ graeme.russ@gmail.com --- include/configs/eNET.h | 2 +- 1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/include/configs/eNET.h b/include/configs/eNET.h index 7d4e21f..16dfb3f 100644 --- a/include/configs/eNET.h +++ b/include/configs/eNET.h @@ -143,7 +143,7 @@ */ #define CONFIG_SYS_SC520_HIGH_SPEED 0 /* 100 or 133MHz */ #undef CONFIG_SYS_SC520_RESET /* use SC520 MMCR's to reset cpu */ -#define CONFIG_SYS_TIMER_SC520 /* use SC520 swtimers */ +#define CONFIG_SYS_SC520_TIMER /* use SC520 swtimers */ #undef CONFIG_SYS_TIMER_GENERIC /* use the i8254 PIT timers */ #undef CONFIG_SYS_TIMER_TSC /* use the Pentium TSC timers */ #define CONFIG_SYS_USE_SIO_UART 0 /* prefer the uarts on the SIO to those -- 1.5.4.3
Signed-off-by: Graeme Russ graeme.russ@gmail.com --- board/sc520_cdp/sc520_cdp.c | 2 +- drivers/misc/ali512x.c | 2 +- include/{asm-i386/ic => }/ali512x.h | 0 3 files changed, 2 insertions(+), 2 deletions(-) rename include/{asm-i386/ic => }/ali512x.h (100%)
diff --git a/board/sc520_cdp/sc520_cdp.c b/board/sc520_cdp/sc520_cdp.c index 1ddce7e..830ec37 100644 --- a/board/sc520_cdp/sc520_cdp.c +++ b/board/sc520_cdp/sc520_cdp.c @@ -27,7 +27,7 @@ #include <asm/io.h> #include <asm/pci.h> #include <asm/ic/sc520.h> -#include <asm/ic/ali512x.h> +#include <ali512x.h> #include <spi.h> #include <netdev.h>
diff --git a/drivers/misc/ali512x.c b/drivers/misc/ali512x.c index d6a2c1f..cda3b0d 100644 --- a/drivers/misc/ali512x.c +++ b/drivers/misc/ali512x.c @@ -34,7 +34,7 @@
#include <common.h> #include <asm/io.h> -#include <asm/ic/ali512x.h> +#include <ali512x.h>
/* ALI M5123 Logical device numbers: diff --git a/include/asm-i386/ic/ali512x.h b/include/ali512x.h similarity index 100% rename from include/asm-i386/ic/ali512x.h rename to include/ali512x.h -- 1.5.4.3
Allows for earlier access to status LEDs
Signed-off-by: Graeme Russ graeme.russ@gmail.com --- board/eNET/eNET_start16.S | 70 +++++++++++++++++++++++++++++++++++++++++++++ 1 files changed, 70 insertions(+), 0 deletions(-)
diff --git a/board/eNET/eNET_start16.S b/board/eNET/eNET_start16.S index 48e4d83..e16ca83 100644 --- a/board/eNET/eNET_start16.S +++ b/board/eNET/eNET_start16.S @@ -60,6 +60,76 @@ board_init16: xorw %ax, %ax movb %al, (%di)
+ /* GP Chip Select Recovery Time */ + movl $0x0c08, %edi + movb $0x01, %al + movb %al, (%di) + + /* GP Chip Select Pulse Width */ + movl $0x0c09, %edi + movb $0x07, %al + movb %al, (%di) + + /* GP Chip Select Offset */ + movl $0x0c0a, %edi + movb $0x00, %al + movb %al, (%di) + + /* GP Read pulse width */ + movl $0x0c0b, %edi + movb $0x05, %al + movb %al, (%di) + + /* GP Read offset */ + movl $0x0c0c, %edi + movb $0x01, %al + movb %al, (%di) + + /* GP Write pulse width */ + movl $0x0c0d, %edi + movb $0x05, %al + movb %al, (%di) + + /* GP Write offset */ + movl $0x0c0e, %edi + movb $0x01, %al + movb %al, (%di) + + /* PIO15_PIO0 Data */ + movl $0x0c30, %edi + movw $0x0630, %ax + movw %ax, (%di) + + /* PIO31_PIO16 Data */ + movl $0x0c32, %edi + movw $0x2000, %ax + movw %ax, (%di) + + /* GPIO directionreg */ + movl $0x0c2c, %edi + movw $0x2000, %ax + movw %ax, (%di) + + /* GPIO directionreg */ + movl $0x0c2a, %edi + movw $0x0dfe, %ax + movw %ax, (%di) + + /* GPIO pin function 31-16 reg */ + movl $0x0c22, %edi + movw $0x87b5, %ax + movw %ax, (%di) + + /* GPIO pin function 15-0 reg */ + movl $0x0c20, %edi + movw $0x200a, %ax + movw %ax, (%di) + + /* Chip Select Pin Function Select */ + movl $0x0c24, %edi + movb $0xf8, %al + movb %al, (%di) + /* Disabe MMCR alias */ movw $0xfffc, %dx movl $0x000000cb, %eax -- 1.5.4.3
Core functionality common to interrupt and exception handling (the IDT for example) has been moved into cpu.c
Signed-off-by: Graeme Russ graeme.russ@gmail.com --- Future rework on the i386 branch will include support for the SC520 interrupt controller which can handle up to 22 interrupt lines - Seperating out exception handling now will make life a lot easier later on --- cpu/i386/Makefile | 2 +- cpu/i386/cpu.c | 44 +++++++++ cpu/i386/exceptions.c | 205 +++++++++++++++++++++++++++++++++++++++ cpu/i386/interrupts.c | 209 ---------------------------------------- include/asm-i386/u-boot-i386.h | 3 + lib_i386/board.c | 3 +- 6 files changed, 255 insertions(+), 211 deletions(-) create mode 100644 cpu/i386/exceptions.c
diff --git a/cpu/i386/Makefile b/cpu/i386/Makefile index 761c4f6..f72cd6e 100644 --- a/cpu/i386/Makefile +++ b/cpu/i386/Makefile @@ -29,7 +29,7 @@ include $(TOPDIR)/config.mk LIB = $(obj)lib$(CPU).a
START = start.o start16.o resetvec.o -COBJS = serial.o interrupts.o cpu.o timer.o +COBJS = serial.o interrupts.o exceptions.o cpu.o timer.o
SRCS := $(START:.o=.S) $(SOBJS:.o=.S) $(COBJS:.o=.c) OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS)) diff --git a/cpu/i386/cpu.c b/cpu/i386/cpu.c index b9af5f8..70e575c 100644 --- a/cpu/i386/cpu.c +++ b/cpu/i386/cpu.c @@ -37,8 +37,30 @@ #include <command.h> #include <asm/interrupt.h>
+struct idt_entry { + u16 base_low; + u16 selector; + u8 res; + u8 access; + u16 base_high; +} __attribute__ ((packed)); + +#define IDT_SIZE 256 + +static struct idt_entry idt[IDT_SIZE]; + +void __attribute__ ((regparm(0))) default_isr(void); +asm ("default_isr: iret\n"); + +asm ("idt_ptr:\n" + ".word 0x800\n" /* size of the table 8*256 bytes */ + ".long idt\n" /* offset */ + ".word 0x18\n"); /* data segment */ + int cpu_init(void) { + int i; + /* initialize FPU, reset EM, set MP and NE */ asm ("fninit\n" \ "movl %cr0, %eax\n" \ @@ -46,9 +68,31 @@ int cpu_init(void) "orl $0x22, %eax\n" \ "movl %eax, %cr0\n" );
+ /* Just in case... */ + disable_interrupts(); + + /* Setup the IDT */ + for (i = 0; i < IDT_SIZE; i++) { + idt[i].access = 0x8e; + idt[i].res = 0; + idt[i].selector = 0x10; + set_vector(i, default_isr); + } + + asm ("cs lidt idt_ptr\n"); + + /* It is now safe to enable interrupts */ + enable_interrupts(); + return 0; }
+void set_vector(int intnum, void *routine) +{ + idt[intnum].base_high = (u16)((u32)(routine)>>16); + idt[intnum].base_low = (u16)((u32)(routine)&0xffff); +} + int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) { printf ("resetting ...\n"); diff --git a/cpu/i386/exceptions.c b/cpu/i386/exceptions.c new file mode 100644 index 0000000..55169b2 --- /dev/null +++ b/cpu/i386/exceptions.c @@ -0,0 +1,205 @@ +/* + * (C) Copyright 2002 + * Daniel Engström, Omicron Ceti AB, daniel@omicron.se. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <asm/interrupt.h> + +asm ("exp_return:\n" + " addl $12, %esp\n" + " pop %esp\n" + " popa\n" + " iret\n"); + +char exception_stack[4096]; + +#define DECLARE_EXCEPTION(x, f) \ + asm(".globl exp_"#x"\n" \ + "exp_"#x":\n" \ + "pusha \n" \ + "movl %esp, %ebx\n" \ + "movl $exception_stack, %eax\n" \ + "movl %eax, %esp \n" \ + "pushl %ebx\n" \ + "movl 32(%esp), %ebx\n" \ + "xorl %edx, %edx\n" \ + "movw 36(%esp), %dx\n" \ + "pushl %edx\n" \ + "pushl %ebx\n" \ + "pushl $"#x"\n" \ + "pushl $exp_return\n" \ + "jmp "#f"\n"); \ + void __attribute__ ((regparm(0))) exp_##x(void) + +DECLARE_EXCEPTION(0, divide_exception_entry); /* Divide exception */ +DECLARE_EXCEPTION(1, debug_exception_entry); /* Debug exception */ +DECLARE_EXCEPTION(2, nmi_entry); /* NMI */ +DECLARE_EXCEPTION(3, unknown_exception_entry); /* Breakpoint/Coprocessor Error */ +DECLARE_EXCEPTION(4, unknown_exception_entry); /* Overflow */ +DECLARE_EXCEPTION(5, unknown_exception_entry); /* Bounds */ +DECLARE_EXCEPTION(6, invalid_instruction_entry); /* Invalid instruction */ +DECLARE_EXCEPTION(7, unknown_exception_entry); /* Device not present */ +DECLARE_EXCEPTION(8, double_fault_entry); /* Double fault */ +DECLARE_EXCEPTION(9, unknown_exception_entry); /* Co-processor segment overrun */ +DECLARE_EXCEPTION(10, invalid_tss_exception_entry);/* Invalid TSS */ +DECLARE_EXCEPTION(11, seg_fault_entry); /* Segment not present */ +DECLARE_EXCEPTION(12, stack_fault_entry); /* Stack overflow */ +DECLARE_EXCEPTION(13, gpf_entry); /* GPF */ +DECLARE_EXCEPTION(14, page_fault_entry); /* PF */ +DECLARE_EXCEPTION(15, unknown_exception_entry); /* Reserved */ +DECLARE_EXCEPTION(16, fp_exception_entry); /* Floating point */ +DECLARE_EXCEPTION(17, alignment_check_entry); /* alignment check */ +DECLARE_EXCEPTION(18, machine_check_entry); /* machine check */ +DECLARE_EXCEPTION(19, unknown_exception_entry); /* Reserved */ +DECLARE_EXCEPTION(20, unknown_exception_entry); /* Reserved */ +DECLARE_EXCEPTION(21, unknown_exception_entry); /* Reserved */ +DECLARE_EXCEPTION(22, unknown_exception_entry); /* Reserved */ +DECLARE_EXCEPTION(23, unknown_exception_entry); /* Reserved */ +DECLARE_EXCEPTION(24, unknown_exception_entry); /* Reserved */ +DECLARE_EXCEPTION(25, unknown_exception_entry); /* Reserved */ +DECLARE_EXCEPTION(26, unknown_exception_entry); /* Reserved */ +DECLARE_EXCEPTION(27, unknown_exception_entry); /* Reserved */ +DECLARE_EXCEPTION(28, unknown_exception_entry); /* Reserved */ +DECLARE_EXCEPTION(29, unknown_exception_entry); /* Reserved */ +DECLARE_EXCEPTION(30, unknown_exception_entry); /* Reserved */ +DECLARE_EXCEPTION(31, unknown_exception_entry); /* Reserved */ + +void __attribute__ ((regparm(0))) unknown_exception_entry(int cause, int ip, int seg) +{ + printf("Unknown Exception %d at %04x:%08x\n", cause, seg, ip); +} + +void __attribute__ ((regparm(0))) divide_exception_entry(int cause, int ip, int seg) +{ + printf("Divide Error (Division by zero) at %04x:%08x\n", seg, ip); + while(1); +} + +void __attribute__ ((regparm(0))) debug_exception_entry(int cause, int ip, int seg) +{ + printf("Debug Interrupt (Single step) at %04x:%08x\n", seg, ip); +} + +void __attribute__ ((regparm(0))) nmi_entry(int cause, int ip, int seg) +{ + printf("NMI Interrupt at %04x:%08x\n", seg, ip); +} + +void __attribute__ ((regparm(0))) invalid_instruction_entry(int cause, int ip, int seg) +{ + printf("Invalid Instruction at %04x:%08x\n", seg, ip); + while(1); +} + +void __attribute__ ((regparm(0))) double_fault_entry(int cause, int ip, int seg) +{ + printf("Double fault at %04x:%08x\n", seg, ip); + while(1); +} + +void __attribute__ ((regparm(0))) invalid_tss_exception_entry(int cause, int ip, int seg) +{ + printf("Invalid TSS at %04x:%08x\n", seg, ip); +} + +void __attribute__ ((regparm(0))) seg_fault_entry(int cause, int ip, int seg) +{ + printf("Segmentation fault at %04x:%08x\n", seg, ip); + while(1); +} + +void __attribute__ ((regparm(0))) stack_fault_entry(int cause, int ip, int seg) +{ + printf("Stack fault at %04x:%08x\n", seg, ip); + while(1); +} + +void __attribute__ ((regparm(0))) gpf_entry(int cause, int ip, int seg) +{ + printf("General protection fault at %04x:%08x\n", seg, ip); +} + +void __attribute__ ((regparm(0))) page_fault_entry(int cause, int ip, int seg) +{ + printf("Page fault at %04x:%08x\n", seg, ip); + while(1); +} + +void __attribute__ ((regparm(0))) fp_exception_entry(int cause, int ip, int seg) +{ + printf("Floating point exception at %04x:%08x\n", seg, ip); +} + +void __attribute__ ((regparm(0))) alignment_check_entry(int cause, int ip, int seg) +{ + printf("Alignment check at %04x:%08x\n", seg, ip); +} + +void __attribute__ ((regparm(0))) machine_check_entry(int cause, int ip, int seg) +{ + printf("Machine check exception at %04x:%08x\n", seg, ip); +} + +int exception_init(void) +{ + /* Just in case... */ + disable_interrupts(); + + /* Setup exceptions */ + set_vector(0x00, exp_0); + set_vector(0x01, exp_1); + set_vector(0x02, exp_2); + set_vector(0x03, exp_3); + set_vector(0x04, exp_4); + set_vector(0x05, exp_5); + set_vector(0x06, exp_6); + set_vector(0x07, exp_7); + set_vector(0x08, exp_8); + set_vector(0x09, exp_9); + set_vector(0x0a, exp_10); + set_vector(0x0b, exp_11); + set_vector(0x0c, exp_12); + set_vector(0x0d, exp_13); + set_vector(0x0e, exp_14); + set_vector(0x0f, exp_15); + set_vector(0x10, exp_16); + set_vector(0x11, exp_17); + set_vector(0x12, exp_18); + set_vector(0x13, exp_19); + set_vector(0x14, exp_20); + set_vector(0x15, exp_21); + set_vector(0x16, exp_22); + set_vector(0x17, exp_23); + set_vector(0x18, exp_24); + set_vector(0x19, exp_25); + set_vector(0x1a, exp_26); + set_vector(0x1b, exp_27); + set_vector(0x1c, exp_28); + set_vector(0x1d, exp_29); + set_vector(0x1e, exp_30); + set_vector(0x1f, exp_31); + + /* It is now safe to enable interrupts */ + enable_interrupts(); + + return 0; +} diff --git a/cpu/i386/interrupts.c b/cpu/i386/interrupts.c index badb30b..1934fb1 100644 --- a/cpu/i386/interrupts.c +++ b/cpu/i386/interrupts.c @@ -28,19 +28,6 @@ #include <asm/ibmpc.h> #include <asm/interrupt.h>
- -struct idt_entry { - u16 base_low; - u16 selector; - u8 res; - u8 access; - u16 base_high; -} __attribute__ ((packed)); - - -struct idt_entry idt[256]; - - #define MAX_IRQ 16
typedef struct irq_handler { @@ -63,14 +50,6 @@ asm ("irq_return:\n" " popa\n" " iret\n");
-asm ("exp_return:\n" - " addl $12, %esp\n" - " pop %esp\n" - " popa\n" - " iret\n"); - -char exception_stack[4096]; - #define DECLARE_INTERRUPT(x) \ asm(".globl irq_"#x"\n" \ "irq_"#x":\n" \ @@ -80,57 +59,6 @@ char exception_stack[4096]; "jmp do_irq\n"); \ void __attribute__ ((regparm(0))) irq_##x(void)
-#define DECLARE_EXCEPTION(x, f) \ - asm(".globl exp_"#x"\n" \ - "exp_"#x":\n" \ - "pusha \n" \ - "movl %esp, %ebx\n" \ - "movl $exception_stack, %eax\n" \ - "movl %eax, %esp \n" \ - "pushl %ebx\n" \ - "movl 32(%esp), %ebx\n" \ - "xorl %edx, %edx\n" \ - "movw 36(%esp), %dx\n" \ - "pushl %edx\n" \ - "pushl %ebx\n" \ - "pushl $"#x"\n" \ - "pushl $exp_return\n" \ - "jmp "#f"\n"); \ - void __attribute__ ((regparm(0))) exp_##x(void) - -DECLARE_EXCEPTION(0, divide_exception_entry); /* Divide exception */ -DECLARE_EXCEPTION(1, debug_exception_entry); /* Debug exception */ -DECLARE_EXCEPTION(2, nmi_entry); /* NMI */ -DECLARE_EXCEPTION(3, unknown_exception_entry); /* Breakpoint/Coprocessor Error */ -DECLARE_EXCEPTION(4, unknown_exception_entry); /* Overflow */ -DECLARE_EXCEPTION(5, unknown_exception_entry); /* Bounds */ -DECLARE_EXCEPTION(6, invalid_instruction_entry); /* Invalid instruction */ -DECLARE_EXCEPTION(7, unknown_exception_entry); /* Device not present */ -DECLARE_EXCEPTION(8, double_fault_entry); /* Double fault */ -DECLARE_EXCEPTION(9, unknown_exception_entry); /* Co-processor segment overrun */ -DECLARE_EXCEPTION(10, invalid_tss_exception_entry);/* Invalid TSS */ -DECLARE_EXCEPTION(11, seg_fault_entry); /* Segment not present */ -DECLARE_EXCEPTION(12, stack_fault_entry); /* Stack overflow */ -DECLARE_EXCEPTION(13, gpf_entry); /* GPF */ -DECLARE_EXCEPTION(14, page_fault_entry); /* PF */ -DECLARE_EXCEPTION(15, unknown_exception_entry); /* Reserved */ -DECLARE_EXCEPTION(16, fp_exception_entry); /* Floating point */ -DECLARE_EXCEPTION(17, alignment_check_entry); /* alignment check */ -DECLARE_EXCEPTION(18, machine_check_entry); /* machine check */ -DECLARE_EXCEPTION(19, unknown_exception_entry); /* Reserved */ -DECLARE_EXCEPTION(20, unknown_exception_entry); /* Reserved */ -DECLARE_EXCEPTION(21, unknown_exception_entry); /* Reserved */ -DECLARE_EXCEPTION(22, unknown_exception_entry); /* Reserved */ -DECLARE_EXCEPTION(23, unknown_exception_entry); /* Reserved */ -DECLARE_EXCEPTION(24, unknown_exception_entry); /* Reserved */ -DECLARE_EXCEPTION(25, unknown_exception_entry); /* Reserved */ -DECLARE_EXCEPTION(26, unknown_exception_entry); /* Reserved */ -DECLARE_EXCEPTION(27, unknown_exception_entry); /* Reserved */ -DECLARE_EXCEPTION(28, unknown_exception_entry); /* Reserved */ -DECLARE_EXCEPTION(29, unknown_exception_entry); /* Reserved */ -DECLARE_EXCEPTION(30, unknown_exception_entry); /* Reserved */ -DECLARE_EXCEPTION(31, unknown_exception_entry); /* Reserved */ - DECLARE_INTERRUPT(0); DECLARE_INTERRUPT(1); DECLARE_INTERRUPT(3); @@ -147,9 +75,6 @@ DECLARE_INTERRUPT(13); DECLARE_INTERRUPT(14); DECLARE_INTERRUPT(15);
-void __attribute__ ((regparm(0))) default_isr(void); -asm ("default_isr: iret\n"); - void disable_irq(int irq) { if (irq >= MAX_IRQ) { @@ -242,84 +167,6 @@ void __attribute__ ((regparm(0))) do_irq(int irq) specific_eoi(irq); }
- -void __attribute__ ((regparm(0))) unknown_exception_entry(int cause, int ip, int seg) -{ - printf("Unknown Exception %d at %04x:%08x\n", cause, seg, ip); -} - -void __attribute__ ((regparm(0))) divide_exception_entry(int cause, int ip, int seg) -{ - printf("Divide Error (Division by zero) at %04x:%08x\n", seg, ip); - while(1); -} - -void __attribute__ ((regparm(0))) debug_exception_entry(int cause, int ip, int seg) -{ - printf("Debug Interrupt (Single step) at %04x:%08x\n", seg, ip); -} - -void __attribute__ ((regparm(0))) nmi_entry(int cause, int ip, int seg) -{ - printf("NMI Interrupt at %04x:%08x\n", seg, ip); -} - -void __attribute__ ((regparm(0))) invalid_instruction_entry(int cause, int ip, int seg) -{ - printf("Invalid Instruction at %04x:%08x\n", seg, ip); - while(1); -} - -void __attribute__ ((regparm(0))) double_fault_entry(int cause, int ip, int seg) -{ - printf("Double fault at %04x:%08x\n", seg, ip); - while(1); -} - -void __attribute__ ((regparm(0))) invalid_tss_exception_entry(int cause, int ip, int seg) -{ - printf("Invalid TSS at %04x:%08x\n", seg, ip); -} - -void __attribute__ ((regparm(0))) seg_fault_entry(int cause, int ip, int seg) -{ - printf("Segmentation fault at %04x:%08x\n", seg, ip); - while(1); -} - -void __attribute__ ((regparm(0))) stack_fault_entry(int cause, int ip, int seg) -{ - printf("Stack fault at %04x:%08x\n", seg, ip); - while(1); -} - -void __attribute__ ((regparm(0))) gpf_entry(int cause, int ip, int seg) -{ - printf("General protection fault at %04x:%08x\n", seg, ip); -} - -void __attribute__ ((regparm(0))) page_fault_entry(int cause, int ip, int seg) -{ - printf("Page fault at %04x:%08x\n", seg, ip); - while(1); -} - -void __attribute__ ((regparm(0))) fp_exception_entry(int cause, int ip, int seg) -{ - printf("Floating point exception at %04x:%08x\n", seg, ip); -} - -void __attribute__ ((regparm(0))) alignment_check_entry(int cause, int ip, int seg) -{ - printf("Alignment check at %04x:%08x\n", seg, ip); -} - -void __attribute__ ((regparm(0))) machine_check_entry(int cause, int ip, int seg) -{ - printf("Machine check exception at %04x:%08x\n", seg, ip); -} - - void irq_install_handler(int ino, interrupt_handler_t *func, void *pdata) { int status; @@ -371,19 +218,6 @@ void irq_free_handler(int ino) return; }
- -asm ("idt_ptr:\n" - ".word 0x800\n" /* size of the table 8*256 bytes */ - ".long idt\n" /* offset */ - ".word 0x18\n");/* data segment */ - -void set_vector(int intnum, void *routine) -{ - idt[intnum].base_high = (u16)((u32)(routine)>>16); - idt[intnum].base_low = (u16)((u32)(routine)&0xffff); -} - - int interrupt_init(void) { int i; @@ -396,49 +230,6 @@ int interrupt_init(void)
memset(irq_table, 0, sizeof(irq_table));
- /* Setup the IDT */ - for (i=0;i<256;i++) { - idt[i].access = 0x8e; - idt[i].res = 0; - idt[i].selector = 0x10; - set_vector(i, default_isr); - } - - asm ("cs lidt idt_ptr\n"); - - /* Setup exceptions */ - set_vector(0x00, exp_0); - set_vector(0x01, exp_1); - set_vector(0x02, exp_2); - set_vector(0x03, exp_3); - set_vector(0x04, exp_4); - set_vector(0x05, exp_5); - set_vector(0x06, exp_6); - set_vector(0x07, exp_7); - set_vector(0x08, exp_8); - set_vector(0x09, exp_9); - set_vector(0x0a, exp_10); - set_vector(0x0b, exp_11); - set_vector(0x0c, exp_12); - set_vector(0x0d, exp_13); - set_vector(0x0e, exp_14); - set_vector(0x0f, exp_15); - set_vector(0x10, exp_16); - set_vector(0x11, exp_17); - set_vector(0x12, exp_18); - set_vector(0x13, exp_19); - set_vector(0x14, exp_20); - set_vector(0x15, exp_21); - set_vector(0x16, exp_22); - set_vector(0x17, exp_23); - set_vector(0x18, exp_24); - set_vector(0x19, exp_25); - set_vector(0x1a, exp_26); - set_vector(0x1b, exp_27); - set_vector(0x1c, exp_28); - set_vector(0x1d, exp_29); - set_vector(0x1e, exp_30); - set_vector(0x1f, exp_31);
/* Setup interrupts */ diff --git a/include/asm-i386/u-boot-i386.h b/include/asm-i386/u-boot-i386.h index 12d10a7..8d079ae 100644 --- a/include/asm-i386/u-boot-i386.h +++ b/include/asm-i386/u-boot-i386.h @@ -45,6 +45,9 @@ extern ulong i386boot_bios_size; /* size of BIOS emulation code */ int cpu_init(void); int timer_init(void);
+/* cpu/.../exceptions.c */ +int exception_init(void); + /* board/.../... */ int board_init(void); int dram_init(void); diff --git a/lib_i386/board.c b/lib_i386/board.c index 659f9a2..ee7d794 100644 --- a/lib_i386/board.c +++ b/lib_i386/board.c @@ -201,7 +201,8 @@ init_fnc_t *init_sequence[] = { board_init, /* basic board dependent setup */ dram_init, /* configure available RAM banks */ mem_malloc_init, /* dependant on dram_init */ - interrupt_init, /* set up exceptions */ + interrupt_init, /* set up interrupts */ + exception_init, /* set up exceptions */ timer_init, serial_init, env_init, /* initialize environment */ -- 1.5.4.3
On 10:29 Sun 07 Dec , Graeme Russ wrote:
Forgotten in commit d1f2d102a266804a50ff0cd9794459791f057c94
Signed-off-by: Graeme Russ graeme.russ@gmail.com
include/configs/eNET.h | 2 +- 1 files changed, 1 insertions(+), 1 deletions(-)
please do this at the sametime you rename the macro
Best Regards, J.
Jean-Christophe PLAGNIOL-VILLARD wrote:
On 10:29 Sun 07 Dec , Graeme Russ wrote:
Forgotten in commit d1f2d102a266804a50ff0cd9794459791f057c94
Signed-off-by: Graeme Russ graeme.russ@gmail.com
include/configs/eNET.h | 2 +- 1 files changed, 1 insertions(+), 1 deletions(-)
please do this at the sametime you rename the macro
Best Regards, J.
What is the easiest (or best) way of achieving this. The only way I can think of is to: - Roll back my history to the commit before d1f2d102a - Use patch to apply d1f2d102a - Add this change - Commit the resulting changes - Use git-am to apply the remaining patches
Is this the correct way of doing it?
Sorry, but I'm still getting used to git
Regards,
Graeme
On 19:04 Mon 08 Dec , Graeme Russ wrote:
Jean-Christophe PLAGNIOL-VILLARD wrote:
On 10:29 Sun 07 Dec , Graeme Russ wrote:
Forgotten in commit d1f2d102a266804a50ff0cd9794459791f057c94
Signed-off-by: Graeme Russ graeme.russ@gmail.com
include/configs/eNET.h | 2 +- 1 files changed, 1 insertions(+), 1 deletions(-)
please do this at the sametime you rename the macro
Best Regards, J.
What is the easiest (or best) way of achieving this. The only way I can think of is to:
- Roll back my history to the commit before d1f2d102a
- Use patch to apply d1f2d102a
- Add this change
- Commit the resulting changes
- Use git-am to apply the remaining patches
Is this the correct way of doing it?
You have better tools for this as stgit or quilt
Best Regards, J.
Hi Graeme,
What is the easiest (or best) way of achieving this. The only way I can think of is to:
- Roll back my history to the commit before d1f2d102a
- Use patch to apply d1f2d102a
- Add this change
- Commit the resulting changes
- Use git-am to apply the remaining patches
Is this the correct way of doing it?
The steps you mention should work, but can be a bit time-consuming. git rebase --interactive should do what you want - its useful for combining/splitting/re-ordering previous commits.
http://www.andrewmoore.com/public/index.php/My_git_workflow is a nice reference.
Best, Peter
On 10:29 Sun 07 Dec , Graeme Russ wrote:
Handled by conditional compile
Signed-off-by: Graeme Russ graeme.russ@gmail.com
cpu/i386/sc520/sc520_asm.S | 3 --- 1 files changed, 0 insertions(+), 3 deletions(-)
please do this when you move the file
Best Regards, J.
Dear Graeme Russ,
In message 1228606151-10839-11-git-send-email-graeme.russ@gmail.com you wrote:
Options are now all uniformly CONFIG_SYS_SC520_<option>
Signed-off-by: Graeme Russ graeme.russ@gmail.com
board/sc520_cdp/sc520_cdp.c | 16 ++++++++-------- cpu/i386/sc520/Makefile | 4 ++-- cpu/i386/sc520/sc520.c | 6 +++--- cpu/i386/sc520/sc520_asm.S | 4 ++-- include/configs/eNET.h | 6 +++--- include/configs/sc520_cdp.h | 10 +++++----- include/configs/sc520_spunk.h | 6 +++--- 7 files changed, 26 insertions(+), 26 deletions(-)
Here your patch series finally broke down:
-> git-am -3 -i -u --whitespace=strip ~/Mail/U-Boot/5146 Commit Body is: -------------------------- Renamed SC520 configuration options
Options are now all uniformly CONFIG_SYS_SC520_<option>
Signed-off-by: Graeme Russ graeme.russ@gmail.com -------------------------- Apply? [y]es/[n]o/[e]dit/[v]iew patch/[a]ccept all y Applying: Renamed SC520 configuration options error: cpu/i386/sc520/Makefile: does not exist in index error: cpu/i386/sc520/sc520.c: does not exist in index error: cpu/i386/sc520/sc520_asm.S: does not exist in index fatal: sha1 information is lacking or useless (cpu/i386/sc520/Makefile). Repository lacks necessary blobs to fall back on 3-way merge. Cannot fall back to three-way merge. Patch failed at 0001. When you have resolved this problem run "git am -i -3 --resolved". If you would prefer to skip this patch, instead run "git am -i -3 --skip". To restore the original branch and stop patching run "git am -i -3 --abort".
Please check the current code as is in mainline now, and repost cleaned up patches starting with the current one, i. e. [PATCH 10/15] and higher.
Thanks.
Best regards,
Wolfgang Denk
On Sat, Jan 24, 2009 at 11:18 AM, Wolfgang Denk wd@denx.de wrote:
Dear Graeme Russ,
In message 1228606151-10839-11-git-send-email-graeme.russ@gmail.com you wrote:
Options are now all uniformly CONFIG_SYS_SC520_<option>
Signed-off-by: Graeme Russ graeme.russ@gmail.com
[snip]
Please check the current code as is in mainline now, and repost cleaned up patches starting with the current one, i. e. [PATCH 10/15] and higher.
Thanks Wolfgang - I was actually preparing a brand new patch-set based on Jean-Christophe's comments which was nearly complete - I should have sent through a quick message to the list
Oh well - I'll check out the latest mainline and tidy up the loose ends and send through a new patch-set
Regards,
Graeme
Dear Graeme Russ,
In message 1228606151-10839-10-git-send-email-graeme.russ@gmail.com you wrote:
Generic i386 reset - #define made redundant by weak function
Signed-off-by: Graeme Russ graeme.russ@gmail.com
include/configs/eNET.h | 1 - include/configs/sc520_cdp.h | 1 - include/configs/sc520_spunk.h | 1 - 3 files changed, 0 insertions(+), 3 deletions(-)
Applied, thanks.
Best regards,
Wolfgang Denk
On 10:29 Sun 07 Dec , Graeme Russ wrote:
CONFIG_SC520 is now used for conditional compile
Signed-off-by: Graeme Russ graeme.russ@gmail.com
cpu/i386/sc520/sc520.c | 4 ---- 1 files changed, 0 insertions(+), 4 deletions(-)
please do this when you move the file
Best Regards, J.
Dear Graeme Russ,
In message 1228606151-10839-9-git-send-email-graeme.russ@gmail.com you wrote:
CONFIG_SC520 is now used for conditional compile
Signed-off-by: Graeme Russ graeme.russ@gmail.com
cpu/i386/sc520/sc520.c | 4 ---- 1 files changed, 0 insertions(+), 4 deletions(-)
Applied, thanks.
Best regards,
Wolfgang Denk
Dear Graeme Russ,
In message 1228606151-10839-7-git-send-email-graeme.russ@gmail.com you wrote:
Moved from interrupts.c to cpu.c and made into a weak function to allow vendor specific override
Signed-off-by: Graeme Russ graeme.russ@gmail.com
Vendor specific CPU reset (like the AMD SC520 MMCR reset) can now be added to the vendor specific code without the need to remember to #undef usage of the generic method and if you forget to include your custom reset method, you will always get the default
cpu/i386/cpu.c | 17 +++++++++++++++++ cpu/i386/interrupts.c | 16 ---------------- 2 files changed, 17 insertions(+), 16 deletions(-)
Applied, thanks.
Best regards,
Wolfgang Denk
Dear Graeme Russ,
In message 1228606151-10839-6-git-send-email-graeme.russ@gmail.com you wrote:
Signed-off-by: Graeme Russ graeme.russ@gmail.com
This allows for future tidy ups and functionality that will require set_vector ()
cpu/i386/interrupts.c | 3 ++- include/asm-i386/interrupt.h | 29 +++++++++++++++++++++++++++++ 2 files changed, 31 insertions(+), 1 deletions(-) create mode 100644 include/asm-i386/interrupt.h
Applied, thanks.
Best regards,
Wolfgang Denk
Dear Graeme Russ,
In message 1228606151-10839-5-git-send-email-graeme.russ@gmail.com you wrote:
--===============0789679670==
Signed-off-by: Graeme Russ graeme.russ@gmail.com
Makefile | 8 +++--- cpu/i386/Makefile | 3 +- cpu/i386/sc520/Makefile | 52 ++++++++++++++++++++++++++++++++++++++ cpu/i386/{ => sc520}/sc520.c | 0 cpu/i386/{ => sc520}/sc520_asm.S | 0 5 files changed, 57 insertions(+), 6 deletions(-) create mode 100644 cpu/i386/sc520/Makefile rename cpu/i386/{ => sc520}/sc520.c (100%) rename cpu/i386/{ => sc520}/sc520_asm.S (100%)
Applied, thanks.
Best regards,
Wolfgang Denk
On 10:28 Sun 07 Dec , Graeme Russ wrote:
Signed-off-by: Graeme Russ graeme.russ@gmail.com
board/eNET/u-boot.lds | 6 +++--- 1 files changed, 3 insertions(+), 3 deletions(-)
This need to be done at the same time as the rename to avoid git-bisect error as example and keep a clean history.
Best Regards, J.
Dear Jean-Christophe PLAGNIOL-VILLARD,
In message 20081208063312.GA27485@game.jcrosoft.org you wrote:
On 10:28 Sun 07 Dec , Graeme Russ wrote:
Signed-off-by: Graeme Russ graeme.russ@gmail.com
board/eNET/u-boot.lds | 6 +++--- 1 files changed, 3 insertions(+), 3 deletions(-)
This need to be done at the same time as the rename to avoid git-bisect error as example and keep a clean history.
You are right. I merged the two patches into one.
Best regards,
Wolfgang Denk
Dear Graeme Russ,
In message 1228606151-10839-4-git-send-email-graeme.russ@gmail.com you wrote:
Signed-off-by: Graeme Russ graeme.russ@gmail.com
board/eNET/u-boot.lds | 6 +++--- 1 files changed, 3 insertions(+), 3 deletions(-)
Applied (squashed into previous commit).
Best regards,
Wolfgang Denk
Dear Graeme Russ,
In message 1228606151-10839-3-git-send-email-graeme.russ@gmail.com you wrote:
--===============0593892280==
Brings i386 in line with other CPUs with a reset vector and frees up reset.c for CPU reset functions
Signed-off-by: Graeme Russ graeme.russ@gmail.com
Makefile | 2 +- board/sc520_cdp/u-boot.lds | 6 +++--- board/sc520_spunk/u-boot.lds | 6 +++--- cpu/i386/Makefile | 2 +- cpu/i386/reset.S | 37 ------------------------------------- cpu/i386/resetvec.S | 37 +++++++++++++++++++++++++++++++++++++ 6 files changed, 45 insertions(+), 45 deletions(-) delete mode 100644 cpu/i386/reset.S create mode 100644 cpu/i386/resetvec.S
Applied, thanks.
Best regards,
Wolfgang Denk
Dear Graeme Russ,
In message 1228606151-10839-2-git-send-email-graeme.russ@gmail.com you wrote:
--===============1515044148==
Signed-off-by: Graeme Russ graeme.russ@gmail.com
MAKEALL | 1 + Makefile | 3 + board/eNET/Makefile | 57 ++++++++++ board/eNET/config.mk | 24 +++++ board/eNET/eNET.c | 167 ++++++++++++++++++++++++++++++ board/eNET/eNET_start.S | 50 +++++++++ board/eNET/eNET_start16.S | 90 ++++++++++++++++ board/eNET/hardware.h | 35 +++++++ board/eNET/u-boot.lds | 90 ++++++++++++++++ include/configs/eNET.h | 249 +++++++++++++++++++++++++++++++++++++++++++++ 10 files changed, 766 insertions(+), 0 deletions(-) create mode 100644 board/eNET/Makefile create mode 100644 board/eNET/config.mk create mode 100644 board/eNET/eNET.c create mode 100644 board/eNET/eNET_start.S create mode 100644 board/eNET/eNET_start16.S create mode 100644 board/eNET/hardware.h create mode 100644 board/eNET/u-boot.lds create mode 100644 include/configs/eNET.h
Applied, thanks.
Best regards,
Wolfgang Denk
participants (4)
-
Graeme Russ -
Jean-Christophe PLAGNIOL-VILLARD -
Peter Tyser -
Wolfgang Denk