[U-Boot-Users] [ARM-AT91RM9200] Should D-Cache be OFF for booting Linux-ARM?

Dear All,
My U-Boot dev. Env: eldk-arm-linux-x86 v3.1.1, ARCH=arm, CPU=AT91RM9200, BOARD="custom"
I would like to know if D-Cache has to be set OFF or ON in order to boot Linux?
Because at first I enable the D-Cache into start.S, but the Linux kernel source codes (arch/arm/kernel/head-armv.S) require that D-Cache must be OFF by the boot loader.
What do U-Boot developers while booting Linux-arm from U-Boot?
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Here is my cp15 initialization, coded into start.S
CacheInit: /* * Read/modify/write CP15 control register * disable MMU, enable I-Cache, select Asychronous Clocking Mode */
/* read cp15 control register (cp15 r1) in r0 */ mrc p15, 0, r0, c1, c0, 0 /* clear bits 13, 9:8 (--V- --RS) */ bic r0, r0, #0x00002300 /* clear bits 7, 2:0 (B--- -CAM) */ bic r0, r0, #0x00000087 /* set bit 1 (A) Alignment Fault Enable */ orr r0, r0, #0x00000002
#if 0 /*----------------------------------------------------*/ /*-- BEWARE: Linux Kernel requires D-Cache OFF --*/ /*----------------------------------------------------*/
/* set bit 2 (C) D-Cache ON */ orr r0, r0, #0x00000004 #endif
/* set bit 12 (I) I-Cache ON */ orr r0, r0, #0x00001000 /* set bits 31:30 (iA, nF) Asynchronous Clocking mode */ orr r0, r0, #0xC0000000 /* write r0 in cp15 control register (cp15 r1) */ mcr p15, 0, r0, c1, c0, 0
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Many thanks for your collaboration.
Regards - Luc

"Paugam Luc" luc.paugam@thomson.net schreibt:
My U-Boot dev. Env: eldk-arm-linux-x86 v3.1.1, ARCH=arm, CPU=AT91RM9200, BOARD="custom"
I would like to know if D-Cache has to be set OFF or ON in order to boot Linux?
OFF (see http://www.arm.linux.org/developer/booting.php)
Because at first I enable the D-Cache into start.S, but the Linux kernel source codes (arch/arm/kernel/head-armv.S) require that D-Cache must be OFF by the boot loader.
Then you already knew the answer to your question.
What do U-Boot developers while booting Linux-arm from U-Boot?
Follow the guidelines from rmk, of course.
Here is my cp15 initialization, coded into start.S
Err, why don't you use the already present cpu/arm920t/start.S and cpu/arm920t/at91rm9200/lowlevel_init.S ?
/* set bits 31:30 (iA, nF) Asynchronous Clocking mode */ orr r0, r0, #0xC0000000
Don't touch the clocking mode until /after/ you have set up the PLLs and given them time to stabilize!
Cheers Anders
participants (2)
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Anders Larsen
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Paugam Luc