[PATCH] fs: ext4: Fix alignment of cache buffers

From: Jan Kiszka jan.kiszka@siemens.com
We need to align the cache buffer to ARCH_DMA_MINALIGN in order to avoid access errors like
CACHE: Misaligned operation at range [be0231e0, be0235e0]
seen on the MCIMX7SABRE.
Fixes: d5aee659f217 ("fs: ext4: cache extent data") Signed-off-by: Jan Kiszka jan.kiszka@siemens.com --- fs/ext4/ext4fs.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/fs/ext4/ext4fs.c b/fs/ext4/ext4fs.c index 1c616a26a2..966b427a97 100644 --- a/fs/ext4/ext4fs.c +++ b/fs/ext4/ext4fs.c @@ -288,7 +288,7 @@ int ext_cache_read(struct ext_block_cache *cache, lbaint_t block, int size) if (cache->buf && cache->block == block && cache->size == size) return 1; ext_cache_fini(cache); - cache->buf = malloc(size); + cache->buf = memalign(ARCH_DMA_MINALIGN, size); if (!cache->buf) return 0; if (!ext4fs_devread(block, 0, size, cache->buf)) {

On Wed, Mar 25, 2020 at 09:27:51PM +0100, Jan Kiszka wrote:
From: Jan Kiszka jan.kiszka@siemens.com
We need to align the cache buffer to ARCH_DMA_MINALIGN in order to avoid access errors like
CACHE: Misaligned operation at range [be0231e0, be0235e0]
seen on the MCIMX7SABRE.
Fixes: d5aee659f217 ("fs: ext4: cache extent data") Signed-off-by: Jan Kiszka jan.kiszka@siemens.com
fs/ext4/ext4fs.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/fs/ext4/ext4fs.c b/fs/ext4/ext4fs.c index 1c616a26a2..966b427a97 100644 --- a/fs/ext4/ext4fs.c +++ b/fs/ext4/ext4fs.c @@ -288,7 +288,7 @@ int ext_cache_read(struct ext_block_cache *cache, lbaint_t block, int size) if (cache->buf && cache->block == block && cache->size == size) return 1; ext_cache_fini(cache);
- cache->buf = malloc(size);
- cache->buf = memalign(ARCH_DMA_MINALIGN, size); if (!cache->buf) return 0; if (!ext4fs_devread(block, 0, size, cache->buf)) {
Thanks for digging in to this.
Reviewed-by: Tom Rini trini@konsulko.com

On 3/25/20 2:27 PM, Jan Kiszka wrote:
From: Jan Kiszka jan.kiszka@siemens.com
We need to align the cache buffer to ARCH_DMA_MINALIGN in order to avoid access errors like
CACHE: Misaligned operation at range [be0231e0, be0235e0]
seen on the MCIMX7SABRE.
Fixes: d5aee659f217 ("fs: ext4: cache extent data") Signed-off-by: Jan Kiszka jan.kiszka@siemens.com
Reviewed-by: Stephen Warren swarren@nvidia.com
It's probably just a fluke that this happens to show up on some SoCs/boards/configurations but not others. Or perhaps the MINALIGN value differs?

On Wed, Mar 25, 2020 at 8:28 PM Jan Kiszka jan.kiszka@siemens.com wrote:
From: Jan Kiszka jan.kiszka@siemens.com
We need to align the cache buffer to ARCH_DMA_MINALIGN in order to avoid access errors like
CACHE: Misaligned operation at range [be0231e0, be0235e0]
seen on the MCIMX7SABRE.
I've also seen this on some i.MX6 devices such as Wandboard, Hummingboard Edge and the UDOO Neo. Tested on the later two, thanks for this fix.
Tested-by: Peter Robinson pbrobinson@gmail.com
Fixes: d5aee659f217 ("fs: ext4: cache extent data") Signed-off-by: Jan Kiszka jan.kiszka@siemens.com
fs/ext4/ext4fs.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/fs/ext4/ext4fs.c b/fs/ext4/ext4fs.c index 1c616a26a2..966b427a97 100644 --- a/fs/ext4/ext4fs.c +++ b/fs/ext4/ext4fs.c @@ -288,7 +288,7 @@ int ext_cache_read(struct ext_block_cache *cache, lbaint_t block, int size) if (cache->buf && cache->block == block && cache->size == size) return 1; ext_cache_fini(cache);
cache->buf = malloc(size);
cache->buf = memalign(ARCH_DMA_MINALIGN, size); if (!cache->buf) return 0; if (!ext4fs_devread(block, 0, size, cache->buf)) {
-- 2.16.4
-- Siemens AG, Corporate Technology, CT RDA IOT SES-DE Corporate Competence Center Embedded Linux

On Wed, Mar 25, 2020 at 09:27:51PM +0100, Jan Kiszka wrote:
From: Jan Kiszka jan.kiszka@siemens.com
We need to align the cache buffer to ARCH_DMA_MINALIGN in order to avoid access errors like
CACHE: Misaligned operation at range [be0231e0, be0235e0]
seen on the MCIMX7SABRE.
Fixes: d5aee659f217 ("fs: ext4: cache extent data") Signed-off-by: Jan Kiszka jan.kiszka@siemens.com Reviewed-by: Tom Rini trini@konsulko.com Reviewed-by: Stephen Warren swarren@nvidia.com Tested-by: Peter Robinson pbrobinson@gmail.com
Applied to u-boot/master, thanks!
participants (4)
-
Jan Kiszka
-
Peter Robinson
-
Stephen Warren
-
Tom Rini