[PATCH 1/4] board: freescale: ls1028a: mux changes for lpuart
From: Yuantian Tang andy.tang@nxp.com
mux changes in board file to enable lpuart1 and macro define for lpuart1 used for mux changes in board configuation register 13
Signed-off-by: Vabhav Sharma vabhav.sharma@nxp.com Signed-off-by: Yuantian Tang andy.tang@nxp.com --- board/freescale/ls1028a/ls1028a.c | 32 +++++++++++++++++++++++++++++++ include/configs/ls1028aqds.h | 7 +++++++ 2 files changed, 39 insertions(+)
diff --git a/board/freescale/ls1028a/ls1028a.c b/board/freescale/ls1028a/ls1028a.c index aa93534ac6..3659e7daf3 100644 --- a/board/freescale/ls1028a/ls1028a.c +++ b/board/freescale/ls1028a/ls1028a.c @@ -31,6 +31,7 @@ DECLARE_GLOBAL_DATA_PTR;
int config_board_mux(void) { +#ifndef CONFIG_LPUART #if defined(CONFIG_TARGET_LS1028AQDS) && defined(CONFIG_FSL_QIXIS) u8 reg;
@@ -55,9 +56,18 @@ int config_board_mux(void) reg &= ~(0xc0); QIXIS_WRITE(brdcfg[15], reg); #endif +#endif + return 0; }
+#ifdef CONFIG_LPUART +u32 get_lpuart_clk(void) +{ + return gd->bus_clk / CONFIG_SYS_FSL_LPUART_CLK_DIV; +} +#endif + int board_init(void) { #ifdef CONFIG_ENV_IS_NOWHERE @@ -120,11 +130,33 @@ int misc_init_r(void)
int board_early_init_f(void) { +#ifdef CONFIG_LPUART + u8 uart; +#endif + #ifdef CONFIG_SYS_I2C_EARLY_INIT i2c_early_init_f(); #endif
fsl_lsch3_early_init_f(); + +#ifdef CONFIG_LPUART + /* + * Field| Function + * -------------------------------------------------------------- + * 7-6 | Controls I2C3 routing (net CFG_MUX_I2C3): + * I2C3 | 11= Routes {SCL, SDA} to LPUART1 header as {SOUT, SIN}. + * -------------------------------------------------------------- + * 5-4 | Controls I2C4 routing (net CFG_MUX_I2C4): + * I2C4 |11= Routes {SCL, SDA} to LPUART1 header as {CTS_B, RTS_B}. + */ + /* use lpuart0 as system console */ + uart = QIXIS_READ(brdcfg[13]); + uart &= ~CFG_LPUART_MUX_MASK; + uart |= CFG_LPUART_EN; + QIXIS_WRITE(brdcfg[13], uart); +#endif + return 0; }
diff --git a/include/configs/ls1028aqds.h b/include/configs/ls1028aqds.h index 982df07bb0..b3c12420eb 100644 --- a/include/configs/ls1028aqds.h +++ b/include/configs/ls1028aqds.h @@ -66,6 +66,13 @@ #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE #endif
+/* LPUART */ +#ifdef CONFIG_LPUART +#define CONFIG_LPUART_32B_REG +#define CFG_LPUART_MUX_MASK 0xf0 +#define CFG_LPUART_EN 0xf0 +#endif + /* SATA */ #define CONFIG_SCSI_AHCI_PLAT
From: Yuantian Tang andy.tang@nxp.com
Add lpuart nodes to enable lpuart feature
Signed-off-by: Vabhav Sharma vabhav.sharma@nxp.com Signed-off-by: Yuantian Tang andy.tang@nxp.com --- arch/arm/dts/fsl-ls1028a.dtsi | 60 +++++++++++++++++++++++++++++++++++ 1 file changed, 60 insertions(+)
diff --git a/arch/arm/dts/fsl-ls1028a.dtsi b/arch/arm/dts/fsl-ls1028a.dtsi index 5365bfb1a8..9911690e5c 100644 --- a/arch/arm/dts/fsl-ls1028a.dtsi +++ b/arch/arm/dts/fsl-ls1028a.dtsi @@ -240,6 +240,66 @@ status = "disabled"; };
+ lpuart0: serial@2260000 { + compatible = "fsl,ls1021a-lpuart"; + reg = <0x0 0x2260000 0x0 0x1000>; + interrupts = <0 232 0x4>; + clocks = <&sysclk>; + clock-names = "ipg"; + little-endian; + status = "disabled"; + }; + + lpuart1: serial@2270000 { + compatible = "fsl,ls1021a-lpuart"; + reg = <0x0 0x2270000 0x0 0x1000>; + interrupts = <0 233 0x4>; + clocks = <&sysclk>; + clock-names = "ipg"; + little-endian; + status = "disabled"; + }; + + lpuart2: serial@2280000 { + compatible = "fsl,ls1021a-lpuart"; + reg = <0x0 0x2280000 0x0 0x1000>; + interrupts = <0 234 0x4>; + clocks = <&sysclk>; + clock-names = "ipg"; + little-endian; + status = "disabled"; + }; + + lpuart3: serial@2290000 { + compatible = "fsl,ls1021a-lpuart"; + reg = <0x0 0x2290000 0x0 0x1000>; + interrupts = <0 235 0x4>; + clocks = <&sysclk>; + clock-names = "ipg"; + little-endian; + status = "disabled"; + }; + + lpuart4: serial@22a0000 { + compatible = "fsl,ls1021a-lpuart"; + reg = <0x0 0x22a0000 0x0 0x1000>; + interrupts = <0 236 0x4>; + clocks = <&sysclk>; + clock-names = "ipg"; + little-endian; + status = "disabled"; + }; + + lpuart5: serial@22b0000 { + compatible = "fsl,ls1021a-lpuart"; + reg = <0x0 0x22b0000 0x0 0x1000>; + interrupts = <0 237 0x4>; + clocks = <&sysclk>; + clock-names = "ipg"; + little-endian; + status = "disabled"; + }; + usb1: usb3@3100000 { compatible = "fsl,layerscape-dwc3"; reg = <0x0 0x3100000 0x0 0x10000>;
From: Yuantian Tang andy.tang@nxp.com
Rename fsl-ls1028a-qds.dts to fsl-ls1028a-qds.dtsi so that it can be used as common device tree for lpuart and duart. Add lpuart device tree and duart device tree respectively for qds which are used with duart and lpuart console.
Signed-off-by: Vabhav Sharma vabhav.sharma@nxp.com Signed-off-by: Yuantian Tang andy.tang@nxp.com --- arch/arm/dts/Makefile | 3 ++- arch/arm/dts/fsl-ls1028a-qds-duart.dts | 15 +++++++++++++++ arch/arm/dts/fsl-ls1028a-qds-lpuart.dts | 15 +++++++++++++++ .../{fsl-ls1028a-qds.dts => fsl-ls1028a-qds.dtsi} | 4 ++++ configs/ls1028aqds_tfa_SECURE_BOOT_defconfig | 2 +- configs/ls1028aqds_tfa_defconfig | 2 +- 6 files changed, 38 insertions(+), 3 deletions(-) create mode 100644 arch/arm/dts/fsl-ls1028a-qds-duart.dts create mode 100644 arch/arm/dts/fsl-ls1028a-qds-lpuart.dts rename arch/arm/dts/{fsl-ls1028a-qds.dts => fsl-ls1028a-qds.dtsi} (98%)
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index 9303beb2f5..f9c8c30303 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -370,7 +370,8 @@ dtb-$(CONFIG_FSL_LSCH3) += fsl-ls2080a-qds.dtb \ fsl-ls1088a-rdb.dtb \ fsl-ls1088a-qds.dtb \ fsl-ls1028a-rdb.dtb \ - fsl-ls1028a-qds.dtb \ + fsl-ls1028a-qds-duart.dtb \ + fsl-ls1028a-qds-lpuart.dtb \ fsl-lx2160a-rdb.dtb \ fsl-lx2160a-qds.dtb dtb-$(CONFIG_FSL_LSCH2) += fsl-ls1043a-qds-duart.dtb \ diff --git a/arch/arm/dts/fsl-ls1028a-qds-duart.dts b/arch/arm/dts/fsl-ls1028a-qds-duart.dts new file mode 100644 index 0000000000..83264e0f54 --- /dev/null +++ b/arch/arm/dts/fsl-ls1028a-qds-duart.dts @@ -0,0 +1,15 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Device Tree file for Freescale Layerscape-1028AQDS family SoC. + * + * Copyright 2020 NXP + */ + +/dts-v1/; +#include "fsl-ls1028a-qds.dtsi" + +/ { + chosen { + stdout-path = &serial0; + }; +}; diff --git a/arch/arm/dts/fsl-ls1028a-qds-lpuart.dts b/arch/arm/dts/fsl-ls1028a-qds-lpuart.dts new file mode 100644 index 0000000000..063857b2f2 --- /dev/null +++ b/arch/arm/dts/fsl-ls1028a-qds-lpuart.dts @@ -0,0 +1,15 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Device Tree file for Freescale Layerscape-1028AQDS family SoC. + * + * Copyright 2020 NXP + */ + +/dts-v1/; +#include "fsl-ls1028a-qds.dtsi" + +/ { + chosen { + stdout-path = &lpuart0; + }; +}; diff --git a/arch/arm/dts/fsl-ls1028a-qds.dts b/arch/arm/dts/fsl-ls1028a-qds.dtsi similarity index 98% rename from arch/arm/dts/fsl-ls1028a-qds.dts rename to arch/arm/dts/fsl-ls1028a-qds.dtsi index 3fd37beedf..649c5ee8e3 100644 --- a/arch/arm/dts/fsl-ls1028a-qds.dts +++ b/arch/arm/dts/fsl-ls1028a-qds.dtsi @@ -149,6 +149,10 @@ status = "okay"; };
+&lpuart0 { + status = "okay"; +}; + &sata { status = "okay"; }; diff --git a/configs/ls1028aqds_tfa_SECURE_BOOT_defconfig b/configs/ls1028aqds_tfa_SECURE_BOOT_defconfig index d0051bb682..6bc732f3e5 100644 --- a/configs/ls1028aqds_tfa_SECURE_BOOT_defconfig +++ b/configs/ls1028aqds_tfa_SECURE_BOOT_defconfig @@ -28,7 +28,7 @@ CONFIG_CMD_USB=y CONFIG_CMD_WDT=y CONFIG_CMD_CACHE=y CONFIG_OF_CONTROL=y -CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1028a-qds" +CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1028a-qds-duart" CONFIG_NET_RANDOM_ETHADDR=y CONFIG_NETCONSOLE=y CONFIG_DM=y diff --git a/configs/ls1028aqds_tfa_defconfig b/configs/ls1028aqds_tfa_defconfig index 7085be77fe..e8f1f57920 100644 --- a/configs/ls1028aqds_tfa_defconfig +++ b/configs/ls1028aqds_tfa_defconfig @@ -30,7 +30,7 @@ CONFIG_CMD_WDT=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_CACHE=y CONFIG_OF_CONTROL=y -CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1028a-qds" +CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1028a-qds-duart" CONFIG_ENV_IS_IN_MMC=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_ENV_ADDR=0x20500000
From: Yuantian Tang andy.tang@nxp.com
Add lpuart config to enable lpuart feature.
Signed-off-by: Vabhav Sharma vabhav.sharma@nxp.com Signed-off-by: Yuantian Tang andy.tang@nxp.com. --- configs/ls1028aqds_tfa_lpuart_defconfig | 88 +++++++++++++++++++++++++ 1 file changed, 88 insertions(+) create mode 100644 configs/ls1028aqds_tfa_lpuart_defconfig
diff --git a/configs/ls1028aqds_tfa_lpuart_defconfig b/configs/ls1028aqds_tfa_lpuart_defconfig new file mode 100644 index 0000000000..417f29217a --- /dev/null +++ b/configs/ls1028aqds_tfa_lpuart_defconfig @@ -0,0 +1,88 @@ +CONFIG_ARM=y +CONFIG_TARGET_LS1028AQDS=y +CONFIG_TFABOOT=y +CONFIG_SYS_MALLOC_F_LEN=0x6000 +CONFIG_ENV_SIZE=0x2000 +CONFIG_ENV_SECT_SIZE=0x40000 +CONFIG_ENV_OFFSET=0x500000 +CONFIG_DM_GPIO=y +CONFIG_FSPI_AHB_EN_4BYTE=y +CONFIG_NR_DRAM_BANKS=2 +CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT=y +CONFIG_SEC_FIRMWARE_ARMV8_PSCI=y +CONFIG_AHCI=y +CONFIG_DISTRO_DEFAULTS=y +CONFIG_FIT_VERBOSE=y +CONFIG_OF_BOARD_SETUP=y +CONFIG_OF_STDOUT_VIA_ALIAS=y +CONFIG_BOOTDELAY=10 +CONFIG_USE_BOOTARGS=y +CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 ramdisk_size=0x2000000 default_hugepagesz=2m hugepagesz=2m hugepages=256 video=1920x1080-32@60 cma=256M" +CONFIG_SYS_EXTRA_OPTIONS="LPUART" +CONFIG_MISC_INIT_R=y +CONFIG_CMD_GREPENV=y +CONFIG_CMD_DM=y +CONFIG_CMD_GPT=y +CONFIG_CMD_I2C=y +CONFIG_CMD_MMC=y +CONFIG_CMD_PCI=y +CONFIG_CMD_USB=y +CONFIG_CMD_WDT=y +# CONFIG_CMD_SETEXPR is not set +CONFIG_CMD_CACHE=y +CONFIG_OF_CONTROL=y +CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1028a-qds-lpuart" +CONFIG_ENV_IS_IN_MMC=y +CONFIG_ENV_IS_IN_SPI_FLASH=y +CONFIG_ENV_ADDR=0x20500000 +CONFIG_NET_RANDOM_ETHADDR=y +CONFIG_NETCONSOLE=y +CONFIG_DM=y +CONFIG_SCSI_AHCI=y +CONFIG_SATA_CEVA=y +CONFIG_FSL_CAAM=y +CONFIG_DM_I2C=y +CONFIG_I2C_SET_DEFAULT_BUS_NUM=y +CONFIG_I2C_DEFAULT_BUS_NUMBER=0 +CONFIG_I2C_MUX=y +CONFIG_I2C_MUX_PCA954x=y +CONFIG_DM_MMC=y +CONFIG_FSL_ESDHC=y +CONFIG_MTD=y +CONFIG_DM_SPI_FLASH=y +CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_FLASH_STMICRO=y +# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set +CONFIG_PHYLIB=y +CONFIG_PHY_AQUANTIA=y +CONFIG_PHY_ATHEROS=y +CONFIG_PHY_VITESSE=y +CONFIG_DM_ETH=y +CONFIG_DM_MDIO=y +CONFIG_DM_MDIO_MUX=y +CONFIG_E1000=y +CONFIG_FSL_ENETC=y +CONFIG_MDIO_MUX_I2CREG=y +CONFIG_PCI=y +CONFIG_DM_PCI=y +CONFIG_DM_PCI_COMPAT=y +CONFIG_PCIE_ECAM_GENERIC=y +CONFIG_PCIE_LAYERSCAPE=y +CONFIG_DM_RTC=y +CONFIG_RTC_PCF2127=y +CONFIG_SCSI=y +CONFIG_DM_SCSI=y +CONFIG_DM_SERIAL=y +CONFIG_FSL_LPUART=y +CONFIG_SPI=y +CONFIG_DM_SPI=y +CONFIG_FSL_DSPI=y +CONFIG_NXP_FSPI=y +CONFIG_USB=y +CONFIG_DM_USB=y +CONFIG_USB_XHCI_HCD=y +CONFIG_USB_XHCI_DWC3=y +CONFIG_WDT=y +CONFIG_WDT_SP805=y +CONFIG_OF_LIBFDT_OVERLAY=y +CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
-----Original Message----- From: U-Boot u-boot-bounces@lists.denx.de On Behalf Of andy.tang@nxp.com Sent: Thursday, March 19, 2020 2:18 PM To: Priyanka Jain priyanka.jain@nxp.com Cc: Sudhanshu Gupta sudhanshu.gupta@nxp.com; u-boot@lists.denx.de; Andy Tang andy.tang@nxp.com; Vabhav Sharma vabhav.sharma@nxp.com Subject: [PATCH 4/4] configs: ls1028aqds: add lpuart config
From: Yuantian Tang andy.tang@nxp.com
Add lpuart config to enable lpuart feature.
Signed-off-by: Vabhav Sharma vabhav.sharma@nxp.com Signed-off-by: Yuantian Tang andy.tang@nxp.com.
configs/ls1028aqds_tfa_lpuart_defconfig | 88 +++++++++++++++++++++++++ 1 file changed, 88 insertions(+) create mode 100644 configs/ls1028aqds_tfa_lpuart_defconfig
diff --git a/configs/ls1028aqds_tfa_lpuart_defconfig b/configs/ls1028aqds_tfa_lpuart_defconfig new file mode 100644 index 0000000000..417f29217a --- /dev/null +++ b/configs/ls1028aqds_tfa_lpuart_defconfig @@ -0,0 +1,88 @@ +CONFIG_ARM=y +CONFIG_TARGET_LS1028AQDS=y +CONFIG_TFABOOT=y +CONFIG_SYS_MALLOC_F_LEN=0x6000 +CONFIG_ENV_SIZE=0x2000 +CONFIG_ENV_SECT_SIZE=0x40000 +CONFIG_ENV_OFFSET=0x500000 +CONFIG_DM_GPIO=y +CONFIG_FSPI_AHB_EN_4BYTE=y +CONFIG_NR_DRAM_BANKS=2 +CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT=y +CONFIG_SEC_FIRMWARE_ARMV8_PSCI=y +CONFIG_AHCI=y +CONFIG_DISTRO_DEFAULTS=y +CONFIG_FIT_VERBOSE=y +CONFIG_OF_BOARD_SETUP=y +CONFIG_OF_STDOUT_VIA_ALIAS=y +CONFIG_BOOTDELAY=10 +CONFIG_USE_BOOTARGS=y +CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 ramdisk_size=0x2000000 default_hugepagesz=2m hugepagesz=2m hugepages=256 video=1920x1080- 32@60 cma=256M" +CONFIG_SYS_EXTRA_OPTIONS="LPUART" +CONFIG_MISC_INIT_R=y +CONFIG_CMD_GREPENV=y +CONFIG_CMD_DM=y +CONFIG_CMD_GPT=y +CONFIG_CMD_I2C=y +CONFIG_CMD_MMC=y +CONFIG_CMD_PCI=y +CONFIG_CMD_USB=y +CONFIG_CMD_WDT=y +# CONFIG_CMD_SETEXPR is not set +CONFIG_CMD_CACHE=y +CONFIG_OF_CONTROL=y +CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1028a-qds-lpuart" +CONFIG_ENV_IS_IN_MMC=y +CONFIG_ENV_IS_IN_SPI_FLASH=y +CONFIG_ENV_ADDR=0x20500000 +CONFIG_NET_RANDOM_ETHADDR=y +CONFIG_NETCONSOLE=y +CONFIG_DM=y +CONFIG_SCSI_AHCI=y +CONFIG_SATA_CEVA=y +CONFIG_FSL_CAAM=y +CONFIG_DM_I2C=y +CONFIG_I2C_SET_DEFAULT_BUS_NUM=y +CONFIG_I2C_DEFAULT_BUS_NUMBER=0 +CONFIG_I2C_MUX=y +CONFIG_I2C_MUX_PCA954x=y +CONFIG_DM_MMC=y +CONFIG_FSL_ESDHC=y +CONFIG_MTD=y +CONFIG_DM_SPI_FLASH=y +CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_FLASH_STMICRO=y +# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set CONFIG_PHYLIB=y +CONFIG_PHY_AQUANTIA=y CONFIG_PHY_ATHEROS=y CONFIG_PHY_VITESSE=y +CONFIG_DM_ETH=y CONFIG_DM_MDIO=y CONFIG_DM_MDIO_MUX=y CONFIG_E1000=y +CONFIG_FSL_ENETC=y CONFIG_MDIO_MUX_I2CREG=y CONFIG_PCI=y +CONFIG_DM_PCI=y CONFIG_DM_PCI_COMPAT=y CONFIG_PCIE_ECAM_GENERIC=y +CONFIG_PCIE_LAYERSCAPE=y CONFIG_DM_RTC=y CONFIG_RTC_PCF2127=y +CONFIG_SCSI=y CONFIG_DM_SCSI=y CONFIG_DM_SERIAL=y CONFIG_FSL_LPUART=y +CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_FSL_DSPI=y CONFIG_NXP_FSPI=y +CONFIG_USB=y CONFIG_DM_USB=y CONFIG_USB_XHCI_HCD=y +CONFIG_USB_XHCI_DWC3=y CONFIG_WDT=y CONFIG_WDT_SP805=y
+CONFIG_OF_LIBFDT_OVERLAY=y CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
2.17.1
Please fix buildman warning +(ls1028aqds_tfa_lpuart) *** Can't find default configuration "arch/../configs/ls1028aqds_tfa_lpuart_defconfig"!
Add Maintainer corresponding to this defconfig in board/freescale/ls1028a/MAINTAINERS
Thanks Priyanka
-----Original Message----- From: U-Boot u-boot-bounces@lists.denx.de On Behalf Of andy.tang@nxp.com Sent: Thursday, March 19, 2020 2:18 PM To: Priyanka Jain priyanka.jain@nxp.com Cc: Sudhanshu Gupta sudhanshu.gupta@nxp.com; u-boot@lists.denx.de; Andy Tang andy.tang@nxp.com; Vabhav Sharma vabhav.sharma@nxp.com Subject: [PATCH 1/4] board: freescale: ls1028a: mux changes for lpuart
From: Yuantian Tang andy.tang@nxp.com
mux changes in board file to enable lpuart1 and macro define for lpuart1 used for mux changes in board configuation register 13
Signed-off-by: Vabhav Sharma vabhav.sharma@nxp.com Signed-off-by: Yuantian Tang andy.tang@nxp.com
board/freescale/ls1028a/ls1028a.c | 32 +++++++++++++++++++++++++++++++ include/configs/ls1028aqds.h | 7 +++++++ 2 files changed, 39 insertions(+)
diff --git a/board/freescale/ls1028a/ls1028a.c b/board/freescale/ls1028a/ls1028a.c index aa93534ac6..3659e7daf3 100644 --- a/board/freescale/ls1028a/ls1028a.c +++ b/board/freescale/ls1028a/ls1028a.c @@ -31,6 +31,7 @@ DECLARE_GLOBAL_DATA_PTR;
int config_board_mux(void) { +#ifndef CONFIG_LPUART #if defined(CONFIG_TARGET_LS1028AQDS) && defined(CONFIG_FSL_QIXIS) u8 reg;
@@ -55,9 +56,18 @@ int config_board_mux(void) reg &= ~(0xc0); QIXIS_WRITE(brdcfg[15], reg); #endif +#endif
- return 0;
}
+#ifdef CONFIG_LPUART +u32 get_lpuart_clk(void) +{
- return gd->bus_clk / CONFIG_SYS_FSL_LPUART_CLK_DIV; } #endif
int board_init(void) { #ifdef CONFIG_ENV_IS_NOWHERE @@ -120,11 +130,33 @@ int misc_init_r(void)
int board_early_init_f(void) { +#ifdef CONFIG_LPUART
- u8 uart;
+#endif
#ifdef CONFIG_SYS_I2C_EARLY_INIT i2c_early_init_f(); #endif
fsl_lsch3_early_init_f();
+#ifdef CONFIG_LPUART
- /*
* Field| Function* --------------------------------------------------------------* 7-6 | Controls I2C3 routing (net CFG_MUX_I2C3):* I2C3 | 11= Routes {SCL, SDA} to LPUART1 header as {SOUT, SIN}.* --------------------------------------------------------------* 5-4 | Controls I2C4 routing (net CFG_MUX_I2C4):* I2C4 |11= Routes {SCL, SDA} to LPUART1 header as {CTS_B, RTS_B}.*/- /* use lpuart0 as system console */
- uart = QIXIS_READ(brdcfg[13]);
- uart &= ~CFG_LPUART_MUX_MASK;
- uart |= CFG_LPUART_EN;
- QIXIS_WRITE(brdcfg[13], uart);
+#endif
- return 0;
}
diff --git a/include/configs/ls1028aqds.h b/include/configs/ls1028aqds.h index 982df07bb0..b3c12420eb 100644 --- a/include/configs/ls1028aqds.h +++ b/include/configs/ls1028aqds.h @@ -66,6 +66,13 @@ #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE #endif
+/* LPUART */ +#ifdef CONFIG_LPUART +#define CONFIG_LPUART_32B_REG +#define CFG_LPUART_MUX_MASK 0xf0 +#define CFG_LPUART_EN 0xf0 +#endif
/* SATA */ #define CONFIG_SCSI_AHCI_PLAT
-- 2.17.1
Series applied on fsl-qoriq. Awaiting upstream. In future, while sending v2 of series, please send the completes series again if none of patch is merged yet. Its difficult to combine.
Thanks Priyanka
participants (2)
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andy.tang＠nxp.com -
Priyanka Jain (OSS)