[U-Boot] [PATCH 1/2] mpc83xx: Add a GPIO driver for the MPC83XX family
Signed-off-by: Joe Hershberger joe.hershberger@ni.com Cc: Joe Hershberger joe.hershberger@gmail.com Cc: Kim Phillips kim.phillips@freescale.com --- arch/powerpc/include/asm/arch-mpc83xx/gpio.h | 37 +++++ arch/powerpc/include/asm/gpio.h | 38 +++++ board/freescale/mpc8313erdb/mpc8313erdb.c | 9 + drivers/gpio/Makefile | 1 + drivers/gpio/mpc83xx_gpio.c | 202 ++++++++++++++++++++++++++ 5 files changed, 287 insertions(+), 0 deletions(-) create mode 100644 arch/powerpc/include/asm/arch-mpc83xx/gpio.h create mode 100644 arch/powerpc/include/asm/gpio.h create mode 100644 drivers/gpio/mpc83xx_gpio.c
diff --git a/arch/powerpc/include/asm/arch-mpc83xx/gpio.h b/arch/powerpc/include/asm/arch-mpc83xx/gpio.h new file mode 100644 index 0000000..4319d07 --- /dev/null +++ b/arch/powerpc/include/asm/arch-mpc83xx/gpio.h @@ -0,0 +1,37 @@ +/* + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef _MPC83XX_GPIO_H_ +#define _MPC83XX_GPIO_H_ + +/* + * The MCP83xx's 1-2 GPIO controllers each with 32 bits. + */ +#if defined(CONFIG_MPC8313) || defined(CONFIG_MPC8308) || defined(CONFIG_MPC8315) + #define MPC83XX_GPIO_CTRLRS 1 +#elif defined(CONFIG_MPC834x) || defined(CONFIG_MPC837x) + #define MPC83XX_GPIO_CTRLRS 2 +#else + #define MPC83XX_GPIO_CTRLRS 0 +#endif + +#define MAX_NUM_GPIOS (32 * MPC83XX_GPIO_CTRLRS) + +void gpio_init_f(void); +void gpio_init_r(void); + +#endif /* MPC83XX_GPIO_H_ */ diff --git a/arch/powerpc/include/asm/gpio.h b/arch/powerpc/include/asm/gpio.h new file mode 100644 index 0000000..eb071d1 --- /dev/null +++ b/arch/powerpc/include/asm/gpio.h @@ -0,0 +1,38 @@ +/* + * Copyright (c) 2011, NVIDIA Corp. All rights reserved. + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef _GPIO_H_ +#define _GPIO_H_ + +#include <asm/arch/gpio.h> +/* + * Generic GPIO API + */ + +int gpio_request(int gp, const char *label); +void gpio_free(int gp); +void gpio_toggle_value(int gp); +int gpio_direction_input(int gp); +int gpio_direction_output(int gp, int value); +int gpio_get_value(int gp); +void gpio_set_value(int gp, int value); + +#endif /* _GPIO_H_ */ diff --git a/board/freescale/mpc8313erdb/mpc8313erdb.c b/board/freescale/mpc8313erdb/mpc8313erdb.c index 08f873d..353b9f4 100644 --- a/board/freescale/mpc8313erdb/mpc8313erdb.c +++ b/board/freescale/mpc8313erdb/mpc8313erdb.c @@ -31,6 +31,9 @@ #include <vsc7385.h> #include <ns16550.h> #include <nand.h> +#if defined(CONFIG_MPC83XX_GPIO) && !defined(CONFIG_NAND_SPL) +#include <asm/gpio.h> +#endif
DECLARE_GLOBAL_DATA_PTR;
@@ -42,6 +45,9 @@ int board_early_init_f(void) if (im->pmc.pmccr1 & PMCCR1_POWER_OFF) gd->flags |= GD_FLG_SILENT; #endif +#if defined(CONFIG_MPC83XX_GPIO) && !defined(CONFIG_NAND_SPL) + gpio_init_f(); +#endif
return 0; } @@ -140,6 +146,9 @@ void board_init_f(ulong bootflag)
void board_init_r(gd_t *gd, ulong dest_addr) { +#if defined(CONFIG_MPC83XX_GPIO) && !defined(CONFIG_NAND_SPL) + gpio_init_r(); +#endif nand_boot(); }
diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile index 62ec97d..563b8ec 100644 --- a/drivers/gpio/Makefile +++ b/drivers/gpio/Makefile @@ -33,6 +33,7 @@ COBJS-$(CONFIG_PCA953X) += pca953x.o COBJS-$(CONFIG_S5P) += s5p_gpio.o COBJS-$(CONFIG_TEGRA2_GPIO) += tegra2_gpio.o COBJS-$(CONFIG_DA8XX_GPIO) += da8xx_gpio.o +COBJS-$(CONFIG_MPC83XX_GPIO) += mpc83xx_gpio.o
COBJS := $(COBJS-y) SRCS := $(COBJS:.o=.c) diff --git a/drivers/gpio/mpc83xx_gpio.c b/drivers/gpio/mpc83xx_gpio.c new file mode 100644 index 0000000..4f100b9 --- /dev/null +++ b/drivers/gpio/mpc83xx_gpio.c @@ -0,0 +1,202 @@ +/* + * Freescale MPC83xx GPIO handling. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <mpc83xx.h> +#include <asm/gpio.h> + +#ifndef MPC83XX_GPIO_0_INIT_DIRECTION + #define MPC83XX_GPIO_0_INIT_DIRECTION 0 +#endif +#ifndef MPC83XX_GPIO_1_INIT_DIRECTION + #define MPC83XX_GPIO_1_INIT_DIRECTION 0 +#endif +#ifndef MPC83XX_GPIO_0_INIT_OPEN_DRAIN + #define MPC83XX_GPIO_0_INIT_OPEN_DRAIN 0 +#endif +#ifndef MPC83XX_GPIO_1_INIT_OPEN_DRAIN + #define MPC83XX_GPIO_1_INIT_OPEN_DRAIN 0 +#endif +#ifndef MPC83XX_GPIO_0_INIT_VALUE + #define MPC83XX_GPIO_0_INIT_VALUE 0 +#endif +#ifndef MPC83XX_GPIO_1_INIT_VALUE + #define MPC83XX_GPIO_1_INIT_VALUE 0 +#endif + +static unsigned int gpio_output_value[MPC83XX_GPIO_CTRLRS]; + +/* + * Generic_GPIO primitives. + */ + +int gpio_request(int gp, const char *label) +{ + if (gp >= MAX_NUM_GPIOS) + return -1; + + return 0; +} + +void gpio_free(int gp) +{ +} + +/* set GPIO pin 'gp' as an input */ +int gpio_direction_input(int gp) +{ + volatile immap_t *im = (immap_t *)CONFIG_SYS_IMMR; + unsigned int ctrlr; + unsigned int line; + unsigned int lineMask; + + /* 32-bits per controller */ + ctrlr = gp >> 5; + line = gp & (0x1F); + + /* Big endian */ + lineMask = 1 << (31 - line); + + im->gpio[ctrlr].dir &= ~lineMask; + + return 0; +} + +void gpio_toggle_value(int gp) +{ + gpio_set_value(gp, !gpio_get_value(gp)); +} + +/* set GPIO pin 'gp' as an output, with polarity 'value' */ +int gpio_direction_output(int gp, int value) +{ + volatile immap_t *im = (immap_t *)CONFIG_SYS_IMMR; + unsigned int ctrlr; + unsigned int line; + unsigned int lineMask; + + if (value != 0 && value != 1) { + printf("Error: Value parameter must be 0 or 1.\n"); + return -1; + } + + gpio_set_value(gp, value); + + /* 32-bits per controller */ + ctrlr = gp >> 5; + line = gp & (0x1F); + + /* Big endian */ + lineMask = 1 << (31 - line); + + /* Make the line output */ + im->gpio[ctrlr].dir |= lineMask; + + return 0; +} + +/* read GPIO IN value of pin 'gp' */ +int gpio_get_value(int gp) +{ + volatile immap_t *im = (immap_t *)CONFIG_SYS_IMMR; + unsigned int ctrlr; + unsigned int line; + unsigned int lineMask; + + /* 32-bits per controller */ + ctrlr = gp >> 5; + line = gp & (0x1F); + + /* Big endian */ + lineMask = 1 << (31 - line); + + /* Read the value and mask off the bit */ + return (im->gpio[ctrlr].dat & lineMask) != 0; +} + +/* write GPIO OUT value to pin 'gp' */ +void gpio_set_value(int gp, int value) +{ + volatile immap_t *im = (immap_t *)CONFIG_SYS_IMMR; + unsigned int ctrlr; + unsigned int line; + unsigned int lineMask; + + if (value != 0 && value != 1) { + printf("Error: Value parameter must be 0 or 1.\n"); + return; + } + + /* 32-bits per controller */ + ctrlr = gp >> 5; + line = gp & (0x1F); + + /* Big endian */ + lineMask = 1 << (31 - line); + + /* Update the local output buffer soft copy */ + gpio_output_value[ctrlr] = + (gpio_output_value[ctrlr] & ~lineMask) | (value ? lineMask : 0); + + /* Write the output */ + im->gpio[ctrlr].dat = gpio_output_value[ctrlr]; +} + +/* Configure GPIO registers early */ +void gpio_init_f() +{ + volatile immap_t *im = (immap_t *)CONFIG_SYS_IMMR; + +#if MPC83XX_GPIO_CTRLRS >= 1 + gpio_output_value[0] = MPC83XX_GPIO_0_INIT_VALUE; + + im->gpio[0].dir = MPC83XX_GPIO_0_INIT_DIRECTION; + im->gpio[0].odr = MPC83XX_GPIO_0_INIT_OPEN_DRAIN; + im->gpio[0].dat = MPC83XX_GPIO_0_INIT_VALUE; + im->gpio[0].ier = 0xFFFFFFFF; /* Clear all events */ + im->gpio[0].imr = 0; + im->gpio[0].icr = 0; +#endif + +#if MPC83XX_GPIO_CTRLRS >= 2 + gpio_output_value[1] = MPC83XX_GPIO_1_INIT_VALUE; + + im->gpio[1].dir = MPC83XX_GPIO_1_INIT_DIRECTION; + im->gpio[1].odr = MPC83XX_GPIO_1_INIT_OPEN_DRAIN; + im->gpio[1].dat = MPC83XX_GPIO_1_INIT_VALUE; + im->gpio[1].ier = 0xFFFFFFFF; /* Clear all events */ + im->gpio[1].imr = 0; + im->gpio[1].icr = 0; +#endif +} + +/* Initialize GPIO soft-copies */ +void gpio_init_r() +{ +#if MPC83XX_GPIO_CTRLRS >= 1 + gpio_output_value[0] = MPC83XX_GPIO_0_INIT_VALUE; +#endif + +#if MPC83XX_GPIO_CTRLRS >= 2 + gpio_output_value[1] = MPC83XX_GPIO_1_INIT_VALUE; +#endif +}
On 08/09/2011 05:31 PM, Joe Hershberger wrote:
diff --git a/arch/powerpc/include/asm/arch-mpc83xx/gpio.h b/arch/powerpc/include/asm/arch-mpc83xx/gpio.h new file mode 100644 index 0000000..4319d07 --- /dev/null +++ b/arch/powerpc/include/asm/arch-mpc83xx/gpio.h
[snip
+void gpio_init_f(void); +void gpio_init_r(void);
These are quite generic function names for 83xx to claim. If it's to be part of the generic gpio API, why not add it to asm/gpio.h?
@@ -140,6 +146,9 @@ void board_init_f(ulong bootflag)
void board_init_r(gd_t *gd, ulong dest_addr) { +#if defined(CONFIG_MPC83XX_GPIO) && !defined(CONFIG_NAND_SPL)
- gpio_init_r();
+#endif nand_boot(); }
This instance of board_init_r() is only for CONFIG_NAND_SPL, so this won't do anything.
Maybe create a board_early_init_r() for this board?
-Scott
On Tue, Aug 9, 2011 at 5:15 PM, Scott Wood scottwood@freescale.com wrote:
On 08/09/2011 05:31 PM, Joe Hershberger wrote:
diff --git a/arch/powerpc/include/asm/arch-mpc83xx/gpio.h b/arch/powerpc/include/asm/arch-mpc83xx/gpio.h new file mode 100644 index 0000000..4319d07 --- /dev/null +++ b/arch/powerpc/include/asm/arch-mpc83xx/gpio.h
[snip
+void gpio_init_f(void); +void gpio_init_r(void);
These are quite generic function names for 83xx to claim. If it's to be part of the generic gpio API, why not add it to asm/gpio.h?
That's a good point. I'll make them board specific since the board init must call them (there isn't a generic place that will call them).
@@ -140,6 +146,9 @@ void board_init_f(ulong bootflag)
void board_init_r(gd_t *gd, ulong dest_addr) { +#if defined(CONFIG_MPC83XX_GPIO) && !defined(CONFIG_NAND_SPL)
- gpio_init_r();
+#endif nand_boot(); }
This instance of board_init_r() is only for CONFIG_NAND_SPL, so this won't do anything.
Maybe create a board_early_init_r() for this board?
Sounds good.
-Joe
Signed-off-by: Joe Hershberger joe.hershberger@ni.com Cc: Joe Hershberger joe.hershberger@gmail.com Cc: Kim Phillips kim.phillips@freescale.com --- Changes for v2: - Improved names of INIT constants (to include "CONFIG_") - Moved changes to board/freescale/mpc8313erdb/mpc8313erdb.c to patch 2/2 Changes for v3: - gpio_init_* is now mpc83xx_gpio_init_*
arch/powerpc/include/asm/arch-mpc83xx/gpio.h | 37 +++++ arch/powerpc/include/asm/gpio.h | 38 +++++ drivers/gpio/Makefile | 1 + drivers/gpio/mpc83xx_gpio.c | 198 ++++++++++++++++++++++++++ 4 files changed, 274 insertions(+), 0 deletions(-) create mode 100644 arch/powerpc/include/asm/arch-mpc83xx/gpio.h create mode 100644 arch/powerpc/include/asm/gpio.h create mode 100644 drivers/gpio/mpc83xx_gpio.c
diff --git a/arch/powerpc/include/asm/arch-mpc83xx/gpio.h b/arch/powerpc/include/asm/arch-mpc83xx/gpio.h new file mode 100644 index 0000000..462a7bf --- /dev/null +++ b/arch/powerpc/include/asm/arch-mpc83xx/gpio.h @@ -0,0 +1,37 @@ +/* + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef _MPC83XX_GPIO_H_ +#define _MPC83XX_GPIO_H_ + +/* + * The MCP83xx's 1-2 GPIO controllers each with 32 bits. + */ +#if defined(CONFIG_MPC8313) || defined(CONFIG_MPC8308) || defined(CONFIG_MPC8315) + #define MPC83XX_GPIO_CTRLRS 1 +#elif defined(CONFIG_MPC834x) || defined(CONFIG_MPC837x) + #define MPC83XX_GPIO_CTRLRS 2 +#else + #define MPC83XX_GPIO_CTRLRS 0 +#endif + +#define MAX_NUM_GPIOS (32 * MPC83XX_GPIO_CTRLRS) + +void mpc83xx_gpio_init_f(void); +void mpc83xx_gpio_init_r(void); + +#endif /* MPC83XX_GPIO_H_ */ diff --git a/arch/powerpc/include/asm/gpio.h b/arch/powerpc/include/asm/gpio.h new file mode 100644 index 0000000..eb071d1 --- /dev/null +++ b/arch/powerpc/include/asm/gpio.h @@ -0,0 +1,38 @@ +/* + * Copyright (c) 2011, NVIDIA Corp. All rights reserved. + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef _GPIO_H_ +#define _GPIO_H_ + +#include <asm/arch/gpio.h> +/* + * Generic GPIO API + */ + +int gpio_request(int gp, const char *label); +void gpio_free(int gp); +void gpio_toggle_value(int gp); +int gpio_direction_input(int gp); +int gpio_direction_output(int gp, int value); +int gpio_get_value(int gp); +void gpio_set_value(int gp, int value); + +#endif /* _GPIO_H_ */ diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile index 62ec97d..563b8ec 100644 --- a/drivers/gpio/Makefile +++ b/drivers/gpio/Makefile @@ -33,6 +33,7 @@ COBJS-$(CONFIG_PCA953X) += pca953x.o COBJS-$(CONFIG_S5P) += s5p_gpio.o COBJS-$(CONFIG_TEGRA2_GPIO) += tegra2_gpio.o COBJS-$(CONFIG_DA8XX_GPIO) += da8xx_gpio.o +COBJS-$(CONFIG_MPC83XX_GPIO) += mpc83xx_gpio.o
COBJS := $(COBJS-y) SRCS := $(COBJS:.o=.c) diff --git a/drivers/gpio/mpc83xx_gpio.c b/drivers/gpio/mpc83xx_gpio.c new file mode 100644 index 0000000..d61f99f --- /dev/null +++ b/drivers/gpio/mpc83xx_gpio.c @@ -0,0 +1,198 @@ +/* + * Freescale MPC83xx GPIO handling. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <mpc83xx.h> +#include <asm/gpio.h> + +#ifndef CONFIG_MPC83XX_GPIO_0_INIT_DIRECTION + #define CONFIG_MPC83XX_GPIO_0_INIT_DIRECTION 0 +#endif +#ifndef CONFIG_MPC83XX_GPIO_1_INIT_DIRECTION + #define CONFIG_MPC83XX_GPIO_1_INIT_DIRECTION 0 +#endif +#ifndef CONFIG_MPC83XX_GPIO_0_INIT_OPEN_DRAIN + #define CONFIG_MPC83XX_GPIO_0_INIT_OPEN_DRAIN 0 +#endif +#ifndef CONFIG_MPC83XX_GPIO_1_INIT_OPEN_DRAIN + #define CONFIG_MPC83XX_GPIO_1_INIT_OPEN_DRAIN 0 +#endif +#ifndef CONFIG_MPC83XX_GPIO_0_INIT_VALUE + #define CONFIG_MPC83XX_GPIO_0_INIT_VALUE 0 +#endif +#ifndef CONFIG_MPC83XX_GPIO_1_INIT_VALUE + #define CONFIG_MPC83XX_GPIO_1_INIT_VALUE 0 +#endif + +static unsigned int gpio_output_value[MPC83XX_GPIO_CTRLRS]; + +/* + * Generic_GPIO primitives. + */ + +int gpio_request(int gp, const char *label) +{ + if (gp >= MAX_NUM_GPIOS) + return -1; + + return 0; +} + +void gpio_free(int gp) +{ +} + +/* set GPIO pin 'gp' as an input */ +int gpio_direction_input(int gp) +{ + volatile immap_t *im = (immap_t *)CONFIG_SYS_IMMR; + unsigned int ctrlr; + unsigned int line; + unsigned int lineMask; + + /* 32-bits per controller */ + ctrlr = gp >> 5; + line = gp & (0x1F); + + /* Big endian */ + lineMask = 1 << (31 - line); + + im->gpio[ctrlr].dir &= ~lineMask; + + return 0; +} + +void gpio_toggle_value(int gp) +{ + gpio_set_value(gp, !gpio_get_value(gp)); +} + +/* set GPIO pin 'gp' as an output, with polarity 'value' */ +int gpio_direction_output(int gp, int value) +{ + volatile immap_t *im = (immap_t *)CONFIG_SYS_IMMR; + unsigned int ctrlr; + unsigned int line; + unsigned int lineMask; + + if (value != 0 && value != 1) { + printf("Error: Value parameter must be 0 or 1.\n"); + return -1; + } + + gpio_set_value(gp, value); + + /* 32-bits per controller */ + ctrlr = gp >> 5; + line = gp & (0x1F); + + /* Big endian */ + lineMask = 1 << (31 - line); + + /* Make the line output */ + im->gpio[ctrlr].dir |= lineMask; + + return 0; +} + +/* read GPIO IN value of pin 'gp' */ +int gpio_get_value(int gp) +{ + volatile immap_t *im = (immap_t *)CONFIG_SYS_IMMR; + unsigned int ctrlr; + unsigned int line; + unsigned int lineMask; + + /* 32-bits per controller */ + ctrlr = gp >> 5; + line = gp & (0x1F); + + /* Big endian */ + lineMask = 1 << (31 - line); + + /* Read the value and mask off the bit */ + return (im->gpio[ctrlr].dat & lineMask) != 0; +} + +/* write GPIO OUT value to pin 'gp' */ +void gpio_set_value(int gp, int value) +{ + volatile immap_t *im = (immap_t *)CONFIG_SYS_IMMR; + unsigned int ctrlr; + unsigned int line; + unsigned int lineMask; + + if (value != 0 && value != 1) { + printf("Error: Value parameter must be 0 or 1.\n"); + return; + } + + /* 32-bits per controller */ + ctrlr = gp >> 5; + line = gp & (0x1F); + + /* Big endian */ + lineMask = 1 << (31 - line); + + /* Update the local output buffer soft copy */ + gpio_output_value[ctrlr] = + (gpio_output_value[ctrlr] & ~lineMask) | (value ? lineMask : 0); + + /* Write the output */ + im->gpio[ctrlr].dat = gpio_output_value[ctrlr]; +} + +/* Configure GPIO registers early */ +void mpc83xx_gpio_init_f() +{ + volatile immap_t *im = (immap_t *)CONFIG_SYS_IMMR; + +#if MPC83XX_GPIO_CTRLRS >= 1 + im->gpio[0].dir = CONFIG_MPC83XX_GPIO_0_INIT_DIRECTION; + im->gpio[0].odr = CONFIG_MPC83XX_GPIO_0_INIT_OPEN_DRAIN; + im->gpio[0].dat = CONFIG_MPC83XX_GPIO_0_INIT_VALUE; + im->gpio[0].ier = 0xFFFFFFFF; /* Clear all events */ + im->gpio[0].imr = 0; + im->gpio[0].icr = 0; +#endif + +#if MPC83XX_GPIO_CTRLRS >= 2 + im->gpio[1].dir = CONFIG_MPC83XX_GPIO_1_INIT_DIRECTION; + im->gpio[1].odr = CONFIG_MPC83XX_GPIO_1_INIT_OPEN_DRAIN; + im->gpio[1].dat = CONFIG_MPC83XX_GPIO_1_INIT_VALUE; + im->gpio[1].ier = 0xFFFFFFFF; /* Clear all events */ + im->gpio[1].imr = 0; + im->gpio[1].icr = 0; +#endif +} + +/* Initialize GPIO soft-copies */ +void mpc83xx_gpio_init_r() +{ +#if MPC83XX_GPIO_CTRLRS >= 1 + gpio_output_value[0] = CONFIG_MPC83XX_GPIO_0_INIT_VALUE; +#endif + +#if MPC83XX_GPIO_CTRLRS >= 2 + gpio_output_value[1] = CONFIG_MPC83XX_GPIO_1_INIT_VALUE; +#endif +}
Signed-off-by: Joe Hershberger joe.hershberger@ni.com Cc: Joe Hershberger joe.hershberger@gmail.com Cc: Kim Phillips kim.phillips@freescale.com --- Changes for v2: - Moved changes to board/freescale/mpc8313erdb/mpc8313erdb.c from patch 1/2 Changes for v3: - Renamed gpio_init_* to mpc83xx_gpio_init_* - Added board_early_init_r support to MPC8313ERDB targets
board/freescale/mpc8313erdb/mpc8313erdb.c | 13 +++++++++++++ include/configs/MPC8313ERDB.h | 8 ++++++-- 2 files changed, 19 insertions(+), 2 deletions(-)
diff --git a/board/freescale/mpc8313erdb/mpc8313erdb.c b/board/freescale/mpc8313erdb/mpc8313erdb.c index 08f873d..f81a19c 100644 --- a/board/freescale/mpc8313erdb/mpc8313erdb.c +++ b/board/freescale/mpc8313erdb/mpc8313erdb.c @@ -31,6 +31,9 @@ #include <vsc7385.h> #include <ns16550.h> #include <nand.h> +#if defined(CONFIG_MPC83XX_GPIO) && !defined(CONFIG_NAND_SPL) +#include <asm/gpio.h> +#endif
DECLARE_GLOBAL_DATA_PTR;
@@ -42,10 +45,20 @@ int board_early_init_f(void) if (im->pmc.pmccr1 & PMCCR1_POWER_OFF) gd->flags |= GD_FLG_SILENT; #endif +#if defined(CONFIG_MPC83XX_GPIO) && !defined(CONFIG_NAND_SPL) + mpc83xx_gpio_init_f(); +#endif
return 0; }
+int board_early_init_r(void) +{ +#if defined(CONFIG_MPC83XX_GPIO) && !defined(CONFIG_NAND_SPL) + mpc83xx_gpio_init_r(); +#endif +} + int checkboard(void) { puts("Board: Freescale MPC8313ERDB\n"); diff --git a/include/configs/MPC8313ERDB.h b/include/configs/MPC8313ERDB.h index 92c54d0..bf17e41 100644 --- a/include/configs/MPC8313ERDB.h +++ b/include/configs/MPC8313ERDB.h @@ -82,7 +82,8 @@
#define CONFIG_SYS_CLK_FREQ CONFIG_83XX_CLKIN
-#define CONFIG_BOARD_EARLY_INIT_F /* call board_pre_init */ +#define CONFIG_BOARD_EARLY_INIT_F /* call board_early_init_f */ +#define CONFIG_BOARD_EARLY_INIT_R /* call board_early_init_r */
#define CONFIG_SYS_IMMR 0xE0000000
@@ -322,6 +323,9 @@ #define CONFIG_OF_BOARD_SETUP 1 #define CONFIG_OF_STDOUT_VIA_ALIAS 1
+#define CONFIG_MPC83XX_GPIO 1 +#define CONFIG_CMD_GPIO 1 + /* * Serial Port */ @@ -535,7 +539,7 @@
/* System IO Config */ #define CONFIG_SYS_SICRH (SICRH_TSOBI1 | SICRH_TSOBI2) /* RGMII */ -#define CONFIG_SYS_SICRL SICRL_USBDR_10 /* Enable Internal USB Phy */ +#define CONFIG_SYS_SICRL (SICRL_USBDR_10 | SICRL_LBC) /* Enable Internal USB Phy and GPIO on LCD Connector */
#define CONFIG_SYS_HID0_INIT 0x000000000 #define CONFIG_SYS_HID0_FINAL (HID0_ENABLE_MACHINE_CHECK | \
Signed-off-by: Joe Hershberger joe.hershberger@ni.com Cc: Joe Hershberger joe.hershberger@gmail.com Cc: Kim Phillips kim.phillips@freescale.com --- include/configs/MPC8313ERDB.h | 5 ++++- 1 files changed, 4 insertions(+), 1 deletions(-)
diff --git a/include/configs/MPC8313ERDB.h b/include/configs/MPC8313ERDB.h index 92c54d0..9bf38df 100644 --- a/include/configs/MPC8313ERDB.h +++ b/include/configs/MPC8313ERDB.h @@ -322,6 +322,9 @@ #define CONFIG_OF_BOARD_SETUP 1 #define CONFIG_OF_STDOUT_VIA_ALIAS 1
+#define CONFIG_MPC83XX_GPIO 1 +#define CONFIG_CMD_GPIO 1 + /* * Serial Port */ @@ -535,7 +538,7 @@
/* System IO Config */ #define CONFIG_SYS_SICRH (SICRH_TSOBI1 | SICRH_TSOBI2) /* RGMII */ -#define CONFIG_SYS_SICRL SICRL_USBDR_10 /* Enable Internal USB Phy */ +#define CONFIG_SYS_SICRL (SICRL_USBDR_10 | SICRL_LBC) /* Enable Internal USB Phy and GPIO on LCD Connector */
#define CONFIG_SYS_HID0_INIT 0x000000000 #define CONFIG_SYS_HID0_FINAL (HID0_ENABLE_MACHINE_CHECK | \
On Tue, 9 Aug 2011 17:31:29 -0500 Joe Hershberger joe.hershberger@ni.com wrote:
diff --git a/arch/powerpc/include/asm/gpio.h b/arch/powerpc/include/asm/gpio.h new file mode 100644 index 0000000..eb071d1 --- /dev/null +++ b/arch/powerpc/include/asm/gpio.h @@ -0,0 +1,38 @@ +/*
- Copyright (c) 2011, NVIDIA Corp. All rights reserved.
- See file CREDITS for list of people who contributed to this
- project.
- This program is free software; you can redistribute it and/or
- modify it under the terms of the GNU General Public License as
- published by the Free Software Foundation; either version 2 of
- the License, or (at your option) any later version.
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- MA 02111-1307 USA
- */
+#ifndef _GPIO_H_ +#define _GPIO_H_
+#include <asm/arch/gpio.h> +/*
- Generic GPIO API
- */
+int gpio_request(int gp, const char *label); +void gpio_free(int gp); +void gpio_toggle_value(int gp); +int gpio_direction_input(int gp); +int gpio_direction_output(int gp, int value); +int gpio_get_value(int gp); +void gpio_set_value(int gp, int value);
+#endif /* _GPIO_H_ */
looks like this GPIO API-definition file is starting to be copied for each arch, and there's nothing arch-specific in it. As such, it probably belongs in include/asm-generic/, not arch/powerpc. Other arches need fixing in this area, too.
+/* set GPIO pin 'gp' as an input */ +int gpio_direction_input(int gp) +{
- volatile immap_t *im = (immap_t *)CONFIG_SYS_IMMR;
no volatile
- unsigned int ctrlr;
- unsigned int line;
- unsigned int lineMask;
no camelCase
- /* 32-bits per controller */
- ctrlr = gp >> 5;
- line = gp & (0x1F);
- /* Big endian */
- lineMask = 1 << (31 - line);
- im->gpio[ctrlr].dir &= ~lineMask;
must use i/o accessors and/or clr/setbits_be32, please fix everywhere.
- /* Update the local output buffer soft copy */
- gpio_output_value[ctrlr] =
(gpio_output_value[ctrlr] & ~lineMask) | (value ? lineMask : 0);
what's the use of having a local output buffer soft copy? I don't see it being used anywhere.
Kim
On Tue, Aug 9, 2011 at 5:54 PM, Kim Phillips kim.phillips@freescale.com wrote:
On Tue, 9 Aug 2011 17:31:29 -0500 Joe Hershberger joe.hershberger@ni.com wrote:
- /* Update the local output buffer soft copy */
- gpio_output_value[ctrlr] =
- (gpio_output_value[ctrlr] & ~lineMask) | (value ? lineMask : 0);
what's the use of having a local output buffer soft copy? I don't see it being used anywhere.
It's used in the line you quoted. If other lines on the same controller are configured for open-collector, but are externally pulled low, then using the DAT register instead of the soft copy will force those to be actively grounded. To avoid this, I use a soft-copy.
-Joe
Common GPIO API used by cmd_gpio should be available to any arch
Signed-off-by: Joe Hershberger joe.hershberger@ni.com Cc: Joe Hershberger joe.hershberger@gmail.com Cc: Kim Phillips kim.phillips@freescale.com --- Changes for v4: - Split out of patch 1/2
arch/arm/include/asm/gpio.h | 39 +-------------------------------------- arch/powerpc/include/asm/gpio.h | 1 + include/asm-generic/gpio.h | 38 ++++++++++++++++++++++++++++++++++++++ 3 files changed, 40 insertions(+), 38 deletions(-) create mode 100644 arch/powerpc/include/asm/gpio.h create mode 100644 include/asm-generic/gpio.h
diff --git a/arch/arm/include/asm/gpio.h b/arch/arm/include/asm/gpio.h index eb071d1..306ab4c 100644 --- a/arch/arm/include/asm/gpio.h +++ b/arch/arm/include/asm/gpio.h @@ -1,38 +1 @@ -/* - * Copyright (c) 2011, NVIDIA Corp. All rights reserved. - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#ifndef _GPIO_H_ -#define _GPIO_H_ - -#include <asm/arch/gpio.h> -/* - * Generic GPIO API - */ - -int gpio_request(int gp, const char *label); -void gpio_free(int gp); -void gpio_toggle_value(int gp); -int gpio_direction_input(int gp); -int gpio_direction_output(int gp, int value); -int gpio_get_value(int gp); -void gpio_set_value(int gp, int value); - -#endif /* _GPIO_H_ */ +#include <asm-generic/gpio.h> diff --git a/arch/powerpc/include/asm/gpio.h b/arch/powerpc/include/asm/gpio.h new file mode 100644 index 0000000..306ab4c --- /dev/null +++ b/arch/powerpc/include/asm/gpio.h @@ -0,0 +1 @@ +#include <asm-generic/gpio.h> diff --git a/include/asm-generic/gpio.h b/include/asm-generic/gpio.h new file mode 100644 index 0000000..eb071d1 --- /dev/null +++ b/include/asm-generic/gpio.h @@ -0,0 +1,38 @@ +/* + * Copyright (c) 2011, NVIDIA Corp. All rights reserved. + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef _GPIO_H_ +#define _GPIO_H_ + +#include <asm/arch/gpio.h> +/* + * Generic GPIO API + */ + +int gpio_request(int gp, const char *label); +void gpio_free(int gp); +void gpio_toggle_value(int gp); +int gpio_direction_input(int gp); +int gpio_direction_output(int gp, int value); +int gpio_get_value(int gp); +void gpio_set_value(int gp, int value); + +#endif /* _GPIO_H_ */
On Wednesday, August 10, 2011 00:56:40 Joe Hershberger wrote:
--- /dev/null +++ b/include/asm-generic/gpio.h +#include <asm/arch/gpio.h>
NAK. this belongs in the arch/ specific header. -mike
Common GPIO API used by cmd_gpio should be available to any arch
Signed-off-by: Joe Hershberger joe.hershberger@ni.com Cc: Joe Hershberger joe.hershberger@gmail.com Cc: Kim Phillips kim.phillips@freescale.com Cc: Mike Frysinger vapier@gentoo.org --- Changes for v4: - Split out of patch 1/2 Changes for v5: - Moved asm/arch/gpio.h include to asm/gpio.h
arch/arm/include/asm/gpio.h | 38 +------------------------------------- arch/powerpc/include/asm/gpio.h | 2 ++ include/asm-generic/gpio.h | 37 +++++++++++++++++++++++++++++++++++++ 3 files changed, 40 insertions(+), 37 deletions(-) create mode 100644 arch/powerpc/include/asm/gpio.h create mode 100644 include/asm-generic/gpio.h
diff --git a/arch/arm/include/asm/gpio.h b/arch/arm/include/asm/gpio.h index eb071d1..d49ad08 100644 --- a/arch/arm/include/asm/gpio.h +++ b/arch/arm/include/asm/gpio.h @@ -1,38 +1,2 @@ -/* - * Copyright (c) 2011, NVIDIA Corp. All rights reserved. - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#ifndef _GPIO_H_ -#define _GPIO_H_ - #include <asm/arch/gpio.h> -/* - * Generic GPIO API - */ - -int gpio_request(int gp, const char *label); -void gpio_free(int gp); -void gpio_toggle_value(int gp); -int gpio_direction_input(int gp); -int gpio_direction_output(int gp, int value); -int gpio_get_value(int gp); -void gpio_set_value(int gp, int value); - -#endif /* _GPIO_H_ */ +#include <asm-generic/gpio.h> diff --git a/arch/powerpc/include/asm/gpio.h b/arch/powerpc/include/asm/gpio.h new file mode 100644 index 0000000..d49ad08 --- /dev/null +++ b/arch/powerpc/include/asm/gpio.h @@ -0,0 +1,2 @@ +#include <asm/arch/gpio.h> +#include <asm-generic/gpio.h> diff --git a/include/asm-generic/gpio.h b/include/asm-generic/gpio.h new file mode 100644 index 0000000..57542ad --- /dev/null +++ b/include/asm-generic/gpio.h @@ -0,0 +1,37 @@ +/* + * Copyright (c) 2011, NVIDIA Corp. All rights reserved. + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef _GPIO_H_ +#define _GPIO_H_ + +/* + * Generic GPIO API + */ + +int gpio_request(int gp, const char *label); +void gpio_free(int gp); +void gpio_toggle_value(int gp); +int gpio_direction_input(int gp); +int gpio_direction_output(int gp, int value); +int gpio_get_value(int gp); +void gpio_set_value(int gp, int value); + +#endif /* _GPIO_H_ */
On Friday, August 12, 2011 04:11:22 Joe Hershberger wrote:
+int gpio_request(int gp, const char *label); +void gpio_free(int gp); +int gpio_direction_input(int gp); +int gpio_direction_output(int gp, int value); +int gpio_get_value(int gp); +void gpio_set_value(int gp, int value);
please use "unsigned gpio". this is what linux does and what most implementations should be doing (since sane people will pull from linux).
+void gpio_toggle_value(int gp);
this is not currently part of the generic gpio api. this should stay in arm's asm/gpio.h for now, or not implement it at all. -mike
Common GPIO API used by cmd_gpio should be available to any arch
Signed-off-by: Joe Hershberger joe.hershberger@ni.com Cc: Joe Hershberger joe.hershberger@gmail.com Cc: Mike Frysinger vapier@gentoo.org --- Changes for v4: - Split out of patch 1/2 Changes for v5: - Moved asm/arch/gpio.h include to asm/gpio.h Changes for v6:
arch/arm/include/asm/gpio.h | 38 +------------------------------------- arch/powerpc/include/asm/gpio.h | 2 ++ include/asm-generic/gpio.h | 37 +++++++++++++++++++++++++++++++++++++ 3 files changed, 40 insertions(+), 37 deletions(-) create mode 100644 arch/powerpc/include/asm/gpio.h create mode 100644 include/asm-generic/gpio.h
diff --git a/arch/arm/include/asm/gpio.h b/arch/arm/include/asm/gpio.h index eb071d1..d49ad08 100644 --- a/arch/arm/include/asm/gpio.h +++ b/arch/arm/include/asm/gpio.h @@ -1,38 +1,2 @@ -/* - * Copyright (c) 2011, NVIDIA Corp. All rights reserved. - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#ifndef _GPIO_H_ -#define _GPIO_H_ - #include <asm/arch/gpio.h> -/* - * Generic GPIO API - */ - -int gpio_request(int gp, const char *label); -void gpio_free(int gp); -void gpio_toggle_value(int gp); -int gpio_direction_input(int gp); -int gpio_direction_output(int gp, int value); -int gpio_get_value(int gp); -void gpio_set_value(int gp, int value); - -#endif /* _GPIO_H_ */ +#include <asm-generic/gpio.h> diff --git a/arch/powerpc/include/asm/gpio.h b/arch/powerpc/include/asm/gpio.h new file mode 100644 index 0000000..d49ad08 --- /dev/null +++ b/arch/powerpc/include/asm/gpio.h @@ -0,0 +1,2 @@ +#include <asm/arch/gpio.h> +#include <asm-generic/gpio.h> diff --git a/include/asm-generic/gpio.h b/include/asm-generic/gpio.h new file mode 100644 index 0000000..57542ad --- /dev/null +++ b/include/asm-generic/gpio.h @@ -0,0 +1,37 @@ +/* + * Copyright (c) 2011, NVIDIA Corp. All rights reserved. + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef _GPIO_H_ +#define _GPIO_H_ + +/* + * Generic GPIO API + */ + +int gpio_request(int gp, const char *label); +void gpio_free(int gp); +void gpio_toggle_value(int gp); +int gpio_direction_input(int gp); +int gpio_direction_output(int gp, int value); +int gpio_get_value(int gp); +void gpio_set_value(int gp, int value); + +#endif /* _GPIO_H_ */
Acked-by: Mike Frysinger vapier@gentoo.org -mike
On Fri, 12 Aug 2011 19:10:53 -0500 Joe Hershberger joe.hershberger@ni.com wrote:
Common GPIO API used by cmd_gpio should be available to any arch
Signed-off-by: Joe Hershberger joe.hershberger@ni.com Cc: Joe Hershberger joe.hershberger@gmail.com Cc: Mike Frysinger vapier@gentoo.org
Changes for v4:
- Split out of patch 1/2
Changes for v5:
- Moved asm/arch/gpio.h include to asm/gpio.h
Changes for v6:
arch/arm/include/asm/gpio.h | 38 +------------------------------------- arch/powerpc/include/asm/gpio.h | 2 ++ include/asm-generic/gpio.h | 37 +++++++++++++++++++++++++++++++++++++ 3 files changed, 40 insertions(+), 37 deletions(-) create mode 100644 arch/powerpc/include/asm/gpio.h create mode 100644 include/asm-generic/gpio.h
applied 4 out of 4 patches.
Wolfgang, technically this is a multi-domain patchseries, and I've overstepped my boundaries for the sake of expediency in adding the GPIO feature to 83xx-land. If this is a problem, and you'd like to apply patches 1 and 2 independently of mpc83xx, please let me know and I'll back the entire series off the mpc83xx tree. Fwiw, I build-tested a couple of ARM boards, including davinci.
Please let me know before I send a pull request when the next branch is made available, or, of course, when the window for the next release opens.
Kim
Dear Kim,
In message 20110913200803.4d76579c.kim.phillips@freescale.com you wrote:
arch/arm/include/asm/gpio.h | 38 +------------------------------------- arch/powerpc/include/asm/gpio.h | 2 ++ include/asm-generic/gpio.h | 37 +++++++++++++++++++++++++++++++++++++ 3 files changed, 40 insertions(+), 37 deletions(-) create mode 100644 arch/powerpc/include/asm/gpio.h create mode 100644 include/asm-generic/gpio.h
applied 4 out of 4 patches.
Wolfgang, technically this is a multi-domain patchseries, and I've overstepped my boundaries for the sake of expediency in adding the GPIO feature to 83xx-land. If this is a problem, and you'd like to apply patches 1 and 2 independently of mpc83xx, please let me know and I'll back the entire series off the mpc83xx tree. Fwiw, I build-tested a couple of ARM boards, including davinci.
As this relates to ARM files, you need Albert's OK here, not mine. [I put Albert on Cc:]
Best regards,
Wolfgang Denk
Le 15/09/2011 11:45, Wolfgang Denk a écrit :
Dear Kim,
In message20110913200803.4d76579c.kim.phillips@freescale.com you wrote:
arch/arm/include/asm/gpio.h | 38 +------------------------------------- arch/powerpc/include/asm/gpio.h | 2 ++ include/asm-generic/gpio.h | 37 +++++++++++++++++++++++++++++++++++++ 3 files changed, 40 insertions(+), 37 deletions(-) create mode 100644 arch/powerpc/include/asm/gpio.h create mode 100644 include/asm-generic/gpio.h
applied 4 out of 4 patches.
Wolfgang, technically this is a multi-domain patchseries, and I've overstepped my boundaries for the sake of expediency in adding the GPIO feature to 83xx-land. If this is a problem, and you'd like to apply patches 1 and 2 independently of mpc83xx, please let me know and I'll back the entire series off the mpc83xx tree. Fwiw, I build-tested a couple of ARM boards, including davinci.
As this relates to ARM files, you need Albert's OK here, not mine. [I put Albert on Cc:]
Well, it relates to both ARM and PPC equally, but anyway...
Acked-By: Albert ARIBAUD albert.u.boot@aribaud.net
Best regards,
Wolfgang Denk
Amicalement,
Common GPIO API used by cmd_gpio should be available to any arch
Signed-off-by: Joe Hershberger joe.hershberger@ni.com Cc: Joe Hershberger joe.hershberger@gmail.com Cc: Kim Phillips kim.phillips@freescale.com --- Changes for v4: - Split out of patch 1/2 Changes for v5: - Moved asm/arch/gpio.h include to asm/gpio.h Changes for v6: Changes for v7:
arch/arm/include/asm/gpio.h | 38 +------------------------------------- arch/powerpc/include/asm/gpio.h | 2 ++ include/asm-generic/gpio.h | 37 +++++++++++++++++++++++++++++++++++++ 3 files changed, 40 insertions(+), 37 deletions(-) create mode 100644 arch/powerpc/include/asm/gpio.h create mode 100644 include/asm-generic/gpio.h
diff --git a/arch/arm/include/asm/gpio.h b/arch/arm/include/asm/gpio.h index eb071d1..d49ad08 100644 --- a/arch/arm/include/asm/gpio.h +++ b/arch/arm/include/asm/gpio.h @@ -1,38 +1,2 @@ -/* - * Copyright (c) 2011, NVIDIA Corp. All rights reserved. - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#ifndef _GPIO_H_ -#define _GPIO_H_ - #include <asm/arch/gpio.h> -/* - * Generic GPIO API - */ - -int gpio_request(int gp, const char *label); -void gpio_free(int gp); -void gpio_toggle_value(int gp); -int gpio_direction_input(int gp); -int gpio_direction_output(int gp, int value); -int gpio_get_value(int gp); -void gpio_set_value(int gp, int value); - -#endif /* _GPIO_H_ */ +#include <asm-generic/gpio.h> diff --git a/arch/powerpc/include/asm/gpio.h b/arch/powerpc/include/asm/gpio.h new file mode 100644 index 0000000..d49ad08 --- /dev/null +++ b/arch/powerpc/include/asm/gpio.h @@ -0,0 +1,2 @@ +#include <asm/arch/gpio.h> +#include <asm-generic/gpio.h> diff --git a/include/asm-generic/gpio.h b/include/asm-generic/gpio.h new file mode 100644 index 0000000..57542ad --- /dev/null +++ b/include/asm-generic/gpio.h @@ -0,0 +1,37 @@ +/* + * Copyright (c) 2011, NVIDIA Corp. All rights reserved. + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef _GPIO_H_ +#define _GPIO_H_ + +/* + * Generic GPIO API + */ + +int gpio_request(int gp, const char *label); +void gpio_free(int gp); +void gpio_toggle_value(int gp); +int gpio_direction_input(int gp); +int gpio_direction_output(int gp, int value); +int gpio_get_value(int gp); +void gpio_set_value(int gp, int value); + +#endif /* _GPIO_H_ */
On Tue, Oct 11, 2011 at 10:50:12PM -0500, Joe Hershberger wrote:
Common GPIO API used by cmd_gpio should be available to any arch
Signed-off-by: Joe Hershberger joe.hershberger@ni.com Cc: Joe Hershberger joe.hershberger@gmail.com Cc: Kim Phillips kim.phillips@freescale.com
Tested-by: Laurence Withers lwithers@guralp.com
Bye for now,
On Wed, 12 Oct 2011 15:55:25 +0000 Laurence Withers lwithers@guralp.com wrote:
On Tue, Oct 11, 2011 at 10:50:12PM -0500, Joe Hershberger wrote:
Common GPIO API used by cmd_gpio should be available to any arch
Signed-off-by: Joe Hershberger joe.hershberger@ni.com Cc: Joe Hershberger joe.hershberger@gmail.com Cc: Kim Phillips kim.phillips@freescale.com
Tested-by: Laurence Withers lwithers@guralp.com
the initial two patches in this patchseries conflict with upstream:
commit 9d2cb8e8e6a3650613eab95c1b30023e81beb15c Author: Simon Glass sjg@chromium.org Date: Fri Oct 7 13:53:50 2011 +0000
Add generic gpio.h in asm-generic
And if I try applying the latter two, I get this:
$ ./MAKEALL MPC8313ERDB_33 Configuring for MPC8313ERDB_33 - Board: MPC8313ERDB, Options: SYS_33MHZ mpc83xx_gpio.c:25:22: fatal error: asm/gpio.h: No such file or directory compilation terminated. make[1]: *** No rule to make target `.depend', needed by `libgpio.o'. Stop. make: *** [drivers/gpio/libgpio.o] Error 2 make: *** Waiting for unfinished jobs.... cmd_gpio.c:12:22: fatal error: asm/gpio.h: No such file or directory compilation terminated. make[1]: *** No rule to make target `.depend', needed by `libcommon.o'. Stop. make[1]: *** Waiting for unfinished jobs.... make: *** [common/libcommon.o] Error 2 powerpc-linux-gnu-size: './u-boot': No such file
please rebase and resubmit.
Thanks,
Kim
Change "int gp" to "unsigned gpio" Add request and free entry-points
Signed-off-by: Joe Hershberger joe.hershberger@ni.com Cc: Joe Hershberger joe.hershberger@gmail.com Cc: Kim Phillips kim.phillips@freescale.com --- Changes for v6: - Linuxize gpio API Changes for v7: - checkpatch compliance Changes for v8: - Rebase onto 9d2cb8e8e6a3650613eab95c1b30023e81beb15c
include/asm-generic/gpio.h | 39 +++++++++++++++++++++++++++++++-------- 1 files changed, 31 insertions(+), 8 deletions(-)
diff --git a/include/asm-generic/gpio.h b/include/asm-generic/gpio.h index a1ebb28..65d2708 100644 --- a/include/asm-generic/gpio.h +++ b/include/asm-generic/gpio.h @@ -1,5 +1,6 @@ /* * Copyright (c) 2011 The Chromium OS Authors. + * Copyright (c) 2011, NVIDIA Corp. All rights reserved. * See file CREDITS for list of people who contributed to this * project. * @@ -19,6 +20,9 @@ * MA 02111-1307 USA */
+#ifndef _ASM_GENERIC_GPIO_H_ +#define _ASM_GENERIC_GPIO_H_ + /* * Generic GPIO API for U-Boot * @@ -38,37 +42,56 @@ */
/** + * Request ownership of a GPIO. + * + * @param gpio GPIO number + * @param label Name given to the GPIO + * @return 0 if ok, -1 on error + */ +int gpio_request(unsigned gpio, const char *label); + +/** + * Stop using the GPIO. + * + * @param gpio GPIO number + * @return 0 if ok, -1 on error + */ +int gpio_free(unsigned gpio); + +/** * Make a GPIO an input. * - * @param gp GPIO number + * @param gpio GPIO number * @return 0 if ok, -1 on error */ -int gpio_direction_input(int gp); +int gpio_direction_input(unsigned gpio);
/** * Make a GPIO an output, and set its value. * - * @param gp GPIO number + * @param gpio GPIO number * @param value GPIO value (0 for low or 1 for high) * @return 0 if ok, -1 on error */ -int gpio_direction_output(int gp, int value); +int gpio_direction_output(unsigned gpio, int value);
/** * Get a GPIO's value. This will work whether the GPIO is an input * or an output. * - * @param gp GPIO number + * @param gpio GPIO number * @return 0 if low, 1 if high, -1 on error */ -int gpio_get_value(int gp); +int gpio_get_value(unsigned gpio);
/** * Set an output GPIO's value. The GPIO must already be an output of * this function may have no effect. * - * @param gp GPIO number + * @param gpio GPIO number * @param value GPIO value (0 for low or 1 for high) * @return 0 if ok, -1 on error */ -int gpio_set_value(int gp, int value); +int gpio_set_value(unsigned gpio, int value); + +#endif /* _ASM_GENERIC_GPIO_H_ */
Acked-by: Mike Frysinger vapier@gentoo.org -mike
Change "int gp" to "unsigned gpio" Add request and free entry-points
Signed-off-by: Joe Hershberger joe.hershberger@ni.com Cc: Joe Hershberger joe.hershberger@gmail.com Cc: Kim Phillips kim.phillips@freescale.com --- Changes for v6: - Linuxize gpio API Changes for v7: - checkpatch compliance Changes for v8: - Rebase onto 9d2cb8e8e6a3650613eab95c1b30023e81beb15c Changes for v9:
include/asm-generic/gpio.h | 41 ++++++++++++++++++++++++++++++++--------- 1 files changed, 32 insertions(+), 9 deletions(-)
diff --git a/include/asm-generic/gpio.h b/include/asm-generic/gpio.h index a1ebb28..c19e16c 100644 --- a/include/asm-generic/gpio.h +++ b/include/asm-generic/gpio.h @@ -1,5 +1,6 @@ /* * Copyright (c) 2011 The Chromium OS Authors. + * Copyright (c) 2011, NVIDIA Corp. All rights reserved. * See file CREDITS for list of people who contributed to this * project. * @@ -19,6 +20,9 @@ * MA 02111-1307 USA */
+#ifndef _ASM_GENERIC_GPIO_H_ +#define _ASM_GENERIC_GPIO_H_ + /* * Generic GPIO API for U-Boot * @@ -38,37 +42,56 @@ */
/** + * Request ownership of a GPIO. + * + * @param gpio GPIO number + * @param label Name given to the GPIO + * @return 0 if ok, -1 on error + */ +int gpio_request(unsigned gpio, const char *label); + +/** + * Stop using the GPIO. This function should not alter pin configuration. + * + * @param gpio GPIO number + * @return 0 if ok, -1 on error + */ +int gpio_free(unsigned gpio); + +/** * Make a GPIO an input. * - * @param gp GPIO number + * @param gpio GPIO number * @return 0 if ok, -1 on error */ -int gpio_direction_input(int gp); +int gpio_direction_input(unsigned gpio);
/** * Make a GPIO an output, and set its value. * - * @param gp GPIO number + * @param gpio GPIO number * @param value GPIO value (0 for low or 1 for high) * @return 0 if ok, -1 on error */ -int gpio_direction_output(int gp, int value); +int gpio_direction_output(unsigned gpio, int value);
/** * Get a GPIO's value. This will work whether the GPIO is an input * or an output. * - * @param gp GPIO number + * @param gpio GPIO number * @return 0 if low, 1 if high, -1 on error */ -int gpio_get_value(int gp); +int gpio_get_value(unsigned gpio);
/** - * Set an output GPIO's value. The GPIO must already be an output of + * Set an output GPIO's value. The GPIO must already be an output or * this function may have no effect. * - * @param gp GPIO number + * @param gpio GPIO number * @param value GPIO value (0 for low or 1 for high) * @return 0 if ok, -1 on error */ -int gpio_set_value(int gp, int value); +int gpio_set_value(unsigned gpio, int value); + +#endif /* _ASM_GENERIC_GPIO_H_ */
On Fri, 11 Nov 2011 15:55:35 -0600 Joe Hershberger joe.hershberger@ni.com wrote:
Change "int gp" to "unsigned gpio" Add request and free entry-points
Signed-off-by: Joe Hershberger joe.hershberger@ni.com Cc: Joe Hershberger joe.hershberger@gmail.com Cc: Kim Phillips kim.phillips@freescale.com
I've fixed a merge conflict in #2 for da8xx_gpio.c, tegra2_gpio.c, and extended it to the new mxs_gpio.c, and applied all four patches to u-boot-mpc83xx/next.
Thanks,
Kim
ARM boards should use the generic GPIO API This means changing gpio to unsigned type Remove the unused gpio_toggle() function which is not part of the API Comment that free should not modify pin state
Signed-off-by: Joe Hershberger joe.hershberger@ni.com Cc: Joe Hershberger joe.hershberger@gmail.com Cc: Kim Phillips kim.phillips@freescale.com Cc: Albert ARIBAUD albert.u.boot@aribaud.net --- Changes for v4: - Split out of patch 1/2 Changes for v5: - Moved asm/arch/gpio.h include to asm/gpio.h Changes for v6: Changes for v7: Changes for v8: - Include omap-common/gpio.c in retrofit Changes for v9: - Tegra gpio_free clears name - Updated GPIO API for other ARM boards that were added - Follow API by returning -1 on error instead of -EINVAL
arch/arm/cpu/armv7/omap-common/gpio.c | 35 ++++--- arch/arm/include/asm/gpio.h | 38 +-------- drivers/gpio/da8xx_gpio.c | 78 ++++++++-------- drivers/gpio/mvgpio.c | 74 +++++++-------- drivers/gpio/mxc_gpio.c | 42 ++++----- drivers/gpio/s5p_gpio.c | 47 ++++++---- drivers/gpio/tegra2_gpio.c | 165 +++++++++++++++++---------------- 7 files changed, 229 insertions(+), 250 deletions(-)
diff --git a/arch/arm/cpu/armv7/omap-common/gpio.c b/arch/arm/cpu/armv7/omap-common/gpio.c index 75a02da..fc89f2a 100644 --- a/arch/arm/cpu/armv7/omap-common/gpio.c +++ b/arch/arm/cpu/armv7/omap-common/gpio.c @@ -36,7 +36,7 @@ * published by the Free Software Foundation. */ #include <common.h> -#include <asm/arch/gpio.h> +#include <asm/gpio.h> #include <asm/io.h> #include <asm/errno.h>
@@ -56,17 +56,17 @@ static inline int get_gpio_index(int gpio) static inline int gpio_valid(int gpio) { if (gpio < 0) - return -EINVAL; + return -1; if (gpio < 192) return 0; - return -EINVAL; + return -1; }
static int check_gpio(int gpio) { if (gpio_valid(gpio) < 0) { printf("ERROR : check_gpio: invalid GPIO %d\n", gpio); - return -EINVAL; + return -1; } return 0; } @@ -106,7 +106,7 @@ static int _get_gpio_direction(const struct gpio_bank *bank, int gpio) reg += OMAP_GPIO_OE; break; default: - return -EINVAL; + return -1; }
v = __raw_readl(reg); @@ -142,27 +142,29 @@ static void _set_gpio_dataout(const struct gpio_bank *bank, int gpio, /** * Set value of the specified gpio */ -void gpio_set_value(int gpio, int value) +int gpio_set_value(unsigned gpio, int value) { const struct gpio_bank *bank;
if (check_gpio(gpio) < 0) - return; + return -1; bank = get_gpio_bank(gpio); _set_gpio_dataout(bank, get_gpio_index(gpio), value); + + return 0; }
/** * Get value of the specified gpio */ -int gpio_get_value(int gpio) +int gpio_get_value(unsigned gpio) { const struct gpio_bank *bank; void *reg; int input;
if (check_gpio(gpio) < 0) - return -EINVAL; + return -1; bank = get_gpio_bank(gpio); reg = bank->base; switch (bank->method) { @@ -176,11 +178,11 @@ int gpio_get_value(int gpio) reg += OMAP_GPIO_DATAOUT; break; default: - return -EINVAL; + return -1; } break; default: - return -EINVAL; + return -1; } return (__raw_readl(reg) & (1 << get_gpio_index(gpio))) != 0; @@ -194,7 +196,7 @@ int gpio_direction_input(unsigned gpio) const struct gpio_bank *bank;
if (check_gpio(gpio) < 0) - return -EINVAL; + return -1;
bank = get_gpio_bank(gpio); _set_gpio_direction(bank, get_gpio_index(gpio), 1); @@ -210,7 +212,7 @@ int gpio_direction_output(unsigned gpio, int value) const struct gpio_bank *bank;
if (check_gpio(gpio) < 0) - return -EINVAL; + return -1;
bank = get_gpio_bank(gpio); _set_gpio_dataout(bank, get_gpio_index(gpio), value); @@ -224,10 +226,10 @@ int gpio_direction_output(unsigned gpio, int value) * * NOTE: Argument 'label' is unused. */ -int gpio_request(int gpio, const char *label) +int gpio_request(unsigned gpio, const char *label) { if (check_gpio(gpio) < 0) - return -EINVAL; + return -1;
return 0; } @@ -235,6 +237,7 @@ int gpio_request(int gpio, const char *label) /** * Reset and free the gpio after using it. */ -void gpio_free(unsigned gpio) +int gpio_free(unsigned gpio) { + return 0; } diff --git a/arch/arm/include/asm/gpio.h b/arch/arm/include/asm/gpio.h index eb071d1..d49ad08 100644 --- a/arch/arm/include/asm/gpio.h +++ b/arch/arm/include/asm/gpio.h @@ -1,38 +1,2 @@ -/* - * Copyright (c) 2011, NVIDIA Corp. All rights reserved. - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#ifndef _GPIO_H_ -#define _GPIO_H_ - #include <asm/arch/gpio.h> -/* - * Generic GPIO API - */ - -int gpio_request(int gp, const char *label); -void gpio_free(int gp); -void gpio_toggle_value(int gp); -int gpio_direction_input(int gp); -int gpio_direction_output(int gp, int value); -int gpio_get_value(int gp); -void gpio_set_value(int gp, int value); - -#endif /* _GPIO_H_ */ +#include <asm-generic/gpio.h> diff --git a/drivers/gpio/da8xx_gpio.c b/drivers/gpio/da8xx_gpio.c index 7a15614..84d2b77 100644 --- a/drivers/gpio/da8xx_gpio.c +++ b/drivers/gpio/da8xx_gpio.c @@ -23,7 +23,6 @@ #include <common.h> #include <asm/io.h> #include <asm/gpio.h> -#include <asm/arch/gpio.h> #include <asm/arch/hardware.h> #include <asm/arch/davinci_misc.h>
@@ -181,90 +180,93 @@ static const struct pinmux_config gpio_pinmux[] = { { pinmux(18), 8, 2 }, };
-int gpio_request(int gp, const char *label) +int gpio_request(unsigned gpio, const char *label) { - if (gp >= MAX_NUM_GPIOS) + if (gpio >= MAX_NUM_GPIOS) return -1;
- if (gpio_registry[gp].is_registered) + if (gpio_registry[gpio].is_registered) return -1;
- gpio_registry[gp].is_registered = 1; - strncpy(gpio_registry[gp].name, label, GPIO_NAME_SIZE); - gpio_registry[gp].name[GPIO_NAME_SIZE - 1] = 0; + gpio_registry[gpio].is_registered = 1; + strncpy(gpio_registry[gpio].name, label, GPIO_NAME_SIZE); + gpio_registry[gpio].name[GPIO_NAME_SIZE - 1] = 0;
- davinci_configure_pin_mux(&gpio_pinmux[gp], 1); + davinci_configure_pin_mux(&gpio_pinmux[gpio], 1);
return 0; }
-void gpio_free(int gp) +int gpio_free(unsigned gpio) { - gpio_registry[gp].is_registered = 0; -} + if (gpio >= MAX_NUM_GPIOS) + return -1;
-void gpio_toggle_value(int gp) -{ - struct davinci_gpio *bank; + if (!gpio_registry[gpio].is_registered) + return -1;
- bank = GPIO_BANK(gp); - gpio_set_value(gp, !gpio_get_value(gp)); + gpio_registry[gpio].is_registered = 0; + gpio_registry[gpio].name[0] = '\0'; + /* Do not configure as input or change pin mux here */ + return 0; }
-int gpio_direction_input(int gp) +int gpio_direction_input(unsigned gpio) { struct davinci_gpio *bank;
- bank = GPIO_BANK(gp); - setbits_le32(&bank->dir, 1U << GPIO_BIT(gp)); + bank = GPIO_BANK(gpio); + setbits_le32(&bank->dir, 1U << GPIO_BIT(gpio)); return 0; }
-int gpio_direction_output(int gp, int value) +int gpio_direction_output(unsigned gpio, int value) { struct davinci_gpio *bank;
- bank = GPIO_BANK(gp); - clrbits_le32(&bank->dir, 1U << GPIO_BIT(gp)); - gpio_set_value(gp, value); + bank = GPIO_BANK(gpio); + clrbits_le32(&bank->dir, 1U << GPIO_BIT(gpio)); + gpio_set_value(gpio, value); return 0; }
-int gpio_get_value(int gp) +int gpio_get_value(unsigned gpio) { struct davinci_gpio *bank; unsigned int ip;
- bank = GPIO_BANK(gp); - ip = in_le32(&bank->in_data) & (1U << GPIO_BIT(gp)); + bank = GPIO_BANK(gpio); + ip = in_le32(&bank->in_data) & (1U << GPIO_BIT(gpio)); return ip ? 1 : 0; }
-void gpio_set_value(int gp, int value) +int gpio_set_value(unsigned gpio, int value) { struct davinci_gpio *bank;
- bank = GPIO_BANK(gp); + bank = GPIO_BANK(gpio);
if (value) - bank->set_data = 1U << GPIO_BIT(gp); + bank->set_data = 1U << GPIO_BIT(gpio); else - bank->clr_data = 1U << GPIO_BIT(gp); + bank->clr_data = 1U << GPIO_BIT(gpio); + + return 0; }
void gpio_info(void) { - int gp, dir, val; + unsigned gpio, dir, val; struct davinci_gpio *bank;
- for (gp = 0; gp < MAX_NUM_GPIOS; ++gp) { - bank = GPIO_BANK(gp); - dir = in_le32(&bank->dir) & (1U << GPIO_BIT(gp)); - val = gpio_get_value(gp); + for (gpio = 0; gpio < MAX_NUM_GPIOS; ++gpio) { + bank = GPIO_BANK(gpio); + dir = in_le32(&bank->dir) & (1U << GPIO_BIT(gpio)); + val = gpio_get_value(gpio);
printf("% 4d: %s: %d [%c] %s\n", - gp, dir ? " in" : "out", val, - gpio_registry[gp].is_registered ? 'x' : ' ', - gpio_registry[gp].name); + gpio, dir ? " in" : "out", val, + gpio_registry[gpio].is_registered ? 'x' : ' ', + gpio_registry[gpio].name); } } diff --git a/drivers/gpio/mvgpio.c b/drivers/gpio/mvgpio.c index 276f206..c80891c 100644 --- a/drivers/gpio/mvgpio.c +++ b/drivers/gpio/mvgpio.c @@ -35,81 +35,79 @@ #define MV_MAX_GPIO 128 #endif
-int gpio_request(int gp, const char *label) +int gpio_request(unsigned gpio, const char *label) { - if (gp >= MV_MAX_GPIO) { - printf("%s: Invalid GPIO requested %d\n", __func__, gp); - return -EINVAL; + if (gpio >= MV_MAX_GPIO) { + printf("%s: Invalid GPIO requested %d\n", __func__, gpio); + return -1; } return 0; }
-void gpio_free(int gp) +int gpio_free(unsigned gpio) { + return 0; }
-void gpio_toggle_value(int gp) -{ - gpio_set_value(gp, !gpio_get_value(gp)); -} - -int gpio_direction_input(int gp) +int gpio_direction_input(unsigned gpio) { struct gpio_reg *gpio_reg_bank;
- if (gp >= MV_MAX_GPIO) { - printf("%s: Invalid GPIO %d\n", __func__, gp); - return -EINVAL; + if (gpio >= MV_MAX_GPIO) { + printf("%s: Invalid GPIO %d\n", __func__, gpio); + return -1; }
- gpio_reg_bank = get_gpio_base(GPIO_TO_REG(gp)); - writel(GPIO_TO_BIT(gp), &gpio_reg_bank->gcdr); + gpio_reg_bank = get_gpio_base(GPIO_TO_REG(gpio)); + writel(GPIO_TO_BIT(gpio), &gpio_reg_bank->gcdr); return 0; }
-int gpio_direction_output(int gp, int value) +int gpio_direction_output(unsigned gpio, int value) { struct gpio_reg *gpio_reg_bank;
- if (gp >= MV_MAX_GPIO) { - printf("%s: Invalid GPIO %d\n", __func__, gp); - return -EINVAL; + if (gpio >= MV_MAX_GPIO) { + printf("%s: Invalid GPIO %d\n", __func__, gpio); + return -1; }
- gpio_reg_bank = get_gpio_base(GPIO_TO_REG(gp)); - writel(GPIO_TO_BIT(gp), &gpio_reg_bank->gsdr); - gpio_set_value(gp, value); + gpio_reg_bank = get_gpio_base(GPIO_TO_REG(gpio)); + writel(GPIO_TO_BIT(gpio), &gpio_reg_bank->gsdr); + gpio_set_value(gpio, value); return 0; }
-int gpio_get_value(int gp) +int gpio_get_value(unsigned gpio) { struct gpio_reg *gpio_reg_bank; - u32 gp_val; + u32 gpio_val;
- if (gp >= MV_MAX_GPIO) { - printf("%s: Invalid GPIO %d\n", __func__, gp); - return -EINVAL; + if (gpio >= MV_MAX_GPIO) { + printf("%s: Invalid GPIO %d\n", __func__, gpio); + return -1; }
- gpio_reg_bank = get_gpio_base(GPIO_TO_REG(gp)); - gp_val = readl(&gpio_reg_bank->gplr); + gpio_reg_bank = get_gpio_base(GPIO_TO_REG(gpio)); + gpio_val = readl(&gpio_reg_bank->gplr);
- return GPIO_VAL(gp, gp_val); + return GPIO_VAL(gpio, gpio_val); }
-void gpio_set_value(int gp, int value) +int gpio_set_value(unsigned gpio, int value) { struct gpio_reg *gpio_reg_bank;
- if (gp >= MV_MAX_GPIO) { - printf("%s: Invalid GPIO %d\n", __func__, gp); - return; + if (gpio >= MV_MAX_GPIO) { + printf("%s: Invalid GPIO %d\n", __func__, gpio); + return -1; }
- gpio_reg_bank = get_gpio_base(GPIO_TO_REG(gp)); + gpio_reg_bank = get_gpio_base(GPIO_TO_REG(gpio)); if (value) - writel(GPIO_TO_BIT(gp), &gpio_reg_bank->gpsr); + writel(GPIO_TO_BIT(gpio), &gpio_reg_bank->gpsr); else - writel(GPIO_TO_BIT(gp), &gpio_reg_bank->gpcr); + writel(GPIO_TO_BIT(gpio), &gpio_reg_bank->gpcr); + + return 0; } diff --git a/drivers/gpio/mxc_gpio.c b/drivers/gpio/mxc_gpio.c index a7f36b2..9b2a36b 100644 --- a/drivers/gpio/mxc_gpio.c +++ b/drivers/gpio/mxc_gpio.c @@ -58,7 +58,7 @@ static int mxc_gpio_direction(unsigned int gpio, u32 l;
if (port >= ARRAY_SIZE(gpio_ports)) - return -EINVAL; + return -1;
gpio &= 0x1f;
@@ -78,14 +78,14 @@ static int mxc_gpio_direction(unsigned int gpio, return 0; }
-void gpio_set_value(int gpio, int value) +int gpio_set_value(unsigned gpio, int value) { unsigned int port = gpio >> 5; struct gpio_regs *regs; u32 l;
if (port >= ARRAY_SIZE(gpio_ports)) - return; + return -1;
gpio &= 0x1f;
@@ -97,55 +97,53 @@ void gpio_set_value(int gpio, int value) else l &= ~(1 << gpio); writel(l, ®s->gpio_dr); + + return 0; }
-int gpio_get_value(int gpio) +int gpio_get_value(unsigned gpio) { unsigned int port = gpio >> 5; struct gpio_regs *regs; - u32 l; + u32 val;
if (port >= ARRAY_SIZE(gpio_ports)) - return -EINVAL; + return -1;
gpio &= 0x1f;
regs = (struct gpio_regs *)gpio_ports[port];
- l = (readl(®s->gpio_dr) >> gpio) & 0x01; + val = (readl(®s->gpio_dr) >> gpio) & 0x01;
- return l; + return val; }
-int gpio_request(int gp, const char *label) +int gpio_request(unsigned gpio, const char *label) { - unsigned int port = gp >> 5; + unsigned int port = gpio >> 5; if (port >= ARRAY_SIZE(gpio_ports)) - return -EINVAL; + return -1; return 0; }
-void gpio_free(int gp) +int gpio_free(unsigned gpio) { + return 0; }
-void gpio_toggle_value(int gp) -{ - gpio_set_value(gp, !gpio_get_value(gp)); -} - -int gpio_direction_input(int gp) +int gpio_direction_input(unsigned gpio) { - return mxc_gpio_direction(gp, MXC_GPIO_DIRECTION_IN); + return mxc_gpio_direction(gpio, MXC_GPIO_DIRECTION_IN); }
-int gpio_direction_output(int gp, int value) +int gpio_direction_output(unsigned gpio, int value) { - int ret = mxc_gpio_direction(gp, MXC_GPIO_DIRECTION_OUT); + int ret = mxc_gpio_direction(gpio, MXC_GPIO_DIRECTION_OUT);
if (ret < 0) return ret;
- gpio_set_value(gp, value); + gpio_set_value(gpio, value); return 0; } diff --git a/drivers/gpio/s5p_gpio.c b/drivers/gpio/s5p_gpio.c index 1edf9a2..47f3213 100644 --- a/drivers/gpio/s5p_gpio.c +++ b/drivers/gpio/s5p_gpio.c @@ -20,7 +20,7 @@
#include <common.h> #include <asm/io.h> -#include <asm/arch/gpio.h> +#include <asm/gpio.h>
#define CON_MASK(x) (0xf << ((x) << 2)) #define CON_SFR(x, v) ((v) << ((x) << 2)) @@ -142,46 +142,55 @@ void s5p_gpio_set_rate(struct s5p_gpio_bank *bank, int gpio, int mode) writel(value, &bank->drv); }
-struct s5p_gpio_bank *s5p_gpio_get_bank(int nr) +struct s5p_gpio_bank *s5p_gpio_get_bank(unsigned gpio) { - int bank = nr / GPIO_PER_BANK; + int bank = gpio / GPIO_PER_BANK; bank *= sizeof(struct s5p_gpio_bank);
- return (struct s5p_gpio_bank *) (s5p_gpio_base(nr) + bank); + return (struct s5p_gpio_bank *) (s5p_gpio_base(gpio) + bank); }
-int s5p_gpio_get_pin(int nr) +int s5p_gpio_get_pin(unsigned gpio) { - return nr % GPIO_PER_BANK; + return gpio % GPIO_PER_BANK; }
-int gpio_request(int gpio, const char *label) +/* Common GPIO API */ + +int gpio_request(unsigned gpio, const char *label) { return 0; }
-int gpio_direction_input(int nr) +int gpio_free(unsigned gpio) { - s5p_gpio_direction_input(s5p_gpio_get_bank(nr), - s5p_gpio_get_pin(nr)); return 0; }
-int gpio_direction_output(int nr, int value) +int gpio_direction_input(unsigned gpio) { - s5p_gpio_direction_output(s5p_gpio_get_bank(nr), - s5p_gpio_get_pin(nr), value); + s5p_gpio_direction_input(s5p_gpio_get_bank(gpio), + s5p_gpio_get_pin(gpio)); return 0; }
-int gpio_get_value(int nr) +int gpio_direction_output(unsigned gpio, int value) { - return (int) s5p_gpio_get_value(s5p_gpio_get_bank(nr), - s5p_gpio_get_pin(nr)); + s5p_gpio_direction_output(s5p_gpio_get_bank(gpio), + s5p_gpio_get_pin(gpio), value); + return 0; }
-void gpio_set_value(int nr, int value) +int gpio_get_value(unsigned gpio) { - s5p_gpio_set_value(s5p_gpio_get_bank(nr), - s5p_gpio_get_pin(nr), value); + return (int) s5p_gpio_get_value(s5p_gpio_get_bank(gpio), + s5p_gpio_get_pin(gpio)); +} + +int gpio_set_value(unsigned gpio, int value) +{ + s5p_gpio_set_value(s5p_gpio_get_bank(gpio), + s5p_gpio_get_pin(gpio), value); + + return 0; } diff --git a/drivers/gpio/tegra2_gpio.c b/drivers/gpio/tegra2_gpio.c index f686e80..620b4ff 100644 --- a/drivers/gpio/tegra2_gpio.c +++ b/drivers/gpio/tegra2_gpio.c @@ -49,186 +49,190 @@ static char *get_name(int i) return *gpio_names[i].name ? gpio_names[i].name : "UNKNOWN"; }
-/* Return config of pin 'gp' as GPIO (1) or SFPIO (0) */ -static int get_config(int gp) +/* Return config of pin 'gpio' as GPIO (1) or SFPIO (0) */ +static int get_config(unsigned gpio) { - struct gpio_ctlr *gpio = (struct gpio_ctlr *)NV_PA_GPIO_BASE; - struct gpio_ctlr_bank *bank = &gpio->gpio_bank[GPIO_BANK(gp)]; + struct gpio_ctlr *ctlr = (struct gpio_ctlr *)NV_PA_GPIO_BASE; + struct gpio_ctlr_bank *bank = &ctlr->gpio_bank[GPIO_BANK(gpio)]; u32 u; int type;
- u = readl(&bank->gpio_config[GPIO_PORT(gp)]); - type = (u >> GPIO_BIT(gp)) & 1; + u = readl(&bank->gpio_config[GPIO_PORT(gpio)]); + type = (u >> GPIO_BIT(gpio)) & 1;
debug("get_config: port = %d, bit = %d is %s\n", - GPIO_FULLPORT(gp), GPIO_BIT(gp), type ? "GPIO" : "SFPIO"); + GPIO_FULLPORT(gpio), GPIO_BIT(gpio), type ? "GPIO" : "SFPIO");
return type; }
-/* Config pin 'gp' as GPIO or SFPIO, based on 'type' */ -static void set_config(int gp, int type) +/* Config pin 'gpio' as GPIO or SFPIO, based on 'type' */ +static void set_config(unsigned gpio, int type) { - struct gpio_ctlr *gpio = (struct gpio_ctlr *)NV_PA_GPIO_BASE; - struct gpio_ctlr_bank *bank = &gpio->gpio_bank[GPIO_BANK(gp)]; + struct gpio_ctlr *ctlr = (struct gpio_ctlr *)NV_PA_GPIO_BASE; + struct gpio_ctlr_bank *bank = &ctlr->gpio_bank[GPIO_BANK(gpio)]; u32 u;
debug("set_config: port = %d, bit = %d, %s\n", - GPIO_FULLPORT(gp), GPIO_BIT(gp), type ? "GPIO" : "SFPIO"); + GPIO_FULLPORT(gpio), GPIO_BIT(gpio), type ? "GPIO" : "SFPIO");
- u = readl(&bank->gpio_config[GPIO_PORT(gp)]); + u = readl(&bank->gpio_config[GPIO_PORT(gpio)]); if (type) /* GPIO */ - u |= 1 << GPIO_BIT(gp); + u |= 1 << GPIO_BIT(gpio); else - u &= ~(1 << GPIO_BIT(gp)); - writel(u, &bank->gpio_config[GPIO_PORT(gp)]); + u &= ~(1 << GPIO_BIT(gpio)); + writel(u, &bank->gpio_config[GPIO_PORT(gpio)]); }
-/* Return GPIO pin 'gp' direction - 0 = input or 1 = output */ -static int get_direction(int gp) +/* Return GPIO pin 'gpio' direction - 0 = input or 1 = output */ +static int get_direction(unsigned gpio) { - struct gpio_ctlr *gpio = (struct gpio_ctlr *)NV_PA_GPIO_BASE; - struct gpio_ctlr_bank *bank = &gpio->gpio_bank[GPIO_BANK(gp)]; + struct gpio_ctlr *ctlr = (struct gpio_ctlr *)NV_PA_GPIO_BASE; + struct gpio_ctlr_bank *bank = &ctlr->gpio_bank[GPIO_BANK(gpio)]; u32 u; int dir;
- u = readl(&bank->gpio_dir_out[GPIO_PORT(gp)]); - dir = (u >> GPIO_BIT(gp)) & 1; + u = readl(&bank->gpio_dir_out[GPIO_PORT(gpio)]); + dir = (u >> GPIO_BIT(gpio)) & 1;
debug("get_direction: port = %d, bit = %d, %s\n", - GPIO_FULLPORT(gp), GPIO_BIT(gp), dir ? "OUT" : "IN"); + GPIO_FULLPORT(gpio), GPIO_BIT(gpio), dir ? "OUT" : "IN");
return dir; }
-/* Config GPIO pin 'gp' as input or output (OE) as per 'output' */ -static void set_direction(int gp, int output) +/* Config GPIO pin 'gpio' as input or output (OE) as per 'output' */ +static void set_direction(unsigned gpio, int output) { - struct gpio_ctlr *gpio = (struct gpio_ctlr *)NV_PA_GPIO_BASE; - struct gpio_ctlr_bank *bank = &gpio->gpio_bank[GPIO_BANK(gp)]; + struct gpio_ctlr *ctlr = (struct gpio_ctlr *)NV_PA_GPIO_BASE; + struct gpio_ctlr_bank *bank = &ctlr->gpio_bank[GPIO_BANK(gpio)]; u32 u;
debug("set_direction: port = %d, bit = %d, %s\n", - GPIO_FULLPORT(gp), GPIO_BIT(gp), output ? "OUT" : "IN"); + GPIO_FULLPORT(gpio), GPIO_BIT(gpio), output ? "OUT" : "IN");
- u = readl(&bank->gpio_dir_out[GPIO_PORT(gp)]); + u = readl(&bank->gpio_dir_out[GPIO_PORT(gpio)]); if (output) - u |= 1 << GPIO_BIT(gp); + u |= 1 << GPIO_BIT(gpio); else - u &= ~(1 << GPIO_BIT(gp)); - writel(u, &bank->gpio_dir_out[GPIO_PORT(gp)]); + u &= ~(1 << GPIO_BIT(gpio)); + writel(u, &bank->gpio_dir_out[GPIO_PORT(gpio)]); }
-/* set GPIO pin 'gp' output bit as 0 or 1 as per 'high' */ -static void set_level(int gp, int high) +/* set GPIO pin 'gpio' output bit as 0 or 1 as per 'high' */ +static void set_level(unsigned gpio, int high) { - struct gpio_ctlr *gpio = (struct gpio_ctlr *)NV_PA_GPIO_BASE; - struct gpio_ctlr_bank *bank = &gpio->gpio_bank[GPIO_BANK(gp)]; + struct gpio_ctlr *ctlr = (struct gpio_ctlr *)NV_PA_GPIO_BASE; + struct gpio_ctlr_bank *bank = &ctlr->gpio_bank[GPIO_BANK(gpio)]; u32 u;
debug("set_level: port = %d, bit %d == %d\n", - GPIO_FULLPORT(gp), GPIO_BIT(gp), high); + GPIO_FULLPORT(gpio), GPIO_BIT(gpio), high);
- u = readl(&bank->gpio_out[GPIO_PORT(gp)]); + u = readl(&bank->gpio_out[GPIO_PORT(gpio)]); if (high) - u |= 1 << GPIO_BIT(gp); + u |= 1 << GPIO_BIT(gpio); else - u &= ~(1 << GPIO_BIT(gp)); - writel(u, &bank->gpio_out[GPIO_PORT(gp)]); + u &= ~(1 << GPIO_BIT(gpio)); + writel(u, &bank->gpio_out[GPIO_PORT(gpio)]); }
/* * Generic_GPIO primitives. */
-int gpio_request(int gp, const char *label) +int gpio_request(unsigned gpio, const char *label) { - if (gp >= MAX_NUM_GPIOS) + if (gpio >= MAX_NUM_GPIOS) return -1;
- strncpy(gpio_names[gp].name, label, GPIO_NAME_SIZE); - gpio_names[gp].name[GPIO_NAME_SIZE - 1] = '\0'; + strncpy(gpio_names[gpio].name, label, GPIO_NAME_SIZE); + gpio_names[gpio].name[GPIO_NAME_SIZE - 1] = '\0';
/* Configure as a GPIO */ - set_config(gp, 1); + set_config(gpio, 1);
return 0; }
-void gpio_free(int gp) +int gpio_free(unsigned gpio) { + if (gpio >= MAX_NUM_GPIOS) + return -1; + + gpio_names[gpio].name[0] = '\0'; + /* Do not configure as input or change pin mux here */ + return 0; }
-/* read GPIO OUT value of pin 'gp' */ -static int gpio_get_output_value(int gp) +/* read GPIO OUT value of pin 'gpio' */ +static int gpio_get_output_value(unsigned gpio) { - struct gpio_ctlr *gpio = (struct gpio_ctlr *)NV_PA_GPIO_BASE; - struct gpio_ctlr_bank *bank = &gpio->gpio_bank[GPIO_BANK(gp)]; + struct gpio_ctlr *ctlr = (struct gpio_ctlr *)NV_PA_GPIO_BASE; + struct gpio_ctlr_bank *bank = &ctlr->gpio_bank[GPIO_BANK(gpio)]; int val;
debug("gpio_get_output_value: pin = %d (port %d:bit %d)\n", - gp, GPIO_FULLPORT(gp), GPIO_BIT(gp)); + gpio, GPIO_FULLPORT(gpio), GPIO_BIT(gpio));
- val = readl(&bank->gpio_out[GPIO_PORT(gp)]); + val = readl(&bank->gpio_out[GPIO_PORT(gpio)]);
- return (val >> GPIO_BIT(gp)) & 1; + return (val >> GPIO_BIT(gpio)) & 1; }
-void gpio_toggle_value(int gp) -{ - gpio_set_value(gp, !gpio_get_output_value(gp)); -} - -/* set GPIO pin 'gp' as an input */ -int gpio_direction_input(int gp) +/* set GPIO pin 'gpio' as an input */ +int gpio_direction_input(unsigned gpio) { debug("gpio_direction_input: pin = %d (port %d:bit %d)\n", - gp, GPIO_FULLPORT(gp), GPIO_BIT(gp)); + gpio, GPIO_FULLPORT(gpio), GPIO_BIT(gpio));
/* Configure GPIO direction as input. */ - set_direction(gp, 0); + set_direction(gpio, 0);
return 0; }
-/* set GPIO pin 'gp' as an output, with polarity 'value' */ -int gpio_direction_output(int gp, int value) +/* set GPIO pin 'gpio' as an output, with polarity 'value' */ +int gpio_direction_output(unsigned gpio, int value) { debug("gpio_direction_output: pin = %d (port %d:bit %d) = %s\n", - gp, GPIO_FULLPORT(gp), GPIO_BIT(gp), value ? "HIGH" : "LOW"); + gpio, GPIO_FULLPORT(gpio), GPIO_BIT(gpio), + value ? "HIGH" : "LOW");
/* Configure GPIO output value. */ - set_level(gp, value); + set_level(gpio, value);
/* Configure GPIO direction as output. */ - set_direction(gp, 1); + set_direction(gpio, 1);
return 0; }
-/* read GPIO IN value of pin 'gp' */ -int gpio_get_value(int gp) +/* read GPIO IN value of pin 'gpio' */ +int gpio_get_value(unsigned gpio) { - struct gpio_ctlr *gpio = (struct gpio_ctlr *)NV_PA_GPIO_BASE; - struct gpio_ctlr_bank *bank = &gpio->gpio_bank[GPIO_BANK(gp)]; + struct gpio_ctlr *ctlr = (struct gpio_ctlr *)NV_PA_GPIO_BASE; + struct gpio_ctlr_bank *bank = &ctlr->gpio_bank[GPIO_BANK(gpio)]; int val;
debug("gpio_get_value: pin = %d (port %d:bit %d)\n", - gp, GPIO_FULLPORT(gp), GPIO_BIT(gp)); + gpio, GPIO_FULLPORT(gpio), GPIO_BIT(gpio));
- val = readl(&bank->gpio_in[GPIO_PORT(gp)]); + val = readl(&bank->gpio_in[GPIO_PORT(gpio)]);
- return (val >> GPIO_BIT(gp)) & 1; + return (val >> GPIO_BIT(gpio)) & 1; }
-/* write GPIO OUT value to pin 'gp' */ -void gpio_set_value(int gp, int value) +/* write GPIO OUT value to pin 'gpio' */ +int gpio_set_value(unsigned gpio, int value) { debug("gpio_set_value: pin = %d (port %d:bit %d), value = %d\n", - gp, GPIO_FULLPORT(gp), GPIO_BIT(gp), value); + gpio, GPIO_FULLPORT(gpio), GPIO_BIT(gpio), value);
/* Configure GPIO output value. */ - set_level(gp, value); + set_level(gpio, value); + + return 0; }
/* @@ -236,7 +240,8 @@ void gpio_set_value(int gp, int value) */ void gpio_info(void) { - int c, type; + unsigned c; + int type;
for (c = 0; c < MAX_NUM_GPIOS; c++) { type = get_config(c); /* GPIO, not SFPIO */
On Fri, 11 Nov 2011 15:55:36 -0600 Joe Hershberger joe.hershberger@ni.com wrote:
ARM boards should use the generic GPIO API This means changing gpio to unsigned type Remove the unused gpio_toggle() function which is not part of the API Comment that free should not modify pin state
Signed-off-by: Joe Hershberger joe.hershberger@ni.com Cc: Joe Hershberger joe.hershberger@gmail.com Cc: Kim Phillips kim.phillips@freescale.com Cc: Albert ARIBAUD albert.u.boot@aribaud.net
I've tested this series on the 8313, and I'm ok with it going in:
Acked-by: Kim Phillips kim.phillips@freescale.com
I need an ack from the ARM GPIO guys to apply it though (assuming it is to go through 83xx).
Kim
On Fri, Nov 11, 2011 at 5:07 PM, Kim Phillips kim.phillips@freescale.com wrote:
On Fri, 11 Nov 2011 15:55:36 -0600 Joe Hershberger joe.hershberger@ni.com wrote:
ARM boards should use the generic GPIO API This means changing gpio to unsigned type Remove the unused gpio_toggle() function which is not part of the API Comment that free should not modify pin state
Signed-off-by: Joe Hershberger joe.hershberger@ni.com Cc: Joe Hershberger joe.hershberger@gmail.com Cc: Kim Phillips kim.phillips@freescale.com Cc: Albert ARIBAUD albert.u.boot@aribaud.net
I've tested this series on the 8313, and I'm ok with it going in:
Acked-by: Kim Phillips kim.phillips@freescale.com
I need an ack from the ARM GPIO guys to apply it though (assuming it is to go through 83xx).
It has been Acked by ARM guys several times in several forms. It's pretty straightforward. Not sure if Albert was planning to look at this again.
-Joe
Signed-off-by: Joe Hershberger joe.hershberger@ni.com Cc: Joe Hershberger joe.hershberger@gmail.com Cc: Kim Phillips kim.phillips@freescale.com --- Changes for v2: - Improved names of INIT constants (to include "CONFIG_") - Moved changes to board/freescale/mpc8313erdb/mpc8313erdb.c to patch 2/2 Changes for v3: - gpio_init_* is now mpc83xx_gpio_init_* Changes for v4: - no volatile - no camelCase - use i/o accessors Changes for v5: Changes for v6: - update to use new GPIO API Changes for v7: - checkpatch compliance Changes for v8: Changes for v9: - Change indentation on #define
arch/powerpc/include/asm/arch-mpc83xx/gpio.h | 38 +++++ arch/powerpc/include/asm/gpio.h | 2 + drivers/gpio/Makefile | 1 + drivers/gpio/mpc83xx_gpio.c | 199 ++++++++++++++++++++++++++ 4 files changed, 240 insertions(+), 0 deletions(-) create mode 100644 arch/powerpc/include/asm/arch-mpc83xx/gpio.h create mode 100644 arch/powerpc/include/asm/gpio.h create mode 100644 drivers/gpio/mpc83xx_gpio.c
diff --git a/arch/powerpc/include/asm/arch-mpc83xx/gpio.h b/arch/powerpc/include/asm/arch-mpc83xx/gpio.h new file mode 100644 index 0000000..036f51e --- /dev/null +++ b/arch/powerpc/include/asm/arch-mpc83xx/gpio.h @@ -0,0 +1,38 @@ +/* + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef _MPC83XX_GPIO_H_ +#define _MPC83XX_GPIO_H_ + +/* + * The MCP83xx's 1-2 GPIO controllers each with 32 bits. + */ +#if defined(CONFIG_MPC8313) || defined(CONFIG_MPC8308) || \ + defined(CONFIG_MPC8315) +#define MPC83XX_GPIO_CTRLRS 1 +#elif defined(CONFIG_MPC834x) || defined(CONFIG_MPC837x) +#define MPC83XX_GPIO_CTRLRS 2 +#else +#define MPC83XX_GPIO_CTRLRS 0 +#endif + +#define MAX_NUM_GPIOS (32 * MPC83XX_GPIO_CTRLRS) + +void mpc83xx_gpio_init_f(void); +void mpc83xx_gpio_init_r(void); + +#endif /* MPC83XX_GPIO_H_ */ diff --git a/arch/powerpc/include/asm/gpio.h b/arch/powerpc/include/asm/gpio.h new file mode 100644 index 0000000..d49ad08 --- /dev/null +++ b/arch/powerpc/include/asm/gpio.h @@ -0,0 +1,2 @@ +#include <asm/arch/gpio.h> +#include <asm-generic/gpio.h> diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile index f505813..77a1c70 100644 --- a/drivers/gpio/Makefile +++ b/drivers/gpio/Makefile @@ -35,6 +35,7 @@ COBJS-$(CONFIG_PCA9698) += pca9698.o COBJS-$(CONFIG_S5P) += s5p_gpio.o COBJS-$(CONFIG_TEGRA2_GPIO) += tegra2_gpio.o COBJS-$(CONFIG_DA8XX_GPIO) += da8xx_gpio.o +COBJS-$(CONFIG_MPC83XX_GPIO) += mpc83xx_gpio.o
COBJS := $(COBJS-y) SRCS := $(COBJS:.o=.c) diff --git a/drivers/gpio/mpc83xx_gpio.c b/drivers/gpio/mpc83xx_gpio.c new file mode 100644 index 0000000..a9afcb2 --- /dev/null +++ b/drivers/gpio/mpc83xx_gpio.c @@ -0,0 +1,199 @@ +/* + * Freescale MPC83xx GPIO handling. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <mpc83xx.h> +#include <asm/gpio.h> +#include <asm/io.h> + +#ifndef CONFIG_MPC83XX_GPIO_0_INIT_DIRECTION +#define CONFIG_MPC83XX_GPIO_0_INIT_DIRECTION 0 +#endif +#ifndef CONFIG_MPC83XX_GPIO_1_INIT_DIRECTION +#define CONFIG_MPC83XX_GPIO_1_INIT_DIRECTION 0 +#endif +#ifndef CONFIG_MPC83XX_GPIO_0_INIT_OPEN_DRAIN +#define CONFIG_MPC83XX_GPIO_0_INIT_OPEN_DRAIN 0 +#endif +#ifndef CONFIG_MPC83XX_GPIO_1_INIT_OPEN_DRAIN +#define CONFIG_MPC83XX_GPIO_1_INIT_OPEN_DRAIN 0 +#endif +#ifndef CONFIG_MPC83XX_GPIO_0_INIT_VALUE +#define CONFIG_MPC83XX_GPIO_0_INIT_VALUE 0 +#endif +#ifndef CONFIG_MPC83XX_GPIO_1_INIT_VALUE +#define CONFIG_MPC83XX_GPIO_1_INIT_VALUE 0 +#endif + +static unsigned int gpio_output_value[MPC83XX_GPIO_CTRLRS]; + +/* + * Generic_GPIO primitives. + */ + +int gpio_request(unsigned gpio, const char *label) +{ + if (gpio >= MAX_NUM_GPIOS) + return -1; + + return 0; +} + +int gpio_free(unsigned gpio) +{ + /* Do not set to input */ + return 0; +} + +/* set GPIO pin 'gpio' as an input */ +int gpio_direction_input(unsigned gpio) +{ + immap_t *im = (immap_t *)CONFIG_SYS_IMMR; + unsigned int ctrlr; + unsigned int line; + unsigned int line_mask; + + /* 32-bits per controller */ + ctrlr = gpio >> 5; + line = gpio & (0x1F); + + /* Big endian */ + line_mask = 1 << (31 - line); + + clrbits_be32(&im->gpio[ctrlr].dir, line_mask); + + return 0; +} + +/* set GPIO pin 'gpio' as an output, with polarity 'value' */ +int gpio_direction_output(unsigned gpio, int value) +{ + immap_t *im = (immap_t *)CONFIG_SYS_IMMR; + unsigned int ctrlr; + unsigned int line; + unsigned int line_mask; + + if (value != 0 && value != 1) { + printf("Error: Value parameter must be 0 or 1.\n"); + return -1; + } + + gpio_set_value(gpio, value); + + /* 32-bits per controller */ + ctrlr = gpio >> 5; + line = gpio & (0x1F); + + /* Big endian */ + line_mask = 1 << (31 - line); + + /* Make the line output */ + setbits_be32(&im->gpio[ctrlr].dir, line_mask); + + return 0; +} + +/* read GPIO IN value of pin 'gpio' */ +int gpio_get_value(unsigned gpio) +{ + immap_t *im = (immap_t *)CONFIG_SYS_IMMR; + unsigned int ctrlr; + unsigned int line; + unsigned int line_mask; + + /* 32-bits per controller */ + ctrlr = gpio >> 5; + line = gpio & (0x1F); + + /* Big endian */ + line_mask = 1 << (31 - line); + + /* Read the value and mask off the bit */ + return (in_be32(&im->gpio[ctrlr].dat) & line_mask) != 0; +} + +/* write GPIO OUT value to pin 'gpio' */ +int gpio_set_value(unsigned gpio, int value) +{ + immap_t *im = (immap_t *)CONFIG_SYS_IMMR; + unsigned int ctrlr; + unsigned int line; + unsigned int line_mask; + + if (value != 0 && value != 1) { + printf("Error: Value parameter must be 0 or 1.\n"); + return -1; + } + + /* 32-bits per controller */ + ctrlr = gpio >> 5; + line = gpio & (0x1F); + + /* Big endian */ + line_mask = 1 << (31 - line); + + /* Update the local output buffer soft copy */ + gpio_output_value[ctrlr] = + (gpio_output_value[ctrlr] & ~line_mask) | \ + (value ? line_mask : 0); + + /* Write the output */ + out_be32(&im->gpio[ctrlr].dat, gpio_output_value[ctrlr]); + + return 0; +} + +/* Configure GPIO registers early */ +void mpc83xx_gpio_init_f() +{ + immap_t *im = (immap_t *)CONFIG_SYS_IMMR; + +#if MPC83XX_GPIO_CTRLRS >= 1 + out_be32(&im->gpio[0].dir, CONFIG_MPC83XX_GPIO_0_INIT_DIRECTION); + out_be32(&im->gpio[0].odr, CONFIG_MPC83XX_GPIO_0_INIT_OPEN_DRAIN); + out_be32(&im->gpio[0].dat, CONFIG_MPC83XX_GPIO_0_INIT_VALUE); + out_be32(&im->gpio[0].ier, 0xFFFFFFFF); /* Clear all events */ + out_be32(&im->gpio[0].imr, 0); + out_be32(&im->gpio[0].icr, 0); +#endif + +#if MPC83XX_GPIO_CTRLRS >= 2 + out_be32(&im->gpio[1].dir, CONFIG_MPC83XX_GPIO_1_INIT_DIRECTION); + out_be32(&im->gpio[1].odr, CONFIG_MPC83XX_GPIO_1_INIT_OPEN_DRAIN); + out_be32(&im->gpio[1].dat, CONFIG_MPC83XX_GPIO_1_INIT_VALUE); + out_be32(&im->gpio[1].ier, 0xFFFFFFFF); /* Clear all events */ + out_be32(&im->gpio[1].imr, 0); + out_be32(&im->gpio[1].icr, 0); +#endif +} + +/* Initialize GPIO soft-copies */ +void mpc83xx_gpio_init_r() +{ +#if MPC83XX_GPIO_CTRLRS >= 1 + gpio_output_value[0] = CONFIG_MPC83XX_GPIO_0_INIT_VALUE; +#endif + +#if MPC83XX_GPIO_CTRLRS >= 2 + gpio_output_value[1] = CONFIG_MPC83XX_GPIO_1_INIT_VALUE; +#endif +}
Signed-off-by: Joe Hershberger joe.hershberger@ni.com Cc: Joe Hershberger joe.hershberger@gmail.com Cc: Kim Phillips kim.phillips@freescale.com --- Changes for v2: - Moved changes to board/freescale/mpc8313erdb/mpc8313erdb.c from patch 1/2 Changes for v3: - Renamed gpio_init_* to mpc83xx_gpio_init_* - Added board_early_init_r support to MPC8313ERDB targets Changes for v4: - Fixed build warning Changes for v5: Changes for v6: Changes for v7: - checkpatch compliance Changes for v8: Changes for v9:
board/freescale/mpc8313erdb/mpc8313erdb.c | 15 +++++++++++++++ include/configs/MPC8313ERDB.h | 9 +++++++-- 2 files changed, 22 insertions(+), 2 deletions(-)
diff --git a/board/freescale/mpc8313erdb/mpc8313erdb.c b/board/freescale/mpc8313erdb/mpc8313erdb.c index 08f873d..730ec4e 100644 --- a/board/freescale/mpc8313erdb/mpc8313erdb.c +++ b/board/freescale/mpc8313erdb/mpc8313erdb.c @@ -31,6 +31,9 @@ #include <vsc7385.h> #include <ns16550.h> #include <nand.h> +#if defined(CONFIG_MPC83XX_GPIO) && !defined(CONFIG_NAND_SPL) +#include <asm/gpio.h> +#endif
DECLARE_GLOBAL_DATA_PTR;
@@ -42,6 +45,18 @@ int board_early_init_f(void) if (im->pmc.pmccr1 & PMCCR1_POWER_OFF) gd->flags |= GD_FLG_SILENT; #endif +#if defined(CONFIG_MPC83XX_GPIO) && !defined(CONFIG_NAND_SPL) + mpc83xx_gpio_init_f(); +#endif + + return 0; +} + +int board_early_init_r(void) +{ +#if defined(CONFIG_MPC83XX_GPIO) && !defined(CONFIG_NAND_SPL) + mpc83xx_gpio_init_r(); +#endif
return 0; } diff --git a/include/configs/MPC8313ERDB.h b/include/configs/MPC8313ERDB.h index 31503af..39bdcf8 100644 --- a/include/configs/MPC8313ERDB.h +++ b/include/configs/MPC8313ERDB.h @@ -82,7 +82,8 @@
#define CONFIG_SYS_CLK_FREQ CONFIG_83XX_CLKIN
-#define CONFIG_BOARD_EARLY_INIT_F /* call board_pre_init */ +#define CONFIG_BOARD_EARLY_INIT_F /* call board_early_init_f */ +#define CONFIG_BOARD_EARLY_INIT_R /* call board_early_init_r */
#define CONFIG_SYS_IMMR 0xE0000000
@@ -363,6 +364,9 @@ #define CONFIG_OF_BOARD_SETUP 1 #define CONFIG_OF_STDOUT_VIA_ALIAS 1
+#define CONFIG_MPC83XX_GPIO 1 +#define CONFIG_CMD_GPIO 1 + /* * Serial Port */ @@ -581,7 +585,8 @@
/* System IO Config */ #define CONFIG_SYS_SICRH (SICRH_TSOBI1 | SICRH_TSOBI2) /* RGMII */ -#define CONFIG_SYS_SICRL SICRL_USBDR_10 /* Enable Internal USB Phy */ + /* Enable Internal USB Phy and GPIO on LCD Connector */ +#define CONFIG_SYS_SICRL (SICRL_USBDR_10 | SICRL_LBC)
#define CONFIG_SYS_HID0_INIT 0x000000000 #define CONFIG_SYS_HID0_FINAL (HID0_ENABLE_MACHINE_CHECK | \
ARM boards should use the generic GPIO API Update the existing gpio implementations to conform the the generic API
Signed-off-by: Joe Hershberger joe.hershberger@ni.com Cc: Joe Hershberger joe.hershberger@gmail.com Cc: Kim Phillips kim.phillips@freescale.com --- Changes for v4: - Split out of patch 1/2 Changes for v5: - Moved asm/arch/gpio.h include to asm/gpio.h Changes for v6: Changes for v7: Changes for v8: - Include omap-common/gpio.c in retrofit
arch/arm/cpu/armv7/omap-common/gpio.c | 23 +++-- arch/arm/include/asm/gpio.h | 38 +-------- drivers/gpio/da8xx_gpio.c | 73 +++++++-------- drivers/gpio/tegra2_gpio.c | 160 ++++++++++++++++---------------- 4 files changed, 128 insertions(+), 166 deletions(-)
diff --git a/arch/arm/cpu/armv7/omap-common/gpio.c b/arch/arm/cpu/armv7/omap-common/gpio.c index 75a02da..fc62acc 100644 --- a/arch/arm/cpu/armv7/omap-common/gpio.c +++ b/arch/arm/cpu/armv7/omap-common/gpio.c @@ -36,7 +36,7 @@ * published by the Free Software Foundation. */ #include <common.h> -#include <asm/arch/gpio.h> +#include <asm/gpio.h> #include <asm/io.h> #include <asm/errno.h>
@@ -142,20 +142,22 @@ static void _set_gpio_dataout(const struct gpio_bank *bank, int gpio, /** * Set value of the specified gpio */ -void gpio_set_value(int gpio, int value) +int gpio_set_value(unsigned gpio, int value) { const struct gpio_bank *bank;
if (check_gpio(gpio) < 0) - return; + return -1; bank = get_gpio_bank(gpio); _set_gpio_dataout(bank, get_gpio_index(gpio), value); + + return 0; }
/** * Get value of the specified gpio */ -int gpio_get_value(int gpio) +int gpio_get_value(unsigned gpio) { const struct gpio_bank *bank; void *reg; @@ -176,11 +178,11 @@ int gpio_get_value(int gpio) reg += OMAP_GPIO_DATAOUT; break; default: - return -EINVAL; + return -1; } break; default: - return -EINVAL; + return -1; } return (__raw_readl(reg) & (1 << get_gpio_index(gpio))) != 0; @@ -194,7 +196,7 @@ int gpio_direction_input(unsigned gpio) const struct gpio_bank *bank;
if (check_gpio(gpio) < 0) - return -EINVAL; + return -1;
bank = get_gpio_bank(gpio); _set_gpio_direction(bank, get_gpio_index(gpio), 1); @@ -210,7 +212,7 @@ int gpio_direction_output(unsigned gpio, int value) const struct gpio_bank *bank;
if (check_gpio(gpio) < 0) - return -EINVAL; + return -1;
bank = get_gpio_bank(gpio); _set_gpio_dataout(bank, get_gpio_index(gpio), value); @@ -224,7 +226,7 @@ int gpio_direction_output(unsigned gpio, int value) * * NOTE: Argument 'label' is unused. */ -int gpio_request(int gpio, const char *label) +int gpio_request(unsigned gpio, const char *label) { if (check_gpio(gpio) < 0) return -EINVAL; @@ -235,6 +237,7 @@ int gpio_request(int gpio, const char *label) /** * Reset and free the gpio after using it. */ -void gpio_free(unsigned gpio) +int gpio_free(unsigned gpio) { + return 0; } diff --git a/arch/arm/include/asm/gpio.h b/arch/arm/include/asm/gpio.h index eb071d1..d49ad08 100644 --- a/arch/arm/include/asm/gpio.h +++ b/arch/arm/include/asm/gpio.h @@ -1,38 +1,2 @@ -/* - * Copyright (c) 2011, NVIDIA Corp. All rights reserved. - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#ifndef _GPIO_H_ -#define _GPIO_H_ - #include <asm/arch/gpio.h> -/* - * Generic GPIO API - */ - -int gpio_request(int gp, const char *label); -void gpio_free(int gp); -void gpio_toggle_value(int gp); -int gpio_direction_input(int gp); -int gpio_direction_output(int gp, int value); -int gpio_get_value(int gp); -void gpio_set_value(int gp, int value); - -#endif /* _GPIO_H_ */ +#include <asm-generic/gpio.h> diff --git a/drivers/gpio/da8xx_gpio.c b/drivers/gpio/da8xx_gpio.c index 7a15614..9c2df44 100644 --- a/drivers/gpio/da8xx_gpio.c +++ b/drivers/gpio/da8xx_gpio.c @@ -181,90 +181,85 @@ static const struct pinmux_config gpio_pinmux[] = { { pinmux(18), 8, 2 }, };
-int gpio_request(int gp, const char *label) +int gpio_request(unsigned gpio, const char *label) { - if (gp >= MAX_NUM_GPIOS) + if (gpio >= MAX_NUM_GPIOS) return -1;
- if (gpio_registry[gp].is_registered) + if (gpio_registry[gpio].is_registered) return -1;
- gpio_registry[gp].is_registered = 1; - strncpy(gpio_registry[gp].name, label, GPIO_NAME_SIZE); - gpio_registry[gp].name[GPIO_NAME_SIZE - 1] = 0; + gpio_registry[gpio].is_registered = 1; + strncpy(gpio_registry[gpio].name, label, GPIO_NAME_SIZE); + gpio_registry[gpio].name[GPIO_NAME_SIZE - 1] = 0;
- davinci_configure_pin_mux(&gpio_pinmux[gp], 1); + davinci_configure_pin_mux(&gpio_pinmux[gpio], 1);
return 0; }
-void gpio_free(int gp) +int gpio_free(unsigned gpio) { - gpio_registry[gp].is_registered = 0; -} - -void gpio_toggle_value(int gp) -{ - struct davinci_gpio *bank; - - bank = GPIO_BANK(gp); - gpio_set_value(gp, !gpio_get_value(gp)); + gpio_registry[gpio].is_registered = 0; + return 0; }
-int gpio_direction_input(int gp) +int gpio_direction_input(unsigned gpio) { struct davinci_gpio *bank;
- bank = GPIO_BANK(gp); - setbits_le32(&bank->dir, 1U << GPIO_BIT(gp)); + bank = GPIO_BANK(gpio); + setbits_le32(&bank->dir, 1U << GPIO_BIT(gpio)); return 0; }
-int gpio_direction_output(int gp, int value) +int gpio_direction_output(unsigned gpio, int value) { struct davinci_gpio *bank;
- bank = GPIO_BANK(gp); - clrbits_le32(&bank->dir, 1U << GPIO_BIT(gp)); - gpio_set_value(gp, value); + bank = GPIO_BANK(gpio); + clrbits_le32(&bank->dir, 1U << GPIO_BIT(gpio)); + gpio_set_value(gpio, value); return 0; }
-int gpio_get_value(int gp) +int gpio_get_value(unsigned gpio) { struct davinci_gpio *bank; unsigned int ip;
- bank = GPIO_BANK(gp); - ip = in_le32(&bank->in_data) & (1U << GPIO_BIT(gp)); + bank = GPIO_BANK(gpio); + ip = in_le32(&bank->in_data) & (1U << GPIO_BIT(gpio)); return ip ? 1 : 0; }
-void gpio_set_value(int gp, int value) +int gpio_set_value(unsigned gpio, int value) { struct davinci_gpio *bank;
- bank = GPIO_BANK(gp); + bank = GPIO_BANK(gpio);
if (value) - bank->set_data = 1U << GPIO_BIT(gp); + bank->set_data = 1U << GPIO_BIT(gpio); else - bank->clr_data = 1U << GPIO_BIT(gp); + bank->clr_data = 1U << GPIO_BIT(gpio); + + return 0; }
void gpio_info(void) { - int gp, dir, val; + unsigned gpio, dir, val; struct davinci_gpio *bank;
- for (gp = 0; gp < MAX_NUM_GPIOS; ++gp) { - bank = GPIO_BANK(gp); - dir = in_le32(&bank->dir) & (1U << GPIO_BIT(gp)); - val = gpio_get_value(gp); + for (gpio = 0; gpio < MAX_NUM_GPIOS; ++gpio) { + bank = GPIO_BANK(gpio); + dir = in_le32(&bank->dir) & (1U << GPIO_BIT(gpio)); + val = gpio_get_value(gpio);
printf("% 4d: %s: %d [%c] %s\n", - gp, dir ? " in" : "out", val, - gpio_registry[gp].is_registered ? 'x' : ' ', - gpio_registry[gp].name); + gpio, dir ? " in" : "out", val, + gpio_registry[gpio].is_registered ? 'x' : ' ', + gpio_registry[gpio].name); } } diff --git a/drivers/gpio/tegra2_gpio.c b/drivers/gpio/tegra2_gpio.c index f686e80..8f8db37 100644 --- a/drivers/gpio/tegra2_gpio.c +++ b/drivers/gpio/tegra2_gpio.c @@ -49,186 +49,185 @@ static char *get_name(int i) return *gpio_names[i].name ? gpio_names[i].name : "UNKNOWN"; }
-/* Return config of pin 'gp' as GPIO (1) or SFPIO (0) */ -static int get_config(int gp) +/* Return config of pin 'gpio' as GPIO (1) or SFPIO (0) */ +static int get_config(unsigned gpio) { - struct gpio_ctlr *gpio = (struct gpio_ctlr *)NV_PA_GPIO_BASE; - struct gpio_ctlr_bank *bank = &gpio->gpio_bank[GPIO_BANK(gp)]; + struct gpio_ctlr *ctlr = (struct gpio_ctlr *)NV_PA_GPIO_BASE; + struct gpio_ctlr_bank *bank = &ctlr->gpio_bank[GPIO_BANK(gpio)]; u32 u; int type;
- u = readl(&bank->gpio_config[GPIO_PORT(gp)]); - type = (u >> GPIO_BIT(gp)) & 1; + u = readl(&bank->gpio_config[GPIO_PORT(gpio)]); + type = (u >> GPIO_BIT(gpio)) & 1;
debug("get_config: port = %d, bit = %d is %s\n", - GPIO_FULLPORT(gp), GPIO_BIT(gp), type ? "GPIO" : "SFPIO"); + GPIO_FULLPORT(gpio), GPIO_BIT(gpio), type ? "GPIO" : "SFPIO");
return type; }
-/* Config pin 'gp' as GPIO or SFPIO, based on 'type' */ -static void set_config(int gp, int type) +/* Config pin 'gpio' as GPIO or SFPIO, based on 'type' */ +static void set_config(unsigned gpio, int type) { - struct gpio_ctlr *gpio = (struct gpio_ctlr *)NV_PA_GPIO_BASE; - struct gpio_ctlr_bank *bank = &gpio->gpio_bank[GPIO_BANK(gp)]; + struct gpio_ctlr *ctlr = (struct gpio_ctlr *)NV_PA_GPIO_BASE; + struct gpio_ctlr_bank *bank = &ctlr->gpio_bank[GPIO_BANK(gpio)]; u32 u;
debug("set_config: port = %d, bit = %d, %s\n", - GPIO_FULLPORT(gp), GPIO_BIT(gp), type ? "GPIO" : "SFPIO"); + GPIO_FULLPORT(gpio), GPIO_BIT(gpio), type ? "GPIO" : "SFPIO");
- u = readl(&bank->gpio_config[GPIO_PORT(gp)]); + u = readl(&bank->gpio_config[GPIO_PORT(gpio)]); if (type) /* GPIO */ - u |= 1 << GPIO_BIT(gp); + u |= 1 << GPIO_BIT(gpio); else - u &= ~(1 << GPIO_BIT(gp)); - writel(u, &bank->gpio_config[GPIO_PORT(gp)]); + u &= ~(1 << GPIO_BIT(gpio)); + writel(u, &bank->gpio_config[GPIO_PORT(gpio)]); }
-/* Return GPIO pin 'gp' direction - 0 = input or 1 = output */ -static int get_direction(int gp) +/* Return GPIO pin 'gpio' direction - 0 = input or 1 = output */ +static int get_direction(unsigned gpio) { - struct gpio_ctlr *gpio = (struct gpio_ctlr *)NV_PA_GPIO_BASE; - struct gpio_ctlr_bank *bank = &gpio->gpio_bank[GPIO_BANK(gp)]; + struct gpio_ctlr *ctlr = (struct gpio_ctlr *)NV_PA_GPIO_BASE; + struct gpio_ctlr_bank *bank = &ctlr->gpio_bank[GPIO_BANK(gpio)]; u32 u; int dir;
- u = readl(&bank->gpio_dir_out[GPIO_PORT(gp)]); - dir = (u >> GPIO_BIT(gp)) & 1; + u = readl(&bank->gpio_dir_out[GPIO_PORT(gpio)]); + dir = (u >> GPIO_BIT(gpio)) & 1;
debug("get_direction: port = %d, bit = %d, %s\n", - GPIO_FULLPORT(gp), GPIO_BIT(gp), dir ? "OUT" : "IN"); + GPIO_FULLPORT(gpio), GPIO_BIT(gpio), dir ? "OUT" : "IN");
return dir; }
-/* Config GPIO pin 'gp' as input or output (OE) as per 'output' */ -static void set_direction(int gp, int output) +/* Config GPIO pin 'gpio' as input or output (OE) as per 'output' */ +static void set_direction(unsigned gpio, int output) { - struct gpio_ctlr *gpio = (struct gpio_ctlr *)NV_PA_GPIO_BASE; - struct gpio_ctlr_bank *bank = &gpio->gpio_bank[GPIO_BANK(gp)]; + struct gpio_ctlr *ctlr = (struct gpio_ctlr *)NV_PA_GPIO_BASE; + struct gpio_ctlr_bank *bank = &ctlr->gpio_bank[GPIO_BANK(gpio)]; u32 u;
debug("set_direction: port = %d, bit = %d, %s\n", - GPIO_FULLPORT(gp), GPIO_BIT(gp), output ? "OUT" : "IN"); + GPIO_FULLPORT(gpio), GPIO_BIT(gpio), output ? "OUT" : "IN");
- u = readl(&bank->gpio_dir_out[GPIO_PORT(gp)]); + u = readl(&bank->gpio_dir_out[GPIO_PORT(gpio)]); if (output) - u |= 1 << GPIO_BIT(gp); + u |= 1 << GPIO_BIT(gpio); else - u &= ~(1 << GPIO_BIT(gp)); - writel(u, &bank->gpio_dir_out[GPIO_PORT(gp)]); + u &= ~(1 << GPIO_BIT(gpio)); + writel(u, &bank->gpio_dir_out[GPIO_PORT(gpio)]); }
-/* set GPIO pin 'gp' output bit as 0 or 1 as per 'high' */ -static void set_level(int gp, int high) +/* set GPIO pin 'gpio' output bit as 0 or 1 as per 'high' */ +static void set_level(unsigned gpio, int high) { - struct gpio_ctlr *gpio = (struct gpio_ctlr *)NV_PA_GPIO_BASE; - struct gpio_ctlr_bank *bank = &gpio->gpio_bank[GPIO_BANK(gp)]; + struct gpio_ctlr *ctlr = (struct gpio_ctlr *)NV_PA_GPIO_BASE; + struct gpio_ctlr_bank *bank = &ctlr->gpio_bank[GPIO_BANK(gpio)]; u32 u;
debug("set_level: port = %d, bit %d == %d\n", - GPIO_FULLPORT(gp), GPIO_BIT(gp), high); + GPIO_FULLPORT(gpio), GPIO_BIT(gpio), high);
- u = readl(&bank->gpio_out[GPIO_PORT(gp)]); + u = readl(&bank->gpio_out[GPIO_PORT(gpio)]); if (high) - u |= 1 << GPIO_BIT(gp); + u |= 1 << GPIO_BIT(gpio); else - u &= ~(1 << GPIO_BIT(gp)); - writel(u, &bank->gpio_out[GPIO_PORT(gp)]); + u &= ~(1 << GPIO_BIT(gpio)); + writel(u, &bank->gpio_out[GPIO_PORT(gpio)]); }
/* * Generic_GPIO primitives. */
-int gpio_request(int gp, const char *label) +int gpio_request(unsigned gpio, const char *label) { - if (gp >= MAX_NUM_GPIOS) + if (gpio >= MAX_NUM_GPIOS) return -1;
- strncpy(gpio_names[gp].name, label, GPIO_NAME_SIZE); - gpio_names[gp].name[GPIO_NAME_SIZE - 1] = '\0'; + strncpy(gpio_names[gpio].name, label, GPIO_NAME_SIZE); + gpio_names[gpio].name[GPIO_NAME_SIZE - 1] = '\0';
/* Configure as a GPIO */ - set_config(gp, 1); + set_config(gpio, 1);
return 0; }
-void gpio_free(int gp) +int gpio_free(unsigned gpio) { + return 0; }
-/* read GPIO OUT value of pin 'gp' */ -static int gpio_get_output_value(int gp) +/* read GPIO OUT value of pin 'gpio' */ +static int gpio_get_output_value(unsigned gpio) { - struct gpio_ctlr *gpio = (struct gpio_ctlr *)NV_PA_GPIO_BASE; - struct gpio_ctlr_bank *bank = &gpio->gpio_bank[GPIO_BANK(gp)]; + struct gpio_ctlr *ctlr = (struct gpio_ctlr *)NV_PA_GPIO_BASE; + struct gpio_ctlr_bank *bank = &ctlr->gpio_bank[GPIO_BANK(gpio)]; int val;
debug("gpio_get_output_value: pin = %d (port %d:bit %d)\n", - gp, GPIO_FULLPORT(gp), GPIO_BIT(gp)); - - val = readl(&bank->gpio_out[GPIO_PORT(gp)]); + gpio, GPIO_FULLPORT(gpio), GPIO_BIT(gpio));
- return (val >> GPIO_BIT(gp)) & 1; -} + val = readl(&bank->gpio_out[GPIO_PORT(gpio)]);
-void gpio_toggle_value(int gp) -{ - gpio_set_value(gp, !gpio_get_output_value(gp)); + return (val >> GPIO_BIT(gpio)) & 1; }
-/* set GPIO pin 'gp' as an input */ -int gpio_direction_input(int gp) +/* set GPIO pin 'gpio' as an input */ +int gpio_direction_input(unsigned gpio) { debug("gpio_direction_input: pin = %d (port %d:bit %d)\n", - gp, GPIO_FULLPORT(gp), GPIO_BIT(gp)); + gpio, GPIO_FULLPORT(gpio), GPIO_BIT(gpio));
/* Configure GPIO direction as input. */ - set_direction(gp, 0); + set_direction(gpio, 0);
return 0; }
-/* set GPIO pin 'gp' as an output, with polarity 'value' */ -int gpio_direction_output(int gp, int value) +/* set GPIO pin 'gpio' as an output, with polarity 'value' */ +int gpio_direction_output(unsigned gpio, int value) { debug("gpio_direction_output: pin = %d (port %d:bit %d) = %s\n", - gp, GPIO_FULLPORT(gp), GPIO_BIT(gp), value ? "HIGH" : "LOW"); + gpio, GPIO_FULLPORT(gpio), GPIO_BIT(gpio), + value ? "HIGH" : "LOW");
/* Configure GPIO output value. */ - set_level(gp, value); + set_level(gpio, value);
/* Configure GPIO direction as output. */ - set_direction(gp, 1); + set_direction(gpio, 1);
return 0; }
-/* read GPIO IN value of pin 'gp' */ -int gpio_get_value(int gp) +/* read GPIO IN value of pin 'gpio' */ +int gpio_get_value(unsigned gpio) { - struct gpio_ctlr *gpio = (struct gpio_ctlr *)NV_PA_GPIO_BASE; - struct gpio_ctlr_bank *bank = &gpio->gpio_bank[GPIO_BANK(gp)]; + struct gpio_ctlr *ctlr = (struct gpio_ctlr *)NV_PA_GPIO_BASE; + struct gpio_ctlr_bank *bank = &ctlr->gpio_bank[GPIO_BANK(gpio)]; int val;
debug("gpio_get_value: pin = %d (port %d:bit %d)\n", - gp, GPIO_FULLPORT(gp), GPIO_BIT(gp)); + gpio, GPIO_FULLPORT(gpio), GPIO_BIT(gpio));
- val = readl(&bank->gpio_in[GPIO_PORT(gp)]); + val = readl(&bank->gpio_in[GPIO_PORT(gpio)]);
- return (val >> GPIO_BIT(gp)) & 1; + return (val >> GPIO_BIT(gpio)) & 1; }
-/* write GPIO OUT value to pin 'gp' */ -void gpio_set_value(int gp, int value) +/* write GPIO OUT value to pin 'gpio' */ +int gpio_set_value(unsigned gpio, int value) { debug("gpio_set_value: pin = %d (port %d:bit %d), value = %d\n", - gp, GPIO_FULLPORT(gp), GPIO_BIT(gp), value); + gpio, GPIO_FULLPORT(gpio), GPIO_BIT(gpio), value);
/* Configure GPIO output value. */ - set_level(gp, value); + set_level(gpio, value); + + return 0; }
/* @@ -236,7 +235,8 @@ void gpio_set_value(int gp, int value) */ void gpio_info(void) { - int c, type; + unsigned c; + int type;
for (c = 0; c < MAX_NUM_GPIOS; c++) { type = get_config(c); /* GPIO, not SFPIO */
Joe Hershberger wrote at Friday, November 04, 2011 8:25 PM:
ARM boards should use the generic GPIO API Update the existing gpio implementations to conform the the generic API
The Tegra changes look mostly OK, but:
a) They are almost entirely unrelated to this patch description; most of the diff is variable renaming and nothing to do with conforming to the API.
b) I've CC'd the main Tegra maintainers to give final comment.
c) Some comments below.
diff --git a/drivers/gpio/tegra2_gpio.c b/drivers/gpio/tegra2_gpio.c
...
-void gpio_free(int gp) +int gpio_free(unsigned gpio) {
- return 0;
}
If you're doing a cleanup pass on this driver, you may as well make gpio_free() do something; it should probably clear gpio_names[gpio].name and perhaps set the pin back to SFIO - in other words, undo gpio_reqeust().
-void gpio_toggle_value(int gp) -{
- gpio_set_value(gp, !gpio_get_output_value(gp));
You should probably at least mention this function being removed in the commit description. I hope nothing is using it.
On Monday 07 November 2011 11:35:33 Stephen Warren wrote:
Joe Hershberger wrote at Friday, November 04, 2011 8:25 PM:
-void gpio_free(int gp) +int gpio_free(unsigned gpio) {
- return 0;
}
If you're doing a cleanup pass on this driver, you may as well make gpio_free() do something; it should probably clear gpio_names[gpio].name and perhaps set the pin back to SFIO - in other words, undo gpio_reqeust().
i think the decision made in Linux was that freeing a GPIO should not cause it to change tristate or anything. all it should do is mark it as "available" so something else can request it. -mike
Mike Frysinger wrote at Monday, November 07, 2011 10:40 AM:
- PGP Signed by an unknown key
On Monday 07 November 2011 11:35:33 Stephen Warren wrote:
Joe Hershberger wrote at Friday, November 04, 2011 8:25 PM:
-void gpio_free(int gp) +int gpio_free(unsigned gpio) {
- return 0;
}
If you're doing a cleanup pass on this driver, you may as well make gpio_free() do something; it should probably clear gpio_names[gpio].name and perhaps set the pin back to SFIO - in other words, undo gpio_reqeust().
i think the decision made in Linux was that freeing a GPIO should not cause it to change tristate or anything. all it should do is mark it as "available" so something else can request it. -mike
OK, I'll buy that, but presumably gpio_names[gpio].name should still be cleared to indicate the pin is free?
On Mon, Nov 7, 2011 at 11:02 AM, Stephen Warren swarren@nvidia.com wrote:
Mike Frysinger wrote at Monday, November 07, 2011 10:40 AM:
- PGP Signed by an unknown key
On Monday 07 November 2011 11:35:33 Stephen Warren wrote:
Joe Hershberger wrote at Friday, November 04, 2011 8:25 PM:
-void gpio_free(int gp) +int gpio_free(unsigned gpio) {
- return 0;
}
If you're doing a cleanup pass on this driver, you may as well make gpio_free() do something; it should probably clear gpio_names[gpio].name and perhaps set the pin back to SFIO - in other words, undo gpio_reqeust().
i think the decision made in Linux was that freeing a GPIO should not cause it to change tristate or anything. all it should do is mark it as "available" so something else can request it. -mike
OK, I'll buy that, but presumably gpio_names[gpio].name should still be cleared to indicate the pin is free?
Besides, that would directly undo this patch: http://patchwork.ozlabs.org/patch/119277/
I'll clear the string.
Thanks, -Joe
On Monday 07 November 2011 12:02:16 Stephen Warren wrote:
Mike Frysinger wrote at Monday, November 07, 2011 10:40 AM:
On Monday 07 November 2011 11:35:33 Stephen Warren wrote:
Joe Hershberger wrote at Friday, November 04, 2011 8:25 PM:
-void gpio_free(int gp) +int gpio_free(unsigned gpio) {
- return 0;
}
If you're doing a cleanup pass on this driver, you may as well make gpio_free() do something; it should probably clear gpio_names[gpio].name and perhaps set the pin back to SFIO - in other words, undo gpio_reqeust().
i think the decision made in Linux was that freeing a GPIO should not cause it to change tristate or anything. all it should do is mark it as "available" so something else can request it.
OK, I'll buy that, but presumably gpio_names[gpio].name should still be cleared to indicate the pin is free?
if the tegra code is using the gpio_names[] array to determine whether a pin is allocated, then gpio_free() should take care of clearing it -mike
Signed-off-by: Joe Hershberger joe.hershberger@ni.com Cc: Joe Hershberger joe.hershberger@gmail.com Cc: Kim Phillips kim.phillips@freescale.com --- Changes for v2: - Improved names of INIT constants (to include "CONFIG_") - Moved changes to board/freescale/mpc8313erdb/mpc8313erdb.c to patch 2/2 Changes for v3: - gpio_init_* is now mpc83xx_gpio_init_* Changes for v4: - no volatile - no camelCase - use i/o accessors Changes for v5: Changes for v6: - update to use new GPIO API Changes for v7: - checkpatch compliance Changes for v8:
arch/powerpc/include/asm/arch-mpc83xx/gpio.h | 38 +++++ arch/powerpc/include/asm/gpio.h | 2 + drivers/gpio/Makefile | 1 + drivers/gpio/mpc83xx_gpio.c | 198 ++++++++++++++++++++++++++ 4 files changed, 239 insertions(+), 0 deletions(-) create mode 100644 arch/powerpc/include/asm/arch-mpc83xx/gpio.h create mode 100644 arch/powerpc/include/asm/gpio.h create mode 100644 drivers/gpio/mpc83xx_gpio.c
diff --git a/arch/powerpc/include/asm/arch-mpc83xx/gpio.h b/arch/powerpc/include/asm/arch-mpc83xx/gpio.h new file mode 100644 index 0000000..6b2d9ab --- /dev/null +++ b/arch/powerpc/include/asm/arch-mpc83xx/gpio.h @@ -0,0 +1,38 @@ +/* + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef _MPC83XX_GPIO_H_ +#define _MPC83XX_GPIO_H_ + +/* + * The MCP83xx's 1-2 GPIO controllers each with 32 bits. + */ +#if defined(CONFIG_MPC8313) || defined(CONFIG_MPC8308) || \ + defined(CONFIG_MPC8315) + #define MPC83XX_GPIO_CTRLRS 1 +#elif defined(CONFIG_MPC834x) || defined(CONFIG_MPC837x) + #define MPC83XX_GPIO_CTRLRS 2 +#else + #define MPC83XX_GPIO_CTRLRS 0 +#endif + +#define MAX_NUM_GPIOS (32 * MPC83XX_GPIO_CTRLRS) + +void mpc83xx_gpio_init_f(void); +void mpc83xx_gpio_init_r(void); + +#endif /* MPC83XX_GPIO_H_ */ diff --git a/arch/powerpc/include/asm/gpio.h b/arch/powerpc/include/asm/gpio.h new file mode 100644 index 0000000..d49ad08 --- /dev/null +++ b/arch/powerpc/include/asm/gpio.h @@ -0,0 +1,2 @@ +#include <asm/arch/gpio.h> +#include <asm-generic/gpio.h> diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile index f505813..77a1c70 100644 --- a/drivers/gpio/Makefile +++ b/drivers/gpio/Makefile @@ -35,6 +35,7 @@ COBJS-$(CONFIG_PCA9698) += pca9698.o COBJS-$(CONFIG_S5P) += s5p_gpio.o COBJS-$(CONFIG_TEGRA2_GPIO) += tegra2_gpio.o COBJS-$(CONFIG_DA8XX_GPIO) += da8xx_gpio.o +COBJS-$(CONFIG_MPC83XX_GPIO) += mpc83xx_gpio.o
COBJS := $(COBJS-y) SRCS := $(COBJS:.o=.c) diff --git a/drivers/gpio/mpc83xx_gpio.c b/drivers/gpio/mpc83xx_gpio.c new file mode 100644 index 0000000..5483fd8 --- /dev/null +++ b/drivers/gpio/mpc83xx_gpio.c @@ -0,0 +1,198 @@ +/* + * Freescale MPC83xx GPIO handling. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <mpc83xx.h> +#include <asm/gpio.h> +#include <asm/io.h> + +#ifndef CONFIG_MPC83XX_GPIO_0_INIT_DIRECTION + #define CONFIG_MPC83XX_GPIO_0_INIT_DIRECTION 0 +#endif +#ifndef CONFIG_MPC83XX_GPIO_1_INIT_DIRECTION + #define CONFIG_MPC83XX_GPIO_1_INIT_DIRECTION 0 +#endif +#ifndef CONFIG_MPC83XX_GPIO_0_INIT_OPEN_DRAIN + #define CONFIG_MPC83XX_GPIO_0_INIT_OPEN_DRAIN 0 +#endif +#ifndef CONFIG_MPC83XX_GPIO_1_INIT_OPEN_DRAIN + #define CONFIG_MPC83XX_GPIO_1_INIT_OPEN_DRAIN 0 +#endif +#ifndef CONFIG_MPC83XX_GPIO_0_INIT_VALUE + #define CONFIG_MPC83XX_GPIO_0_INIT_VALUE 0 +#endif +#ifndef CONFIG_MPC83XX_GPIO_1_INIT_VALUE + #define CONFIG_MPC83XX_GPIO_1_INIT_VALUE 0 +#endif + +static unsigned int gpio_output_value[MPC83XX_GPIO_CTRLRS]; + +/* + * Generic_GPIO primitives. + */ + +int gpio_request(unsigned gpio, const char *label) +{ + if (gpio >= MAX_NUM_GPIOS) + return -1; + + return 0; +} + +int gpio_free(unsigned gpio) +{ + return 0; +} + +/* set GPIO pin 'gpio' as an input */ +int gpio_direction_input(unsigned gpio) +{ + immap_t *im = (immap_t *)CONFIG_SYS_IMMR; + unsigned int ctrlr; + unsigned int line; + unsigned int line_mask; + + /* 32-bits per controller */ + ctrlr = gpio >> 5; + line = gpio & (0x1F); + + /* Big endian */ + line_mask = 1 << (31 - line); + + clrbits_be32(&im->gpio[ctrlr].dir, line_mask); + + return 0; +} + +/* set GPIO pin 'gpio' as an output, with polarity 'value' */ +int gpio_direction_output(unsigned gpio, int value) +{ + immap_t *im = (immap_t *)CONFIG_SYS_IMMR; + unsigned int ctrlr; + unsigned int line; + unsigned int line_mask; + + if (value != 0 && value != 1) { + printf("Error: Value parameter must be 0 or 1.\n"); + return -1; + } + + gpio_set_value(gpio, value); + + /* 32-bits per controller */ + ctrlr = gpio >> 5; + line = gpio & (0x1F); + + /* Big endian */ + line_mask = 1 << (31 - line); + + /* Make the line output */ + setbits_be32(&im->gpio[ctrlr].dir, line_mask); + + return 0; +} + +/* read GPIO IN value of pin 'gpio' */ +int gpio_get_value(unsigned gpio) +{ + immap_t *im = (immap_t *)CONFIG_SYS_IMMR; + unsigned int ctrlr; + unsigned int line; + unsigned int line_mask; + + /* 32-bits per controller */ + ctrlr = gpio >> 5; + line = gpio & (0x1F); + + /* Big endian */ + line_mask = 1 << (31 - line); + + /* Read the value and mask off the bit */ + return (in_be32(&im->gpio[ctrlr].dat) & line_mask) != 0; +} + +/* write GPIO OUT value to pin 'gpio' */ +int gpio_set_value(unsigned gpio, int value) +{ + immap_t *im = (immap_t *)CONFIG_SYS_IMMR; + unsigned int ctrlr; + unsigned int line; + unsigned int line_mask; + + if (value != 0 && value != 1) { + printf("Error: Value parameter must be 0 or 1.\n"); + return -1; + } + + /* 32-bits per controller */ + ctrlr = gpio >> 5; + line = gpio & (0x1F); + + /* Big endian */ + line_mask = 1 << (31 - line); + + /* Update the local output buffer soft copy */ + gpio_output_value[ctrlr] = + (gpio_output_value[ctrlr] & ~line_mask) | \ + (value ? line_mask : 0); + + /* Write the output */ + out_be32(&im->gpio[ctrlr].dat, gpio_output_value[ctrlr]); + + return 0; +} + +/* Configure GPIO registers early */ +void mpc83xx_gpio_init_f() +{ + immap_t *im = (immap_t *)CONFIG_SYS_IMMR; + +#if MPC83XX_GPIO_CTRLRS >= 1 + out_be32(&im->gpio[0].dir, CONFIG_MPC83XX_GPIO_0_INIT_DIRECTION); + out_be32(&im->gpio[0].odr, CONFIG_MPC83XX_GPIO_0_INIT_OPEN_DRAIN); + out_be32(&im->gpio[0].dat, CONFIG_MPC83XX_GPIO_0_INIT_VALUE); + out_be32(&im->gpio[0].ier, 0xFFFFFFFF); /* Clear all events */ + out_be32(&im->gpio[0].imr, 0); + out_be32(&im->gpio[0].icr, 0); +#endif + +#if MPC83XX_GPIO_CTRLRS >= 2 + out_be32(&im->gpio[1].dir, CONFIG_MPC83XX_GPIO_1_INIT_DIRECTION); + out_be32(&im->gpio[1].odr, CONFIG_MPC83XX_GPIO_1_INIT_OPEN_DRAIN); + out_be32(&im->gpio[1].dat, CONFIG_MPC83XX_GPIO_1_INIT_VALUE); + out_be32(&im->gpio[1].ier, 0xFFFFFFFF); /* Clear all events */ + out_be32(&im->gpio[1].imr, 0); + out_be32(&im->gpio[1].icr, 0); +#endif +} + +/* Initialize GPIO soft-copies */ +void mpc83xx_gpio_init_r() +{ +#if MPC83XX_GPIO_CTRLRS >= 1 + gpio_output_value[0] = CONFIG_MPC83XX_GPIO_0_INIT_VALUE; +#endif + +#if MPC83XX_GPIO_CTRLRS >= 2 + gpio_output_value[1] = CONFIG_MPC83XX_GPIO_1_INIT_VALUE; +#endif +}
On Friday 04 November 2011 22:25:00 Joe Hershberger wrote:
--- /dev/null +++ b/arch/powerpc/include/asm/arch-mpc83xx/gpio.h
+#if defined(CONFIG_MPC8313) || defined(CONFIG_MPC8308) || \
defined(CONFIG_MPC8315)- #define MPC83XX_GPIO_CTRLRS 1
+#elif defined(CONFIG_MPC834x) || defined(CONFIG_MPC837x)
- #define MPC83XX_GPIO_CTRLRS 2
+#else
- #define MPC83XX_GPIO_CTRLRS 0
+#endif
there should not be whitespace before the "#"
--- /dev/null +++ b/drivers/gpio/mpc83xx_gpio.c
+#ifndef CONFIG_MPC83XX_GPIO_0_INIT_DIRECTION
- #define CONFIG_MPC83XX_GPIO_0_INIT_DIRECTION 0
+#endif +#ifndef CONFIG_MPC83XX_GPIO_1_INIT_DIRECTION
- #define CONFIG_MPC83XX_GPIO_1_INIT_DIRECTION 0
+#endif +#ifndef CONFIG_MPC83XX_GPIO_0_INIT_OPEN_DRAIN
- #define CONFIG_MPC83XX_GPIO_0_INIT_OPEN_DRAIN 0
+#endif +#ifndef CONFIG_MPC83XX_GPIO_1_INIT_OPEN_DRAIN
- #define CONFIG_MPC83XX_GPIO_1_INIT_OPEN_DRAIN 0
+#endif +#ifndef CONFIG_MPC83XX_GPIO_0_INIT_VALUE
- #define CONFIG_MPC83XX_GPIO_0_INIT_VALUE 0
+#endif +#ifndef CONFIG_MPC83XX_GPIO_1_INIT_VALUE
- #define CONFIG_MPC83XX_GPIO_1_INIT_VALUE 0
+#endif
same here -mike
Signed-off-by: Joe Hershberger joe.hershberger@ni.com Cc: Joe Hershberger joe.hershberger@gmail.com Cc: Kim Phillips kim.phillips@freescale.com --- Changes for v2: - Moved changes to board/freescale/mpc8313erdb/mpc8313erdb.c from patch 1/2 Changes for v3: - Renamed gpio_init_* to mpc83xx_gpio_init_* - Added board_early_init_r support to MPC8313ERDB targets Changes for v4: - Fixed build warning Changes for v5: Changes for v6: Changes for v7: - checkpatch compliance Changes for v8:
board/freescale/mpc8313erdb/mpc8313erdb.c | 15 +++++++++++++++ include/configs/MPC8313ERDB.h | 9 +++++++-- 2 files changed, 22 insertions(+), 2 deletions(-)
diff --git a/board/freescale/mpc8313erdb/mpc8313erdb.c b/board/freescale/mpc8313erdb/mpc8313erdb.c index 08f873d..730ec4e 100644 --- a/board/freescale/mpc8313erdb/mpc8313erdb.c +++ b/board/freescale/mpc8313erdb/mpc8313erdb.c @@ -31,6 +31,9 @@ #include <vsc7385.h> #include <ns16550.h> #include <nand.h> +#if defined(CONFIG_MPC83XX_GPIO) && !defined(CONFIG_NAND_SPL) +#include <asm/gpio.h> +#endif
DECLARE_GLOBAL_DATA_PTR;
@@ -42,6 +45,18 @@ int board_early_init_f(void) if (im->pmc.pmccr1 & PMCCR1_POWER_OFF) gd->flags |= GD_FLG_SILENT; #endif +#if defined(CONFIG_MPC83XX_GPIO) && !defined(CONFIG_NAND_SPL) + mpc83xx_gpio_init_f(); +#endif + + return 0; +} + +int board_early_init_r(void) +{ +#if defined(CONFIG_MPC83XX_GPIO) && !defined(CONFIG_NAND_SPL) + mpc83xx_gpio_init_r(); +#endif
return 0; } diff --git a/include/configs/MPC8313ERDB.h b/include/configs/MPC8313ERDB.h index 31503af..39bdcf8 100644 --- a/include/configs/MPC8313ERDB.h +++ b/include/configs/MPC8313ERDB.h @@ -82,7 +82,8 @@
#define CONFIG_SYS_CLK_FREQ CONFIG_83XX_CLKIN
-#define CONFIG_BOARD_EARLY_INIT_F /* call board_pre_init */ +#define CONFIG_BOARD_EARLY_INIT_F /* call board_early_init_f */ +#define CONFIG_BOARD_EARLY_INIT_R /* call board_early_init_r */
#define CONFIG_SYS_IMMR 0xE0000000
@@ -363,6 +364,9 @@ #define CONFIG_OF_BOARD_SETUP 1 #define CONFIG_OF_STDOUT_VIA_ALIAS 1
+#define CONFIG_MPC83XX_GPIO 1 +#define CONFIG_CMD_GPIO 1 + /* * Serial Port */ @@ -581,7 +585,8 @@
/* System IO Config */ #define CONFIG_SYS_SICRH (SICRH_TSOBI1 | SICRH_TSOBI2) /* RGMII */ -#define CONFIG_SYS_SICRL SICRL_USBDR_10 /* Enable Internal USB Phy */ + /* Enable Internal USB Phy and GPIO on LCD Connector */ +#define CONFIG_SYS_SICRL (SICRL_USBDR_10 | SICRL_LBC)
#define CONFIG_SYS_HID0_INIT 0x000000000 #define CONFIG_SYS_HID0_FINAL (HID0_ENABLE_MACHINE_CHECK | \
Change "int gp" to "unsigned gpio" Update the 2 existing arm implementations to match the new API Remove the gpio_toggle() implementation (never used)
Signed-off-by: Joe Hershberger joe.hershberger@ni.com Cc: Joe Hershberger joe.hershberger@gmail.com Cc: Kim Phillips kim.phillips@freescale.com --- Changes for v6: - Linuxize gpio API Changes for v7: - checkpatch compliance
drivers/gpio/da8xx_gpio.c | 62 +++++++++--------- drivers/gpio/tegra2_gpio.c | 157 +++++++++++++++++++++---------------------- include/asm-generic/gpio.h | 13 ++-- 3 files changed, 114 insertions(+), 118 deletions(-)
diff --git a/drivers/gpio/da8xx_gpio.c b/drivers/gpio/da8xx_gpio.c index 7a15614..31a213b 100644 --- a/drivers/gpio/da8xx_gpio.c +++ b/drivers/gpio/da8xx_gpio.c @@ -181,26 +181,26 @@ static const struct pinmux_config gpio_pinmux[] = { { pinmux(18), 8, 2 }, };
-int gpio_request(int gp, const char *label) +int gpio_request(unsigned gpio, const char *label) { - if (gp >= MAX_NUM_GPIOS) + if (gpio >= MAX_NUM_GPIOS) return -1;
- if (gpio_registry[gp].is_registered) + if (gpio_registry[gpio].is_registered) return -1;
- gpio_registry[gp].is_registered = 1; - strncpy(gpio_registry[gp].name, label, GPIO_NAME_SIZE); - gpio_registry[gp].name[GPIO_NAME_SIZE - 1] = 0; + gpio_registry[gpio].is_registered = 1; + strncpy(gpio_registry[gpio].name, label, GPIO_NAME_SIZE); + gpio_registry[gpio].name[GPIO_NAME_SIZE - 1] = 0;
- davinci_configure_pin_mux(&gpio_pinmux[gp], 1); + davinci_configure_pin_mux(&gpio_pinmux[gpio], 1);
return 0; }
-void gpio_free(int gp) +void gpio_free(unsigned gpio) { - gpio_registry[gp].is_registered = 0; + gpio_registry[gpio].is_registered = 0; }
void gpio_toggle_value(int gp) @@ -211,60 +211,60 @@ void gpio_toggle_value(int gp) gpio_set_value(gp, !gpio_get_value(gp)); }
-int gpio_direction_input(int gp) +int gpio_direction_input(unsigned gpio) { struct davinci_gpio *bank;
- bank = GPIO_BANK(gp); - setbits_le32(&bank->dir, 1U << GPIO_BIT(gp)); + bank = GPIO_BANK(gpio); + setbits_le32(&bank->dir, 1U << GPIO_BIT(gpio)); return 0; }
-int gpio_direction_output(int gp, int value) +int gpio_direction_output(unsigned gpio, int value) { struct davinci_gpio *bank;
- bank = GPIO_BANK(gp); - clrbits_le32(&bank->dir, 1U << GPIO_BIT(gp)); - gpio_set_value(gp, value); + bank = GPIO_BANK(gpio); + clrbits_le32(&bank->dir, 1U << GPIO_BIT(gpio)); + gpio_set_value(gpio, value); return 0; }
-int gpio_get_value(int gp) +int gpio_get_value(unsigned gpio) { struct davinci_gpio *bank; unsigned int ip;
- bank = GPIO_BANK(gp); - ip = in_le32(&bank->in_data) & (1U << GPIO_BIT(gp)); + bank = GPIO_BANK(gpio); + ip = in_le32(&bank->in_data) & (1U << GPIO_BIT(gpio)); return ip ? 1 : 0; }
-void gpio_set_value(int gp, int value) +void gpio_set_value(unsigned gpio, int value) { struct davinci_gpio *bank;
- bank = GPIO_BANK(gp); + bank = GPIO_BANK(gpio);
if (value) - bank->set_data = 1U << GPIO_BIT(gp); + bank->set_data = 1U << GPIO_BIT(gpio); else - bank->clr_data = 1U << GPIO_BIT(gp); + bank->clr_data = 1U << GPIO_BIT(gpio); }
void gpio_info(void) { - int gp, dir, val; + unsigned gpio, dir, val; struct davinci_gpio *bank;
- for (gp = 0; gp < MAX_NUM_GPIOS; ++gp) { - bank = GPIO_BANK(gp); - dir = in_le32(&bank->dir) & (1U << GPIO_BIT(gp)); - val = gpio_get_value(gp); + for (gpio = 0; gpio < MAX_NUM_GPIOS; ++gpio) { + bank = GPIO_BANK(gpio); + dir = in_le32(&bank->dir) & (1U << GPIO_BIT(gpio)); + val = gpio_get_value(gpio);
printf("% 4d: %s: %d [%c] %s\n", - gp, dir ? " in" : "out", val, - gpio_registry[gp].is_registered ? 'x' : ' ', - gpio_registry[gp].name); + gpio, dir ? " in" : "out", val, + gpio_registry[gpio].is_registered ? 'x' : ' ', + gpio_registry[gpio].name); } } diff --git a/drivers/gpio/tegra2_gpio.c b/drivers/gpio/tegra2_gpio.c index f686e80..187714e 100644 --- a/drivers/gpio/tegra2_gpio.c +++ b/drivers/gpio/tegra2_gpio.c @@ -49,186 +49,182 @@ static char *get_name(int i) return *gpio_names[i].name ? gpio_names[i].name : "UNKNOWN"; }
-/* Return config of pin 'gp' as GPIO (1) or SFPIO (0) */ -static int get_config(int gp) +/* Return config of pin 'gpio' as GPIO (1) or SFPIO (0) */ +static int get_config(unsigned gpio) { - struct gpio_ctlr *gpio = (struct gpio_ctlr *)NV_PA_GPIO_BASE; - struct gpio_ctlr_bank *bank = &gpio->gpio_bank[GPIO_BANK(gp)]; + struct gpio_ctlr *ctlr = (struct gpio_ctlr *)NV_PA_GPIO_BASE; + struct gpio_ctlr_bank *bank = &ctlr->gpio_bank[GPIO_BANK(gpio)]; u32 u; int type;
- u = readl(&bank->gpio_config[GPIO_PORT(gp)]); - type = (u >> GPIO_BIT(gp)) & 1; + u = readl(&bank->gpio_config[GPIO_PORT(gpio)]); + type = (u >> GPIO_BIT(gpio)) & 1;
debug("get_config: port = %d, bit = %d is %s\n", - GPIO_FULLPORT(gp), GPIO_BIT(gp), type ? "GPIO" : "SFPIO"); + GPIO_FULLPORT(gpio), GPIO_BIT(gpio), type ? "GPIO" : "SFPIO");
return type; }
-/* Config pin 'gp' as GPIO or SFPIO, based on 'type' */ -static void set_config(int gp, int type) +/* Config pin 'gpio' as GPIO or SFPIO, based on 'type' */ +static void set_config(unsigned gpio, int type) { - struct gpio_ctlr *gpio = (struct gpio_ctlr *)NV_PA_GPIO_BASE; - struct gpio_ctlr_bank *bank = &gpio->gpio_bank[GPIO_BANK(gp)]; + struct gpio_ctlr *ctlr = (struct gpio_ctlr *)NV_PA_GPIO_BASE; + struct gpio_ctlr_bank *bank = &ctlr->gpio_bank[GPIO_BANK(gpio)]; u32 u;
debug("set_config: port = %d, bit = %d, %s\n", - GPIO_FULLPORT(gp), GPIO_BIT(gp), type ? "GPIO" : "SFPIO"); + GPIO_FULLPORT(gpio), GPIO_BIT(gpio), type ? "GPIO" : "SFPIO");
- u = readl(&bank->gpio_config[GPIO_PORT(gp)]); + u = readl(&bank->gpio_config[GPIO_PORT(gpio)]); if (type) /* GPIO */ - u |= 1 << GPIO_BIT(gp); + u |= 1 << GPIO_BIT(gpio); else - u &= ~(1 << GPIO_BIT(gp)); - writel(u, &bank->gpio_config[GPIO_PORT(gp)]); + u &= ~(1 << GPIO_BIT(gpio)); + writel(u, &bank->gpio_config[GPIO_PORT(gpio)]); }
-/* Return GPIO pin 'gp' direction - 0 = input or 1 = output */ -static int get_direction(int gp) +/* Return GPIO pin 'gpio' direction - 0 = input or 1 = output */ +static int get_direction(unsigned gpio) { - struct gpio_ctlr *gpio = (struct gpio_ctlr *)NV_PA_GPIO_BASE; - struct gpio_ctlr_bank *bank = &gpio->gpio_bank[GPIO_BANK(gp)]; + struct gpio_ctlr *ctlr = (struct gpio_ctlr *)NV_PA_GPIO_BASE; + struct gpio_ctlr_bank *bank = &ctlr->gpio_bank[GPIO_BANK(gpio)]; u32 u; int dir;
- u = readl(&bank->gpio_dir_out[GPIO_PORT(gp)]); - dir = (u >> GPIO_BIT(gp)) & 1; + u = readl(&bank->gpio_dir_out[GPIO_PORT(gpio)]); + dir = (u >> GPIO_BIT(gpio)) & 1;
debug("get_direction: port = %d, bit = %d, %s\n", - GPIO_FULLPORT(gp), GPIO_BIT(gp), dir ? "OUT" : "IN"); + GPIO_FULLPORT(gpio), GPIO_BIT(gpio), dir ? "OUT" : "IN");
return dir; }
-/* Config GPIO pin 'gp' as input or output (OE) as per 'output' */ -static void set_direction(int gp, int output) +/* Config GPIO pin 'gpio' as input or output (OE) as per 'output' */ +static void set_direction(unsigned gpio, int output) { - struct gpio_ctlr *gpio = (struct gpio_ctlr *)NV_PA_GPIO_BASE; - struct gpio_ctlr_bank *bank = &gpio->gpio_bank[GPIO_BANK(gp)]; + struct gpio_ctlr *ctlr = (struct gpio_ctlr *)NV_PA_GPIO_BASE; + struct gpio_ctlr_bank *bank = &ctlr->gpio_bank[GPIO_BANK(gpio)]; u32 u;
debug("set_direction: port = %d, bit = %d, %s\n", - GPIO_FULLPORT(gp), GPIO_BIT(gp), output ? "OUT" : "IN"); + GPIO_FULLPORT(gpio), GPIO_BIT(gpio), output ? "OUT" : "IN");
- u = readl(&bank->gpio_dir_out[GPIO_PORT(gp)]); + u = readl(&bank->gpio_dir_out[GPIO_PORT(gpio)]); if (output) - u |= 1 << GPIO_BIT(gp); + u |= 1 << GPIO_BIT(gpio); else - u &= ~(1 << GPIO_BIT(gp)); - writel(u, &bank->gpio_dir_out[GPIO_PORT(gp)]); + u &= ~(1 << GPIO_BIT(gpio)); + writel(u, &bank->gpio_dir_out[GPIO_PORT(gpio)]); }
-/* set GPIO pin 'gp' output bit as 0 or 1 as per 'high' */ -static void set_level(int gp, int high) +/* set GPIO pin 'gpio' output bit as 0 or 1 as per 'high' */ +static void set_level(unsigned gpio, int high) { - struct gpio_ctlr *gpio = (struct gpio_ctlr *)NV_PA_GPIO_BASE; - struct gpio_ctlr_bank *bank = &gpio->gpio_bank[GPIO_BANK(gp)]; + struct gpio_ctlr *ctlr = (struct gpio_ctlr *)NV_PA_GPIO_BASE; + struct gpio_ctlr_bank *bank = &ctlr->gpio_bank[GPIO_BANK(gpio)]; u32 u;
debug("set_level: port = %d, bit %d == %d\n", - GPIO_FULLPORT(gp), GPIO_BIT(gp), high); + GPIO_FULLPORT(gpio), GPIO_BIT(gpio), high);
- u = readl(&bank->gpio_out[GPIO_PORT(gp)]); + u = readl(&bank->gpio_out[GPIO_PORT(gpio)]); if (high) - u |= 1 << GPIO_BIT(gp); + u |= 1 << GPIO_BIT(gpio); else - u &= ~(1 << GPIO_BIT(gp)); - writel(u, &bank->gpio_out[GPIO_PORT(gp)]); + u &= ~(1 << GPIO_BIT(gpio)); + writel(u, &bank->gpio_out[GPIO_PORT(gpio)]); }
/* * Generic_GPIO primitives. */
-int gpio_request(int gp, const char *label) +int gpio_request(unsigned gpio, const char *label) { - if (gp >= MAX_NUM_GPIOS) + if (gpio >= MAX_NUM_GPIOS) return -1;
- strncpy(gpio_names[gp].name, label, GPIO_NAME_SIZE); - gpio_names[gp].name[GPIO_NAME_SIZE - 1] = '\0'; + strncpy(gpio_names[gpio].name, label, GPIO_NAME_SIZE); + gpio_names[gpio].name[GPIO_NAME_SIZE - 1] = '\0';
/* Configure as a GPIO */ - set_config(gp, 1); + set_config(gpio, 1);
return 0; }
-void gpio_free(int gp) +void gpio_free(unsigned gpio) { }
-/* read GPIO OUT value of pin 'gp' */ -static int gpio_get_output_value(int gp) +/* read GPIO OUT value of pin 'gpio' */ +static int gpio_get_output_value(unsigned gpio) { - struct gpio_ctlr *gpio = (struct gpio_ctlr *)NV_PA_GPIO_BASE; - struct gpio_ctlr_bank *bank = &gpio->gpio_bank[GPIO_BANK(gp)]; + struct gpio_ctlr *ctlr = (struct gpio_ctlr *)NV_PA_GPIO_BASE; + struct gpio_ctlr_bank *bank = &ctlr->gpio_bank[GPIO_BANK(gpio)]; int val;
debug("gpio_get_output_value: pin = %d (port %d:bit %d)\n", - gp, GPIO_FULLPORT(gp), GPIO_BIT(gp)); + gpio, GPIO_FULLPORT(gpio), GPIO_BIT(gpio));
- val = readl(&bank->gpio_out[GPIO_PORT(gp)]); + val = readl(&bank->gpio_out[GPIO_PORT(gpio)]);
- return (val >> GPIO_BIT(gp)) & 1; + return (val >> GPIO_BIT(gpio)) & 1; }
-void gpio_toggle_value(int gp) -{ - gpio_set_value(gp, !gpio_get_output_value(gp)); -} - -/* set GPIO pin 'gp' as an input */ -int gpio_direction_input(int gp) +/* set GPIO pin 'gpio' as an input */ +int gpio_direction_input(unsigned gpio) { debug("gpio_direction_input: pin = %d (port %d:bit %d)\n", - gp, GPIO_FULLPORT(gp), GPIO_BIT(gp)); + gpio, GPIO_FULLPORT(gpio), GPIO_BIT(gpio));
/* Configure GPIO direction as input. */ - set_direction(gp, 0); + set_direction(gpio, 0);
return 0; }
-/* set GPIO pin 'gp' as an output, with polarity 'value' */ -int gpio_direction_output(int gp, int value) +/* set GPIO pin 'gpio' as an output, with polarity 'value' */ +int gpio_direction_output(unsigned gpio, int value) { debug("gpio_direction_output: pin = %d (port %d:bit %d) = %s\n", - gp, GPIO_FULLPORT(gp), GPIO_BIT(gp), value ? "HIGH" : "LOW"); + gpio, GPIO_FULLPORT(gpio), GPIO_BIT(gpio), + value ? "HIGH" : "LOW");
/* Configure GPIO output value. */ - set_level(gp, value); + set_level(gpio, value);
/* Configure GPIO direction as output. */ - set_direction(gp, 1); + set_direction(gpio, 1);
return 0; }
-/* read GPIO IN value of pin 'gp' */ -int gpio_get_value(int gp) +/* read GPIO IN value of pin 'gpio' */ +int gpio_get_value(unsigned gpio) { - struct gpio_ctlr *gpio = (struct gpio_ctlr *)NV_PA_GPIO_BASE; - struct gpio_ctlr_bank *bank = &gpio->gpio_bank[GPIO_BANK(gp)]; + struct gpio_ctlr *ctlr = (struct gpio_ctlr *)NV_PA_GPIO_BASE; + struct gpio_ctlr_bank *bank = &ctlr->gpio_bank[GPIO_BANK(gpio)]; int val;
debug("gpio_get_value: pin = %d (port %d:bit %d)\n", - gp, GPIO_FULLPORT(gp), GPIO_BIT(gp)); + gpio, GPIO_FULLPORT(gpio), GPIO_BIT(gpio));
- val = readl(&bank->gpio_in[GPIO_PORT(gp)]); + val = readl(&bank->gpio_in[GPIO_PORT(gpio)]);
- return (val >> GPIO_BIT(gp)) & 1; + return (val >> GPIO_BIT(gpio)) & 1; }
-/* write GPIO OUT value to pin 'gp' */ -void gpio_set_value(int gp, int value) +/* write GPIO OUT value to pin 'gpio' */ +void gpio_set_value(unsigned gpio, int value) { debug("gpio_set_value: pin = %d (port %d:bit %d), value = %d\n", - gp, GPIO_FULLPORT(gp), GPIO_BIT(gp), value); + gpio, GPIO_FULLPORT(gpio), GPIO_BIT(gpio), value);
/* Configure GPIO output value. */ - set_level(gp, value); + set_level(gpio, value); }
/* @@ -236,7 +232,8 @@ void gpio_set_value(int gp, int value) */ void gpio_info(void) { - int c, type; + unsigned c; + int type;
for (c = 0; c < MAX_NUM_GPIOS; c++) { type = get_config(c); /* GPIO, not SFPIO */ diff --git a/include/asm-generic/gpio.h b/include/asm-generic/gpio.h index 57542ad..55a030d 100644 --- a/include/asm-generic/gpio.h +++ b/include/asm-generic/gpio.h @@ -26,12 +26,11 @@ * Generic GPIO API */
-int gpio_request(int gp, const char *label); -void gpio_free(int gp); -void gpio_toggle_value(int gp); -int gpio_direction_input(int gp); -int gpio_direction_output(int gp, int value); -int gpio_get_value(int gp); -void gpio_set_value(int gp, int value); +int gpio_request(unsigned gpio, const char *label); +void gpio_free(unsigned gpio); +int gpio_direction_input(unsigned gpio); +int gpio_get_value(unsigned gpio); +int gpio_direction_output(unsigned gpio, int value); +void gpio_set_value(unsigned gpio, int value);
#endif /* _GPIO_H_ */
On Tue, Oct 11, 2011 at 10:50:13PM -0500, Joe Hershberger wrote:
Change "int gp" to "unsigned gpio" Update the 2 existing arm implementations to match the new API Remove the gpio_toggle() implementation (never used)
Signed-off-by: Joe Hershberger joe.hershberger@ni.com Cc: Joe Hershberger joe.hershberger@gmail.com Cc: Kim Phillips kim.phillips@freescale.com
Tested-by: Laurence Withers lwithers@guralp.com
Bye for now,
Signed-off-by: Joe Hershberger joe.hershberger@ni.com Cc: Joe Hershberger joe.hershberger@gmail.com Cc: Kim Phillips kim.phillips@freescale.com --- Changes for v2: - Improved names of INIT constants (to include "CONFIG_") - Moved changes to board/freescale/mpc8313erdb/mpc8313erdb.c to patch 2/2 Changes for v3: - gpio_init_* is now mpc83xx_gpio_init_* Changes for v4: - no volatile - no camelCase - use i/o accessors Changes for v5: Changes for v6: - update to use new GPIO API Changes for v7: - checkpatch compliance
arch/powerpc/include/asm/arch-mpc83xx/gpio.h | 38 +++++ drivers/gpio/Makefile | 1 + drivers/gpio/mpc83xx_gpio.c | 195 ++++++++++++++++++++++++++ 3 files changed, 234 insertions(+), 0 deletions(-) create mode 100644 arch/powerpc/include/asm/arch-mpc83xx/gpio.h create mode 100644 drivers/gpio/mpc83xx_gpio.c
diff --git a/arch/powerpc/include/asm/arch-mpc83xx/gpio.h b/arch/powerpc/include/asm/arch-mpc83xx/gpio.h new file mode 100644 index 0000000..6b2d9ab --- /dev/null +++ b/arch/powerpc/include/asm/arch-mpc83xx/gpio.h @@ -0,0 +1,38 @@ +/* + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef _MPC83XX_GPIO_H_ +#define _MPC83XX_GPIO_H_ + +/* + * The MCP83xx's 1-2 GPIO controllers each with 32 bits. + */ +#if defined(CONFIG_MPC8313) || defined(CONFIG_MPC8308) || \ + defined(CONFIG_MPC8315) + #define MPC83XX_GPIO_CTRLRS 1 +#elif defined(CONFIG_MPC834x) || defined(CONFIG_MPC837x) + #define MPC83XX_GPIO_CTRLRS 2 +#else + #define MPC83XX_GPIO_CTRLRS 0 +#endif + +#define MAX_NUM_GPIOS (32 * MPC83XX_GPIO_CTRLRS) + +void mpc83xx_gpio_init_f(void); +void mpc83xx_gpio_init_r(void); + +#endif /* MPC83XX_GPIO_H_ */ diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile index 62ec97d..563b8ec 100644 --- a/drivers/gpio/Makefile +++ b/drivers/gpio/Makefile @@ -33,6 +33,7 @@ COBJS-$(CONFIG_PCA953X) += pca953x.o COBJS-$(CONFIG_S5P) += s5p_gpio.o COBJS-$(CONFIG_TEGRA2_GPIO) += tegra2_gpio.o COBJS-$(CONFIG_DA8XX_GPIO) += da8xx_gpio.o +COBJS-$(CONFIG_MPC83XX_GPIO) += mpc83xx_gpio.o
COBJS := $(COBJS-y) SRCS := $(COBJS:.o=.c) diff --git a/drivers/gpio/mpc83xx_gpio.c b/drivers/gpio/mpc83xx_gpio.c new file mode 100644 index 0000000..85445db --- /dev/null +++ b/drivers/gpio/mpc83xx_gpio.c @@ -0,0 +1,195 @@ +/* + * Freescale MPC83xx GPIO handling. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <mpc83xx.h> +#include <asm/gpio.h> +#include <asm/io.h> + +#ifndef CONFIG_MPC83XX_GPIO_0_INIT_DIRECTION + #define CONFIG_MPC83XX_GPIO_0_INIT_DIRECTION 0 +#endif +#ifndef CONFIG_MPC83XX_GPIO_1_INIT_DIRECTION + #define CONFIG_MPC83XX_GPIO_1_INIT_DIRECTION 0 +#endif +#ifndef CONFIG_MPC83XX_GPIO_0_INIT_OPEN_DRAIN + #define CONFIG_MPC83XX_GPIO_0_INIT_OPEN_DRAIN 0 +#endif +#ifndef CONFIG_MPC83XX_GPIO_1_INIT_OPEN_DRAIN + #define CONFIG_MPC83XX_GPIO_1_INIT_OPEN_DRAIN 0 +#endif +#ifndef CONFIG_MPC83XX_GPIO_0_INIT_VALUE + #define CONFIG_MPC83XX_GPIO_0_INIT_VALUE 0 +#endif +#ifndef CONFIG_MPC83XX_GPIO_1_INIT_VALUE + #define CONFIG_MPC83XX_GPIO_1_INIT_VALUE 0 +#endif + +static unsigned int gpio_output_value[MPC83XX_GPIO_CTRLRS]; + +/* + * Generic_GPIO primitives. + */ + +int gpio_request(unsigned gpio, const char *label) +{ + if (gpio >= MAX_NUM_GPIOS) + return -1; + + return 0; +} + +void gpio_free(unsigned gpio) +{ +} + +/* set GPIO pin 'gpio' as an input */ +int gpio_direction_input(unsigned gpio) +{ + immap_t *im = (immap_t *)CONFIG_SYS_IMMR; + unsigned int ctrlr; + unsigned int line; + unsigned int line_mask; + + /* 32-bits per controller */ + ctrlr = gpio >> 5; + line = gpio & (0x1F); + + /* Big endian */ + line_mask = 1 << (31 - line); + + clrbits_be32(&im->gpio[ctrlr].dir, line_mask); + + return 0; +} + +/* set GPIO pin 'gpio' as an output, with polarity 'value' */ +int gpio_direction_output(unsigned gpio, int value) +{ + immap_t *im = (immap_t *)CONFIG_SYS_IMMR; + unsigned int ctrlr; + unsigned int line; + unsigned int line_mask; + + if (value != 0 && value != 1) { + printf("Error: Value parameter must be 0 or 1.\n"); + return -1; + } + + gpio_set_value(gpio, value); + + /* 32-bits per controller */ + ctrlr = gpio >> 5; + line = gpio & (0x1F); + + /* Big endian */ + line_mask = 1 << (31 - line); + + /* Make the line output */ + setbits_be32(&im->gpio[ctrlr].dir, line_mask); + + return 0; +} + +/* read GPIO IN value of pin 'gpio' */ +int gpio_get_value(unsigned gpio) +{ + immap_t *im = (immap_t *)CONFIG_SYS_IMMR; + unsigned int ctrlr; + unsigned int line; + unsigned int line_mask; + + /* 32-bits per controller */ + ctrlr = gpio >> 5; + line = gpio & (0x1F); + + /* Big endian */ + line_mask = 1 << (31 - line); + + /* Read the value and mask off the bit */ + return (in_be32(&im->gpio[ctrlr].dat) & line_mask) != 0; +} + +/* write GPIO OUT value to pin 'gpio' */ +void gpio_set_value(unsigned gpio, int value) +{ + immap_t *im = (immap_t *)CONFIG_SYS_IMMR; + unsigned int ctrlr; + unsigned int line; + unsigned int line_mask; + + if (value != 0 && value != 1) { + printf("Error: Value parameter must be 0 or 1.\n"); + return; + } + + /* 32-bits per controller */ + ctrlr = gpio >> 5; + line = gpio & (0x1F); + + /* Big endian */ + line_mask = 1 << (31 - line); + + /* Update the local output buffer soft copy */ + gpio_output_value[ctrlr] = + (gpio_output_value[ctrlr] & ~line_mask) | \ + (value ? line_mask : 0); + + /* Write the output */ + out_be32(&im->gpio[ctrlr].dat, gpio_output_value[ctrlr]); +} + +/* Configure GPIO registers early */ +void mpc83xx_gpio_init_f() +{ + immap_t *im = (immap_t *)CONFIG_SYS_IMMR; + +#if MPC83XX_GPIO_CTRLRS >= 1 + out_be32(&im->gpio[0].dir, CONFIG_MPC83XX_GPIO_0_INIT_DIRECTION); + out_be32(&im->gpio[0].odr, CONFIG_MPC83XX_GPIO_0_INIT_OPEN_DRAIN); + out_be32(&im->gpio[0].dat, CONFIG_MPC83XX_GPIO_0_INIT_VALUE); + out_be32(&im->gpio[0].ier, 0xFFFFFFFF); /* Clear all events */ + out_be32(&im->gpio[0].imr, 0); + out_be32(&im->gpio[0].icr, 0); +#endif + +#if MPC83XX_GPIO_CTRLRS >= 2 + out_be32(&im->gpio[1].dir, CONFIG_MPC83XX_GPIO_1_INIT_DIRECTION); + out_be32(&im->gpio[1].odr, CONFIG_MPC83XX_GPIO_1_INIT_OPEN_DRAIN); + out_be32(&im->gpio[1].dat, CONFIG_MPC83XX_GPIO_1_INIT_VALUE); + out_be32(&im->gpio[1].ier, 0xFFFFFFFF); /* Clear all events */ + out_be32(&im->gpio[1].imr, 0); + out_be32(&im->gpio[1].icr, 0); +#endif +} + +/* Initialize GPIO soft-copies */ +void mpc83xx_gpio_init_r() +{ +#if MPC83XX_GPIO_CTRLRS >= 1 + gpio_output_value[0] = CONFIG_MPC83XX_GPIO_0_INIT_VALUE; +#endif + +#if MPC83XX_GPIO_CTRLRS >= 2 + gpio_output_value[1] = CONFIG_MPC83XX_GPIO_1_INIT_VALUE; +#endif +}
Signed-off-by: Joe Hershberger joe.hershberger@ni.com Cc: Joe Hershberger joe.hershberger@gmail.com Cc: Kim Phillips kim.phillips@freescale.com --- Changes for v2: - Moved changes to board/freescale/mpc8313erdb/mpc8313erdb.c from patch 1/2 Changes for v3: - Renamed gpio_init_* to mpc83xx_gpio_init_* - Added board_early_init_r support to MPC8313ERDB targets Changes for v4: - Fixed build warning Changes for v5: Changes for v6: Changes for v7: - checkpatch compliance
board/freescale/mpc8313erdb/mpc8313erdb.c | 15 +++++++++++++++ include/configs/MPC8313ERDB.h | 9 +++++++-- 2 files changed, 22 insertions(+), 2 deletions(-)
diff --git a/board/freescale/mpc8313erdb/mpc8313erdb.c b/board/freescale/mpc8313erdb/mpc8313erdb.c index 08f873d..730ec4e 100644 --- a/board/freescale/mpc8313erdb/mpc8313erdb.c +++ b/board/freescale/mpc8313erdb/mpc8313erdb.c @@ -31,6 +31,9 @@ #include <vsc7385.h> #include <ns16550.h> #include <nand.h> +#if defined(CONFIG_MPC83XX_GPIO) && !defined(CONFIG_NAND_SPL) +#include <asm/gpio.h> +#endif
DECLARE_GLOBAL_DATA_PTR;
@@ -42,6 +45,18 @@ int board_early_init_f(void) if (im->pmc.pmccr1 & PMCCR1_POWER_OFF) gd->flags |= GD_FLG_SILENT; #endif +#if defined(CONFIG_MPC83XX_GPIO) && !defined(CONFIG_NAND_SPL) + mpc83xx_gpio_init_f(); +#endif + + return 0; +} + +int board_early_init_r(void) +{ +#if defined(CONFIG_MPC83XX_GPIO) && !defined(CONFIG_NAND_SPL) + mpc83xx_gpio_init_r(); +#endif
return 0; } diff --git a/include/configs/MPC8313ERDB.h b/include/configs/MPC8313ERDB.h index 92c54d0..1243b9f 100644 --- a/include/configs/MPC8313ERDB.h +++ b/include/configs/MPC8313ERDB.h @@ -82,7 +82,8 @@
#define CONFIG_SYS_CLK_FREQ CONFIG_83XX_CLKIN
-#define CONFIG_BOARD_EARLY_INIT_F /* call board_pre_init */ +#define CONFIG_BOARD_EARLY_INIT_F /* call board_early_init_f */ +#define CONFIG_BOARD_EARLY_INIT_R /* call board_early_init_r */
#define CONFIG_SYS_IMMR 0xE0000000
@@ -322,6 +323,9 @@ #define CONFIG_OF_BOARD_SETUP 1 #define CONFIG_OF_STDOUT_VIA_ALIAS 1
+#define CONFIG_MPC83XX_GPIO 1 +#define CONFIG_CMD_GPIO 1 + /* * Serial Port */ @@ -535,7 +539,8 @@
/* System IO Config */ #define CONFIG_SYS_SICRH (SICRH_TSOBI1 | SICRH_TSOBI2) /* RGMII */ -#define CONFIG_SYS_SICRL SICRL_USBDR_10 /* Enable Internal USB Phy */ + /* Enable Internal USB Phy and GPIO on LCD Connector */ +#define CONFIG_SYS_SICRL (SICRL_USBDR_10 | SICRL_LBC)
#define CONFIG_SYS_HID0_INIT 0x000000000 #define CONFIG_SYS_HID0_FINAL (HID0_ENABLE_MACHINE_CHECK | \
Change "int gp" to "unsigned gpio" Update the 2 existing arm implementations to match the new API Remove the gpio_toggle() implementation (never used)
Signed-off-by: Joe Hershberger joe.hershberger@ni.com Cc: Joe Hershberger joe.hershberger@gmail.com Cc: Mike Frysinger vapier@gentoo.org --- Changes for v6: - Linuxize gpio API
drivers/gpio/da8xx_gpio.c | 71 +++++++++----------- drivers/gpio/tegra2_gpio.c | 156 +++++++++++++++++++++---------------------- include/asm-generic/gpio.h | 13 ++-- 3 files changed, 113 insertions(+), 127 deletions(-)
diff --git a/drivers/gpio/da8xx_gpio.c b/drivers/gpio/da8xx_gpio.c index 0308223..2994c92 100644 --- a/drivers/gpio/da8xx_gpio.c +++ b/drivers/gpio/da8xx_gpio.c @@ -185,97 +185,88 @@ static const struct pinmux_config gpio_pinmux[] = {
-int gpio_request(int gp, const char *label) +int gpio_request(unsigned gpio, const char *label) { - if (gp >= MAX_NUM_GPIOS) + if (gpio >= MAX_NUM_GPIOS) return -1;
- if (gpio_registry[gp].is_registered) + if (gpio_registry[gpio].is_registered) return -1;
- gpio_registry[gp].is_registered = 1; - strncpy(gpio_registry[gp].name, label, GPIO_NAME_SIZE); - gpio_registry[gp].name[GPIO_NAME_SIZE - 1] = 0; + gpio_registry[gpio].is_registered = 1; + strncpy(gpio_registry[gpio].name, label, GPIO_NAME_SIZE); + gpio_registry[gpio].name[GPIO_NAME_SIZE - 1] = 0;
- davinci_configure_pin_mux(&gpio_pinmux[gp], 1); + davinci_configure_pin_mux(&gpio_pinmux[gpio], 1);
return 0; }
-void gpio_free(int gp) +void gpio_free(unsigned gpio) { - gpio_registry[gp].is_registered = 0; + gpio_registry[gpio].is_registered = 0; }
-void gpio_toggle_value(int gp) +int gpio_direction_input(unsigned gpio) { struct davinci_gpio *bank;
- bank = GPIO_BANK(gp); - gpio_set_value(gp, !gpio_get_value(gp)); -} - - -int gpio_direction_input(int gp) -{ - struct davinci_gpio *bank; - - bank = GPIO_BANK(gp); - setbits_le32(&bank->dir, 1U << GPIO_BIT(gp)); + bank = GPIO_BANK(gpio); + setbits_le32(&bank->dir, 1U << GPIO_BIT(gpio)); return 0; }
-int gpio_direction_output(int gp, int value) +int gpio_direction_output(unsigned gpio, int value) { struct davinci_gpio *bank;
- bank = GPIO_BANK(gp); - clrbits_le32(&bank->dir, 1U << GPIO_BIT(gp)); - gpio_set_value(gp, value); + bank = GPIO_BANK(gpio); + clrbits_le32(&bank->dir, 1U << GPIO_BIT(gpio)); + gpio_set_value(gpio, value); return 0; }
-int gpio_get_value(int gp) +int gpio_get_value(unsigned gpio) { struct davinci_gpio *bank; unsigned int ip;
- bank = GPIO_BANK(gp); - ip = in_le32(&bank->in_data) & (1U << GPIO_BIT(gp)); + bank = GPIO_BANK(gpio); + ip = in_le32(&bank->in_data) & (1U << GPIO_BIT(gpio)); return ip ? 1 : 0; }
-void gpio_set_value(int gp, int value) +void gpio_set_value(unsigned gpio, int value) { struct davinci_gpio *bank;
- bank = GPIO_BANK(gp); + bank = GPIO_BANK(gpio);
if (value) - bank->set_data = 1U << GPIO_BIT(gp); + bank->set_data = 1U << GPIO_BIT(gpio); else - bank->clr_data = 1U << GPIO_BIT(gp); + bank->clr_data = 1U << GPIO_BIT(gpio); }
void gpio_info(void) { - int gp, dir, val; + unsigned gpio, dir, val; struct davinci_gpio *bank;
- for (gp = 0; gp < MAX_NUM_GPIOS; ++gp) { - bank = GPIO_BANK(gp); - dir = in_le32(&bank->dir) & (1U << GPIO_BIT(gp)); - val = gpio_get_value(gp); + for (gpio = 0; gpio < MAX_NUM_GPIOS; ++gpio) { + bank = GPIO_BANK(gpio); + dir = in_le32(&bank->dir) & (1U << GPIO_BIT(gpio)); + val = gpio_get_value(gpio);
printf("% 4d: %s: %d [%c] %s\n", - gp, dir ? " in" : "out", val, - gpio_registry[gp].is_registered ? 'x' : ' ', - gpio_registry[gp].name); + gpio, dir ? " in" : "out", val, + gpio_registry[gpio].is_registered ? 'x' : ' ', + gpio_registry[gpio].name); } } diff --git a/drivers/gpio/tegra2_gpio.c b/drivers/gpio/tegra2_gpio.c index f686e80..3edc2fb 100644 --- a/drivers/gpio/tegra2_gpio.c +++ b/drivers/gpio/tegra2_gpio.c @@ -49,186 +49,181 @@ static char *get_name(int i) return *gpio_names[i].name ? gpio_names[i].name : "UNKNOWN"; }
-/* Return config of pin 'gp' as GPIO (1) or SFPIO (0) */ -static int get_config(int gp) +/* Return config of pin 'gpio' as GPIO (1) or SFPIO (0) */ +static int get_config(unsigned gpio) { - struct gpio_ctlr *gpio = (struct gpio_ctlr *)NV_PA_GPIO_BASE; - struct gpio_ctlr_bank *bank = &gpio->gpio_bank[GPIO_BANK(gp)]; + struct gpio_ctlr *ctlr = (struct gpio_ctlr *)NV_PA_GPIO_BASE; + struct gpio_ctlr_bank *bank = &ctlr->gpio_bank[GPIO_BANK(gpio)]; u32 u; int type;
- u = readl(&bank->gpio_config[GPIO_PORT(gp)]); - type = (u >> GPIO_BIT(gp)) & 1; + u = readl(&bank->gpio_config[GPIO_PORT(gpio)]); + type = (u >> GPIO_BIT(gpio)) & 1;
debug("get_config: port = %d, bit = %d is %s\n", - GPIO_FULLPORT(gp), GPIO_BIT(gp), type ? "GPIO" : "SFPIO"); + GPIO_FULLPORT(gpio), GPIO_BIT(gpio), type ? "GPIO" : "SFPIO");
return type; }
-/* Config pin 'gp' as GPIO or SFPIO, based on 'type' */ -static void set_config(int gp, int type) +/* Config pin 'gpio' as GPIO or SFPIO, based on 'type' */ +static void set_config(unsigned gpio, int type) { - struct gpio_ctlr *gpio = (struct gpio_ctlr *)NV_PA_GPIO_BASE; - struct gpio_ctlr_bank *bank = &gpio->gpio_bank[GPIO_BANK(gp)]; + struct gpio_ctlr *ctlr = (struct gpio_ctlr *)NV_PA_GPIO_BASE; + struct gpio_ctlr_bank *bank = &ctlr->gpio_bank[GPIO_BANK(gpio)]; u32 u;
debug("set_config: port = %d, bit = %d, %s\n", - GPIO_FULLPORT(gp), GPIO_BIT(gp), type ? "GPIO" : "SFPIO"); + GPIO_FULLPORT(gpio), GPIO_BIT(gpio), type ? "GPIO" : "SFPIO");
- u = readl(&bank->gpio_config[GPIO_PORT(gp)]); + u = readl(&bank->gpio_config[GPIO_PORT(gpio)]); if (type) /* GPIO */ - u |= 1 << GPIO_BIT(gp); + u |= 1 << GPIO_BIT(gpio); else - u &= ~(1 << GPIO_BIT(gp)); - writel(u, &bank->gpio_config[GPIO_PORT(gp)]); + u &= ~(1 << GPIO_BIT(gpio)); + writel(u, &bank->gpio_config[GPIO_PORT(gpio)]); }
-/* Return GPIO pin 'gp' direction - 0 = input or 1 = output */ -static int get_direction(int gp) +/* Return GPIO pin 'gpio' direction - 0 = input or 1 = output */ +static int get_direction(unsigned gpio) { - struct gpio_ctlr *gpio = (struct gpio_ctlr *)NV_PA_GPIO_BASE; - struct gpio_ctlr_bank *bank = &gpio->gpio_bank[GPIO_BANK(gp)]; + struct gpio_ctlr *ctlr = (struct gpio_ctlr *)NV_PA_GPIO_BASE; + struct gpio_ctlr_bank *bank = &ctlr->gpio_bank[GPIO_BANK(gpio)]; u32 u; int dir;
- u = readl(&bank->gpio_dir_out[GPIO_PORT(gp)]); - dir = (u >> GPIO_BIT(gp)) & 1; + u = readl(&bank->gpio_dir_out[GPIO_PORT(gpio)]); + dir = (u >> GPIO_BIT(gpio)) & 1;
debug("get_direction: port = %d, bit = %d, %s\n", - GPIO_FULLPORT(gp), GPIO_BIT(gp), dir ? "OUT" : "IN"); + GPIO_FULLPORT(gpio), GPIO_BIT(gpio), dir ? "OUT" : "IN");
return dir; }
-/* Config GPIO pin 'gp' as input or output (OE) as per 'output' */ -static void set_direction(int gp, int output) +/* Config GPIO pin 'gpio' as input or output (OE) as per 'output' */ +static void set_direction(unsigned gpio, int output) { - struct gpio_ctlr *gpio = (struct gpio_ctlr *)NV_PA_GPIO_BASE; - struct gpio_ctlr_bank *bank = &gpio->gpio_bank[GPIO_BANK(gp)]; + struct gpio_ctlr *ctlr = (struct gpio_ctlr *)NV_PA_GPIO_BASE; + struct gpio_ctlr_bank *bank = &ctlr->gpio_bank[GPIO_BANK(gpio)]; u32 u;
debug("set_direction: port = %d, bit = %d, %s\n", - GPIO_FULLPORT(gp), GPIO_BIT(gp), output ? "OUT" : "IN"); + GPIO_FULLPORT(gpio), GPIO_BIT(gpio), output ? "OUT" : "IN");
- u = readl(&bank->gpio_dir_out[GPIO_PORT(gp)]); + u = readl(&bank->gpio_dir_out[GPIO_PORT(gpio)]); if (output) - u |= 1 << GPIO_BIT(gp); + u |= 1 << GPIO_BIT(gpio); else - u &= ~(1 << GPIO_BIT(gp)); - writel(u, &bank->gpio_dir_out[GPIO_PORT(gp)]); + u &= ~(1 << GPIO_BIT(gpio)); + writel(u, &bank->gpio_dir_out[GPIO_PORT(gpio)]); }
-/* set GPIO pin 'gp' output bit as 0 or 1 as per 'high' */ -static void set_level(int gp, int high) +/* set GPIO pin 'gpio' output bit as 0 or 1 as per 'high' */ +static void set_level(unsigned gpio, int high) { - struct gpio_ctlr *gpio = (struct gpio_ctlr *)NV_PA_GPIO_BASE; - struct gpio_ctlr_bank *bank = &gpio->gpio_bank[GPIO_BANK(gp)]; + struct gpio_ctlr *ctlr = (struct gpio_ctlr *)NV_PA_GPIO_BASE; + struct gpio_ctlr_bank *bank = &ctlr->gpio_bank[GPIO_BANK(gpio)]; u32 u;
debug("set_level: port = %d, bit %d == %d\n", - GPIO_FULLPORT(gp), GPIO_BIT(gp), high); + GPIO_FULLPORT(gpio), GPIO_BIT(gpio), high);
- u = readl(&bank->gpio_out[GPIO_PORT(gp)]); + u = readl(&bank->gpio_out[GPIO_PORT(gpio)]); if (high) - u |= 1 << GPIO_BIT(gp); + u |= 1 << GPIO_BIT(gpio); else - u &= ~(1 << GPIO_BIT(gp)); - writel(u, &bank->gpio_out[GPIO_PORT(gp)]); + u &= ~(1 << GPIO_BIT(gpio)); + writel(u, &bank->gpio_out[GPIO_PORT(gpio)]); }
/* * Generic_GPIO primitives. */
-int gpio_request(int gp, const char *label) +int gpio_request(unsigned gpio, const char *label) { - if (gp >= MAX_NUM_GPIOS) + if (gpio >= MAX_NUM_GPIOS) return -1;
- strncpy(gpio_names[gp].name, label, GPIO_NAME_SIZE); - gpio_names[gp].name[GPIO_NAME_SIZE - 1] = '\0'; + strncpy(gpio_names[gpio].name, label, GPIO_NAME_SIZE); + gpio_names[gpio].name[GPIO_NAME_SIZE - 1] = '\0';
/* Configure as a GPIO */ - set_config(gp, 1); + set_config(gpio, 1);
return 0; }
-void gpio_free(int gp) +void gpio_free(unsigned gpio) { }
-/* read GPIO OUT value of pin 'gp' */ -static int gpio_get_output_value(int gp) +/* read GPIO OUT value of pin 'gpio' */ +static int gpio_get_output_value(unsigned gpio) { - struct gpio_ctlr *gpio = (struct gpio_ctlr *)NV_PA_GPIO_BASE; - struct gpio_ctlr_bank *bank = &gpio->gpio_bank[GPIO_BANK(gp)]; + struct gpio_ctlr *ctlr = (struct gpio_ctlr *)NV_PA_GPIO_BASE; + struct gpio_ctlr_bank *bank = &ctlr->gpio_bank[GPIO_BANK(gpio)]; int val;
debug("gpio_get_output_value: pin = %d (port %d:bit %d)\n", - gp, GPIO_FULLPORT(gp), GPIO_BIT(gp)); + gpio, GPIO_FULLPORT(gpio), GPIO_BIT(gpio));
- val = readl(&bank->gpio_out[GPIO_PORT(gp)]); + val = readl(&bank->gpio_out[GPIO_PORT(gpio)]);
- return (val >> GPIO_BIT(gp)) & 1; + return (val >> GPIO_BIT(gpio)) & 1; }
-void gpio_toggle_value(int gp) -{ - gpio_set_value(gp, !gpio_get_output_value(gp)); -} - -/* set GPIO pin 'gp' as an input */ -int gpio_direction_input(int gp) +/* set GPIO pin 'gpio' as an input */ +int gpio_direction_input(unsigned gpio) { debug("gpio_direction_input: pin = %d (port %d:bit %d)\n", - gp, GPIO_FULLPORT(gp), GPIO_BIT(gp)); + gpio, GPIO_FULLPORT(gpio), GPIO_BIT(gpio));
/* Configure GPIO direction as input. */ - set_direction(gp, 0); + set_direction(gpio, 0);
return 0; }
-/* set GPIO pin 'gp' as an output, with polarity 'value' */ -int gpio_direction_output(int gp, int value) +/* set GPIO pin 'gpio' as an output, with polarity 'value' */ +int gpio_direction_output(unsigned gpio, int value) { debug("gpio_direction_output: pin = %d (port %d:bit %d) = %s\n", - gp, GPIO_FULLPORT(gp), GPIO_BIT(gp), value ? "HIGH" : "LOW"); + gpio, GPIO_FULLPORT(gpio), GPIO_BIT(gpio), value ? "HIGH" : "LOW");
/* Configure GPIO output value. */ - set_level(gp, value); + set_level(gpio, value);
/* Configure GPIO direction as output. */ - set_direction(gp, 1); + set_direction(gpio, 1);
return 0; }
-/* read GPIO IN value of pin 'gp' */ -int gpio_get_value(int gp) +/* read GPIO IN value of pin 'gpio' */ +int gpio_get_value(unsigned gpio) { - struct gpio_ctlr *gpio = (struct gpio_ctlr *)NV_PA_GPIO_BASE; - struct gpio_ctlr_bank *bank = &gpio->gpio_bank[GPIO_BANK(gp)]; + struct gpio_ctlr *ctlr = (struct gpio_ctlr *)NV_PA_GPIO_BASE; + struct gpio_ctlr_bank *bank = &ctlr->gpio_bank[GPIO_BANK(gpio)]; int val;
debug("gpio_get_value: pin = %d (port %d:bit %d)\n", - gp, GPIO_FULLPORT(gp), GPIO_BIT(gp)); + gpio, GPIO_FULLPORT(gpio), GPIO_BIT(gpio));
- val = readl(&bank->gpio_in[GPIO_PORT(gp)]); + val = readl(&bank->gpio_in[GPIO_PORT(gpio)]);
- return (val >> GPIO_BIT(gp)) & 1; + return (val >> GPIO_BIT(gpio)) & 1; }
-/* write GPIO OUT value to pin 'gp' */ -void gpio_set_value(int gp, int value) +/* write GPIO OUT value to pin 'gpio' */ +void gpio_set_value(unsigned gpio, int value) { debug("gpio_set_value: pin = %d (port %d:bit %d), value = %d\n", - gp, GPIO_FULLPORT(gp), GPIO_BIT(gp), value); + gpio, GPIO_FULLPORT(gpio), GPIO_BIT(gpio), value);
/* Configure GPIO output value. */ - set_level(gp, value); + set_level(gpio, value); }
/* @@ -236,7 +231,8 @@ void gpio_set_value(int gp, int value) */ void gpio_info(void) { - int c, type; + unsigned c; + int type;
for (c = 0; c < MAX_NUM_GPIOS; c++) { type = get_config(c); /* GPIO, not SFPIO */ diff --git a/include/asm-generic/gpio.h b/include/asm-generic/gpio.h index 57542ad..55a030d 100644 --- a/include/asm-generic/gpio.h +++ b/include/asm-generic/gpio.h @@ -26,12 +26,11 @@ * Generic GPIO API */
-int gpio_request(int gp, const char *label); -void gpio_free(int gp); -void gpio_toggle_value(int gp); -int gpio_direction_input(int gp); -int gpio_direction_output(int gp, int value); -int gpio_get_value(int gp); -void gpio_set_value(int gp, int value); +int gpio_request(unsigned gpio, const char *label); +void gpio_free(unsigned gpio); +int gpio_direction_input(unsigned gpio); +int gpio_get_value(unsigned gpio); +int gpio_direction_output(unsigned gpio, int value); +void gpio_set_value(unsigned gpio, int value);
#endif /* _GPIO_H_ */
Acked-by: Mike Frysinger vapier@gentoo.org -mike
Dear Joe Hershberger,
In message 1313194256-23007-2-git-send-email-joe.hershberger@ni.com you wrote:
Change "int gp" to "unsigned gpio" Update the 2 existing arm implementations to match the new API Remove the gpio_toggle() implementation (never used)
Signed-off-by: Joe Hershberger joe.hershberger@ni.com Cc: Joe Hershberger joe.hershberger@gmail.com Cc: Mike Frysinger vapier@gentoo.org
Changes for v6:
- Linuxize gpio API
drivers/gpio/da8xx_gpio.c | 71 +++++++++----------- drivers/gpio/tegra2_gpio.c | 156 +++++++++++++++++++++---------------------- include/asm-generic/gpio.h | 13 ++-- 3 files changed, 113 insertions(+), 127 deletions(-)
Checkpatch says:
total: 0 errors, 1 warnings, 415 lines checked
Please clean up and resubmit. Thanks.
Best regards,
Wolfgang Denk
Signed-off-by: Joe Hershberger joe.hershberger@ni.com Cc: Joe Hershberger joe.hershberger@gmail.com Cc: Kim Phillips kim.phillips@freescale.com --- Changes for v2: - Improved names of INIT constants (to include "CONFIG_") - Moved changes to board/freescale/mpc8313erdb/mpc8313erdb.c to patch 2/2 Changes for v3: - gpio_init_* is now mpc83xx_gpio_init_* Changes for v4: - no volatile - no camelCase - use i/o accessors Changes for v5: Changes for v6: - update to use new GPIO API
arch/powerpc/include/asm/arch-mpc83xx/gpio.h | 37 +++++ drivers/gpio/Makefile | 1 + drivers/gpio/mpc83xx_gpio.c | 194 ++++++++++++++++++++++++++ 3 files changed, 232 insertions(+), 0 deletions(-) create mode 100644 arch/powerpc/include/asm/arch-mpc83xx/gpio.h create mode 100644 drivers/gpio/mpc83xx_gpio.c
diff --git a/arch/powerpc/include/asm/arch-mpc83xx/gpio.h b/arch/powerpc/include/asm/arch-mpc83xx/gpio.h new file mode 100644 index 0000000..462a7bf --- /dev/null +++ b/arch/powerpc/include/asm/arch-mpc83xx/gpio.h @@ -0,0 +1,37 @@ +/* + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef _MPC83XX_GPIO_H_ +#define _MPC83XX_GPIO_H_ + +/* + * The MCP83xx's 1-2 GPIO controllers each with 32 bits. + */ +#if defined(CONFIG_MPC8313) || defined(CONFIG_MPC8308) || defined(CONFIG_MPC8315) + #define MPC83XX_GPIO_CTRLRS 1 +#elif defined(CONFIG_MPC834x) || defined(CONFIG_MPC837x) + #define MPC83XX_GPIO_CTRLRS 2 +#else + #define MPC83XX_GPIO_CTRLRS 0 +#endif + +#define MAX_NUM_GPIOS (32 * MPC83XX_GPIO_CTRLRS) + +void mpc83xx_gpio_init_f(void); +void mpc83xx_gpio_init_r(void); + +#endif /* MPC83XX_GPIO_H_ */ diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile index 62ec97d..563b8ec 100644 --- a/drivers/gpio/Makefile +++ b/drivers/gpio/Makefile @@ -33,6 +33,7 @@ COBJS-$(CONFIG_PCA953X) += pca953x.o COBJS-$(CONFIG_S5P) += s5p_gpio.o COBJS-$(CONFIG_TEGRA2_GPIO) += tegra2_gpio.o COBJS-$(CONFIG_DA8XX_GPIO) += da8xx_gpio.o +COBJS-$(CONFIG_MPC83XX_GPIO) += mpc83xx_gpio.o
COBJS := $(COBJS-y) SRCS := $(COBJS:.o=.c) diff --git a/drivers/gpio/mpc83xx_gpio.c b/drivers/gpio/mpc83xx_gpio.c new file mode 100644 index 0000000..ee2df0c --- /dev/null +++ b/drivers/gpio/mpc83xx_gpio.c @@ -0,0 +1,194 @@ +/* + * Freescale MPC83xx GPIO handling. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <mpc83xx.h> +#include <asm/gpio.h> +#include <asm/io.h> + +#ifndef CONFIG_MPC83XX_GPIO_0_INIT_DIRECTION + #define CONFIG_MPC83XX_GPIO_0_INIT_DIRECTION 0 +#endif +#ifndef CONFIG_MPC83XX_GPIO_1_INIT_DIRECTION + #define CONFIG_MPC83XX_GPIO_1_INIT_DIRECTION 0 +#endif +#ifndef CONFIG_MPC83XX_GPIO_0_INIT_OPEN_DRAIN + #define CONFIG_MPC83XX_GPIO_0_INIT_OPEN_DRAIN 0 +#endif +#ifndef CONFIG_MPC83XX_GPIO_1_INIT_OPEN_DRAIN + #define CONFIG_MPC83XX_GPIO_1_INIT_OPEN_DRAIN 0 +#endif +#ifndef CONFIG_MPC83XX_GPIO_0_INIT_VALUE + #define CONFIG_MPC83XX_GPIO_0_INIT_VALUE 0 +#endif +#ifndef CONFIG_MPC83XX_GPIO_1_INIT_VALUE + #define CONFIG_MPC83XX_GPIO_1_INIT_VALUE 0 +#endif + +static unsigned int gpio_output_value[MPC83XX_GPIO_CTRLRS]; + +/* + * Generic_GPIO primitives. + */ + +int gpio_request(unsigned gpio, const char *label) +{ + if (gpio >= MAX_NUM_GPIOS) + return -1; + + return 0; +} + +void gpio_free(unsigned gpio) +{ +} + +/* set GPIO pin 'gpio' as an input */ +int gpio_direction_input(unsigned gpio) +{ + immap_t *im = (immap_t *)CONFIG_SYS_IMMR; + unsigned int ctrlr; + unsigned int line; + unsigned int line_mask; + + /* 32-bits per controller */ + ctrlr = gpio >> 5; + line = gpio & (0x1F); + + /* Big endian */ + line_mask = 1 << (31 - line); + + clrbits_be32(&im->gpio[ctrlr].dir, line_mask); + + return 0; +} + +/* set GPIO pin 'gpio' as an output, with polarity 'value' */ +int gpio_direction_output(unsigned gpio, int value) +{ + immap_t *im = (immap_t *)CONFIG_SYS_IMMR; + unsigned int ctrlr; + unsigned int line; + unsigned int line_mask; + + if (value != 0 && value != 1) { + printf("Error: Value parameter must be 0 or 1.\n"); + return -1; + } + + gpio_set_value(gpio, value); + + /* 32-bits per controller */ + ctrlr = gpio >> 5; + line = gpio & (0x1F); + + /* Big endian */ + line_mask = 1 << (31 - line); + + /* Make the line output */ + setbits_be32(&im->gpio[ctrlr].dir, line_mask); + + return 0; +} + +/* read GPIO IN value of pin 'gpio' */ +int gpio_get_value(unsigned gpio) +{ + immap_t *im = (immap_t *)CONFIG_SYS_IMMR; + unsigned int ctrlr; + unsigned int line; + unsigned int line_mask; + + /* 32-bits per controller */ + ctrlr = gpio >> 5; + line = gpio & (0x1F); + + /* Big endian */ + line_mask = 1 << (31 - line); + + /* Read the value and mask off the bit */ + return (in_be32(&im->gpio[ctrlr].dat) & line_mask) != 0; +} + +/* write GPIO OUT value to pin 'gpio' */ +void gpio_set_value(unsigned gpio, int value) +{ + immap_t *im = (immap_t *)CONFIG_SYS_IMMR; + unsigned int ctrlr; + unsigned int line; + unsigned int line_mask; + + if (value != 0 && value != 1) { + printf("Error: Value parameter must be 0 or 1.\n"); + return; + } + + /* 32-bits per controller */ + ctrlr = gpio >> 5; + line = gpio & (0x1F); + + /* Big endian */ + line_mask = 1 << (31 - line); + + /* Update the local output buffer soft copy */ + gpio_output_value[ctrlr] = + (gpio_output_value[ctrlr] & ~line_mask) | (value ? line_mask : 0); + + /* Write the output */ + out_be32(&im->gpio[ctrlr].dat, gpio_output_value[ctrlr]); +} + +/* Configure GPIO registers early */ +void mpc83xx_gpio_init_f() +{ + immap_t *im = (immap_t *)CONFIG_SYS_IMMR; + +#if MPC83XX_GPIO_CTRLRS >= 1 + out_be32(&im->gpio[0].dir, CONFIG_MPC83XX_GPIO_0_INIT_DIRECTION); + out_be32(&im->gpio[0].odr, CONFIG_MPC83XX_GPIO_0_INIT_OPEN_DRAIN); + out_be32(&im->gpio[0].dat, CONFIG_MPC83XX_GPIO_0_INIT_VALUE); + out_be32(&im->gpio[0].ier, 0xFFFFFFFF); /* Clear all events */ + out_be32(&im->gpio[0].imr, 0); + out_be32(&im->gpio[0].icr, 0); +#endif + +#if MPC83XX_GPIO_CTRLRS >= 2 + out_be32(&im->gpio[1].dir, CONFIG_MPC83XX_GPIO_1_INIT_DIRECTION); + out_be32(&im->gpio[1].odr, CONFIG_MPC83XX_GPIO_1_INIT_OPEN_DRAIN); + out_be32(&im->gpio[1].dat, CONFIG_MPC83XX_GPIO_1_INIT_VALUE); + out_be32(&im->gpio[1].ier, 0xFFFFFFFF); /* Clear all events */ + out_be32(&im->gpio[1].imr, 0); + out_be32(&im->gpio[1].icr, 0); +#endif +} + +/* Initialize GPIO soft-copies */ +void mpc83xx_gpio_init_r() +{ +#if MPC83XX_GPIO_CTRLRS >= 1 + gpio_output_value[0] = CONFIG_MPC83XX_GPIO_0_INIT_VALUE; +#endif + +#if MPC83XX_GPIO_CTRLRS >= 2 + gpio_output_value[1] = CONFIG_MPC83XX_GPIO_1_INIT_VALUE; +#endif +}
Dear Joe Hershberger,
In message 1313194256-23007-3-git-send-email-joe.hershberger@ni.com you wrote:
Signed-off-by: Joe Hershberger joe.hershberger@ni.com Cc: Joe Hershberger joe.hershberger@gmail.com Cc: Kim Phillips kim.phillips@freescale.com
Changes for v2:
- Improved names of INIT constants (to include "CONFIG_")
- Moved changes to board/freescale/mpc8313erdb/mpc8313erdb.c to patch 2/2
Changes for v3:
- gpio_init_* is now mpc83xx_gpio_init_*
Changes for v4:
- no volatile
- no camelCase
- use i/o accessors
Changes for v5: Changes for v6:
- update to use new GPIO API
arch/powerpc/include/asm/arch-mpc83xx/gpio.h | 37 +++++ drivers/gpio/Makefile | 1 + drivers/gpio/mpc83xx_gpio.c | 194 ++++++++++++++++++++++++++ 3 files changed, 232 insertions(+), 0 deletions(-) create mode 100644 arch/powerpc/include/asm/arch-mpc83xx/gpio.h create mode 100644 drivers/gpio/mpc83xx_gpio.c
Checkpatch says:
total: 0 errors, 2 warnings, 238 lines checked
Please clean up and resubmit. Thanks.
Best regards,
Wolfgang Denk
Signed-off-by: Joe Hershberger joe.hershberger@ni.com Cc: Joe Hershberger joe.hershberger@gmail.com Cc: Kim Phillips kim.phillips@freescale.com --- Changes for v2: - Moved changes to board/freescale/mpc8313erdb/mpc8313erdb.c from patch 1/2 Changes for v3: - Renamed gpio_init_* to mpc83xx_gpio_init_* - Added board_early_init_r support to MPC8313ERDB targets Changes for v4: - Fixed build warning Changes for v5: Changes for v6:
board/freescale/mpc8313erdb/mpc8313erdb.c | 15 +++++++++++++++ include/configs/MPC8313ERDB.h | 8 ++++++-- 2 files changed, 21 insertions(+), 2 deletions(-)
diff --git a/board/freescale/mpc8313erdb/mpc8313erdb.c b/board/freescale/mpc8313erdb/mpc8313erdb.c index 08f873d..730ec4e 100644 --- a/board/freescale/mpc8313erdb/mpc8313erdb.c +++ b/board/freescale/mpc8313erdb/mpc8313erdb.c @@ -31,6 +31,9 @@ #include <vsc7385.h> #include <ns16550.h> #include <nand.h> +#if defined(CONFIG_MPC83XX_GPIO) && !defined(CONFIG_NAND_SPL) +#include <asm/gpio.h> +#endif
DECLARE_GLOBAL_DATA_PTR;
@@ -42,6 +45,18 @@ int board_early_init_f(void) if (im->pmc.pmccr1 & PMCCR1_POWER_OFF) gd->flags |= GD_FLG_SILENT; #endif +#if defined(CONFIG_MPC83XX_GPIO) && !defined(CONFIG_NAND_SPL) + mpc83xx_gpio_init_f(); +#endif + + return 0; +} + +int board_early_init_r(void) +{ +#if defined(CONFIG_MPC83XX_GPIO) && !defined(CONFIG_NAND_SPL) + mpc83xx_gpio_init_r(); +#endif
return 0; } diff --git a/include/configs/MPC8313ERDB.h b/include/configs/MPC8313ERDB.h index 92c54d0..bf17e41 100644 --- a/include/configs/MPC8313ERDB.h +++ b/include/configs/MPC8313ERDB.h @@ -82,7 +82,8 @@
#define CONFIG_SYS_CLK_FREQ CONFIG_83XX_CLKIN
-#define CONFIG_BOARD_EARLY_INIT_F /* call board_pre_init */ +#define CONFIG_BOARD_EARLY_INIT_F /* call board_early_init_f */ +#define CONFIG_BOARD_EARLY_INIT_R /* call board_early_init_r */
#define CONFIG_SYS_IMMR 0xE0000000
@@ -322,6 +323,9 @@ #define CONFIG_OF_BOARD_SETUP 1 #define CONFIG_OF_STDOUT_VIA_ALIAS 1
+#define CONFIG_MPC83XX_GPIO 1 +#define CONFIG_CMD_GPIO 1 + /* * Serial Port */ @@ -535,7 +539,7 @@
/* System IO Config */ #define CONFIG_SYS_SICRH (SICRH_TSOBI1 | SICRH_TSOBI2) /* RGMII */ -#define CONFIG_SYS_SICRL SICRL_USBDR_10 /* Enable Internal USB Phy */ +#define CONFIG_SYS_SICRL (SICRL_USBDR_10 | SICRL_LBC) /* Enable Internal USB Phy and GPIO on LCD Connector */
#define CONFIG_SYS_HID0_INIT 0x000000000 #define CONFIG_SYS_HID0_FINAL (HID0_ENABLE_MACHINE_CHECK | \
Dear Joe Hershberger,
In message 1313194256-23007-4-git-send-email-joe.hershberger@ni.com you wrote:
Signed-off-by: Joe Hershberger joe.hershberger@ni.com Cc: Joe Hershberger joe.hershberger@gmail.com Cc: Kim Phillips kim.phillips@freescale.com
Changes for v2:
- Moved changes to board/freescale/mpc8313erdb/mpc8313erdb.c from patch 1/2
Changes for v3:
- Renamed gpio_init_* to mpc83xx_gpio_init_*
- Added board_early_init_r support to MPC8313ERDB targets
Changes for v4:
- Fixed build warning
Changes for v5: Changes for v6:
board/freescale/mpc8313erdb/mpc8313erdb.c | 15 +++++++++++++++ include/configs/MPC8313ERDB.h | 8 ++++++-- 2 files changed, 21 insertions(+), 2 deletions(-)
Checkpatch says:
total: 0 errors, 1 warnings, 53 lines checked
Please clean up and resubmit. Thanks.
Best regards,
Wolfgang Denk
Signed-off-by: Joe Hershberger joe.hershberger@ni.com Cc: Joe Hershberger joe.hershberger@gmail.com Cc: Kim Phillips kim.phillips@freescale.com --- Changes for v2: - Improved names of INIT constants (to include "CONFIG_") - Moved changes to board/freescale/mpc8313erdb/mpc8313erdb.c to patch 2/2 Changes for v3: - gpio_init_* is now mpc83xx_gpio_init_* Changes for v4: - no volatile - no camelCase - use i/o accessors Changes for v5:
arch/powerpc/include/asm/arch-mpc83xx/gpio.h | 37 +++++ drivers/gpio/Makefile | 1 + drivers/gpio/mpc83xx_gpio.c | 199 ++++++++++++++++++++++++++ 3 files changed, 237 insertions(+), 0 deletions(-) create mode 100644 arch/powerpc/include/asm/arch-mpc83xx/gpio.h create mode 100644 drivers/gpio/mpc83xx_gpio.c
diff --git a/arch/powerpc/include/asm/arch-mpc83xx/gpio.h b/arch/powerpc/include/asm/arch-mpc83xx/gpio.h new file mode 100644 index 0000000..462a7bf --- /dev/null +++ b/arch/powerpc/include/asm/arch-mpc83xx/gpio.h @@ -0,0 +1,37 @@ +/* + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef _MPC83XX_GPIO_H_ +#define _MPC83XX_GPIO_H_ + +/* + * The MCP83xx's 1-2 GPIO controllers each with 32 bits. + */ +#if defined(CONFIG_MPC8313) || defined(CONFIG_MPC8308) || defined(CONFIG_MPC8315) + #define MPC83XX_GPIO_CTRLRS 1 +#elif defined(CONFIG_MPC834x) || defined(CONFIG_MPC837x) + #define MPC83XX_GPIO_CTRLRS 2 +#else + #define MPC83XX_GPIO_CTRLRS 0 +#endif + +#define MAX_NUM_GPIOS (32 * MPC83XX_GPIO_CTRLRS) + +void mpc83xx_gpio_init_f(void); +void mpc83xx_gpio_init_r(void); + +#endif /* MPC83XX_GPIO_H_ */ diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile index 62ec97d..563b8ec 100644 --- a/drivers/gpio/Makefile +++ b/drivers/gpio/Makefile @@ -33,6 +33,7 @@ COBJS-$(CONFIG_PCA953X) += pca953x.o COBJS-$(CONFIG_S5P) += s5p_gpio.o COBJS-$(CONFIG_TEGRA2_GPIO) += tegra2_gpio.o COBJS-$(CONFIG_DA8XX_GPIO) += da8xx_gpio.o +COBJS-$(CONFIG_MPC83XX_GPIO) += mpc83xx_gpio.o
COBJS := $(COBJS-y) SRCS := $(COBJS:.o=.c) diff --git a/drivers/gpio/mpc83xx_gpio.c b/drivers/gpio/mpc83xx_gpio.c new file mode 100644 index 0000000..71d7841 --- /dev/null +++ b/drivers/gpio/mpc83xx_gpio.c @@ -0,0 +1,199 @@ +/* + * Freescale MPC83xx GPIO handling. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <mpc83xx.h> +#include <asm/gpio.h> +#include <asm/io.h> + +#ifndef CONFIG_MPC83XX_GPIO_0_INIT_DIRECTION + #define CONFIG_MPC83XX_GPIO_0_INIT_DIRECTION 0 +#endif +#ifndef CONFIG_MPC83XX_GPIO_1_INIT_DIRECTION + #define CONFIG_MPC83XX_GPIO_1_INIT_DIRECTION 0 +#endif +#ifndef CONFIG_MPC83XX_GPIO_0_INIT_OPEN_DRAIN + #define CONFIG_MPC83XX_GPIO_0_INIT_OPEN_DRAIN 0 +#endif +#ifndef CONFIG_MPC83XX_GPIO_1_INIT_OPEN_DRAIN + #define CONFIG_MPC83XX_GPIO_1_INIT_OPEN_DRAIN 0 +#endif +#ifndef CONFIG_MPC83XX_GPIO_0_INIT_VALUE + #define CONFIG_MPC83XX_GPIO_0_INIT_VALUE 0 +#endif +#ifndef CONFIG_MPC83XX_GPIO_1_INIT_VALUE + #define CONFIG_MPC83XX_GPIO_1_INIT_VALUE 0 +#endif + +static unsigned int gpio_output_value[MPC83XX_GPIO_CTRLRS]; + +/* + * Generic_GPIO primitives. + */ + +int gpio_request(int gp, const char *label) +{ + if (gp >= MAX_NUM_GPIOS) + return -1; + + return 0; +} + +void gpio_free(int gp) +{ +} + +/* set GPIO pin 'gp' as an input */ +int gpio_direction_input(int gp) +{ + immap_t *im = (immap_t *)CONFIG_SYS_IMMR; + unsigned int ctrlr; + unsigned int line; + unsigned int line_mask; + + /* 32-bits per controller */ + ctrlr = gp >> 5; + line = gp & (0x1F); + + /* Big endian */ + line_mask = 1 << (31 - line); + + clrbits_be32(&im->gpio[ctrlr].dir, line_mask); + + return 0; +} + +void gpio_toggle_value(int gp) +{ + gpio_set_value(gp, !gpio_get_value(gp)); +} + +/* set GPIO pin 'gp' as an output, with polarity 'value' */ +int gpio_direction_output(int gp, int value) +{ + immap_t *im = (immap_t *)CONFIG_SYS_IMMR; + unsigned int ctrlr; + unsigned int line; + unsigned int line_mask; + + if (value != 0 && value != 1) { + printf("Error: Value parameter must be 0 or 1.\n"); + return -1; + } + + gpio_set_value(gp, value); + + /* 32-bits per controller */ + ctrlr = gp >> 5; + line = gp & (0x1F); + + /* Big endian */ + line_mask = 1 << (31 - line); + + /* Make the line output */ + setbits_be32(&im->gpio[ctrlr].dir, line_mask); + + return 0; +} + +/* read GPIO IN value of pin 'gp' */ +int gpio_get_value(int gp) +{ + immap_t *im = (immap_t *)CONFIG_SYS_IMMR; + unsigned int ctrlr; + unsigned int line; + unsigned int line_mask; + + /* 32-bits per controller */ + ctrlr = gp >> 5; + line = gp & (0x1F); + + /* Big endian */ + line_mask = 1 << (31 - line); + + /* Read the value and mask off the bit */ + return (in_be32(&im->gpio[ctrlr].dat) & line_mask) != 0; +} + +/* write GPIO OUT value to pin 'gp' */ +void gpio_set_value(int gp, int value) +{ + immap_t *im = (immap_t *)CONFIG_SYS_IMMR; + unsigned int ctrlr; + unsigned int line; + unsigned int line_mask; + + if (value != 0 && value != 1) { + printf("Error: Value parameter must be 0 or 1.\n"); + return; + } + + /* 32-bits per controller */ + ctrlr = gp >> 5; + line = gp & (0x1F); + + /* Big endian */ + line_mask = 1 << (31 - line); + + /* Update the local output buffer soft copy */ + gpio_output_value[ctrlr] = + (gpio_output_value[ctrlr] & ~line_mask) | (value ? line_mask : 0); + + /* Write the output */ + out_be32(&im->gpio[ctrlr].dat, gpio_output_value[ctrlr]); +} + +/* Configure GPIO registers early */ +void mpc83xx_gpio_init_f() +{ + immap_t *im = (immap_t *)CONFIG_SYS_IMMR; + +#if MPC83XX_GPIO_CTRLRS >= 1 + out_be32(&im->gpio[0].dir, CONFIG_MPC83XX_GPIO_0_INIT_DIRECTION); + out_be32(&im->gpio[0].odr, CONFIG_MPC83XX_GPIO_0_INIT_OPEN_DRAIN); + out_be32(&im->gpio[0].dat, CONFIG_MPC83XX_GPIO_0_INIT_VALUE); + out_be32(&im->gpio[0].ier, 0xFFFFFFFF); /* Clear all events */ + out_be32(&im->gpio[0].imr, 0); + out_be32(&im->gpio[0].icr, 0); +#endif + +#if MPC83XX_GPIO_CTRLRS >= 2 + out_be32(&im->gpio[1].dir, CONFIG_MPC83XX_GPIO_1_INIT_DIRECTION); + out_be32(&im->gpio[1].odr, CONFIG_MPC83XX_GPIO_1_INIT_OPEN_DRAIN); + out_be32(&im->gpio[1].dat, CONFIG_MPC83XX_GPIO_1_INIT_VALUE); + out_be32(&im->gpio[1].ier, 0xFFFFFFFF); /* Clear all events */ + out_be32(&im->gpio[1].imr, 0); + out_be32(&im->gpio[1].icr, 0); +#endif +} + +/* Initialize GPIO soft-copies */ +void mpc83xx_gpio_init_r() +{ +#if MPC83XX_GPIO_CTRLRS >= 1 + gpio_output_value[0] = CONFIG_MPC83XX_GPIO_0_INIT_VALUE; +#endif + +#if MPC83XX_GPIO_CTRLRS >= 2 + gpio_output_value[1] = CONFIG_MPC83XX_GPIO_1_INIT_VALUE; +#endif +}
Signed-off-by: Joe Hershberger joe.hershberger@ni.com Cc: Joe Hershberger joe.hershberger@gmail.com Cc: Kim Phillips kim.phillips@freescale.com --- Changes for v2: - Moved changes to board/freescale/mpc8313erdb/mpc8313erdb.c from patch 1/2 Changes for v3: - Renamed gpio_init_* to mpc83xx_gpio_init_* - Added board_early_init_r support to MPC8313ERDB targets Changes for v4: - Fixed build warning Changes for v5:
board/freescale/mpc8313erdb/mpc8313erdb.c | 15 +++++++++++++++ include/configs/MPC8313ERDB.h | 8 ++++++-- 2 files changed, 21 insertions(+), 2 deletions(-)
diff --git a/board/freescale/mpc8313erdb/mpc8313erdb.c b/board/freescale/mpc8313erdb/mpc8313erdb.c index 08f873d..730ec4e 100644 --- a/board/freescale/mpc8313erdb/mpc8313erdb.c +++ b/board/freescale/mpc8313erdb/mpc8313erdb.c @@ -31,6 +31,9 @@ #include <vsc7385.h> #include <ns16550.h> #include <nand.h> +#if defined(CONFIG_MPC83XX_GPIO) && !defined(CONFIG_NAND_SPL) +#include <asm/gpio.h> +#endif
DECLARE_GLOBAL_DATA_PTR;
@@ -42,6 +45,18 @@ int board_early_init_f(void) if (im->pmc.pmccr1 & PMCCR1_POWER_OFF) gd->flags |= GD_FLG_SILENT; #endif +#if defined(CONFIG_MPC83XX_GPIO) && !defined(CONFIG_NAND_SPL) + mpc83xx_gpio_init_f(); +#endif + + return 0; +} + +int board_early_init_r(void) +{ +#if defined(CONFIG_MPC83XX_GPIO) && !defined(CONFIG_NAND_SPL) + mpc83xx_gpio_init_r(); +#endif
return 0; } diff --git a/include/configs/MPC8313ERDB.h b/include/configs/MPC8313ERDB.h index 92c54d0..bf17e41 100644 --- a/include/configs/MPC8313ERDB.h +++ b/include/configs/MPC8313ERDB.h @@ -82,7 +82,8 @@
#define CONFIG_SYS_CLK_FREQ CONFIG_83XX_CLKIN
-#define CONFIG_BOARD_EARLY_INIT_F /* call board_pre_init */ +#define CONFIG_BOARD_EARLY_INIT_F /* call board_early_init_f */ +#define CONFIG_BOARD_EARLY_INIT_R /* call board_early_init_r */
#define CONFIG_SYS_IMMR 0xE0000000
@@ -322,6 +323,9 @@ #define CONFIG_OF_BOARD_SETUP 1 #define CONFIG_OF_STDOUT_VIA_ALIAS 1
+#define CONFIG_MPC83XX_GPIO 1 +#define CONFIG_CMD_GPIO 1 + /* * Serial Port */ @@ -535,7 +539,7 @@
/* System IO Config */ #define CONFIG_SYS_SICRH (SICRH_TSOBI1 | SICRH_TSOBI2) /* RGMII */ -#define CONFIG_SYS_SICRL SICRL_USBDR_10 /* Enable Internal USB Phy */ +#define CONFIG_SYS_SICRL (SICRL_USBDR_10 | SICRL_LBC) /* Enable Internal USB Phy and GPIO on LCD Connector */
#define CONFIG_SYS_HID0_INIT 0x000000000 #define CONFIG_SYS_HID0_FINAL (HID0_ENABLE_MACHINE_CHECK | \
Signed-off-by: Joe Hershberger joe.hershberger@ni.com Cc: Joe Hershberger joe.hershberger@gmail.com Cc: Kim Phillips kim.phillips@freescale.com --- Changes for v2: - Improved names of INIT constants (to include "CONFIG_") - Moved changes to board/freescale/mpc8313erdb/mpc8313erdb.c to patch 2/2 Changes for v3: - gpio_init_* is now mpc83xx_gpio_init_* Changes for v4: - no volatile - no camelCase - use i/o accessors
arch/powerpc/include/asm/arch-mpc83xx/gpio.h | 37 +++++ drivers/gpio/Makefile | 1 + drivers/gpio/mpc83xx_gpio.c | 199 ++++++++++++++++++++++++++ 3 files changed, 237 insertions(+), 0 deletions(-) create mode 100644 arch/powerpc/include/asm/arch-mpc83xx/gpio.h create mode 100644 drivers/gpio/mpc83xx_gpio.c
diff --git a/arch/powerpc/include/asm/arch-mpc83xx/gpio.h b/arch/powerpc/include/asm/arch-mpc83xx/gpio.h new file mode 100644 index 0000000..462a7bf --- /dev/null +++ b/arch/powerpc/include/asm/arch-mpc83xx/gpio.h @@ -0,0 +1,37 @@ +/* + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef _MPC83XX_GPIO_H_ +#define _MPC83XX_GPIO_H_ + +/* + * The MCP83xx's 1-2 GPIO controllers each with 32 bits. + */ +#if defined(CONFIG_MPC8313) || defined(CONFIG_MPC8308) || defined(CONFIG_MPC8315) + #define MPC83XX_GPIO_CTRLRS 1 +#elif defined(CONFIG_MPC834x) || defined(CONFIG_MPC837x) + #define MPC83XX_GPIO_CTRLRS 2 +#else + #define MPC83XX_GPIO_CTRLRS 0 +#endif + +#define MAX_NUM_GPIOS (32 * MPC83XX_GPIO_CTRLRS) + +void mpc83xx_gpio_init_f(void); +void mpc83xx_gpio_init_r(void); + +#endif /* MPC83XX_GPIO_H_ */ diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile index 62ec97d..563b8ec 100644 --- a/drivers/gpio/Makefile +++ b/drivers/gpio/Makefile @@ -33,6 +33,7 @@ COBJS-$(CONFIG_PCA953X) += pca953x.o COBJS-$(CONFIG_S5P) += s5p_gpio.o COBJS-$(CONFIG_TEGRA2_GPIO) += tegra2_gpio.o COBJS-$(CONFIG_DA8XX_GPIO) += da8xx_gpio.o +COBJS-$(CONFIG_MPC83XX_GPIO) += mpc83xx_gpio.o
COBJS := $(COBJS-y) SRCS := $(COBJS:.o=.c) diff --git a/drivers/gpio/mpc83xx_gpio.c b/drivers/gpio/mpc83xx_gpio.c new file mode 100644 index 0000000..71d7841 --- /dev/null +++ b/drivers/gpio/mpc83xx_gpio.c @@ -0,0 +1,199 @@ +/* + * Freescale MPC83xx GPIO handling. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <mpc83xx.h> +#include <asm/gpio.h> +#include <asm/io.h> + +#ifndef CONFIG_MPC83XX_GPIO_0_INIT_DIRECTION + #define CONFIG_MPC83XX_GPIO_0_INIT_DIRECTION 0 +#endif +#ifndef CONFIG_MPC83XX_GPIO_1_INIT_DIRECTION + #define CONFIG_MPC83XX_GPIO_1_INIT_DIRECTION 0 +#endif +#ifndef CONFIG_MPC83XX_GPIO_0_INIT_OPEN_DRAIN + #define CONFIG_MPC83XX_GPIO_0_INIT_OPEN_DRAIN 0 +#endif +#ifndef CONFIG_MPC83XX_GPIO_1_INIT_OPEN_DRAIN + #define CONFIG_MPC83XX_GPIO_1_INIT_OPEN_DRAIN 0 +#endif +#ifndef CONFIG_MPC83XX_GPIO_0_INIT_VALUE + #define CONFIG_MPC83XX_GPIO_0_INIT_VALUE 0 +#endif +#ifndef CONFIG_MPC83XX_GPIO_1_INIT_VALUE + #define CONFIG_MPC83XX_GPIO_1_INIT_VALUE 0 +#endif + +static unsigned int gpio_output_value[MPC83XX_GPIO_CTRLRS]; + +/* + * Generic_GPIO primitives. + */ + +int gpio_request(int gp, const char *label) +{ + if (gp >= MAX_NUM_GPIOS) + return -1; + + return 0; +} + +void gpio_free(int gp) +{ +} + +/* set GPIO pin 'gp' as an input */ +int gpio_direction_input(int gp) +{ + immap_t *im = (immap_t *)CONFIG_SYS_IMMR; + unsigned int ctrlr; + unsigned int line; + unsigned int line_mask; + + /* 32-bits per controller */ + ctrlr = gp >> 5; + line = gp & (0x1F); + + /* Big endian */ + line_mask = 1 << (31 - line); + + clrbits_be32(&im->gpio[ctrlr].dir, line_mask); + + return 0; +} + +void gpio_toggle_value(int gp) +{ + gpio_set_value(gp, !gpio_get_value(gp)); +} + +/* set GPIO pin 'gp' as an output, with polarity 'value' */ +int gpio_direction_output(int gp, int value) +{ + immap_t *im = (immap_t *)CONFIG_SYS_IMMR; + unsigned int ctrlr; + unsigned int line; + unsigned int line_mask; + + if (value != 0 && value != 1) { + printf("Error: Value parameter must be 0 or 1.\n"); + return -1; + } + + gpio_set_value(gp, value); + + /* 32-bits per controller */ + ctrlr = gp >> 5; + line = gp & (0x1F); + + /* Big endian */ + line_mask = 1 << (31 - line); + + /* Make the line output */ + setbits_be32(&im->gpio[ctrlr].dir, line_mask); + + return 0; +} + +/* read GPIO IN value of pin 'gp' */ +int gpio_get_value(int gp) +{ + immap_t *im = (immap_t *)CONFIG_SYS_IMMR; + unsigned int ctrlr; + unsigned int line; + unsigned int line_mask; + + /* 32-bits per controller */ + ctrlr = gp >> 5; + line = gp & (0x1F); + + /* Big endian */ + line_mask = 1 << (31 - line); + + /* Read the value and mask off the bit */ + return (in_be32(&im->gpio[ctrlr].dat) & line_mask) != 0; +} + +/* write GPIO OUT value to pin 'gp' */ +void gpio_set_value(int gp, int value) +{ + immap_t *im = (immap_t *)CONFIG_SYS_IMMR; + unsigned int ctrlr; + unsigned int line; + unsigned int line_mask; + + if (value != 0 && value != 1) { + printf("Error: Value parameter must be 0 or 1.\n"); + return; + } + + /* 32-bits per controller */ + ctrlr = gp >> 5; + line = gp & (0x1F); + + /* Big endian */ + line_mask = 1 << (31 - line); + + /* Update the local output buffer soft copy */ + gpio_output_value[ctrlr] = + (gpio_output_value[ctrlr] & ~line_mask) | (value ? line_mask : 0); + + /* Write the output */ + out_be32(&im->gpio[ctrlr].dat, gpio_output_value[ctrlr]); +} + +/* Configure GPIO registers early */ +void mpc83xx_gpio_init_f() +{ + immap_t *im = (immap_t *)CONFIG_SYS_IMMR; + +#if MPC83XX_GPIO_CTRLRS >= 1 + out_be32(&im->gpio[0].dir, CONFIG_MPC83XX_GPIO_0_INIT_DIRECTION); + out_be32(&im->gpio[0].odr, CONFIG_MPC83XX_GPIO_0_INIT_OPEN_DRAIN); + out_be32(&im->gpio[0].dat, CONFIG_MPC83XX_GPIO_0_INIT_VALUE); + out_be32(&im->gpio[0].ier, 0xFFFFFFFF); /* Clear all events */ + out_be32(&im->gpio[0].imr, 0); + out_be32(&im->gpio[0].icr, 0); +#endif + +#if MPC83XX_GPIO_CTRLRS >= 2 + out_be32(&im->gpio[1].dir, CONFIG_MPC83XX_GPIO_1_INIT_DIRECTION); + out_be32(&im->gpio[1].odr, CONFIG_MPC83XX_GPIO_1_INIT_OPEN_DRAIN); + out_be32(&im->gpio[1].dat, CONFIG_MPC83XX_GPIO_1_INIT_VALUE); + out_be32(&im->gpio[1].ier, 0xFFFFFFFF); /* Clear all events */ + out_be32(&im->gpio[1].imr, 0); + out_be32(&im->gpio[1].icr, 0); +#endif +} + +/* Initialize GPIO soft-copies */ +void mpc83xx_gpio_init_r() +{ +#if MPC83XX_GPIO_CTRLRS >= 1 + gpio_output_value[0] = CONFIG_MPC83XX_GPIO_0_INIT_VALUE; +#endif + +#if MPC83XX_GPIO_CTRLRS >= 2 + gpio_output_value[1] = CONFIG_MPC83XX_GPIO_1_INIT_VALUE; +#endif +}
Signed-off-by: Joe Hershberger joe.hershberger@ni.com Cc: Joe Hershberger joe.hershberger@gmail.com Cc: Kim Phillips kim.phillips@freescale.com --- Changes for v2: - Moved changes to board/freescale/mpc8313erdb/mpc8313erdb.c from patch 1/2 Changes for v3: - Renamed gpio_init_* to mpc83xx_gpio_init_* - Added board_early_init_r support to MPC8313ERDB targets Changes for v4: - Fixed build warning
board/freescale/mpc8313erdb/mpc8313erdb.c | 15 +++++++++++++++ include/configs/MPC8313ERDB.h | 8 ++++++-- 2 files changed, 21 insertions(+), 2 deletions(-)
diff --git a/board/freescale/mpc8313erdb/mpc8313erdb.c b/board/freescale/mpc8313erdb/mpc8313erdb.c index 08f873d..730ec4e 100644 --- a/board/freescale/mpc8313erdb/mpc8313erdb.c +++ b/board/freescale/mpc8313erdb/mpc8313erdb.c @@ -31,6 +31,9 @@ #include <vsc7385.h> #include <ns16550.h> #include <nand.h> +#if defined(CONFIG_MPC83XX_GPIO) && !defined(CONFIG_NAND_SPL) +#include <asm/gpio.h> +#endif
DECLARE_GLOBAL_DATA_PTR;
@@ -42,6 +45,18 @@ int board_early_init_f(void) if (im->pmc.pmccr1 & PMCCR1_POWER_OFF) gd->flags |= GD_FLG_SILENT; #endif +#if defined(CONFIG_MPC83XX_GPIO) && !defined(CONFIG_NAND_SPL) + mpc83xx_gpio_init_f(); +#endif + + return 0; +} + +int board_early_init_r(void) +{ +#if defined(CONFIG_MPC83XX_GPIO) && !defined(CONFIG_NAND_SPL) + mpc83xx_gpio_init_r(); +#endif
return 0; } diff --git a/include/configs/MPC8313ERDB.h b/include/configs/MPC8313ERDB.h index 92c54d0..bf17e41 100644 --- a/include/configs/MPC8313ERDB.h +++ b/include/configs/MPC8313ERDB.h @@ -82,7 +82,8 @@
#define CONFIG_SYS_CLK_FREQ CONFIG_83XX_CLKIN
-#define CONFIG_BOARD_EARLY_INIT_F /* call board_pre_init */ +#define CONFIG_BOARD_EARLY_INIT_F /* call board_early_init_f */ +#define CONFIG_BOARD_EARLY_INIT_R /* call board_early_init_r */
#define CONFIG_SYS_IMMR 0xE0000000
@@ -322,6 +323,9 @@ #define CONFIG_OF_BOARD_SETUP 1 #define CONFIG_OF_STDOUT_VIA_ALIAS 1
+#define CONFIG_MPC83XX_GPIO 1 +#define CONFIG_CMD_GPIO 1 + /* * Serial Port */ @@ -535,7 +539,7 @@
/* System IO Config */ #define CONFIG_SYS_SICRH (SICRH_TSOBI1 | SICRH_TSOBI2) /* RGMII */ -#define CONFIG_SYS_SICRL SICRL_USBDR_10 /* Enable Internal USB Phy */ +#define CONFIG_SYS_SICRL (SICRL_USBDR_10 | SICRL_LBC) /* Enable Internal USB Phy and GPIO on LCD Connector */
#define CONFIG_SYS_HID0_INIT 0x000000000 #define CONFIG_SYS_HID0_FINAL (HID0_ENABLE_MACHINE_CHECK | \
Signed-off-by: Joe Hershberger joe.hershberger@ni.com Cc: Joe Hershberger joe.hershberger@gmail.com Cc: Kim Phillips kim.phillips@freescale.com --- Changes for v2: - Improved names of INIT constants (to include "CONFIG_") - Moved changes to board/freescale/mpc8313erdb/mpc8313erdb.c to patch 2/2
arch/powerpc/include/asm/arch-mpc83xx/gpio.h | 37 +++++ arch/powerpc/include/asm/gpio.h | 38 +++++ drivers/gpio/Makefile | 1 + drivers/gpio/mpc83xx_gpio.c | 198 ++++++++++++++++++++++++++ 4 files changed, 274 insertions(+), 0 deletions(-) create mode 100644 arch/powerpc/include/asm/arch-mpc83xx/gpio.h create mode 100644 arch/powerpc/include/asm/gpio.h create mode 100644 drivers/gpio/mpc83xx_gpio.c
diff --git a/arch/powerpc/include/asm/arch-mpc83xx/gpio.h b/arch/powerpc/include/asm/arch-mpc83xx/gpio.h new file mode 100644 index 0000000..4319d07 --- /dev/null +++ b/arch/powerpc/include/asm/arch-mpc83xx/gpio.h @@ -0,0 +1,37 @@ +/* + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef _MPC83XX_GPIO_H_ +#define _MPC83XX_GPIO_H_ + +/* + * The MCP83xx's 1-2 GPIO controllers each with 32 bits. + */ +#if defined(CONFIG_MPC8313) || defined(CONFIG_MPC8308) || defined(CONFIG_MPC8315) + #define MPC83XX_GPIO_CTRLRS 1 +#elif defined(CONFIG_MPC834x) || defined(CONFIG_MPC837x) + #define MPC83XX_GPIO_CTRLRS 2 +#else + #define MPC83XX_GPIO_CTRLRS 0 +#endif + +#define MAX_NUM_GPIOS (32 * MPC83XX_GPIO_CTRLRS) + +void gpio_init_f(void); +void gpio_init_r(void); + +#endif /* MPC83XX_GPIO_H_ */ diff --git a/arch/powerpc/include/asm/gpio.h b/arch/powerpc/include/asm/gpio.h new file mode 100644 index 0000000..eb071d1 --- /dev/null +++ b/arch/powerpc/include/asm/gpio.h @@ -0,0 +1,38 @@ +/* + * Copyright (c) 2011, NVIDIA Corp. All rights reserved. + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef _GPIO_H_ +#define _GPIO_H_ + +#include <asm/arch/gpio.h> +/* + * Generic GPIO API + */ + +int gpio_request(int gp, const char *label); +void gpio_free(int gp); +void gpio_toggle_value(int gp); +int gpio_direction_input(int gp); +int gpio_direction_output(int gp, int value); +int gpio_get_value(int gp); +void gpio_set_value(int gp, int value); + +#endif /* _GPIO_H_ */ diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile index 62ec97d..563b8ec 100644 --- a/drivers/gpio/Makefile +++ b/drivers/gpio/Makefile @@ -33,6 +33,7 @@ COBJS-$(CONFIG_PCA953X) += pca953x.o COBJS-$(CONFIG_S5P) += s5p_gpio.o COBJS-$(CONFIG_TEGRA2_GPIO) += tegra2_gpio.o COBJS-$(CONFIG_DA8XX_GPIO) += da8xx_gpio.o +COBJS-$(CONFIG_MPC83XX_GPIO) += mpc83xx_gpio.o
COBJS := $(COBJS-y) SRCS := $(COBJS:.o=.c) diff --git a/drivers/gpio/mpc83xx_gpio.c b/drivers/gpio/mpc83xx_gpio.c new file mode 100644 index 0000000..f6d7491 --- /dev/null +++ b/drivers/gpio/mpc83xx_gpio.c @@ -0,0 +1,198 @@ +/* + * Freescale MPC83xx GPIO handling. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <mpc83xx.h> +#include <asm/gpio.h> + +#ifndef CONFIG_MPC83XX_GPIO_0_INIT_DIRECTION + #define CONFIG_MPC83XX_GPIO_0_INIT_DIRECTION 0 +#endif +#ifndef CONFIG_MPC83XX_GPIO_1_INIT_DIRECTION + #define CONFIG_MPC83XX_GPIO_1_INIT_DIRECTION 0 +#endif +#ifndef CONFIG_MPC83XX_GPIO_0_INIT_OPEN_DRAIN + #define CONFIG_MPC83XX_GPIO_0_INIT_OPEN_DRAIN 0 +#endif +#ifndef CONFIG_MPC83XX_GPIO_1_INIT_OPEN_DRAIN + #define CONFIG_MPC83XX_GPIO_1_INIT_OPEN_DRAIN 0 +#endif +#ifndef CONFIG_MPC83XX_GPIO_0_INIT_VALUE + #define CONFIG_MPC83XX_GPIO_0_INIT_VALUE 0 +#endif +#ifndef CONFIG_MPC83XX_GPIO_1_INIT_VALUE + #define CONFIG_MPC83XX_GPIO_1_INIT_VALUE 0 +#endif + +static unsigned int gpio_output_value[MPC83XX_GPIO_CTRLRS]; + +/* + * Generic_GPIO primitives. + */ + +int gpio_request(int gp, const char *label) +{ + if (gp >= MAX_NUM_GPIOS) + return -1; + + return 0; +} + +void gpio_free(int gp) +{ +} + +/* set GPIO pin 'gp' as an input */ +int gpio_direction_input(int gp) +{ + volatile immap_t *im = (immap_t *)CONFIG_SYS_IMMR; + unsigned int ctrlr; + unsigned int line; + unsigned int lineMask; + + /* 32-bits per controller */ + ctrlr = gp >> 5; + line = gp & (0x1F); + + /* Big endian */ + lineMask = 1 << (31 - line); + + im->gpio[ctrlr].dir &= ~lineMask; + + return 0; +} + +void gpio_toggle_value(int gp) +{ + gpio_set_value(gp, !gpio_get_value(gp)); +} + +/* set GPIO pin 'gp' as an output, with polarity 'value' */ +int gpio_direction_output(int gp, int value) +{ + volatile immap_t *im = (immap_t *)CONFIG_SYS_IMMR; + unsigned int ctrlr; + unsigned int line; + unsigned int lineMask; + + if (value != 0 && value != 1) { + printf("Error: Value parameter must be 0 or 1.\n"); + return -1; + } + + gpio_set_value(gp, value); + + /* 32-bits per controller */ + ctrlr = gp >> 5; + line = gp & (0x1F); + + /* Big endian */ + lineMask = 1 << (31 - line); + + /* Make the line output */ + im->gpio[ctrlr].dir |= lineMask; + + return 0; +} + +/* read GPIO IN value of pin 'gp' */ +int gpio_get_value(int gp) +{ + volatile immap_t *im = (immap_t *)CONFIG_SYS_IMMR; + unsigned int ctrlr; + unsigned int line; + unsigned int lineMask; + + /* 32-bits per controller */ + ctrlr = gp >> 5; + line = gp & (0x1F); + + /* Big endian */ + lineMask = 1 << (31 - line); + + /* Read the value and mask off the bit */ + return (im->gpio[ctrlr].dat & lineMask) != 0; +} + +/* write GPIO OUT value to pin 'gp' */ +void gpio_set_value(int gp, int value) +{ + volatile immap_t *im = (immap_t *)CONFIG_SYS_IMMR; + unsigned int ctrlr; + unsigned int line; + unsigned int lineMask; + + if (value != 0 && value != 1) { + printf("Error: Value parameter must be 0 or 1.\n"); + return; + } + + /* 32-bits per controller */ + ctrlr = gp >> 5; + line = gp & (0x1F); + + /* Big endian */ + lineMask = 1 << (31 - line); + + /* Update the local output buffer soft copy */ + gpio_output_value[ctrlr] = + (gpio_output_value[ctrlr] & ~lineMask) | (value ? lineMask : 0); + + /* Write the output */ + im->gpio[ctrlr].dat = gpio_output_value[ctrlr]; +} + +/* Configure GPIO registers early */ +void gpio_init_f() +{ + volatile immap_t *im = (immap_t *)CONFIG_SYS_IMMR; + +#if MPC83XX_GPIO_CTRLRS >= 1 + im->gpio[0].dir = CONFIG_MPC83XX_GPIO_0_INIT_DIRECTION; + im->gpio[0].odr = CONFIG_MPC83XX_GPIO_0_INIT_OPEN_DRAIN; + im->gpio[0].dat = CONFIG_MPC83XX_GPIO_0_INIT_VALUE; + im->gpio[0].ier = 0xFFFFFFFF; /* Clear all events */ + im->gpio[0].imr = 0; + im->gpio[0].icr = 0; +#endif + +#if MPC83XX_GPIO_CTRLRS >= 2 + im->gpio[1].dir = CONFIG_MPC83XX_GPIO_1_INIT_DIRECTION; + im->gpio[1].odr = CONFIG_MPC83XX_GPIO_1_INIT_OPEN_DRAIN; + im->gpio[1].dat = CONFIG_MPC83XX_GPIO_1_INIT_VALUE; + im->gpio[1].ier = 0xFFFFFFFF; /* Clear all events */ + im->gpio[1].imr = 0; + im->gpio[1].icr = 0; +#endif +} + +/* Initialize GPIO soft-copies */ +void gpio_init_r() +{ +#if MPC83XX_GPIO_CTRLRS >= 1 + gpio_output_value[0] = CONFIG_MPC83XX_GPIO_0_INIT_VALUE; +#endif + +#if MPC83XX_GPIO_CTRLRS >= 2 + gpio_output_value[1] = CONFIG_MPC83XX_GPIO_1_INIT_VALUE; +#endif +}
Signed-off-by: Joe Hershberger joe.hershberger@ni.com Cc: Joe Hershberger joe.hershberger@gmail.com Cc: Kim Phillips kim.phillips@freescale.com --- Changes for v2: - Moved changes to board/freescale/mpc8313erdb/mpc8313erdb.c from patch 1/2
board/freescale/mpc8313erdb/mpc8313erdb.c | 9 +++++++++ include/configs/MPC8313ERDB.h | 5 ++++- 2 files changed, 13 insertions(+), 1 deletions(-)
diff --git a/board/freescale/mpc8313erdb/mpc8313erdb.c b/board/freescale/mpc8313erdb/mpc8313erdb.c index 08f873d..353b9f4 100644 --- a/board/freescale/mpc8313erdb/mpc8313erdb.c +++ b/board/freescale/mpc8313erdb/mpc8313erdb.c @@ -31,6 +31,9 @@ #include <vsc7385.h> #include <ns16550.h> #include <nand.h> +#if defined(CONFIG_MPC83XX_GPIO) && !defined(CONFIG_NAND_SPL) +#include <asm/gpio.h> +#endif
DECLARE_GLOBAL_DATA_PTR;
@@ -42,6 +45,9 @@ int board_early_init_f(void) if (im->pmc.pmccr1 & PMCCR1_POWER_OFF) gd->flags |= GD_FLG_SILENT; #endif +#if defined(CONFIG_MPC83XX_GPIO) && !defined(CONFIG_NAND_SPL) + gpio_init_f(); +#endif
return 0; } @@ -140,6 +146,9 @@ void board_init_f(ulong bootflag)
void board_init_r(gd_t *gd, ulong dest_addr) { +#if defined(CONFIG_MPC83XX_GPIO) && !defined(CONFIG_NAND_SPL) + gpio_init_r(); +#endif nand_boot(); }
diff --git a/include/configs/MPC8313ERDB.h b/include/configs/MPC8313ERDB.h index 92c54d0..9bf38df 100644 --- a/include/configs/MPC8313ERDB.h +++ b/include/configs/MPC8313ERDB.h @@ -322,6 +322,9 @@ #define CONFIG_OF_BOARD_SETUP 1 #define CONFIG_OF_STDOUT_VIA_ALIAS 1
+#define CONFIG_MPC83XX_GPIO 1 +#define CONFIG_CMD_GPIO 1 + /* * Serial Port */ @@ -535,7 +538,7 @@
/* System IO Config */ #define CONFIG_SYS_SICRH (SICRH_TSOBI1 | SICRH_TSOBI2) /* RGMII */ -#define CONFIG_SYS_SICRL SICRL_USBDR_10 /* Enable Internal USB Phy */ +#define CONFIG_SYS_SICRL (SICRL_USBDR_10 | SICRL_LBC) /* Enable Internal USB Phy and GPIO on LCD Connector */
#define CONFIG_SYS_HID0_INIT 0x000000000 #define CONFIG_SYS_HID0_FINAL (HID0_ENABLE_MACHINE_CHECK | \
participants (9)
-
Albert ARIBAUD -
Joe Hershberger -
Joe Hershberger -
Kim Phillips -
Laurence Withers -
Mike Frysinger -
Scott Wood -
Stephen Warren -
Wolfgang Denk