[U-Boot] [PATCH 08/11] x86: Move VGA option rom macros to Kconfig
Move X86_OPTION_ROM_FILE & X86_OPTION_ROM_ADDR to arch/x86/Kconfig and rename them to VGA_BIOS_FILE & VGA_BIOS_ADDR which depend on HAVE_VGA_BIOS. The new names are consistent with other x86 binary blob options like HAVE_FSP/FSP_FILE/FSP_ADDR.
Signed-off-by: Bin Meng bmeng.cn@gmail.com ---
Makefile | 4 ++-- arch/x86/Kconfig | 22 ++++++++++++++++++++++ configs/chromebook_link_defconfig | 1 + configs/chromebox_panther_defconfig | 1 + configs/minnowmax_defconfig | 1 + doc/README.x86 | 2 +- drivers/pci/pci_rom.c | 6 +++--- include/configs/minnowmax.h | 3 --- include/configs/x86-chromebook.h | 3 --- 9 files changed, 31 insertions(+), 12 deletions(-)
diff --git a/Makefile b/Makefile index 0a674bf..2601e87 100644 --- a/Makefile +++ b/Makefile @@ -1034,8 +1034,8 @@ ifneq ($(CONFIG_HAVE_CMC),) IFDTOOL_FLAGS += -w $(CONFIG_CMC_ADDR):$(srctree)/board/$(BOARDDIR)/$(CONFIG_CMC_FILE) endif
-ifneq ($(CONFIG_X86_OPTION_ROM_ADDR),) -IFDTOOL_FLAGS += -w $(CONFIG_X86_OPTION_ROM_ADDR):$(srctree)/board/$(BOARDDIR)/$(CONFIG_X86_OPTION_ROM_FILE) +ifneq ($(CONFIG_HAVE_VGA_BIOS),) +IFDTOOL_FLAGS += -w $(CONFIG_VGA_BIOS_ADDR):$(srctree)/board/$(BOARDDIR)/$(CONFIG_VGA_BIOS_FILE) endif
quiet_cmd_ifdtool = IFDTOOL $@ diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig index 6b46ec4..0e308ce 100644 --- a/arch/x86/Kconfig +++ b/arch/x86/Kconfig @@ -293,6 +293,28 @@ config TSC_FREQ_IN_MHZ help The running frequency in MHz of Time-Stamp Counter (TSC).
+config HAVE_VGA_BIOS + bool "Add a VGA BIOS image" + help + Select this option if you have a VGA BIOS image that you would + like to add to your ROM. + +config VGA_BIOS_FILE + string "VGA BIOS image filename" + depends on HAVE_VGA_BIOS + default "vga.bin" + help + The filename of the VGA BIOS image in the board directory. + +config VGA_BIOS_ADDR + hex "VGA BIOS image location" + depends on HAVE_VGA_BIOS + default 0xfff90000 + help + The location of VGA BIOS image in the SPI flash. For example, base + address of 0xfff90000 indicates that the image will be put at offset + 0x90000 from the beginning of a 1MB flash device. + menu "System tables"
config GENERATE_PIRQ_TABLE diff --git a/configs/chromebook_link_defconfig b/configs/chromebook_link_defconfig index 4f7f779..08743f0 100644 --- a/configs/chromebook_link_defconfig +++ b/configs/chromebook_link_defconfig @@ -3,6 +3,7 @@ CONFIG_VENDOR_GOOGLE=y CONFIG_DEFAULT_DEVICE_TREE="chromebook_link" CONFIG_TARGET_CHROMEBOOK_LINK=y CONFIG_HAVE_MRC=y +CONFIG_HAVE_VGA_BIOS=y CONFIG_FRAMEBUFFER_SET_VESA_MODE=y CONFIG_FRAMEBUFFER_VESA_MODE_11A=y CONFIG_CMD_NET=y diff --git a/configs/chromebox_panther_defconfig b/configs/chromebox_panther_defconfig index 941033f..9cd422a 100644 --- a/configs/chromebox_panther_defconfig +++ b/configs/chromebox_panther_defconfig @@ -3,6 +3,7 @@ CONFIG_VENDOR_GOOGLE=y CONFIG_DEFAULT_DEVICE_TREE="chromebox_panther" CONFIG_TARGET_CHROMEBOX_PANTHER=y CONFIG_HAVE_MRC=y +CONFIG_HAVE_VGA_BIOS=y CONFIG_FRAMEBUFFER_SET_VESA_MODE=y CONFIG_FRAMEBUFFER_VESA_MODE_11A=y CONFIG_CMD_NET=y diff --git a/configs/minnowmax_defconfig b/configs/minnowmax_defconfig index 744aca3..bfe2cdf 100644 --- a/configs/minnowmax_defconfig +++ b/configs/minnowmax_defconfig @@ -3,6 +3,7 @@ CONFIG_VENDOR_INTEL=y CONFIG_DEFAULT_DEVICE_TREE="minnowmax" CONFIG_TARGET_MINNOWMAX=y CONFIG_HAVE_INTEL_ME=y +CONFIG_HAVE_VGA_BIOS=y CONFIG_VIDEO_VESA=y CONFIG_FRAMEBUFFER_SET_VESA_MODE=y CONFIG_FRAMEBUFFER_VESA_MODE_11A=y diff --git a/doc/README.x86 b/doc/README.x86 index 49d6e83..7f3914f 100644 --- a/doc/README.x86 +++ b/doc/README.x86 @@ -79,7 +79,7 @@ Find the following files: * ./northbridge/intel/sandybridge/systemagent-r6.bin
The 3rd one should be renamed to mrc.bin. -As for the video ROM, you can get it here [3]. +As for the video ROM, you can get it here [3] and rename it to vga.bin. Make sure all these binary blobs are put in the board directory.
Now you can build U-Boot and obtain u-boot.rom: diff --git a/drivers/pci/pci_rom.c b/drivers/pci/pci_rom.c index 83c69a5..4a91033 100644 --- a/drivers/pci/pci_rom.c +++ b/drivers/pci/pci_rom.c @@ -79,8 +79,8 @@ static int pci_rom_probe(pci_dev_t dev, uint class, if (vendev != mapped_vendev) debug("Device ID mapped to %#08x\n", mapped_vendev);
-#ifdef CONFIG_X86_OPTION_ROM_ADDR - rom_address = CONFIG_X86_OPTION_ROM_ADDR; +#ifdef CONFIG_VGA_BIOS_ADDR + rom_address = CONFIG_VGA_BIOS_ADDR; #else
pci_read_config_dword(dev, PCI_ROM_ADDRESS, &rom_address); @@ -103,7 +103,7 @@ static int pci_rom_probe(pci_dev_t dev, uint class, if (le16_to_cpu(rom_header->signature) != PCI_ROM_HDR) { printf("Incorrect expansion ROM header signature %04x\n", le16_to_cpu(rom_header->signature)); -#ifndef CONFIG_X86_OPTION_ROM_ADDR +#ifndef CONFIG_VGA_BIOS_ADDR /* Disable expansion ROM address decoding */ pci_write_config_dword(dev, PCI_ROM_ADDRESS, rom_address); #endif diff --git a/include/configs/minnowmax.h b/include/configs/minnowmax.h index 547765d..8ee84a6 100644 --- a/include/configs/minnowmax.h +++ b/include/configs/minnowmax.h @@ -52,9 +52,6 @@ #undef CONFIG_USB_MAX_CONTROLLER_COUNT #define CONFIG_USB_MAX_CONTROLLER_COUNT 1
-#define CONFIG_X86_OPTION_ROM_FILE vga.bin -#define CONFIG_X86_OPTION_ROM_ADDR 0xfff90000 - #define VIDEO_IO_OFFSET 0 #define CONFIG_X86EMU_RAW_IO #define CONFIG_VGA_AS_SINGLE_DEVICE diff --git a/include/configs/x86-chromebook.h b/include/configs/x86-chromebook.h index e0e7fca..408cbb1 100644 --- a/include/configs/x86-chromebook.h +++ b/include/configs/x86-chromebook.h @@ -26,9 +26,6 @@ {PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_PANTHERPOINT_AHCI_MOBILE}, \ {PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_LYNXPOINT_AHCI}
-#define CONFIG_X86_OPTION_ROM_FILE pci8086,0166.bin -#define CONFIG_X86_OPTION_ROM_ADDR 0xfff90000 - #define CONFIG_PCI_MEM_BUS 0xe0000000 #define CONFIG_PCI_MEM_PHYS CONFIG_PCI_MEM_BUS #define CONFIG_PCI_MEM_SIZE 0x10000000
Hi Bin,
On 1 July 2015 at 02:28, Bin Meng bmeng.cn@gmail.com wrote:
Move X86_OPTION_ROM_FILE & X86_OPTION_ROM_ADDR to arch/x86/Kconfig and rename them to VGA_BIOS_FILE & VGA_BIOS_ADDR which depend on HAVE_VGA_BIOS. The new names are consistent with other x86 binary blob options like HAVE_FSP/FSP_FILE/FSP_ADDR.
Signed-off-by: Bin Meng bmeng.cn@gmail.com
Makefile | 4 ++-- arch/x86/Kconfig | 22 ++++++++++++++++++++++ configs/chromebook_link_defconfig | 1 + configs/chromebox_panther_defconfig | 1 + configs/minnowmax_defconfig | 1 + doc/README.x86 | 2 +- drivers/pci/pci_rom.c | 6 +++--- include/configs/minnowmax.h | 3 --- include/configs/x86-chromebook.h | 3 --- 9 files changed, 31 insertions(+), 12 deletions(-)
It's good to move these to Kconfig. But why should we rename it from option ROM to VGA ROM? Is it not possible that we might want to run some other ROM?
[snip]
Regards, Simon
Hi Simon,
On Wed, Jul 1, 2015 at 10:59 PM, Simon Glass sjg@chromium.org wrote:
Hi Bin,
On 1 July 2015 at 02:28, Bin Meng bmeng.cn@gmail.com wrote:
Move X86_OPTION_ROM_FILE & X86_OPTION_ROM_ADDR to arch/x86/Kconfig and rename them to VGA_BIOS_FILE & VGA_BIOS_ADDR which depend on HAVE_VGA_BIOS. The new names are consistent with other x86 binary blob options like HAVE_FSP/FSP_FILE/FSP_ADDR.
Signed-off-by: Bin Meng bmeng.cn@gmail.com
Makefile | 4 ++-- arch/x86/Kconfig | 22 ++++++++++++++++++++++ configs/chromebook_link_defconfig | 1 + configs/chromebox_panther_defconfig | 1 + configs/minnowmax_defconfig | 1 + doc/README.x86 | 2 +- drivers/pci/pci_rom.c | 6 +++--- include/configs/minnowmax.h | 3 --- include/configs/x86-chromebook.h | 3 --- 9 files changed, 31 insertions(+), 12 deletions(-)
It's good to move these to Kconfig. But why should we rename it from option ROM to VGA ROM? Is it not possible that we might want to run some other ROM?
I think the only ROM we want to support in U-Boot is VGA, so I changed it to specifically mention VGA. There are other two typical type of ROMs, PXE ROM for network boot and AHCI ROM for disk read/write which U-Boot has native drivers to do that. Besides, I suspect current bios interrupts codes could handle PXE ROM or AHCI ROM call correctly as they were written for VBE calls.
[snip]
Regards, Bin
Hi Bin,
On 1 July 2015 at 18:12, Bin Meng bmeng.cn@gmail.com wrote:
Hi Simon,
On Wed, Jul 1, 2015 at 10:59 PM, Simon Glass sjg@chromium.org wrote:
Hi Bin,
On 1 July 2015 at 02:28, Bin Meng bmeng.cn@gmail.com wrote:
Move X86_OPTION_ROM_FILE & X86_OPTION_ROM_ADDR to arch/x86/Kconfig and rename them to VGA_BIOS_FILE & VGA_BIOS_ADDR which depend on HAVE_VGA_BIOS. The new names are consistent with other x86 binary blob options like HAVE_FSP/FSP_FILE/FSP_ADDR.
Signed-off-by: Bin Meng bmeng.cn@gmail.com
Makefile | 4 ++-- arch/x86/Kconfig | 22 ++++++++++++++++++++++ configs/chromebook_link_defconfig | 1 + configs/chromebox_panther_defconfig | 1 + configs/minnowmax_defconfig | 1 + doc/README.x86 | 2 +- drivers/pci/pci_rom.c | 6 +++--- include/configs/minnowmax.h | 3 --- include/configs/x86-chromebook.h | 3 --- 9 files changed, 31 insertions(+), 12 deletions(-)
It's good to move these to Kconfig. But why should we rename it from option ROM to VGA ROM? Is it not possible that we might want to run some other ROM?
I think the only ROM we want to support in U-Boot is VGA, so I changed it to specifically mention VGA. There are other two typical type of ROMs, PXE ROM for network boot and AHCI ROM for disk read/write which U-Boot has native drivers to do that. Besides, I suspect current bios interrupts codes could handle PXE ROM or AHCI ROM call correctly as they were written for VBE calls.
OK, sounds reasonable. We could generalise later if such supported becomes needed. But it sounds unlikely from what you are saying.
Acked-by: Simon Glass sjg@chromium.org
Regards, Simon
participants (2)
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Bin Meng -
Simon Glass