This synchronizes linux/err.h with Linux 5.10. Notably, this adds PTR_ERR_OR_ZERO.

Signed-off-by: Sean Anderson seanga2@gmail.com ---

include/linux/err.h | 21 +++++++++++++++------ 1 file changed, 15 insertions(+), 6 deletions(-)

diff --git a/include/linux/err.h b/include/linux/err.h index 5ede82432d..06a80f9f29 100644 --- a/include/linux/err.h +++ b/include/linux/err.h @@ -1,3 +1,4 @@ +/* SPDX-License-Identifier: GPL-2.0 */ #ifndef _LINUX_ERR_H #define _LINUX_ERR_H

@@ -9,7 +10,7 @@

/* * Kernel pointers have redundant information, so we can use a - * scheme where we can return either an error code or a dentry + * scheme where we can return either an error code or a normal * pointer with the same return value. * * This should be a per-architecture thing, to allow different @@ -21,24 +22,24 @@

#define IS_ERR_VALUE(x) unlikely((x) >= (unsigned long)-MAX_ERRNO)

-static inline void *ERR_PTR(long error) +static inline void * __must_check ERR_PTR(long error) { return (void *)(CONFIG_ERR_PTR_OFFSET + error); }

-static inline long PTR_ERR(const void *ptr) +static inline long __must_check PTR_ERR(__force const void *ptr) { return ((long)ptr - CONFIG_ERR_PTR_OFFSET); }

-static inline long IS_ERR(const void *ptr) +static inline bool __must_check IS_ERR(__force const void *ptr) { return IS_ERR_VALUE((unsigned long)PTR_ERR(ptr)); }

-static inline bool IS_ERR_OR_NULL(const void *ptr) +static inline bool __must_check IS_ERR_OR_NULL(__force const void *ptr) { - return !ptr || IS_ERR_VALUE((unsigned long)PTR_ERR(ptr)); + return unlikely(!ptr) || IS_ERR_VALUE((unsigned long)ptr); }

/** @@ -54,6 +55,14 @@ static inline void * __must_check ERR_CAST(__force const void *ptr) return (void *) ptr; }

+static inline int __must_check PTR_ERR_OR_ZERO(__force const void *ptr) +{ + if (IS_ERR(ptr)) + return PTR_ERR(ptr); + else + return 0; +} + #endif

#endif /* _LINUX_ERR_H */

This adds the dirmap API originally introduced in Linux commit aa167f3fed0c ("spi: spi-mem: Add a new API to support direct mapping"). This also includes several follow-up patches and fixes.

Changes from Linux include: * Added Kconfig option * Changed struct device to struct udevice * Changed struct spi_mem to struct spi_slave

Signed-off-by: Sean Anderson seanga2@gmail.com ---

drivers/spi/Kconfig | 10 ++ drivers/spi/spi-mem.c | 270 ++++++++++++++++++++++++++++++++++++++++++ include/spi-mem.h | 99 ++++++++++++++++ 3 files changed, 379 insertions(+)

diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig index 1494c91763..9663b20c74 100644 --- a/drivers/spi/Kconfig +++ b/drivers/spi/Kconfig @@ -40,6 +40,16 @@ config SPI_MEM This extension is meant to simplify interaction with SPI memories by providing an high-level interface to send memory-like commands.

+config SPI_DIRMAP + bool "SPI direct mapping" + depends on SPI_MEM + help + Enable the SPI direct mapping API. Most modern SPI controllers can + directly map a SPI memory (or a portion of the SPI memory) in the CPU + address space. Most of the time this brings significant performance + improvements as it automates the whole process of sending SPI memory + operations every time a new region is accessed. + if DM_SPI

config ALTERA_SPI diff --git a/drivers/spi/spi-mem.c b/drivers/spi/spi-mem.c index 6772367ef7..597cd63c00 100644 --- a/drivers/spi/spi-mem.c +++ b/drivers/spi/spi-mem.c @@ -21,6 +21,8 @@ #include <spi.h> #include <spi-mem.h> #include <dm/device_compat.h> +#include <dm/devres.h> +#include <linux/bug.h> #endif

#ifndef __UBOOT__ @@ -468,6 +470,274 @@ int spi_mem_adjust_op_size(struct spi_slave *slave, struct spi_mem_op *op) } EXPORT_SYMBOL_GPL(spi_mem_adjust_op_size);

+#if CONFIG_IS_ENABLED(SPI_DIRMAP) +static ssize_t spi_mem_no_dirmap_read(struct spi_mem_dirmap_desc *desc, + u64 offs, size_t len, void *buf) +{ + struct spi_mem_op op = desc->info.op_tmpl; + int ret; + + op.addr.val = desc->info.offset + offs; + op.data.buf.in = buf; + op.data.nbytes = len; + ret = spi_mem_adjust_op_size(desc->slave, &op); + if (ret) + return ret; + + ret = spi_mem_exec_op(desc->slave, &op); + if (ret) + return ret; + + return op.data.nbytes; +} + +static ssize_t spi_mem_no_dirmap_write(struct spi_mem_dirmap_desc *desc, + u64 offs, size_t len, const void *buf) +{ + struct spi_mem_op op = desc->info.op_tmpl; + int ret; + + op.addr.val = desc->info.offset + offs; + op.data.buf.out = buf; + op.data.nbytes = len; + ret = spi_mem_adjust_op_size(desc->slave, &op); + if (ret) + return ret; + + ret = spi_mem_exec_op(desc->slave, &op); + if (ret) + return ret; + + return op.data.nbytes; +} + +/** + * spi_mem_dirmap_create() - Create a direct mapping descriptor + * @mem: SPI mem device this direct mapping should be created for + * @info: direct mapping information + * + * This function is creating a direct mapping descriptor which can then be used + * to access the memory using spi_mem_dirmap_read() or spi_mem_dirmap_write(). + * If the SPI controller driver does not support direct mapping, this function + * falls back to an implementation using spi_mem_exec_op(), so that the caller + * doesn't have to bother implementing a fallback on his own. + * + * Return: a valid pointer in case of success, and ERR_PTR() otherwise. + */ +struct spi_mem_dirmap_desc * +spi_mem_dirmap_create(struct spi_slave *slave, + const struct spi_mem_dirmap_info *info) +{ + struct udevice *bus = slave->dev->parent; + struct dm_spi_ops *ops = spi_get_ops(bus); + struct spi_mem_dirmap_desc *desc; + int ret = -ENOTSUPP; + + /* Make sure the number of address cycles is between 1 and 8 bytes. */ + if (!info->op_tmpl.addr.nbytes || info->op_tmpl.addr.nbytes > 8) + return ERR_PTR(-EINVAL); + + /* data.dir should either be SPI_MEM_DATA_IN or SPI_MEM_DATA_OUT. */ + if (info->op_tmpl.data.dir == SPI_MEM_NO_DATA) + return ERR_PTR(-EINVAL); + + desc = kzalloc(sizeof(*desc), GFP_KERNEL); + if (!desc) + return ERR_PTR(-ENOMEM); + + desc->slave = slave; + desc->info = *info; + if (ops->mem_ops && ops->mem_ops->dirmap_create) + ret = ops->mem_ops->dirmap_create(desc); + + if (ret) { + desc->nodirmap = true; + if (!spi_mem_supports_op(desc->slave, &desc->info.op_tmpl)) + ret = -ENOTSUPP; + else + ret = 0; + } + + if (ret) { + kfree(desc); + return ERR_PTR(ret); + } + + return desc; +} +EXPORT_SYMBOL_GPL(spi_mem_dirmap_create); + +/** + * spi_mem_dirmap_destroy() - Destroy a direct mapping descriptor + * @desc: the direct mapping descriptor to destroy + * + * This function destroys a direct mapping descriptor previously created by + * spi_mem_dirmap_create(). + */ +void spi_mem_dirmap_destroy(struct spi_mem_dirmap_desc *desc) +{ + struct udevice *bus = desc->slave->dev->parent; + struct dm_spi_ops *ops = spi_get_ops(bus); + + if (!desc->nodirmap && ops->mem_ops && ops->mem_ops->dirmap_destroy) + ops->mem_ops->dirmap_destroy(desc); + + kfree(desc); +} +EXPORT_SYMBOL_GPL(spi_mem_dirmap_destroy); + +#ifndef __UBOOT__ +static void devm_spi_mem_dirmap_release(struct udevice *dev, void *res) +{ + struct spi_mem_dirmap_desc *desc = *(struct spi_mem_dirmap_desc **)res; + + spi_mem_dirmap_destroy(desc); +} + +/** + * devm_spi_mem_dirmap_create() - Create a direct mapping descriptor and attach + * it to a device + * @dev: device the dirmap desc will be attached to + * @mem: SPI mem device this direct mapping should be created for + * @info: direct mapping information + * + * devm_ variant of the spi_mem_dirmap_create() function. See + * spi_mem_dirmap_create() for more details. + * + * Return: a valid pointer in case of success, and ERR_PTR() otherwise. + */ +struct spi_mem_dirmap_desc * +devm_spi_mem_dirmap_create(struct udevice *dev, struct spi_slave *slave, + const struct spi_mem_dirmap_info *info) +{ + struct spi_mem_dirmap_desc **ptr, *desc; + + ptr = devres_alloc(devm_spi_mem_dirmap_release, sizeof(*ptr), + GFP_KERNEL); + if (!ptr) + return ERR_PTR(-ENOMEM); + + desc = spi_mem_dirmap_create(slave, info); + if (IS_ERR(desc)) { + devres_free(ptr); + } else { + *ptr = desc; + devres_add(dev, ptr); + } + + return desc; +} +EXPORT_SYMBOL_GPL(devm_spi_mem_dirmap_create); + +static int devm_spi_mem_dirmap_match(struct udevice *dev, void *res, void *data) +{ + struct spi_mem_dirmap_desc **ptr = res; + + if (WARN_ON(!ptr || !*ptr)) + return 0; + + return *ptr == data; +} + +/** + * devm_spi_mem_dirmap_destroy() - Destroy a direct mapping descriptor attached + * to a device + * @dev: device the dirmap desc is attached to + * @desc: the direct mapping descriptor to destroy + * + * devm_ variant of the spi_mem_dirmap_destroy() function. See + * spi_mem_dirmap_destroy() for more details. + */ +void devm_spi_mem_dirmap_destroy(struct udevice *dev, + struct spi_mem_dirmap_desc *desc) +{ + devres_release(dev, devm_spi_mem_dirmap_release, + devm_spi_mem_dirmap_match, desc); +} +EXPORT_SYMBOL_GPL(devm_spi_mem_dirmap_destroy); +#endif /* __UBOOT__ */ + +/** + * spi_mem_dirmap_read() - Read data through a direct mapping + * @desc: direct mapping descriptor + * @offs: offset to start reading from. Note that this is not an absolute + * offset, but the offset within the direct mapping which already has + * its own offset + * @len: length in bytes + * @buf: destination buffer. This buffer must be DMA-able + * + * This function reads data from a memory device using a direct mapping + * previously instantiated with spi_mem_dirmap_create(). + * + * Return: the amount of data read from the memory device or a negative error + * code. Note that the returned size might be smaller than @len, and the caller + * is responsible for calling spi_mem_dirmap_read() again when that happens. + */ +ssize_t spi_mem_dirmap_read(struct spi_mem_dirmap_desc *desc, + u64 offs, size_t len, void *buf) +{ + struct udevice *bus = desc->slave->dev->parent; + struct dm_spi_ops *ops = spi_get_ops(bus); + ssize_t ret; + + if (desc->info.op_tmpl.data.dir != SPI_MEM_DATA_IN) + return -EINVAL; + + if (!len) + return 0; + + if (desc->nodirmap) + ret = spi_mem_no_dirmap_read(desc, offs, len, buf); + else if (ops->mem_ops && ops->mem_ops->dirmap_read) + ret = ops->mem_ops->dirmap_read(desc, offs, len, buf); + else + ret = -ENOTSUPP; + + return ret; +} +EXPORT_SYMBOL_GPL(spi_mem_dirmap_read); + +/** + * spi_mem_dirmap_write() - Write data through a direct mapping + * @desc: direct mapping descriptor + * @offs: offset to start writing from. Note that this is not an absolute + * offset, but the offset within the direct mapping which already has + * its own offset + * @len: length in bytes + * @buf: source buffer. This buffer must be DMA-able + * + * This function writes data to a memory device using a direct mapping + * previously instantiated with spi_mem_dirmap_create(). + * + * Return: the amount of data written to the memory device or a negative error + * code. Note that the returned size might be smaller than @len, and the caller + * is responsible for calling spi_mem_dirmap_write() again when that happens. + */ +ssize_t spi_mem_dirmap_write(struct spi_mem_dirmap_desc *desc, + u64 offs, size_t len, const void *buf) +{ + struct udevice *bus = desc->slave->dev->parent; + struct dm_spi_ops *ops = spi_get_ops(bus); + ssize_t ret; + + if (desc->info.op_tmpl.data.dir != SPI_MEM_DATA_OUT) + return -EINVAL; + + if (!len) + return 0; + + if (desc->nodirmap) + ret = spi_mem_no_dirmap_write(desc, offs, len, buf); + else if (ops->mem_ops && ops->mem_ops->dirmap_write) + ret = ops->mem_ops->dirmap_write(desc, offs, len, buf); + else + ret = -ENOTSUPP; + + return ret; +} +EXPORT_SYMBOL_GPL(spi_mem_dirmap_write); +#endif /* CONFIG_SPI_DIRMAP */ + #ifndef __UBOOT__ static inline struct spi_mem_driver *to_spi_mem_drv(struct device_driver *drv) { diff --git a/include/spi-mem.h b/include/spi-mem.h index 1dd556b6cf..d0a247cffc 100644 --- a/include/spi-mem.h +++ b/include/spi-mem.h @@ -123,6 +123,49 @@ struct spi_mem_op { .data = __data, \ }

+/** + * struct spi_mem_dirmap_info - Direct mapping information + * @op_tmpl: operation template that should be used by the direct mapping when + * the memory device is accessed + * @offset: absolute offset this direct mapping is pointing to + * @length: length in byte of this direct mapping + * + * These information are used by the controller specific implementation to know + * the portion of memory that is directly mapped and the spi_mem_op that should + * be used to access the device. + * A direct mapping is only valid for one direction (read or write) and this + * direction is directly encoded in the ->op_tmpl.data.dir field. + */ +struct spi_mem_dirmap_info { + struct spi_mem_op op_tmpl; + u64 offset; + u64 length; +}; + +/** + * struct spi_mem_dirmap_desc - Direct mapping descriptor + * @mem: the SPI memory device this direct mapping is attached to + * @info: information passed at direct mapping creation time + * @nodirmap: set to 1 if the SPI controller does not implement + * ->mem_ops->dirmap_create() or when this function returned an + * error. If @nodirmap is true, all spi_mem_dirmap_{read,write}() + * calls will use spi_mem_exec_op() to access the memory. This is a + * degraded mode that allows spi_mem drivers to use the same code + * no matter whether the controller supports direct mapping or not + * @priv: field pointing to controller specific data + * + * Common part of a direct mapping descriptor. This object is created by + * spi_mem_dirmap_create() and controller implementation of ->create_dirmap() + * can create/attach direct mapping resources to the descriptor in the ->priv + * field. + */ +struct spi_mem_dirmap_desc { + struct spi_slave *slave; + struct spi_mem_dirmap_info info; + unsigned int nodirmap; + void *priv; +}; + #ifndef __UBOOT__ /** * struct spi_mem - describes a SPI memory device @@ -171,10 +214,32 @@ static inline void *spi_mem_get_drvdata(struct spi_mem *mem) * limitations) * @supports_op: check if an operation is supported by the controller * @exec_op: execute a SPI memory operation + * @dirmap_create: create a direct mapping descriptor that can later be used to + * access the memory device. This method is optional + * @dirmap_destroy: destroy a memory descriptor previous created by + * ->dirmap_create() + * @dirmap_read: read data from the memory device using the direct mapping + * created by ->dirmap_create(). The function can return less + * data than requested (for example when the request is crossing + * the currently mapped area), and the caller of + * spi_mem_dirmap_read() is responsible for calling it again in + * this case. + * @dirmap_write: write data to the memory device using the direct mapping + * created by ->dirmap_create(). The function can return less + * data than requested (for example when the request is crossing + * the currently mapped area), and the caller of + * spi_mem_dirmap_write() is responsible for calling it again in + * this case. * * This interface should be implemented by SPI controllers providing an * high-level interface to execute SPI memory operation, which is usually the * case for QSPI controllers. + * + * Note on ->dirmap_{read,write}(): drivers should avoid accessing the direct + * mapping from the CPU because doing that can stall the CPU waiting for the + * SPI mem transaction to finish, and this will make real-time maintainers + * unhappy and might make your system less reactive. Instead, drivers should + * use DMA to access this direct mapping. */ struct spi_controller_mem_ops { int (*adjust_op_size)(struct spi_slave *slave, struct spi_mem_op *op); @@ -182,6 +247,12 @@ struct spi_controller_mem_ops { const struct spi_mem_op *op); int (*exec_op)(struct spi_slave *slave, const struct spi_mem_op *op); + int (*dirmap_create)(struct spi_mem_dirmap_desc *desc); + void (*dirmap_destroy)(struct spi_mem_dirmap_desc *desc); + ssize_t (*dirmap_read)(struct spi_mem_dirmap_desc *desc, + u64 offs, size_t len, void *buf); + ssize_t (*dirmap_write)(struct spi_mem_dirmap_desc *desc, + u64 offs, size_t len, const void *buf); };

#ifndef __UBOOT__ @@ -243,6 +314,34 @@ bool spi_mem_supports_op(struct spi_slave *slave, const struct spi_mem_op *op);

int spi_mem_exec_op(struct spi_slave *slave, const struct spi_mem_op *op);

+#if CONFIG_IS_ENABLED(SPI_DIRMAP) +struct spi_mem_dirmap_desc * +spi_mem_dirmap_create(struct spi_slave *mem, + const struct spi_mem_dirmap_info *info); +void spi_mem_dirmap_destroy(struct spi_mem_dirmap_desc *desc); +ssize_t spi_mem_dirmap_read(struct spi_mem_dirmap_desc *desc, + u64 offs, size_t len, void *buf); +ssize_t spi_mem_dirmap_write(struct spi_mem_dirmap_desc *desc, + u64 offs, size_t len, const void *buf); +#else +static inline void spi_mem_dirmap_destroy(struct spi_mem_dirmap_desc *desc) +{ +} + +static inline ssize_t spi_mem_dirmap_read(struct spi_mem_dirmap_desc *desc, + u64 offs, size_t len, void *buf) +{ + return -ENOTSUPP; +} + +static inline ssize_t spi_mem_dirmap_write(struct spi_mem_dirmap_desc *desc, + u64 offs, size_t len, + const void *buf) +{ + return -ENOTSUPP; +} +#endif /* CONFIG_SPI_DIRMAP */ + #ifndef __UBOOT__ int spi_mem_driver_register_with_owner(struct spi_mem_driver *drv, struct module *owner);

The documentation for dev_read_u32_array says the return value is an errno, but fdtdec_get_int_array returns FDT_ERRs. Convert the return values so callers can handle errors properly.

Signed-off-by: Sean Anderson seanga2@gmail.com ---

drivers/core/ofnode.c | 15 ++++++++++++--- 1 file changed, 12 insertions(+), 3 deletions(-)

diff --git a/drivers/core/ofnode.c b/drivers/core/ofnode.c index 7a5f4c0a73..c071b968d5 100644 --- a/drivers/core/ofnode.c +++ b/drivers/core/ofnode.c @@ -220,9 +220,18 @@ int ofnode_read_u32_array(ofnode node, const char *propname, return of_read_u32_array(ofnode_to_np(node), propname, out_values, sz); } else { - return fdtdec_get_int_array(gd->fdt_blob, - ofnode_to_offset(node), propname, - out_values, sz); + int err = fdtdec_get_int_array(gd->fdt_blob, + ofnode_to_offset(node), propname, + out_values, sz); + + switch (err) { + case FDT_ERR_NOTFOUND: + return -EINVAL; + case FDT_ERR_BADLAYOUT: + return -EOVERFLOW; + default: + return 0; + } } }

This prevents multiple-definition errors.

Fixes: 0ad40b2463 ("drivers: Add a new framework for multiplexer devices")

Signed-off-by: Sean Anderson seanga2@gmail.com ---

include/mux.h | 19 ++++++++++--------- 1 file changed, 10 insertions(+), 9 deletions(-)

diff --git a/include/mux.h b/include/mux.h index 23844f480a..91a89bbb9a 100644 --- a/include/mux.h +++ b/include/mux.h @@ -117,40 +117,41 @@ struct mux_control *devm_mux_control_get(struct udevice *dev, int dm_mux_init(void);

#else -unsigned int mux_control_states(struct mux_control *mux) +static inline unsigned int mux_control_states(struct mux_control *mux) { return -ENOSYS; }

-int __must_check mux_control_select(struct mux_control *mux, - unsigned int state) +static inline int __must_check mux_control_select(struct mux_control *mux, + unsigned int state) { return -ENOSYS; }

#define mux_control_try_select(mux) mux_control_select(mux)

-int mux_control_deselect(struct mux_control *mux) +static inline int mux_control_deselect(struct mux_control *mux) { return -ENOSYS; }

-struct mux_control *mux_control_get(struct udevice *dev, const char *mux_name) +static inline struct mux_control *mux_control_get(struct udevice *dev, + const char *mux_name) { return NULL; }

-void mux_control_put(struct mux_control *mux) +static inline void mux_control_put(struct mux_control *mux) { }

-struct mux_control *devm_mux_control_get(struct udevice *dev, - const char *mux_name) +static inline struct mux_control *devm_mux_control_get(struct udevice *dev, + const char *mux_name) { return NULL; }

-int dm_mux_init(void) +static inline int dm_mux_init(void) { return -ENOSYS; }

This allows code using mux_get_by_index to be agnostic about CONFIG_MUX.

Signed-off-by: Sean Anderson seanga2@gmail.com ---

include/mux.h | 6 ++++++ 1 file changed, 6 insertions(+)

diff --git a/include/mux.h b/include/mux.h index 91a89bbb9a..882a00068b 100644 --- a/include/mux.h +++ b/include/mux.h @@ -135,6 +135,12 @@ static inline int mux_control_deselect(struct mux_control *mux) return -ENOSYS; }

+static inline int mux_get_by_index(struct udevice *dev, int index, + struct mux_control **mux) +{ + return -ENOSYS; +} + static inline struct mux_control *mux_control_get(struct udevice *dev, const char *mux_name) {

idle-states is optional, so don't complain if it doesn't exist.

Signed-off-by: Sean Anderson seanga2@gmail.com ---

drivers/mux/mmio.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-)

diff --git a/drivers/mux/mmio.c b/drivers/mux/mmio.c index 00e0282dcc..82b1cc6aab 100644 --- a/drivers/mux/mmio.c +++ b/drivers/mux/mmio.c @@ -87,8 +87,11 @@ static int mmio_mux_probe(struct udevice *dev)

ret = dev_read_u32_array(dev, "idle-states", idle_states, num_fields); if (ret < 0) { - log_err("idle-states"); devm_kfree(dev, idle_states); + /* dev_read_u32_array returns -EINVAL on missing property */ + if (ret != -EINVAL) + return log_msg_ret("idle-states", -EINVAL); + idle_states = NULL; }

Both DW SSI APB and DWC SSI devices have an optional XIP mode. When the xip_en signal is asserted, reads (and writes if SSIC_XIP_WRITE_REG_EN is set) are mapped to SPI transfers.

If SSIC_CONCURRENT_XIP_EN is disabled, then XIP transfers are controlled using SPI_CTRLR0. However, if SSIC_CONCURRENT_XIP_EN is enabled, then XIP transfers can occur concurrently (first-come-first-serve) with non-XIP transfers. To facilitate this, a separate XIP_CTRL register is used for configuration which would otherwise by done using CTRLR0 and SPI_CTRLR0.

Signed-off-by: Sean Anderson seanga2@gmail.com ---

drivers/spi/designware_spi.c | 29 ++++++++++++++++++++++++++--- 1 file changed, 26 insertions(+), 3 deletions(-)

diff --git a/drivers/spi/designware_spi.c b/drivers/spi/designware_spi.c index d7510646e7..c41c5b4982 100644 --- a/drivers/spi/designware_spi.c +++ b/drivers/spi/designware_spi.c @@ -202,6 +202,7 @@ struct dw_spi_plat { s32 frequency; /* Default clock frequency, -1 for none */ void __iomem *regs; + fdt_size_t regs_size; };

struct dw_spi_priv { @@ -210,12 +211,15 @@ struct dw_spi_priv { struct gpio_desc cs_gpio; /* External chip-select gpio */

void __iomem *regs; + fdt_size_t regs_size; /* DW SPI capabilities */ #define DW_SPI_CAP_CS_OVERRIDE BIT(0) /* Unimplemented */ #define DW_SPI_CAP_KEEMBAY_MST BIT(1) /* Unimplemented */ #define DW_SPI_CAP_DWC_SSI BIT(2) #define DW_SPI_CAP_DFS32 BIT(3) #define DW_SPI_CAP_ENHANCED BIT(4) +#define DW_SPI_CAP_XIP BIT(5) +#define DW_SPI_CAP_XIP_CONCURRENT BIT(6) unsigned long caps; unsigned long bus_clk_rate; unsigned int freq; /* Default frequency */ @@ -322,11 +326,13 @@ static int request_gpio_cs(struct udevice *bus)

static int dw_spi_of_to_plat(struct udevice *bus) { + fdt_addr_t regs; struct dw_spi_plat *plat = dev_get_plat(bus);

- plat->regs = dev_read_addr_ptr(bus); - if (!plat->regs) + regs = dev_read_addr_size_index(bus, 0, &plat->regs_size); + if (regs == FDT_ADDR_T_NONE) return -EINVAL; + plat->regs = (void *)regs;

/* Use 500KHz as a suitable default */ plat->frequency = dev_read_u32_default(bus, "spi-max-frequency", @@ -375,6 +381,19 @@ static void spi_hw_init(struct udevice *bus, struct dw_spi_priv *priv) priv->caps |= DW_SPI_CAP_ENHANCED; }

+ /* + * DWC_SPI always has this register with SSIC_XIP_EN. There is no way + * to detect XIP for DW APB SSI + */ + dw_write(priv, DW_SPI_XIP_INCR_INST, 0xffffffff); + if (dw_read(priv, DW_SPI_XIP_INCR_INST)) + priv->caps |= DW_SPI_CAP_XIP; + + /* Exists with SSIC_CONCURRENT_XIP_EN */ + dw_write(priv, DW_SPI_XIP_CTRL, 0xffffffff); + if (dw_read(priv, DW_SPI_XIP_CTRL)) + priv->caps |= DW_SPI_CAP_XIP_CONCURRENT; + dw_write(priv, DW_SPI_SSIENR, 1);

/* @@ -469,6 +488,7 @@ static int dw_spi_probe(struct udevice *bus) u32 version;

priv->regs = plat->regs; + priv->regs_size = plat->regs_size; priv->freq = plat->frequency;

ret = dw_spi_get_clk(bus, &priv->bus_clk_rate); @@ -1022,7 +1042,10 @@ static const struct udevice_id dw_spi_ids[] = { */ { .compatible = "altr,socfpga-spi" }, { .compatible = "altr,socfpga-arria10-spi" }, - { .compatible = "canaan,kendryte-k210-spi" }, + { + .compatible = "canaan,kendryte-k210-spi", + .data = DW_SPI_CAP_XIP, + }, { .compatible = "canaan,kendryte-k210-ssi", .data = DW_SPI_CAP_DWC_SSI,

This adds support for XIP mode. It is not actually any faster than QPI (yet), but it serves as a good starting point for using XIP mode for other purposes (such as actual eXecuting In Place).

Signed-off-by: Sean Anderson seanga2@gmail.com ---

drivers/spi/designware_spi.c | 131 +++++++++++++++++++++++++++++++++++ 1 file changed, 131 insertions(+)

diff --git a/drivers/spi/designware_spi.c b/drivers/spi/designware_spi.c index 6f74a471e3..cb7a28c3bf 100644 --- a/drivers/spi/designware_spi.c +++ b/drivers/spi/designware_spi.c @@ -1056,10 +1056,141 @@ static int dw_spi_adjust_op_size(struct spi_slave *slave, struct spi_mem_op *op) return 0; }

+#if CONFIG_IS_ENABLED(SPI_DIRMAP) +static int dw_spi_dirmap_create(struct spi_mem_dirmap_desc *desc) +{ + struct dw_spi_priv *priv = dev_get_priv(desc->slave->dev->parent); + + /* + * Currently only DWC XIP is supported. DW APB SSI XIP exists, but + * cannot send an instruction before the address, so it is left for when + * U-Boot supports 0-X-X instructions. In addition, we only support + * concurrent XIP (since I have no non-condcurrent XIP hardware to test + * with) + */ + if (!(priv->caps & (DW_SPI_CAP_XIP)) || + !(priv->caps & (DW_SPI_CAP_DWC_SSI)) || + !(priv->caps & (DW_SPI_CAP_XIP_CONCURRENT))) + return -ENOTSUPP; + + if (!spi_mem_supports_op(desc->slave, &desc->info.op_tmpl)) + return -ENOTSUPP; + + /* + * Make sure the requested region doesn't go out of the physically + * mapped flash memory bounds and the operation is read-only. + */ + if (desc->info.offset + desc->info.length > priv->regs_size || + desc->info.op_tmpl.data.dir != SPI_MEM_DATA_IN) + return -ENOTSUPP; + + /* XIP only supports enhanced SPI modes */ + if (desc->info.op_tmpl.data.buswidth == 1) + return -ENOTSUPP; + + return 0; +} + +static u32 dw_spi_update_xip_cr(const struct spi_mem_op *op, uint frf) +{ + uint trans_type, wait_cycles; + + /* This assumes support_op has filtered invalid types */ + if (op->addr.buswidth == 1) + trans_type = TRANS_TYPE_1_1_X; + else if (op->cmd.buswidth == 1) + trans_type = TRANS_TYPE_1_X_X; + else + trans_type = TRANS_TYPE_X_X_X; + + if (op->dummy.buswidth) + wait_cycles = op->dummy.nbytes * 8 / op->dummy.buswidth; + else + wait_cycles = 0; + + return FIELD_PREP(XIP_CTRL_FRF, frf) + | FIELD_PREP(XIP_CTRL_TRANS_TYPE_MASK, trans_type) + | FIELD_PREP(XIP_CTRL_ADDR_L_MASK, op->addr.nbytes * 2) + | FIELD_PREP(XIP_CTRL_INST_L_MASK, INST_L_8) + | FIELD_PREP(XIP_CTRL_WAIT_CYCLES_MASK, wait_cycles) + //| XIP_CTRL_DFS_HC + | XIP_CTRL_INST_EN + | XIP_CTRL_CONT_XFER_EN + | XIP_CTRL_PREFETCH_EN; +} + +static ssize_t dw_spi_dirmap_read(struct spi_mem_dirmap_desc *desc, u64 offs, + size_t len, void *buf) +{ + int ret; + size_t count = len; + struct spi_slave *slave = desc->slave; + struct udevice *bus = slave->dev->parent; + struct dw_spi_priv *priv = dev_get_priv(bus); + struct spi_mem_op *op = &desc->info.op_tmpl; + u8 *from, *to; + + switch (op->data.buswidth) { + case 2: + priv->spi_frf = CTRLR0_SPI_FRF_DUAL; + break; + case 4: + priv->spi_frf = CTRLR0_SPI_FRF_QUAD; + break; + case 8: + priv->spi_frf = CTRLR0_SPI_FRF_OCTAL; + break; + default: + return -EINVAL; + } + + ret = dw_spi_mux_ctrl(bus); + if (ret) + return ret; + + dw_write(priv, DW_SPI_SSIENR, 0); + //dw_write(priv, DW_SPI_CTRLR0, dw_spi_update_cr0(priv)); + dw_write(priv, DW_SPI_XIP_CTRL, dw_spi_update_xip_cr(op, priv->spi_frf)); + dw_write(priv, DW_SPI_XIP_INCR_INST, op->cmd.opcode); + /* + * FIXME: U-Boot doesn't currently support wrap instructions, but we + * can't control what the AHB master does. Just write 0 to get something + * obviously bogus. + */ + dw_write(priv, DW_SPI_XIP_WRAP_INST, 0); + dw_write(priv, DW_SPI_XIP_SER, 1 << spi_chip_select(slave->dev)); + dw_write(priv, DW_SPI_SSIENR, 1); + + dw_spi_mux_deselect(bus); + + external_cs_manage(slave->dev, true); + + ret = dw_spi_mux_xip(bus); + if (ret) + return ret; + + //memcpy(buf, priv->regs + offs, len); + from = priv->regs + offs; + to = buf; + while (count--) + *to++ = *from++; + + dw_spi_mux_deselect(bus); + + external_cs_manage(slave->dev, false); + + return len; +} +#endif /* CONFIG_SPI_DIRMAP */ + static const struct spi_controller_mem_ops dw_spi_mem_ops = { .exec_op = dw_spi_exec_op, .supports_op = dw_spi_supports_op, .adjust_op_size = dw_spi_adjust_op_size, +#if CONFIG_IS_ENABLED(SPI_DIRMAP) + .dirmap_create = dw_spi_dirmap_create, + .dirmap_read = dw_spi_dirmap_read, +#endif };

static int dw_spi_set_speed(struct udevice *bus, uint speed)

On the K210, a register in sysctl controls whether accessing an SPI device has the xip_en signal set. Add the appropriate bindings.

Signed-off-by: Sean Anderson seanga2@gmail.com ---

arch/riscv/dts/k210.dtsi | 23 ++++++++++++++++++++--- 1 file changed, 20 insertions(+), 3 deletions(-)

diff --git a/arch/riscv/dts/k210.dtsi b/arch/riscv/dts/k210.dtsi index dac7c62289..aa1c53f09f 100644 --- a/arch/riscv/dts/k210.dtsi +++ b/arch/riscv/dts/k210.dtsi @@ -292,6 +292,8 @@ interrupts = <2>; clocks = <&sysclk K210_CLK_SPI2>; resets = <&sysrst K210_RST_SPI2>; + mux-controls = <&xip_mux 2>; + mux-xip-state = <1>; spi-max-frequency = <25000000>; status = "disabled"; }; @@ -530,6 +532,15 @@ mask = <1>; value = <1>; }; + + xip_mux: mux-controller { + compatible = "mmio-mux"; + #mux-control-cells = <1>; + mux-reg-masks = <K210_SYSCTL_PERI (1 << 12)>, + <K210_SYSCTL_PERI (1 << 13)>, + <K210_SYSCTL_PERI (1 << 14)>, + <K210_SYSCTL_PERI (1 << 15)>; + }; };

aes0: aes@50450000 { @@ -563,11 +574,13 @@ compatible = "canaan,kendryte-k210-spi", "snps,dw-apb-ssi-4.01", "snps,dw-apb-ssi"; - reg = <0x52000000 0x100>; + reg = <0x52000000 0x1000000>; interrupts = <1>; clocks = <&sysclk K210_CLK_SPI0>; clock-names = "ssi_clk"; resets = <&sysrst K210_RST_SPI0>; + mux-controls = <&xip_mux 0>; + mux-xip-state = <1>; spi-max-frequency = <25000000>; num-cs = <4>; reg-io-width = <4>; @@ -580,11 +593,13 @@ compatible = "canaan,kendryte-k210-spi", "snps,dw-apb-ssi-4.01", "snps,dw-apb-ssi"; - reg = <0x53000000 0x100>; + reg = <0x53000000 0x1000000>; interrupts = <2>; clocks = <&sysclk K210_CLK_SPI1>; clock-names = "ssi_clk"; resets = <&sysrst K210_RST_SPI1>; + mux-controls = <&xip_mux 1>; + mux-xip-state = <1>; spi-max-frequency = <25000000>; num-cs = <4>; reg-io-width = <4>; @@ -596,13 +611,15 @@ #size-cells = <0>; compatible = "canaan,kendryte-k210-ssi", "snps,dwc-ssi-1.01a"; - reg = <0x54000000 0x200>; + reg = <0x54000000 0x1000000>; interrupts = <4>; clocks = <&sysclk K210_CLK_SPI3>; clock-names = "ssi_clk"; assigned-clocks = <&sysclk K210_CLK_SPI3>; assigned-clock-rates = <390000000>; resets = <&sysrst K210_RST_SPI3>; + mux-controls = <&xip_mux 3>; + mux-xip-state = <1>; /* Could possibly go up to 200 MHz */ spi-max-frequency = <100000000>; num-cs = <4>;