[U-Boot] [PATCH] beagle: fix typos
From: Peter Meerwald p.meerwald@bct-electronic.com
Signed-off-by: Peter Meerwald p.meerwald@bct-electronic.com
--- board/ti/beagle/beagle.h | 4 ++-- 1 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/board/ti/beagle/beagle.h b/board/ti/beagle/beagle.h index 18bfaa8..c0a94a9 100644 --- a/board/ti/beagle/beagle.h +++ b/board/ti/beagle/beagle.h @@ -536,7 +536,7 @@ static const struct venc_regs venc_config_std_tv = { * Configure Timings for DVI D */ static const struct panel_config dvid_cfg = { - .timing_h = 0x0ff03f31, /* Horizantal timing */ + .timing_h = 0x0ff03f31, /* Horizontal timing */ .timing_v = 0x01400504, /* Vertical timing */ .pol_freq = 0x00007028, /* Pol Freq */ .divisor = 0x00010006, /* 72Mhz Pixel Clock */ @@ -548,7 +548,7 @@ static const struct panel_config dvid_cfg = { };
static const struct panel_config dvid_cfg_xm = { - .timing_h = 0x1a4024c9, /* Horizantal timing */ + .timing_h = 0x1a4024c9, /* Horizontal timing */ .timing_v = 0x02c00509, /* Vertical timing */ .pol_freq = 0x00007028, /* Pol Freq */ .divisor = 0x00010001, /* 96MHz Pixel Clock */
From: Peter Meerwald p.meerwald@bct-electronic.com
Signed-off-by: Peter Meerwald p.meerwald@bct-electronic.com
--- arch/arm/cpu/armv7/omap3/board.c | 4 ++-- 1 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm/cpu/armv7/omap3/board.c b/arch/arm/cpu/armv7/omap3/board.c index 871aa37..bdf676f 100644 --- a/arch/arm/cpu/armv7/omap3/board.c +++ b/arch/arm/cpu/armv7/omap3/board.c @@ -144,7 +144,7 @@ void secureworld_exit() { unsigned long i;
- /* configrue non-secure access control register */ + /* configure non-secure access control register */ __asm__ __volatile__("mrc p15, 0, %0, c1, c1, 2":"=r"(i)); /* enabling co-processor CP10 and CP11 accesses in NS world */ __asm__ __volatile__("orr %0, %0, #0xC00":"=r"(i)); @@ -389,7 +389,7 @@ static void omap3_setup_aux_cr(void) { /* Workaround for Cortex-A8 errata: #454179 #430973 * Set "IBE" bit - * Set "Disable Brach Size Mispredicts" bit + * Set "Disable Branch Size Mispredicts" bit * Workaround for erratum #621766 * Enable L1NEON bit * ACR |= (IBE | DBSM | L1NEON) => ACR |= 0xE0
From: Peter Meerwald p.meerwald@bct-electronic.com
Signed-off-by: Peter Meerwald p.meerwald@bct-electronic.com
--- doc/README.SPL | 4 ++-- 1 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/doc/README.SPL b/doc/README.SPL index f01a8bd..0276953 100644 --- a/doc/README.SPL +++ b/doc/README.SPL @@ -42,8 +42,8 @@ The building of SPL images can be with:
#define CONFIG_SPL
-Because SPL images normally have a different text base, one have to be -configured by defining CONFIG_SPL_TEXT_BASE. The linker script have to be +Because SPL images normally have a different text base, one has to be +configured by defining CONFIG_SPL_TEXT_BASE. The linker script has to be defined with CONFIG_SPL_LDSCRIPT.
To support generic U-Boot libraries and drivers in the SPL binary one can
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Peter Meerwald