[PATCH] arm: apple: t602x: Add missing MMIO regions to memmap
From: Janne Grunau j@jannau.net
The memory maps for Apple's M2 Pro/Max/Ultra left MMIO space out which was not used by any driver at the time. The display out exposed as simple-framebuffer use a power-domain controlled by a device in an unmapped region. Add a map covering this region as well as another MMIO region in the range 0x4'0000'0000 - 0x5'0000'0000. The added regions cover all MMIO annotated in Apple's device tree in this range.
Signed-off-by: Janne Grunau j@jannau.net --- arch/arm/mach-apple/board.c | 48 +++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 48 insertions(+)
diff --git a/arch/arm/mach-apple/board.c b/arch/arm/mach-apple/board.c index 47393babbc..e05ec431bc 100644 --- a/arch/arm/mach-apple/board.c +++ b/arch/arm/mach-apple/board.c @@ -370,6 +370,22 @@ static struct mm_region t6020_mem_map[] = { .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) | PTE_BLOCK_NON_SHARE | PTE_BLOCK_PXN | PTE_BLOCK_UXN + }, { + /* I/O */ + .virt = 0x400000000, + .phys = 0x400000000, + .size = SZ_512M, + .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) | + PTE_BLOCK_NON_SHARE | + PTE_BLOCK_PXN | PTE_BLOCK_UXN + }, { + /* I/O */ + .virt = 0x480000000, + .phys = 0x480000000, + .size = SZ_1G, + .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) | + PTE_BLOCK_NON_SHARE | + PTE_BLOCK_PXN | PTE_BLOCK_UXN }, { /* I/O */ .virt = 0x580000000, @@ -471,6 +487,22 @@ static struct mm_region t6022_mem_map[] = { .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) | PTE_BLOCK_NON_SHARE | PTE_BLOCK_PXN | PTE_BLOCK_UXN + }, { + /* I/O */ + .virt = 0x400000000, + .phys = 0x400000000, + .size = SZ_512M, + .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) | + PTE_BLOCK_NON_SHARE | + PTE_BLOCK_PXN | PTE_BLOCK_UXN + }, { + /* I/O */ + .virt = 0x480000000, + .phys = 0x480000000, + .size = SZ_1G, + .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) | + PTE_BLOCK_NON_SHARE | + PTE_BLOCK_PXN | PTE_BLOCK_UXN }, { /* I/O */ .virt = 0x580000000, @@ -551,6 +583,22 @@ static struct mm_region t6022_mem_map[] = { .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) | PTE_BLOCK_NON_SHARE | PTE_BLOCK_PXN | PTE_BLOCK_UXN + }, { + /* I/O */ + .virt = 0x2400000000, + .phys = 0x2400000000, + .size = SZ_512M, + .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) | + PTE_BLOCK_NON_SHARE | + PTE_BLOCK_PXN | PTE_BLOCK_UXN + }, { + /* I/O */ + .virt = 0x2480000000, + .phys = 0x2480000000, + .size = SZ_1G, + .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) | + PTE_BLOCK_NON_SHARE | + PTE_BLOCK_PXN | PTE_BLOCK_UXN }, { /* I/O */ .virt = 0x2580000000,
--- base-commit: 43f2873fa98b1da6eb56d756315c7bd7db63db27 change-id: 20231130-apple_t602x_extend_memmap-c82c522ca8c0
Best regards,
From: Janne Grunau via B4 Relay devnull+j.jannau.net@kernel.org Date: Thu, 30 Nov 2023 13:42:22 +0100
From: Janne Grunau j@jannau.net
The memory maps for Apple's M2 Pro/Max/Ultra left MMIO space out which was not used by any driver at the time. The display out exposed as simple-framebuffer use a power-domain controlled by a device in an unmapped region. Add a map covering this region as well as another MMIO region in the range 0x4'0000'0000 - 0x5'0000'0000. The added regions cover all MMIO annotated in Apple's device tree in this range.
Signed-off-by: Janne Grunau j@jannau.net
arch/arm/mach-apple/board.c | 48 +++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 48 insertions(+)
Hi Janne,
Is there a reason why you can't use a SZ_1G mapping for the blocks where you're using a SZ_512M mapping? With SZ_1G the mapping code will use a 1G block descriptor which avoids another level of page tables.
diff --git a/arch/arm/mach-apple/board.c b/arch/arm/mach-apple/board.c index 47393babbc..e05ec431bc 100644 --- a/arch/arm/mach-apple/board.c +++ b/arch/arm/mach-apple/board.c @@ -370,6 +370,22 @@ static struct mm_region t6020_mem_map[] = { .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) | PTE_BLOCK_NON_SHARE | PTE_BLOCK_PXN | PTE_BLOCK_UXN
- }, {
/* I/O */.virt = 0x400000000,.phys = 0x400000000,.size = SZ_512M,.attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |PTE_BLOCK_NON_SHARE |PTE_BLOCK_PXN | PTE_BLOCK_UXN- }, {
/* I/O */.virt = 0x480000000,.phys = 0x480000000,.size = SZ_1G,.attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |PTE_BLOCK_NON_SHARE |PTE_BLOCK_PXN | PTE_BLOCK_UXN@@ -471,6 +487,22 @@ static struct mm_region t6022_mem_map[] = { .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) | PTE_BLOCK_NON_SHARE | PTE_BLOCK_PXN | PTE_BLOCK_UXN
- }, {
/* I/O */.virt = 0x400000000,.phys = 0x400000000,.size = SZ_512M,.attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |PTE_BLOCK_NON_SHARE |PTE_BLOCK_PXN | PTE_BLOCK_UXN- }, {
/* I/O */.virt = 0x480000000,.phys = 0x480000000,.size = SZ_1G,.attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |PTE_BLOCK_NON_SHARE |PTE_BLOCK_PXN | PTE_BLOCK_UXN@@ -551,6 +583,22 @@ static struct mm_region t6022_mem_map[] = { .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) | PTE_BLOCK_NON_SHARE | PTE_BLOCK_PXN | PTE_BLOCK_UXN
- }, {
/* I/O */.virt = 0x2400000000,.phys = 0x2400000000,.size = SZ_512M,.attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |PTE_BLOCK_NON_SHARE |PTE_BLOCK_PXN | PTE_BLOCK_UXN- }, {
/* I/O */.virt = 0x2480000000,.phys = 0x2480000000,.size = SZ_1G,.attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |PTE_BLOCK_NON_SHARE |PTE_BLOCK_PXN | PTE_BLOCK_UXN
base-commit: 43f2873fa98b1da6eb56d756315c7bd7db63db27 change-id: 20231130-apple_t602x_extend_memmap-c82c522ca8c0
Best regards,
Janne Grunau j@jannau.net
Hej Mark,
On Thu, Nov 30, 2023, at 21:45, Mark Kettenis wrote:
From: Janne Grunau via B4 Relay devnull+j.jannau.net@kernel.org Date: Thu, 30 Nov 2023 13:42:22 +0100
From: Janne Grunau j@jannau.net
The memory maps for Apple's M2 Pro/Max/Ultra left MMIO space out which was not used by any driver at the time. The display out exposed as simple-framebuffer use a power-domain controlled by a device in an unmapped region. Add a map covering this region as well as another MMIO region in the range 0x4'0000'0000 - 0x5'0000'0000. The added regions cover all MMIO annotated in Apple's device tree in this range.
Signed-off-by: Janne Grunau j@jannau.net
arch/arm/mach-apple/board.c | 48 +++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 48 insertions(+)
Hi Janne,
Is there a reason why you can't use a SZ_1G mapping for the blocks where you're using a SZ_512M mapping? With SZ_1G the mapping code will use a 1G block descriptor which avoids another level of page tables.
no reason except that SZ_512M was sufficient to cover all devices in Apple DT. Shall I resend the patch?
Janne
Date: Thu, 30 Nov 2023 23:04:36 +0100 From: "Janne Grunau" j@jannau.net
Hej Mark,
On Thu, Nov 30, 2023, at 21:45, Mark Kettenis wrote:
From: Janne Grunau via B4 Relay devnull+j.jannau.net@kernel.org Date: Thu, 30 Nov 2023 13:42:22 +0100
From: Janne Grunau j@jannau.net
The memory maps for Apple's M2 Pro/Max/Ultra left MMIO space out which was not used by any driver at the time. The display out exposed as simple-framebuffer use a power-domain controlled by a device in an unmapped region. Add a map covering this region as well as another MMIO region in the range 0x4'0000'0000 - 0x5'0000'0000. The added regions cover all MMIO annotated in Apple's device tree in this range.
Signed-off-by: Janne Grunau j@jannau.net
arch/arm/mach-apple/board.c | 48 +++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 48 insertions(+)
Hi Janne,
Is there a reason why you can't use a SZ_1G mapping for the blocks where you're using a SZ_512M mapping? With SZ_1G the mapping code will use a 1G block descriptor which avoids another level of page tables.
no reason except that SZ_512M was sufficient to cover all devices in Apple DT. Shall I resend the patch?
Yes please!
participants (3)
-
Janne Grunau -
Janne Grunau via B4 Relay -
Mark Kettenis