[U-Boot] [PATCH 1/4][v2] config: lsch3: Define CONFIG_SYS_CACHELINE_SIZE for LS2085A
Define CONFIG_SYS_CACHELINE_SIZE for LS2085A which is required by USB XHCI stack for alignment
Signed-off-by: Nikhil Badola nikhil.badola@freescale.com --- changes for v2 : None
arch/arm/include/asm/arch-fsl-lsch3/config.h | 1 + 1 file changed, 1 insertion(+)
diff --git a/arch/arm/include/asm/arch-fsl-lsch3/config.h b/arch/arm/include/asm/arch-fsl-lsch3/config.h index ca8d38c..02332dc 100644 --- a/arch/arm/include/asm/arch-fsl-lsch3/config.h +++ b/arch/arm/include/asm/arch-fsl-lsch3/config.h @@ -10,6 +10,7 @@ #include <fsl_ddrc_version.h>
#define CONFIG_SYS_PAGE_SIZE 0x10000 +#define CONFIG_SYS_CACHELINE_SIZE 64
#ifndef L1_CACHE_BYTES #define L1_CACHE_SHIFT 6
On 06/26/2015 04:29 AM, Nikhil Badola wrote:
Define CONFIG_SYS_CACHELINE_SIZE for LS2085A which is required by USB XHCI stack for alignment
Signed-off-by: Nikhil Badola nikhil.badola@freescale.com
changes for v2 : None
Applied to u-boot-fsl-qoriq master with minor change in subject. Thanks.
York
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York Sun