[PATCH 1/3] mx7dsabre: Remove warning about DM_SPI_FLASH
This defconfig doesn't need it.
Signed-off-by: Joris Offouga offougajoris@gmail.com --- configs/mx7dsabresd_defconfig | 3 --- 1 file changed, 3 deletions(-)
diff --git a/configs/mx7dsabresd_defconfig b/configs/mx7dsabresd_defconfig index 2a9fdac338..3dac7136d2 100644 --- a/configs/mx7dsabresd_defconfig +++ b/configs/mx7dsabresd_defconfig @@ -55,9 +55,6 @@ CONFIG_MMC_IO_VOLTAGE=y CONFIG_MMC_UHS_SUPPORT=y CONFIG_MMC_HS200_SUPPORT=y CONFIG_FSL_USDHC=y -CONFIG_MTD=y -CONFIG_SPI_FLASH=y -CONFIG_SPI_FLASH_EON=y CONFIG_PHYLIB=y CONFIG_MII=y CONFIG_PINCTRL=y
Signed-off-by: Joris Offouga offougajoris@gmail.com --- board/technexion/pico-imx7d/pico-imx7d.c | 46 ------------------------ configs/pico-dwarf-imx7d_defconfig | 5 +++ configs/pico-hobbit-imx7d_defconfig | 5 +++ configs/pico-imx7d_bl33_defconfig | 5 +++ configs/pico-imx7d_defconfig | 5 +++ configs/pico-nymph-imx7d_defconfig | 5 +++ configs/pico-pi-imx7d_defconfig | 5 +++ include/configs/pico-imx7d.h | 11 ------ 8 files changed, 30 insertions(+), 57 deletions(-)
diff --git a/board/technexion/pico-imx7d/pico-imx7d.c b/board/technexion/pico-imx7d/pico-imx7d.c index bcfc7d361e..b7ca2e1315 100644 --- a/board/technexion/pico-imx7d/pico-imx7d.c +++ b/board/technexion/pico-imx7d/pico-imx7d.c @@ -16,7 +16,6 @@ #include <common.h> #include <i2c.h> #include <miiphy.h> -#include <netdev.h> #include <power/pmic.h> #include <power/pfuze3000_pmic.h> #include "../../freescale/common/pfuze.h" @@ -26,11 +25,6 @@ DECLARE_GLOBAL_DATA_PTR; #define UART_PAD_CTRL (PAD_CTL_DSE_3P3V_49OHM | \ PAD_CTL_PUS_PU100KOHM | PAD_CTL_HYS)
-#define ENET_PAD_CTRL (PAD_CTL_PUS_PU100KOHM | PAD_CTL_DSE_3P3V_49OHM) -#define ENET_PAD_CTRL_MII (PAD_CTL_DSE_3P3V_32OHM) - -#define ENET_RX_PAD_CTRL (PAD_CTL_PUS_PU100KOHM | PAD_CTL_DSE_3P3V_49OHM) - #define I2C_PAD_CTRL (PAD_CTL_DSE_3P3V_32OHM | PAD_CTL_SRE_SLOW | \ PAD_CTL_HYS | PAD_CTL_PUE | PAD_CTL_PUS_PU100KOHM)
@@ -123,44 +117,6 @@ static iomux_v3_cfg_t const uart5_pads[] = { };
#ifdef CONFIG_FEC_MXC -static iomux_v3_cfg_t const fec1_pads[] = { - MX7D_PAD_SD2_CD_B__ENET1_MDIO | MUX_PAD_CTRL(ENET_PAD_CTRL_MII), - MX7D_PAD_SD2_WP__ENET1_MDC | MUX_PAD_CTRL(ENET_PAD_CTRL_MII), - MX7D_PAD_ENET1_RGMII_TXC__ENET1_RGMII_TXC | MUX_PAD_CTRL(ENET_PAD_CTRL), - MX7D_PAD_ENET1_RGMII_TD0__ENET1_RGMII_TD0 | MUX_PAD_CTRL(ENET_PAD_CTRL), - MX7D_PAD_ENET1_RGMII_TD1__ENET1_RGMII_TD1 | MUX_PAD_CTRL(ENET_PAD_CTRL), - MX7D_PAD_ENET1_RGMII_TD2__ENET1_RGMII_TD2 | MUX_PAD_CTRL(ENET_PAD_CTRL), - MX7D_PAD_ENET1_RGMII_TD3__ENET1_RGMII_TD3 | MUX_PAD_CTRL(ENET_PAD_CTRL), - MX7D_PAD_ENET1_RGMII_TX_CTL__ENET1_RGMII_TX_CTL | MUX_PAD_CTRL(ENET_PAD_CTRL), - MX7D_PAD_ENET1_RGMII_RXC__ENET1_RGMII_RXC | MUX_PAD_CTRL(ENET_RX_PAD_CTRL), - MX7D_PAD_ENET1_RGMII_RD0__ENET1_RGMII_RD0 | MUX_PAD_CTRL(ENET_RX_PAD_CTRL), - MX7D_PAD_ENET1_RGMII_RD1__ENET1_RGMII_RD1 | MUX_PAD_CTRL(ENET_RX_PAD_CTRL), - MX7D_PAD_ENET1_RGMII_RD2__ENET1_RGMII_RD2 | MUX_PAD_CTRL(ENET_RX_PAD_CTRL), - MX7D_PAD_ENET1_RGMII_RD3__ENET1_RGMII_RD3 | MUX_PAD_CTRL(ENET_RX_PAD_CTRL), - MX7D_PAD_ENET1_RGMII_RX_CTL__ENET1_RGMII_RX_CTL | MUX_PAD_CTRL(ENET_RX_PAD_CTRL), - MX7D_PAD_SD3_STROBE__GPIO6_IO10 | MUX_PAD_CTRL(NO_PAD_CTRL), - MX7D_PAD_SD3_RESET_B__GPIO6_IO11 | MUX_PAD_CTRL(NO_PAD_CTRL), -}; - -#define FEC1_RST_GPIO IMX_GPIO_NR(6, 11) - -static void setup_iomux_fec(void) -{ - imx_iomux_v3_setup_multiple_pads(fec1_pads, ARRAY_SIZE(fec1_pads)); - gpio_request(FEC1_RST_GPIO, "phy_rst"); - gpio_direction_output(FEC1_RST_GPIO, 0); - udelay(500); - gpio_set_value(FEC1_RST_GPIO, 1); -} - -int board_eth_init(bd_t *bis) -{ - setup_iomux_fec(); - - return fecmxc_initialize_multi(bis, 0, - CONFIG_FEC_MXC_PHYADDR, IMX_FEC_BASE); -} - static int setup_fec(void) { struct iomuxc_gpr_base_regs *const iomuxc_gpr_regs @@ -235,9 +191,7 @@ int board_init(void) gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
#ifdef CONFIG_DM_VIDEO - setup_lcd(); - #endif #ifdef CONFIG_FEC_MXC setup_fec(); diff --git a/configs/pico-dwarf-imx7d_defconfig b/configs/pico-dwarf-imx7d_defconfig index 94d73ee051..2437a64dd0 100644 --- a/configs/pico-dwarf-imx7d_defconfig +++ b/configs/pico-dwarf-imx7d_defconfig @@ -59,6 +59,11 @@ CONFIG_SUPPORT_EMMC_BOOT=y CONFIG_FSL_USDHC=y CONFIG_MTD=y CONFIG_PHYLIB=y +CONFIG_PHY_ATHEROS=y +CONFIG_DM_ETH=y +CONFIG_DM_MDIO=y +CONFIG_FEC_MXC=y +CONFIG_RGMII=y CONFIG_MII=y CONFIG_PINCTRL=y CONFIG_PINCTRL_IMX7=y diff --git a/configs/pico-hobbit-imx7d_defconfig b/configs/pico-hobbit-imx7d_defconfig index ef86b0cd66..3467d4c2e4 100644 --- a/configs/pico-hobbit-imx7d_defconfig +++ b/configs/pico-hobbit-imx7d_defconfig @@ -59,6 +59,11 @@ CONFIG_SUPPORT_EMMC_BOOT=y CONFIG_FSL_USDHC=y CONFIG_MTD=y CONFIG_PHYLIB=y +CONFIG_PHY_ATHEROS=y +CONFIG_DM_ETH=y +CONFIG_DM_MDIO=y +CONFIG_FEC_MXC=y +CONFIG_RGMII=y CONFIG_MII=y CONFIG_PINCTRL=y CONFIG_PINCTRL_IMX7=y diff --git a/configs/pico-imx7d_bl33_defconfig b/configs/pico-imx7d_bl33_defconfig index 51d3514072..49a4e1b0c1 100644 --- a/configs/pico-imx7d_bl33_defconfig +++ b/configs/pico-imx7d_bl33_defconfig @@ -50,6 +50,11 @@ CONFIG_DM_MMC=y CONFIG_FSL_USDHC=y CONFIG_MTD=y CONFIG_PHYLIB=y +CONFIG_PHY_ATHEROS=y +CONFIG_DM_ETH=y +CONFIG_DM_MDIO=y +CONFIG_FEC_MXC=y +CONFIG_RGMII=y CONFIG_MII=y CONFIG_PINCTRL=y CONFIG_PINCTRL_IMX7=y diff --git a/configs/pico-imx7d_defconfig b/configs/pico-imx7d_defconfig index bf4d56ec2c..a1975b9d56 100644 --- a/configs/pico-imx7d_defconfig +++ b/configs/pico-imx7d_defconfig @@ -59,6 +59,11 @@ CONFIG_SUPPORT_EMMC_BOOT=y CONFIG_FSL_USDHC=y CONFIG_MTD=y CONFIG_PHYLIB=y +CONFIG_PHY_ATHEROS=y +CONFIG_DM_ETH=y +CONFIG_DM_MDIO=y +CONFIG_FEC_MXC=y +CONFIG_RGMII=y CONFIG_MII=y CONFIG_PINCTRL=y CONFIG_PINCTRL_IMX7=y diff --git a/configs/pico-nymph-imx7d_defconfig b/configs/pico-nymph-imx7d_defconfig index 94d73ee051..2437a64dd0 100644 --- a/configs/pico-nymph-imx7d_defconfig +++ b/configs/pico-nymph-imx7d_defconfig @@ -59,6 +59,11 @@ CONFIG_SUPPORT_EMMC_BOOT=y CONFIG_FSL_USDHC=y CONFIG_MTD=y CONFIG_PHYLIB=y +CONFIG_PHY_ATHEROS=y +CONFIG_DM_ETH=y +CONFIG_DM_MDIO=y +CONFIG_FEC_MXC=y +CONFIG_RGMII=y CONFIG_MII=y CONFIG_PINCTRL=y CONFIG_PINCTRL_IMX7=y diff --git a/configs/pico-pi-imx7d_defconfig b/configs/pico-pi-imx7d_defconfig index c6f5b872c3..f1e439602b 100644 --- a/configs/pico-pi-imx7d_defconfig +++ b/configs/pico-pi-imx7d_defconfig @@ -59,6 +59,11 @@ CONFIG_SUPPORT_EMMC_BOOT=y CONFIG_FSL_USDHC=y CONFIG_MTD=y CONFIG_PHYLIB=y +CONFIG_PHY_ATHEROS=y +CONFIG_DM_ETH=y +CONFIG_DM_MDIO=y +CONFIG_FEC_MXC=y +CONFIG_RGMII=y CONFIG_MII=y CONFIG_PINCTRL=y CONFIG_PINCTRL_IMX7=y diff --git a/include/configs/pico-imx7d.h b/include/configs/pico-imx7d.h index 1d0df9dd44..4dc206566e 100644 --- a/include/configs/pico-imx7d.h +++ b/include/configs/pico-imx7d.h @@ -29,17 +29,6 @@
#define CONFIG_MXC_UART_BASE UART5_IPS_BASE_ADDR
-/* Network */ -#define CONFIG_FEC_MXC -#define CONFIG_FEC_XCV_TYPE RGMII -#define CONFIG_ETHPRIME "FEC" -#define CONFIG_FEC_MXC_PHYADDR 1 - -#define CONFIG_PHY_ATHEROS - -/* ENET1 */ -#define IMX_FEC_BASE ENET_IPS_BASE_ADDR - /* MMC Config */ #define CONFIG_SYS_FSL_ESDHC_ADDR 0
On Sun, Dec 8, 2019 at 2:03 PM Joris Offouga offougajoris@gmail.com wrote:
Signed-off-by: Joris Offouga offougajoris@gmail.com
Reviewed-by: Otavio Salvador otavio@ossystems.com.br
Signed-off-by: Joris Offouga offougajoris@gmail.com Reviewed-by: Otavio Salvador otavio@ossystems.com.br
Applied to u-boot-imx, master, thanks !
Best regards, Stefano Babic
Hi Joris,
On 08/12/19 18:02, Joris Offouga wrote:
Signed-off-by: Joris Offouga offougajoris@gmail.com
board/technexion/pico-imx7d/pico-imx7d.c | 46 ------------------------ configs/pico-dwarf-imx7d_defconfig | 5 +++ configs/pico-hobbit-imx7d_defconfig | 5 +++ configs/pico-imx7d_bl33_defconfig | 5 +++ configs/pico-imx7d_defconfig | 5 +++ configs/pico-nymph-imx7d_defconfig | 5 +++ configs/pico-pi-imx7d_defconfig | 5 +++ include/configs/pico-imx7d.h | 11 ------ 8 files changed, 30 insertions(+), 57 deletions(-)
I get build errors with pico-imx7d_bl33.
https://travis-ci.org/sbabic/u-boot-imx/jobs/630056283
Could you take a look, please ?
Best regards, Stefano
diff --git a/board/technexion/pico-imx7d/pico-imx7d.c b/board/technexion/pico-imx7d/pico-imx7d.c index bcfc7d361e..b7ca2e1315 100644 --- a/board/technexion/pico-imx7d/pico-imx7d.c +++ b/board/technexion/pico-imx7d/pico-imx7d.c @@ -16,7 +16,6 @@ #include <common.h> #include <i2c.h> #include <miiphy.h> -#include <netdev.h> #include <power/pmic.h> #include <power/pfuze3000_pmic.h> #include "../../freescale/common/pfuze.h" @@ -26,11 +25,6 @@ DECLARE_GLOBAL_DATA_PTR; #define UART_PAD_CTRL (PAD_CTL_DSE_3P3V_49OHM | \ PAD_CTL_PUS_PU100KOHM | PAD_CTL_HYS)
-#define ENET_PAD_CTRL (PAD_CTL_PUS_PU100KOHM | PAD_CTL_DSE_3P3V_49OHM) -#define ENET_PAD_CTRL_MII (PAD_CTL_DSE_3P3V_32OHM)
-#define ENET_RX_PAD_CTRL (PAD_CTL_PUS_PU100KOHM | PAD_CTL_DSE_3P3V_49OHM)
#define I2C_PAD_CTRL (PAD_CTL_DSE_3P3V_32OHM | PAD_CTL_SRE_SLOW | \ PAD_CTL_HYS | PAD_CTL_PUE | PAD_CTL_PUS_PU100KOHM)
@@ -123,44 +117,6 @@ static iomux_v3_cfg_t const uart5_pads[] = { };
#ifdef CONFIG_FEC_MXC -static iomux_v3_cfg_t const fec1_pads[] = {
- MX7D_PAD_SD2_CD_B__ENET1_MDIO | MUX_PAD_CTRL(ENET_PAD_CTRL_MII),
- MX7D_PAD_SD2_WP__ENET1_MDC | MUX_PAD_CTRL(ENET_PAD_CTRL_MII),
- MX7D_PAD_ENET1_RGMII_TXC__ENET1_RGMII_TXC | MUX_PAD_CTRL(ENET_PAD_CTRL),
- MX7D_PAD_ENET1_RGMII_TD0__ENET1_RGMII_TD0 | MUX_PAD_CTRL(ENET_PAD_CTRL),
- MX7D_PAD_ENET1_RGMII_TD1__ENET1_RGMII_TD1 | MUX_PAD_CTRL(ENET_PAD_CTRL),
- MX7D_PAD_ENET1_RGMII_TD2__ENET1_RGMII_TD2 | MUX_PAD_CTRL(ENET_PAD_CTRL),
- MX7D_PAD_ENET1_RGMII_TD3__ENET1_RGMII_TD3 | MUX_PAD_CTRL(ENET_PAD_CTRL),
- MX7D_PAD_ENET1_RGMII_TX_CTL__ENET1_RGMII_TX_CTL | MUX_PAD_CTRL(ENET_PAD_CTRL),
- MX7D_PAD_ENET1_RGMII_RXC__ENET1_RGMII_RXC | MUX_PAD_CTRL(ENET_RX_PAD_CTRL),
- MX7D_PAD_ENET1_RGMII_RD0__ENET1_RGMII_RD0 | MUX_PAD_CTRL(ENET_RX_PAD_CTRL),
- MX7D_PAD_ENET1_RGMII_RD1__ENET1_RGMII_RD1 | MUX_PAD_CTRL(ENET_RX_PAD_CTRL),
- MX7D_PAD_ENET1_RGMII_RD2__ENET1_RGMII_RD2 | MUX_PAD_CTRL(ENET_RX_PAD_CTRL),
- MX7D_PAD_ENET1_RGMII_RD3__ENET1_RGMII_RD3 | MUX_PAD_CTRL(ENET_RX_PAD_CTRL),
- MX7D_PAD_ENET1_RGMII_RX_CTL__ENET1_RGMII_RX_CTL | MUX_PAD_CTRL(ENET_RX_PAD_CTRL),
- MX7D_PAD_SD3_STROBE__GPIO6_IO10 | MUX_PAD_CTRL(NO_PAD_CTRL),
- MX7D_PAD_SD3_RESET_B__GPIO6_IO11 | MUX_PAD_CTRL(NO_PAD_CTRL),
-};
-#define FEC1_RST_GPIO IMX_GPIO_NR(6, 11)
-static void setup_iomux_fec(void) -{
- imx_iomux_v3_setup_multiple_pads(fec1_pads, ARRAY_SIZE(fec1_pads));
- gpio_request(FEC1_RST_GPIO, "phy_rst");
- gpio_direction_output(FEC1_RST_GPIO, 0);
- udelay(500);
- gpio_set_value(FEC1_RST_GPIO, 1);
-}
-int board_eth_init(bd_t *bis) -{
- setup_iomux_fec();
- return fecmxc_initialize_multi(bis, 0,
CONFIG_FEC_MXC_PHYADDR, IMX_FEC_BASE);-}
static int setup_fec(void) { struct iomuxc_gpr_base_regs *const iomuxc_gpr_regs @@ -235,9 +191,7 @@ int board_init(void) gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
#ifdef CONFIG_DM_VIDEO
- setup_lcd();
#endif #ifdef CONFIG_FEC_MXC setup_fec(); diff --git a/configs/pico-dwarf-imx7d_defconfig b/configs/pico-dwarf-imx7d_defconfig index 94d73ee051..2437a64dd0 100644 --- a/configs/pico-dwarf-imx7d_defconfig +++ b/configs/pico-dwarf-imx7d_defconfig @@ -59,6 +59,11 @@ CONFIG_SUPPORT_EMMC_BOOT=y CONFIG_FSL_USDHC=y CONFIG_MTD=y CONFIG_PHYLIB=y +CONFIG_PHY_ATHEROS=y +CONFIG_DM_ETH=y +CONFIG_DM_MDIO=y +CONFIG_FEC_MXC=y +CONFIG_RGMII=y CONFIG_MII=y CONFIG_PINCTRL=y CONFIG_PINCTRL_IMX7=y diff --git a/configs/pico-hobbit-imx7d_defconfig b/configs/pico-hobbit-imx7d_defconfig index ef86b0cd66..3467d4c2e4 100644 --- a/configs/pico-hobbit-imx7d_defconfig +++ b/configs/pico-hobbit-imx7d_defconfig @@ -59,6 +59,11 @@ CONFIG_SUPPORT_EMMC_BOOT=y CONFIG_FSL_USDHC=y CONFIG_MTD=y CONFIG_PHYLIB=y +CONFIG_PHY_ATHEROS=y +CONFIG_DM_ETH=y +CONFIG_DM_MDIO=y +CONFIG_FEC_MXC=y +CONFIG_RGMII=y CONFIG_MII=y CONFIG_PINCTRL=y CONFIG_PINCTRL_IMX7=y diff --git a/configs/pico-imx7d_bl33_defconfig b/configs/pico-imx7d_bl33_defconfig index 51d3514072..49a4e1b0c1 100644 --- a/configs/pico-imx7d_bl33_defconfig +++ b/configs/pico-imx7d_bl33_defconfig @@ -50,6 +50,11 @@ CONFIG_DM_MMC=y CONFIG_FSL_USDHC=y CONFIG_MTD=y CONFIG_PHYLIB=y +CONFIG_PHY_ATHEROS=y +CONFIG_DM_ETH=y +CONFIG_DM_MDIO=y +CONFIG_FEC_MXC=y +CONFIG_RGMII=y CONFIG_MII=y CONFIG_PINCTRL=y CONFIG_PINCTRL_IMX7=y diff --git a/configs/pico-imx7d_defconfig b/configs/pico-imx7d_defconfig index bf4d56ec2c..a1975b9d56 100644 --- a/configs/pico-imx7d_defconfig +++ b/configs/pico-imx7d_defconfig @@ -59,6 +59,11 @@ CONFIG_SUPPORT_EMMC_BOOT=y CONFIG_FSL_USDHC=y CONFIG_MTD=y CONFIG_PHYLIB=y +CONFIG_PHY_ATHEROS=y +CONFIG_DM_ETH=y +CONFIG_DM_MDIO=y +CONFIG_FEC_MXC=y +CONFIG_RGMII=y CONFIG_MII=y CONFIG_PINCTRL=y CONFIG_PINCTRL_IMX7=y diff --git a/configs/pico-nymph-imx7d_defconfig b/configs/pico-nymph-imx7d_defconfig index 94d73ee051..2437a64dd0 100644 --- a/configs/pico-nymph-imx7d_defconfig +++ b/configs/pico-nymph-imx7d_defconfig @@ -59,6 +59,11 @@ CONFIG_SUPPORT_EMMC_BOOT=y CONFIG_FSL_USDHC=y CONFIG_MTD=y CONFIG_PHYLIB=y +CONFIG_PHY_ATHEROS=y +CONFIG_DM_ETH=y +CONFIG_DM_MDIO=y +CONFIG_FEC_MXC=y +CONFIG_RGMII=y CONFIG_MII=y CONFIG_PINCTRL=y CONFIG_PINCTRL_IMX7=y diff --git a/configs/pico-pi-imx7d_defconfig b/configs/pico-pi-imx7d_defconfig index c6f5b872c3..f1e439602b 100644 --- a/configs/pico-pi-imx7d_defconfig +++ b/configs/pico-pi-imx7d_defconfig @@ -59,6 +59,11 @@ CONFIG_SUPPORT_EMMC_BOOT=y CONFIG_FSL_USDHC=y CONFIG_MTD=y CONFIG_PHYLIB=y +CONFIG_PHY_ATHEROS=y +CONFIG_DM_ETH=y +CONFIG_DM_MDIO=y +CONFIG_FEC_MXC=y +CONFIG_RGMII=y CONFIG_MII=y CONFIG_PINCTRL=y CONFIG_PINCTRL_IMX7=y diff --git a/include/configs/pico-imx7d.h b/include/configs/pico-imx7d.h index 1d0df9dd44..4dc206566e 100644 --- a/include/configs/pico-imx7d.h +++ b/include/configs/pico-imx7d.h @@ -29,17 +29,6 @@
#define CONFIG_MXC_UART_BASE UART5_IPS_BASE_ADDR
-/* Network */ -#define CONFIG_FEC_MXC -#define CONFIG_FEC_XCV_TYPE RGMII -#define CONFIG_ETHPRIME "FEC" -#define CONFIG_FEC_MXC_PHYADDR 1
-#define CONFIG_PHY_ATHEROS
-/* ENET1 */ -#define IMX_FEC_BASE ENET_IPS_BASE_ADDR
/* MMC Config */ #define CONFIG_SYS_FSL_ESDHC_ADDR 0
Hi Stefano,
Sorry for the delay,
Le 28/12/2019 à 12:31, Stefano Babic a écrit :
Hi Joris,
On 08/12/19 18:02, Joris Offouga wrote:
Signed-off-by: Joris Offouga offougajoris@gmail.com
board/technexion/pico-imx7d/pico-imx7d.c | 46 ------------------------ configs/pico-dwarf-imx7d_defconfig | 5 +++ configs/pico-hobbit-imx7d_defconfig | 5 +++ configs/pico-imx7d_bl33_defconfig | 5 +++ configs/pico-imx7d_defconfig | 5 +++ configs/pico-nymph-imx7d_defconfig | 5 +++ configs/pico-pi-imx7d_defconfig | 5 +++ include/configs/pico-imx7d.h | 11 ------ 8 files changed, 30 insertions(+), 57 deletions(-)
I get build errors with pico-imx7d_bl33.
https://travis-ci.org/sbabic/u-boot-imx/jobs/630056283
Could you take a look, please ?
I tried to correct the compilation error but I did not find good ways to do it, I suggest you remove the usb ethernet support from the configuration :
-CONFIG_USB_ETHER=y -CONFIG_USB_ETH_CDC=y -CONFIG_USBNET_HOST_ADDR="de:ad:be:af:00:00"
If you agree I send V2
Best regards,
Joris
Best regards, Stefano
diff --git a/board/technexion/pico-imx7d/pico-imx7d.c b/board/technexion/pico-imx7d/pico-imx7d.c index bcfc7d361e..b7ca2e1315 100644 --- a/board/technexion/pico-imx7d/pico-imx7d.c +++ b/board/technexion/pico-imx7d/pico-imx7d.c @@ -16,7 +16,6 @@ #include <common.h> #include <i2c.h> #include <miiphy.h> -#include <netdev.h> #include <power/pmic.h> #include <power/pfuze3000_pmic.h> #include "../../freescale/common/pfuze.h" @@ -26,11 +25,6 @@ DECLARE_GLOBAL_DATA_PTR; #define UART_PAD_CTRL (PAD_CTL_DSE_3P3V_49OHM | \ PAD_CTL_PUS_PU100KOHM | PAD_CTL_HYS)
-#define ENET_PAD_CTRL (PAD_CTL_PUS_PU100KOHM | PAD_CTL_DSE_3P3V_49OHM) -#define ENET_PAD_CTRL_MII (PAD_CTL_DSE_3P3V_32OHM)
-#define ENET_RX_PAD_CTRL (PAD_CTL_PUS_PU100KOHM | PAD_CTL_DSE_3P3V_49OHM)
- #define I2C_PAD_CTRL (PAD_CTL_DSE_3P3V_32OHM | PAD_CTL_SRE_SLOW | \ PAD_CTL_HYS | PAD_CTL_PUE | PAD_CTL_PUS_PU100KOHM)
@@ -123,44 +117,6 @@ static iomux_v3_cfg_t const uart5_pads[] = { };
#ifdef CONFIG_FEC_MXC -static iomux_v3_cfg_t const fec1_pads[] = {
- MX7D_PAD_SD2_CD_B__ENET1_MDIO | MUX_PAD_CTRL(ENET_PAD_CTRL_MII),
- MX7D_PAD_SD2_WP__ENET1_MDC | MUX_PAD_CTRL(ENET_PAD_CTRL_MII),
- MX7D_PAD_ENET1_RGMII_TXC__ENET1_RGMII_TXC | MUX_PAD_CTRL(ENET_PAD_CTRL),
- MX7D_PAD_ENET1_RGMII_TD0__ENET1_RGMII_TD0 | MUX_PAD_CTRL(ENET_PAD_CTRL),
- MX7D_PAD_ENET1_RGMII_TD1__ENET1_RGMII_TD1 | MUX_PAD_CTRL(ENET_PAD_CTRL),
- MX7D_PAD_ENET1_RGMII_TD2__ENET1_RGMII_TD2 | MUX_PAD_CTRL(ENET_PAD_CTRL),
- MX7D_PAD_ENET1_RGMII_TD3__ENET1_RGMII_TD3 | MUX_PAD_CTRL(ENET_PAD_CTRL),
- MX7D_PAD_ENET1_RGMII_TX_CTL__ENET1_RGMII_TX_CTL | MUX_PAD_CTRL(ENET_PAD_CTRL),
- MX7D_PAD_ENET1_RGMII_RXC__ENET1_RGMII_RXC | MUX_PAD_CTRL(ENET_RX_PAD_CTRL),
- MX7D_PAD_ENET1_RGMII_RD0__ENET1_RGMII_RD0 | MUX_PAD_CTRL(ENET_RX_PAD_CTRL),
- MX7D_PAD_ENET1_RGMII_RD1__ENET1_RGMII_RD1 | MUX_PAD_CTRL(ENET_RX_PAD_CTRL),
- MX7D_PAD_ENET1_RGMII_RD2__ENET1_RGMII_RD2 | MUX_PAD_CTRL(ENET_RX_PAD_CTRL),
- MX7D_PAD_ENET1_RGMII_RD3__ENET1_RGMII_RD3 | MUX_PAD_CTRL(ENET_RX_PAD_CTRL),
- MX7D_PAD_ENET1_RGMII_RX_CTL__ENET1_RGMII_RX_CTL | MUX_PAD_CTRL(ENET_RX_PAD_CTRL),
- MX7D_PAD_SD3_STROBE__GPIO6_IO10 | MUX_PAD_CTRL(NO_PAD_CTRL),
- MX7D_PAD_SD3_RESET_B__GPIO6_IO11 | MUX_PAD_CTRL(NO_PAD_CTRL),
-};
-#define FEC1_RST_GPIO IMX_GPIO_NR(6, 11)
-static void setup_iomux_fec(void) -{
- imx_iomux_v3_setup_multiple_pads(fec1_pads, ARRAY_SIZE(fec1_pads));
- gpio_request(FEC1_RST_GPIO, "phy_rst");
- gpio_direction_output(FEC1_RST_GPIO, 0);
- udelay(500);
- gpio_set_value(FEC1_RST_GPIO, 1);
-}
-int board_eth_init(bd_t *bis) -{
- setup_iomux_fec();
- return fecmxc_initialize_multi(bis, 0,
CONFIG_FEC_MXC_PHYADDR, IMX_FEC_BASE);-}
- static int setup_fec(void) { struct iomuxc_gpr_base_regs *const iomuxc_gpr_regs
@@ -235,9 +191,7 @@ int board_init(void) gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
#ifdef CONFIG_DM_VIDEO
- setup_lcd();
- #endif #ifdef CONFIG_FEC_MXC setup_fec();
diff --git a/configs/pico-dwarf-imx7d_defconfig b/configs/pico-dwarf-imx7d_defconfig index 94d73ee051..2437a64dd0 100644 --- a/configs/pico-dwarf-imx7d_defconfig +++ b/configs/pico-dwarf-imx7d_defconfig @@ -59,6 +59,11 @@ CONFIG_SUPPORT_EMMC_BOOT=y CONFIG_FSL_USDHC=y CONFIG_MTD=y CONFIG_PHYLIB=y +CONFIG_PHY_ATHEROS=y +CONFIG_DM_ETH=y +CONFIG_DM_MDIO=y +CONFIG_FEC_MXC=y +CONFIG_RGMII=y CONFIG_MII=y CONFIG_PINCTRL=y CONFIG_PINCTRL_IMX7=y diff --git a/configs/pico-hobbit-imx7d_defconfig b/configs/pico-hobbit-imx7d_defconfig index ef86b0cd66..3467d4c2e4 100644 --- a/configs/pico-hobbit-imx7d_defconfig +++ b/configs/pico-hobbit-imx7d_defconfig @@ -59,6 +59,11 @@ CONFIG_SUPPORT_EMMC_BOOT=y CONFIG_FSL_USDHC=y CONFIG_MTD=y CONFIG_PHYLIB=y +CONFIG_PHY_ATHEROS=y +CONFIG_DM_ETH=y +CONFIG_DM_MDIO=y +CONFIG_FEC_MXC=y +CONFIG_RGMII=y CONFIG_MII=y CONFIG_PINCTRL=y CONFIG_PINCTRL_IMX7=y diff --git a/configs/pico-imx7d_bl33_defconfig b/configs/pico-imx7d_bl33_defconfig index 51d3514072..49a4e1b0c1 100644 --- a/configs/pico-imx7d_bl33_defconfig +++ b/configs/pico-imx7d_bl33_defconfig @@ -50,6 +50,11 @@ CONFIG_DM_MMC=y CONFIG_FSL_USDHC=y CONFIG_MTD=y CONFIG_PHYLIB=y +CONFIG_PHY_ATHEROS=y +CONFIG_DM_ETH=y +CONFIG_DM_MDIO=y +CONFIG_FEC_MXC=y +CONFIG_RGMII=y CONFIG_MII=y CONFIG_PINCTRL=y CONFIG_PINCTRL_IMX7=y diff --git a/configs/pico-imx7d_defconfig b/configs/pico-imx7d_defconfig index bf4d56ec2c..a1975b9d56 100644 --- a/configs/pico-imx7d_defconfig +++ b/configs/pico-imx7d_defconfig @@ -59,6 +59,11 @@ CONFIG_SUPPORT_EMMC_BOOT=y CONFIG_FSL_USDHC=y CONFIG_MTD=y CONFIG_PHYLIB=y +CONFIG_PHY_ATHEROS=y +CONFIG_DM_ETH=y +CONFIG_DM_MDIO=y +CONFIG_FEC_MXC=y +CONFIG_RGMII=y CONFIG_MII=y CONFIG_PINCTRL=y CONFIG_PINCTRL_IMX7=y diff --git a/configs/pico-nymph-imx7d_defconfig b/configs/pico-nymph-imx7d_defconfig index 94d73ee051..2437a64dd0 100644 --- a/configs/pico-nymph-imx7d_defconfig +++ b/configs/pico-nymph-imx7d_defconfig @@ -59,6 +59,11 @@ CONFIG_SUPPORT_EMMC_BOOT=y CONFIG_FSL_USDHC=y CONFIG_MTD=y CONFIG_PHYLIB=y +CONFIG_PHY_ATHEROS=y +CONFIG_DM_ETH=y +CONFIG_DM_MDIO=y +CONFIG_FEC_MXC=y +CONFIG_RGMII=y CONFIG_MII=y CONFIG_PINCTRL=y CONFIG_PINCTRL_IMX7=y diff --git a/configs/pico-pi-imx7d_defconfig b/configs/pico-pi-imx7d_defconfig index c6f5b872c3..f1e439602b 100644 --- a/configs/pico-pi-imx7d_defconfig +++ b/configs/pico-pi-imx7d_defconfig @@ -59,6 +59,11 @@ CONFIG_SUPPORT_EMMC_BOOT=y CONFIG_FSL_USDHC=y CONFIG_MTD=y CONFIG_PHYLIB=y +CONFIG_PHY_ATHEROS=y +CONFIG_DM_ETH=y +CONFIG_DM_MDIO=y +CONFIG_FEC_MXC=y +CONFIG_RGMII=y CONFIG_MII=y CONFIG_PINCTRL=y CONFIG_PINCTRL_IMX7=y diff --git a/include/configs/pico-imx7d.h b/include/configs/pico-imx7d.h index 1d0df9dd44..4dc206566e 100644 --- a/include/configs/pico-imx7d.h +++ b/include/configs/pico-imx7d.h @@ -29,17 +29,6 @@
#define CONFIG_MXC_UART_BASE UART5_IPS_BASE_ADDR
-/* Network */ -#define CONFIG_FEC_MXC -#define CONFIG_FEC_XCV_TYPE RGMII -#define CONFIG_ETHPRIME "FEC" -#define CONFIG_FEC_MXC_PHYADDR 1
-#define CONFIG_PHY_ATHEROS
-/* ENET1 */ -#define IMX_FEC_BASE ENET_IPS_BASE_ADDR
- /* MMC Config */ #define CONFIG_SYS_FSL_ESDHC_ADDR 0
Hi Joris,
On 04/01/20 13:03, Joris Offouga wrote:
Hi Stefano,
Sorry for the delay,
Le 28/12/2019 à 12:31, Stefano Babic a écrit :
Hi Joris,
On 08/12/19 18:02, Joris Offouga wrote:
Signed-off-by: Joris Offouga offougajoris@gmail.com
board/technexion/pico-imx7d/pico-imx7d.c | 46 ------------------------ configs/pico-dwarf-imx7d_defconfig | 5 +++ configs/pico-hobbit-imx7d_defconfig | 5 +++ configs/pico-imx7d_bl33_defconfig | 5 +++ configs/pico-imx7d_defconfig | 5 +++ configs/pico-nymph-imx7d_defconfig | 5 +++ configs/pico-pi-imx7d_defconfig | 5 +++ include/configs/pico-imx7d.h | 11 ------ 8 files changed, 30 insertions(+), 57 deletions(-)
I get build errors with pico-imx7d_bl33.
https://travis-ci.org/sbabic/u-boot-imx/jobs/630056283
Could you take a look, please ?
I tried to correct the compilation error but I did not find good ways to do it, I suggest you remove the usb ethernet support from the configuration :
-CONFIG_USB_ETHER=y -CONFIG_USB_ETH_CDC=y -CONFIG_USBNET_HOST_ADDR="de:ad:be:af:00:00"
If you agree I send V2
If the board maintainer (Otavio) agrees it, I am fine.
Best regards, Stefano
Best regards,
Joris
Best regards, Stefano
diff --git a/board/technexion/pico-imx7d/pico-imx7d.c b/board/technexion/pico-imx7d/pico-imx7d.c index bcfc7d361e..b7ca2e1315 100644 --- a/board/technexion/pico-imx7d/pico-imx7d.c +++ b/board/technexion/pico-imx7d/pico-imx7d.c @@ -16,7 +16,6 @@ #include <common.h> #include <i2c.h> #include <miiphy.h> -#include <netdev.h> #include <power/pmic.h> #include <power/pfuze3000_pmic.h> #include "../../freescale/common/pfuze.h" @@ -26,11 +25,6 @@ DECLARE_GLOBAL_DATA_PTR; #define UART_PAD_CTRL (PAD_CTL_DSE_3P3V_49OHM | \ PAD_CTL_PUS_PU100KOHM | PAD_CTL_HYS) -#define ENET_PAD_CTRL (PAD_CTL_PUS_PU100KOHM | PAD_CTL_DSE_3P3V_49OHM) -#define ENET_PAD_CTRL_MII (PAD_CTL_DSE_3P3V_32OHM)
-#define ENET_RX_PAD_CTRL (PAD_CTL_PUS_PU100KOHM | PAD_CTL_DSE_3P3V_49OHM)
#define I2C_PAD_CTRL (PAD_CTL_DSE_3P3V_32OHM | PAD_CTL_SRE_SLOW | \ PAD_CTL_HYS | PAD_CTL_PUE | PAD_CTL_PUS_PU100KOHM) @@ -123,44 +117,6 @@ static iomux_v3_cfg_t const uart5_pads[] = { }; #ifdef CONFIG_FEC_MXC -static iomux_v3_cfg_t const fec1_pads[] = { - MX7D_PAD_SD2_CD_B__ENET1_MDIO | MUX_PAD_CTRL(ENET_PAD_CTRL_MII), - MX7D_PAD_SD2_WP__ENET1_MDC | MUX_PAD_CTRL(ENET_PAD_CTRL_MII), - MX7D_PAD_ENET1_RGMII_TXC__ENET1_RGMII_TXC | MUX_PAD_CTRL(ENET_PAD_CTRL), - MX7D_PAD_ENET1_RGMII_TD0__ENET1_RGMII_TD0 | MUX_PAD_CTRL(ENET_PAD_CTRL), - MX7D_PAD_ENET1_RGMII_TD1__ENET1_RGMII_TD1 | MUX_PAD_CTRL(ENET_PAD_CTRL), - MX7D_PAD_ENET1_RGMII_TD2__ENET1_RGMII_TD2 | MUX_PAD_CTRL(ENET_PAD_CTRL), - MX7D_PAD_ENET1_RGMII_TD3__ENET1_RGMII_TD3 | MUX_PAD_CTRL(ENET_PAD_CTRL), - MX7D_PAD_ENET1_RGMII_TX_CTL__ENET1_RGMII_TX_CTL | MUX_PAD_CTRL(ENET_PAD_CTRL), - MX7D_PAD_ENET1_RGMII_RXC__ENET1_RGMII_RXC | MUX_PAD_CTRL(ENET_RX_PAD_CTRL), - MX7D_PAD_ENET1_RGMII_RD0__ENET1_RGMII_RD0 | MUX_PAD_CTRL(ENET_RX_PAD_CTRL), - MX7D_PAD_ENET1_RGMII_RD1__ENET1_RGMII_RD1 | MUX_PAD_CTRL(ENET_RX_PAD_CTRL), - MX7D_PAD_ENET1_RGMII_RD2__ENET1_RGMII_RD2 | MUX_PAD_CTRL(ENET_RX_PAD_CTRL), - MX7D_PAD_ENET1_RGMII_RD3__ENET1_RGMII_RD3 | MUX_PAD_CTRL(ENET_RX_PAD_CTRL), - MX7D_PAD_ENET1_RGMII_RX_CTL__ENET1_RGMII_RX_CTL | MUX_PAD_CTRL(ENET_RX_PAD_CTRL), - MX7D_PAD_SD3_STROBE__GPIO6_IO10 | MUX_PAD_CTRL(NO_PAD_CTRL), - MX7D_PAD_SD3_RESET_B__GPIO6_IO11 | MUX_PAD_CTRL(NO_PAD_CTRL), -};
-#define FEC1_RST_GPIO IMX_GPIO_NR(6, 11)
-static void setup_iomux_fec(void) -{ - imx_iomux_v3_setup_multiple_pads(fec1_pads, ARRAY_SIZE(fec1_pads)); - gpio_request(FEC1_RST_GPIO, "phy_rst"); - gpio_direction_output(FEC1_RST_GPIO, 0); - udelay(500); - gpio_set_value(FEC1_RST_GPIO, 1); -}
-int board_eth_init(bd_t *bis) -{ - setup_iomux_fec();
- return fecmxc_initialize_multi(bis, 0, - CONFIG_FEC_MXC_PHYADDR, IMX_FEC_BASE); -}
static int setup_fec(void) { struct iomuxc_gpr_base_regs *const iomuxc_gpr_regs @@ -235,9 +191,7 @@ int board_init(void) gd->bd->bi_boot_params = PHYS_SDRAM + 0x100; #ifdef CONFIG_DM_VIDEO
setup_lcd();
#endif #ifdef CONFIG_FEC_MXC setup_fec(); diff --git a/configs/pico-dwarf-imx7d_defconfig b/configs/pico-dwarf-imx7d_defconfig index 94d73ee051..2437a64dd0 100644 --- a/configs/pico-dwarf-imx7d_defconfig +++ b/configs/pico-dwarf-imx7d_defconfig @@ -59,6 +59,11 @@ CONFIG_SUPPORT_EMMC_BOOT=y CONFIG_FSL_USDHC=y CONFIG_MTD=y CONFIG_PHYLIB=y +CONFIG_PHY_ATHEROS=y +CONFIG_DM_ETH=y +CONFIG_DM_MDIO=y +CONFIG_FEC_MXC=y +CONFIG_RGMII=y CONFIG_MII=y CONFIG_PINCTRL=y CONFIG_PINCTRL_IMX7=y diff --git a/configs/pico-hobbit-imx7d_defconfig b/configs/pico-hobbit-imx7d_defconfig index ef86b0cd66..3467d4c2e4 100644 --- a/configs/pico-hobbit-imx7d_defconfig +++ b/configs/pico-hobbit-imx7d_defconfig @@ -59,6 +59,11 @@ CONFIG_SUPPORT_EMMC_BOOT=y CONFIG_FSL_USDHC=y CONFIG_MTD=y CONFIG_PHYLIB=y +CONFIG_PHY_ATHEROS=y +CONFIG_DM_ETH=y +CONFIG_DM_MDIO=y +CONFIG_FEC_MXC=y +CONFIG_RGMII=y CONFIG_MII=y CONFIG_PINCTRL=y CONFIG_PINCTRL_IMX7=y diff --git a/configs/pico-imx7d_bl33_defconfig b/configs/pico-imx7d_bl33_defconfig index 51d3514072..49a4e1b0c1 100644 --- a/configs/pico-imx7d_bl33_defconfig +++ b/configs/pico-imx7d_bl33_defconfig @@ -50,6 +50,11 @@ CONFIG_DM_MMC=y CONFIG_FSL_USDHC=y CONFIG_MTD=y CONFIG_PHYLIB=y +CONFIG_PHY_ATHEROS=y +CONFIG_DM_ETH=y +CONFIG_DM_MDIO=y +CONFIG_FEC_MXC=y +CONFIG_RGMII=y CONFIG_MII=y CONFIG_PINCTRL=y CONFIG_PINCTRL_IMX7=y diff --git a/configs/pico-imx7d_defconfig b/configs/pico-imx7d_defconfig index bf4d56ec2c..a1975b9d56 100644 --- a/configs/pico-imx7d_defconfig +++ b/configs/pico-imx7d_defconfig @@ -59,6 +59,11 @@ CONFIG_SUPPORT_EMMC_BOOT=y CONFIG_FSL_USDHC=y CONFIG_MTD=y CONFIG_PHYLIB=y +CONFIG_PHY_ATHEROS=y +CONFIG_DM_ETH=y +CONFIG_DM_MDIO=y +CONFIG_FEC_MXC=y +CONFIG_RGMII=y CONFIG_MII=y CONFIG_PINCTRL=y CONFIG_PINCTRL_IMX7=y diff --git a/configs/pico-nymph-imx7d_defconfig b/configs/pico-nymph-imx7d_defconfig index 94d73ee051..2437a64dd0 100644 --- a/configs/pico-nymph-imx7d_defconfig +++ b/configs/pico-nymph-imx7d_defconfig @@ -59,6 +59,11 @@ CONFIG_SUPPORT_EMMC_BOOT=y CONFIG_FSL_USDHC=y CONFIG_MTD=y CONFIG_PHYLIB=y +CONFIG_PHY_ATHEROS=y +CONFIG_DM_ETH=y +CONFIG_DM_MDIO=y +CONFIG_FEC_MXC=y +CONFIG_RGMII=y CONFIG_MII=y CONFIG_PINCTRL=y CONFIG_PINCTRL_IMX7=y diff --git a/configs/pico-pi-imx7d_defconfig b/configs/pico-pi-imx7d_defconfig index c6f5b872c3..f1e439602b 100644 --- a/configs/pico-pi-imx7d_defconfig +++ b/configs/pico-pi-imx7d_defconfig @@ -59,6 +59,11 @@ CONFIG_SUPPORT_EMMC_BOOT=y CONFIG_FSL_USDHC=y CONFIG_MTD=y CONFIG_PHYLIB=y +CONFIG_PHY_ATHEROS=y +CONFIG_DM_ETH=y +CONFIG_DM_MDIO=y +CONFIG_FEC_MXC=y +CONFIG_RGMII=y CONFIG_MII=y CONFIG_PINCTRL=y CONFIG_PINCTRL_IMX7=y diff --git a/include/configs/pico-imx7d.h b/include/configs/pico-imx7d.h index 1d0df9dd44..4dc206566e 100644 --- a/include/configs/pico-imx7d.h +++ b/include/configs/pico-imx7d.h @@ -29,17 +29,6 @@ #define CONFIG_MXC_UART_BASE UART5_IPS_BASE_ADDR -/* Network */ -#define CONFIG_FEC_MXC -#define CONFIG_FEC_XCV_TYPE RGMII -#define CONFIG_ETHPRIME "FEC" -#define CONFIG_FEC_MXC_PHYADDR 1
-#define CONFIG_PHY_ATHEROS
-/* ENET1 */ -#define IMX_FEC_BASE ENET_IPS_BASE_ADDR
/* MMC Config */ #define CONFIG_SYS_FSL_ESDHC_ADDR 0
On Sun, Jan 5, 2020 at 7:32 AM Stefano Babic sbabic@denx.de wrote:
On 04/01/20 13:03, Joris Offouga wrote:
Hi Stefano,
Sorry for the delay,
Le 28/12/2019 à 12:31, Stefano Babic a écrit :
Hi Joris,
On 08/12/19 18:02, Joris Offouga wrote:
Signed-off-by: Joris Offouga offougajoris@gmail.com
board/technexion/pico-imx7d/pico-imx7d.c | 46 ------------------------ configs/pico-dwarf-imx7d_defconfig | 5 +++ configs/pico-hobbit-imx7d_defconfig | 5 +++ configs/pico-imx7d_bl33_defconfig | 5 +++ configs/pico-imx7d_defconfig | 5 +++ configs/pico-nymph-imx7d_defconfig | 5 +++ configs/pico-pi-imx7d_defconfig | 5 +++ include/configs/pico-imx7d.h | 11 ------ 8 files changed, 30 insertions(+), 57 deletions(-)
I get build errors with pico-imx7d_bl33.
https://travis-ci.org/sbabic/u-boot-imx/jobs/630056283Could you take a look, please ?
I tried to correct the compilation error but I did not find good ways to do it, I suggest you remove the usb ethernet support from the configuration :
-CONFIG_USB_ETHER=y -CONFIG_USB_ETH_CDC=y -CONFIG_USBNET_HOST_ADDR="de:ad:be:af:00:00"
If you agree I send V2
If the board maintainer (Otavio) agrees it, I am fine.
I agree. However, do this as a commit prior to this one so if someone ever wants to revert it is easy. Also, explain the reasoning on the commit log.
Also sync device tree with v5.5-rc1 Signed-off-by: Joris Offouga offougajoris@gmail.com --- arch/arm/dts/imx7d-sdb-u-boot.dtsi | 3 + arch/arm/dts/imx7d-sdb.dts | 785 ++++++++++++++++------ board/freescale/mx7dsabresd/mx7dsabresd.c | 62 -- configs/mx7dsabresd_defconfig | 6 + configs/mx7dsabresd_qspi_defconfig | 6 + include/configs/mx7dsabresd.h | 10 - 6 files changed, 589 insertions(+), 283 deletions(-) create mode 100644 arch/arm/dts/imx7d-sdb-u-boot.dtsi
diff --git a/arch/arm/dts/imx7d-sdb-u-boot.dtsi b/arch/arm/dts/imx7d-sdb-u-boot.dtsi new file mode 100644 index 0000000000..05dd74eee1 --- /dev/null +++ b/arch/arm/dts/imx7d-sdb-u-boot.dtsi @@ -0,0 +1,3 @@ +&fec2 { + status = "disable"; +}; diff --git a/arch/arm/dts/imx7d-sdb.dts b/arch/arm/dts/imx7d-sdb.dts index 76aa69a35b..8191ac7c33 100644 --- a/arch/arm/dts/imx7d-sdb.dts +++ b/arch/arm/dts/imx7d-sdb.dts @@ -11,253 +11,244 @@ model = "Freescale i.MX7 SabreSD Board"; compatible = "fsl,imx7d-sdb", "fsl,imx7d";
- aliases { - spi5 = &soft_spi; + chosen { + stdout-path = &uart1; };
- memory { + memory@80000000 { + device_type = "memory"; reg = <0x80000000 0x80000000>; };
- soft_spi: soft-spi { + gpio-keys { + compatible = "gpio-keys"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_gpio_keys>; + + volume-up { + label = "Volume Up"; + gpios = <&gpio5 11 GPIO_ACTIVE_LOW>; + linux,code = <KEY_VOLUMEUP>; + wakeup-source; + }; + + volume-down { + label = "Volume Down"; + gpios = <&gpio5 10 GPIO_ACTIVE_LOW>; + linux,code = <KEY_VOLUMEDOWN>; + wakeup-source; + }; + }; + + spi4 { compatible = "spi-gpio"; pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_spi1>; - status = "okay"; - gpio-sck = <&gpio1 13 0>; - gpio-mosi = <&gpio1 9 0>; - cs-gpios = <&gpio1 12 0>; + pinctrl-0 = <&pinctrl_spi4>; + gpio-sck = <&gpio1 13 GPIO_ACTIVE_LOW>; + gpio-mosi = <&gpio1 9 GPIO_ACTIVE_LOW>; + cs-gpios = <&gpio1 12 GPIO_ACTIVE_LOW>; num-chipselects = <1>; #address-cells = <1>; #size-cells = <0>;
- gpio_spi: gpio_spi@0 { + extended_io: gpio-expander@0 { compatible = "fairchild,74hc595"; gpio-controller; #gpio-cells = <2>; reg = <0>; registers-number = <1>; - registers-default = /bits/ 8 <0x74>; /* Enable PERI_3V3, SENSOR_RST_B and HDMI_RST*/ spi-max-frequency = <100000>; }; };
- regulators { - compatible = "simple-bus"; - #address-cells = <1>; - #size-cells = <0>; + reg_usb_otg1_vbus: regulator-usb-otg1-vbus { + compatible = "regulator-fixed"; + regulator-name = "usb_otg1_vbus"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + gpio = <&gpio1 5 GPIO_ACTIVE_HIGH>; + enable-active-high; + };
- reg_usb_otg1_vbus: regulator@0 { - compatible = "regulator-fixed"; - reg = <0>; - regulator-name = "usb_otg1_vbus"; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - gpio = <&gpio1 5 GPIO_ACTIVE_HIGH>; - enable-active-high; - }; + reg_usb_otg2_vbus: regulator-usb-otg2-vbus { + compatible = "regulator-fixed"; + regulator-name = "usb_otg2_vbus"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usb_otg2_vbus_reg>; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + gpio = <&gpio1 7 GPIO_ACTIVE_HIGH>; + enable-active-high; + };
- reg_usb_otg2_vbus: regulator@1 { - compatible = "regulator-fixed"; - reg = <1>; - regulator-name = "usb_otg2_vbus"; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - gpio = <&gpio1 7 GPIO_ACTIVE_HIGH>; - enable-active-high; - }; - - reg_sd1_vmmc: regulator@3 { - compatible = "regulator-fixed"; - regulator-name = "VDD_SD1"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - gpio = <&gpio5 2 GPIO_ACTIVE_HIGH>; - startup-delay-us = <200000>; - enable-active-high; - }; + reg_vref_1v8: regulator-vref-1v8 { + compatible = "regulator-fixed"; + regulator-name = "vref-1v8"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; }; -};
-&iomuxc { - imx7d-sdb { - pinctrl_spi1: spi1grp { - fsl,pins = < - MX7D_PAD_GPIO1_IO09__GPIO1_IO9 0x59 - MX7D_PAD_GPIO1_IO12__GPIO1_IO12 0x59 - MX7D_PAD_GPIO1_IO13__GPIO1_IO13 0x59 - >; - }; + reg_brcm: regulator-brcm { + compatible = "regulator-fixed"; + gpio = <&gpio4 21 GPIO_ACTIVE_HIGH>; + enable-active-high; + regulator-name = "brcm_reg"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_brcm_reg>; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + startup-delay-us = <200000>; + };
- pinctrl_i2c1: i2c1grp { - fsl,pins = < - MX7D_PAD_I2C1_SDA__I2C1_SDA 0x4000007f - MX7D_PAD_I2C1_SCL__I2C1_SCL 0x4000007f - >; - }; + reg_lcd_3v3: regulator-lcd-3v3 { + compatible = "regulator-fixed"; + regulator-name = "lcd-3v3"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + gpio = <&extended_io 7 GPIO_ACTIVE_LOW>; + };
- pinctrl_i2c2: i2c2grp { - fsl,pins = < - MX7D_PAD_I2C2_SDA__I2C2_SDA 0x4000007f - MX7D_PAD_I2C2_SCL__I2C2_SCL 0x4000007f - >; - }; + reg_can2_3v3: regulator-can2-3v3 { + compatible = "regulator-fixed"; + regulator-name = "can2-3v3"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_flexcan2_reg>; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + gpio = <&gpio2 14 GPIO_ACTIVE_LOW>; + };
- pinctrl_i2c3: i2c3grp { - fsl,pins = < - MX7D_PAD_I2C3_SDA__I2C3_SDA 0x4000007f - MX7D_PAD_I2C3_SCL__I2C3_SCL 0x4000007f - >; - }; + reg_fec2_3v3: regulator-fec2-3v3 { + compatible = "regulator-fixed"; + regulator-name = "fec2-3v3"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_enet2_reg>; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + gpio = <&gpio1 4 GPIO_ACTIVE_LOW>; + };
- pinctrl_i2c4: i2c4grp { - fsl,pins = < - MX7D_PAD_SAI1_RX_BCLK__I2C4_SDA 0x4000007f - MX7D_PAD_SAI1_RX_SYNC__I2C4_SCL 0x4000007f - >; - }; + backlight: backlight { + compatible = "pwm-backlight"; + pwms = <&pwm1 0 5000000 0>; + brightness-levels = <0 4 8 16 32 64 128 255>; + default-brightness-level = <6>; + status = "okay"; + };
- pinctrl_usdhc1_gpio: usdhc1_gpiogrp { - fsl,pins = < - MX7D_PAD_SD1_CD_B__GPIO5_IO0 0x59 /* CD */ - MX7D_PAD_SD1_WP__GPIO5_IO1 0x59 /* WP */ - MX7D_PAD_SD1_RESET_B__GPIO5_IO2 0x59 /* vmmc */ - MX7D_PAD_GPIO1_IO08__SD1_VSELECT 0x59 /* VSELECT */ - >; - }; + panel { + compatible = "innolux,at043tn24"; + backlight = <&backlight>; + power-supply = <®_lcd_3v3>;
- pinctrl_usdhc1: usdhc1grp { - fsl,pins = < - MX7D_PAD_SD1_CMD__SD1_CMD 0x59 - MX7D_PAD_SD1_CLK__SD1_CLK 0x19 - MX7D_PAD_SD1_DATA0__SD1_DATA0 0x59 - MX7D_PAD_SD1_DATA1__SD1_DATA1 0x59 - MX7D_PAD_SD1_DATA2__SD1_DATA2 0x59 - MX7D_PAD_SD1_DATA3__SD1_DATA3 0x59 - >; + port { + panel_in: endpoint { + remote-endpoint = <&display_out>; + }; }; + }; +};
- pinctrl_usdhc1_100mhz: usdhc1grp_100mhz { - fsl,pins = < - MX7D_PAD_SD1_CMD__SD1_CMD 0x5a - MX7D_PAD_SD1_CLK__SD1_CLK 0x1a - MX7D_PAD_SD1_DATA0__SD1_DATA0 0x5a - MX7D_PAD_SD1_DATA1__SD1_DATA1 0x5a - MX7D_PAD_SD1_DATA2__SD1_DATA2 0x5a - MX7D_PAD_SD1_DATA3__SD1_DATA3 0x5a - >; - }; +&adc1 { + vref-supply = <®_vref_1v8>; + status = "okay"; +};
- pinctrl_usdhc1_200mhz: usdhc1grp_200mhz { - fsl,pins = < - MX7D_PAD_SD1_CMD__SD1_CMD 0x5b - MX7D_PAD_SD1_CLK__SD1_CLK 0x1b - MX7D_PAD_SD1_DATA0__SD1_DATA0 0x5b - MX7D_PAD_SD1_DATA1__SD1_DATA1 0x5b - MX7D_PAD_SD1_DATA2__SD1_DATA2 0x5b - MX7D_PAD_SD1_DATA3__SD1_DATA3 0x5b - >; - }; +&adc2 { + vref-supply = <®_vref_1v8>; + status = "okay"; +};
- pinctrl_usdhc2: usdhc2grp { - fsl,pins = < - MX7D_PAD_SD2_CMD__SD2_CMD 0x59 - MX7D_PAD_SD2_CLK__SD2_CLK 0x19 - MX7D_PAD_SD2_DATA0__SD2_DATA0 0x59 - MX7D_PAD_SD2_DATA1__SD2_DATA1 0x59 - MX7D_PAD_SD2_DATA2__SD2_DATA2 0x59 - MX7D_PAD_SD2_DATA3__SD2_DATA3 0x59 - MX7D_PAD_ECSPI2_MOSI__GPIO4_IO21 0x19 /* WL_REG_ON */ - MX7D_PAD_ECSPI2_SCLK__GPIO4_IO20 0x19 /* WL_HOST_WAKE */ - >; - }; +&cpu0 { + cpu-supply = <&sw1a_reg>; +};
- pinctrl_usdhc2_100mhz: usdhc2grp_100mhz { - fsl,pins = < - MX7D_PAD_SD2_CMD__SD2_CMD 0x5a - MX7D_PAD_SD2_CLK__SD2_CLK 0x1a - MX7D_PAD_SD2_DATA0__SD2_DATA0 0x5a - MX7D_PAD_SD2_DATA1__SD2_DATA1 0x5a - MX7D_PAD_SD2_DATA2__SD2_DATA2 0x5a - MX7D_PAD_SD2_DATA3__SD2_DATA3 0x5a - >; - }; +&ecspi3 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_ecspi3>; + cs-gpios = <&gpio5 9 GPIO_ACTIVE_HIGH>; + status = "okay";
- pinctrl_usdhc2_200mhz: usdhc2grp_200mhz { - fsl,pins = < - MX7D_PAD_SD2_CMD__SD2_CMD 0x5b - MX7D_PAD_SD2_CLK__SD2_CLK 0x1b - MX7D_PAD_SD2_DATA0__SD2_DATA0 0x5b - MX7D_PAD_SD2_DATA1__SD2_DATA1 0x5b - MX7D_PAD_SD2_DATA2__SD2_DATA2 0x5b - MX7D_PAD_SD2_DATA3__SD2_DATA3 0x5b - >; - }; + tsc2046@0 { + compatible = "ti,tsc2046"; + reg = <0>; + spi-max-frequency = <1000000>; + pinctrl-names ="default"; + pinctrl-0 = <&pinctrl_tsc2046_pendown>; + interrupt-parent = <&gpio2>; + interrupts = <29 0>; + pendown-gpio = <&gpio2 29 GPIO_ACTIVE_HIGH>; + ti,x-min = /bits/ 16 <0>; + ti,x-max = /bits/ 16 <0>; + ti,y-min = /bits/ 16 <0>; + ti,y-max = /bits/ 16 <0>; + ti,pressure-max = /bits/ 16 <0>; + ti,x-plate-ohms = /bits/ 16 <400>; + wakeup-source; + }; +};
- pinctrl_usdhc3: usdhc3grp { - fsl,pins = < - MX7D_PAD_SD3_CMD__SD3_CMD 0x59 - MX7D_PAD_SD3_CLK__SD3_CLK 0x19 - MX7D_PAD_SD3_DATA0__SD3_DATA0 0x59 - MX7D_PAD_SD3_DATA1__SD3_DATA1 0x59 - MX7D_PAD_SD3_DATA2__SD3_DATA2 0x59 - MX7D_PAD_SD3_DATA3__SD3_DATA3 0x59 - MX7D_PAD_SD3_DATA4__SD3_DATA4 0x59 - MX7D_PAD_SD3_DATA5__SD3_DATA5 0x59 - MX7D_PAD_SD3_DATA6__SD3_DATA6 0x59 - MX7D_PAD_SD3_DATA7__SD3_DATA7 0x59 - MX7D_PAD_SD3_STROBE__SD3_STROBE 0x19 - >; - }; +&fec1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_enet1>; + assigned-clocks = <&clks IMX7D_ENET1_TIME_ROOT_SRC>, + <&clks IMX7D_ENET1_TIME_ROOT_CLK>; + assigned-clock-parents = <&clks IMX7D_PLL_ENET_MAIN_100M_CLK>; + assigned-clock-rates = <0>, <100000000>; + phy-mode = "rgmii"; + phy-handle = <ðphy0>; + fsl,magic-packet; + phy-reset-gpios = <&extended_io 5 GPIO_ACTIVE_LOW>; + status = "okay";
- pinctrl_usdhc3_100mhz: usdhc3grp_100mhz { - fsl,pins = < - MX7D_PAD_SD3_CMD__SD3_CMD 0x5a - MX7D_PAD_SD3_CLK__SD3_CLK 0x1a - MX7D_PAD_SD3_DATA0__SD3_DATA0 0x5a - MX7D_PAD_SD3_DATA1__SD3_DATA1 0x5a - MX7D_PAD_SD3_DATA2__SD3_DATA2 0x5a - MX7D_PAD_SD3_DATA3__SD3_DATA3 0x5a - MX7D_PAD_SD3_DATA4__SD3_DATA4 0x5a - MX7D_PAD_SD3_DATA5__SD3_DATA5 0x5a - MX7D_PAD_SD3_DATA6__SD3_DATA6 0x5a - MX7D_PAD_SD3_DATA7__SD3_DATA7 0x5a - MX7D_PAD_SD3_STROBE__SD3_STROBE 0x1a - >; + mdio { + #address-cells = <1>; + #size-cells = <0>; + + ethphy0: ethernet-phy@0 { + reg = <0>; };
- pinctrl_usdhc3_200mhz: usdhc3grp_200mhz { - fsl,pins = < - MX7D_PAD_SD3_CMD__SD3_CMD 0x5b - MX7D_PAD_SD3_CLK__SD3_CLK 0x1b - MX7D_PAD_SD3_DATA0__SD3_DATA0 0x5b - MX7D_PAD_SD3_DATA1__SD3_DATA1 0x5b - MX7D_PAD_SD3_DATA2__SD3_DATA2 0x5b - MX7D_PAD_SD3_DATA3__SD3_DATA3 0x5b - MX7D_PAD_SD3_DATA4__SD3_DATA4 0x5b - MX7D_PAD_SD3_DATA5__SD3_DATA5 0x5b - MX7D_PAD_SD3_DATA6__SD3_DATA6 0x5b - MX7D_PAD_SD3_DATA7__SD3_DATA7 0x5b - MX7D_PAD_SD3_STROBE__SD3_STROBE 0x1b - >; + ethphy1: ethernet-phy@1 { + reg = <1>; }; }; };
+&fec2 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_enet2>; + assigned-clocks = <&clks IMX7D_ENET2_TIME_ROOT_SRC>, + <&clks IMX7D_ENET2_TIME_ROOT_CLK>; + assigned-clock-parents = <&clks IMX7D_PLL_ENET_MAIN_100M_CLK>; + assigned-clock-rates = <0>, <100000000>; + phy-mode = "rgmii"; + phy-handle = <ðphy1>; + phy-supply = <®_fec2_3v3>; + fsl,magic-packet; + status = "okay"; +}; + +&flexcan2 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_flexcan2>; + xceiver-supply = <®_can2_3v3>; + status = "okay"; +}; + &i2c1 { - clock-frequency = <100000>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_i2c1>; status = "okay";
- pmic: pfuze3000@08 { + pmic: pfuze3000@8 { compatible = "fsl,pfuze3000"; reg = <0x08>;
regulators { sw1a_reg: sw1a { regulator-min-microvolt = <700000>; - regulator-max-microvolt = <3300000>; + regulator-max-microvolt = <1475000>; regulator-boot-on; regulator-always-on; regulator-ramp-delay = <6250>; @@ -273,8 +264,8 @@ };
sw2_reg: sw2 { - regulator-min-microvolt = <1500000>; - regulator-max-microvolt = <1850000>; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; regulator-boot-on; regulator-always-on; }; @@ -312,7 +303,6 @@ vgen2_reg: vldo2 { regulator-min-microvolt = <800000>; regulator-max-microvolt = <1550000>; - regulator-always-on; };
vgen3_reg: vccsd { @@ -334,8 +324,8 @@ };
vgen6_reg: vldo4 { - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <3300000>; + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <2800000>; regulator-always-on; }; }; @@ -343,36 +333,87 @@ };
&i2c2 { - clock-frequency = <100000>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_i2c2>; status = "okay"; + + mpl3115@60 { + compatible = "fsl,mpl3115"; + reg = <0x60>; + }; };
&i2c3 { - clock-frequency = <100000>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_i2c3>; status = "okay"; };
&i2c4 { - clock-frequency = <100000>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_i2c4>; status = "okay"; + + codec: wm8960@1a { + compatible = "wlf,wm8960"; + reg = <0x1a>; + clocks = <&clks IMX7D_AUDIO_MCLK_ROOT_CLK>; + clock-names = "mclk"; + wlf,shared-lrclk; + }; +}; + +&lcdif { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_lcdif>; + status = "okay"; + + port { + display_out: endpoint { + remote-endpoint = <&panel_in>; + }; + }; +}; + +&snvs_pwrkey { + status = "okay"; +}; + +&uart1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart1>; + assigned-clocks = <&clks IMX7D_UART1_ROOT_SRC>; + assigned-clock-parents = <&clks IMX7D_PLL_SYS_MAIN_240M_CLK>; + status = "okay"; +}; + +&uart6 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart6>; + assigned-clocks = <&clks IMX7D_UART6_ROOT_SRC>; + assigned-clock-parents = <&clks IMX7D_PLL_SYS_MAIN_240M_CLK>; + uart-has-rtscts; + status = "okay"; +}; + +&usbotg1 { + vbus-supply = <®_usb_otg1_vbus>; + status = "okay"; +}; + +&usbotg2 { + vbus-supply = <®_usb_otg2_vbus>; + dr_mode = "host"; + status = "okay"; };
&usdhc1 { - pinctrl-names = "default", "state_100mhz", "state_200mhz"; - pinctrl-0 = <&pinctrl_usdhc1>, <&pinctrl_usdhc1_gpio>; - pinctrl-1 = <&pinctrl_usdhc1_100mhz>, <&pinctrl_usdhc1_gpio>; - pinctrl-2 = <&pinctrl_usdhc1_200mhz>, <&pinctrl_usdhc1_gpio>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usdhc1>; cd-gpios = <&gpio5 0 GPIO_ACTIVE_LOW>; wp-gpios = <&gpio5 1 GPIO_ACTIVE_HIGH>; - vmmc-supply = <®_sd1_vmmc>; - fsl,tuning-start-tap = <20>; - fsl,tuning-step= <2>; + wakeup-source; + keep-power-in-suspend; status = "okay"; };
@@ -381,9 +422,11 @@ pinctrl-0 = <&pinctrl_usdhc2>; pinctrl-1 = <&pinctrl_usdhc2_100mhz>; pinctrl-2 = <&pinctrl_usdhc2_200mhz>; + wakeup-source; + keep-power-in-suspend; non-removable; - fsl,tuning-start-tap = <20>; - fsl,tuning-step= <2>; + vmmc-supply = <®_brcm>; + fsl,tuning-step = <2>; status = "okay"; };
@@ -392,9 +435,329 @@ pinctrl-0 = <&pinctrl_usdhc3>; pinctrl-1 = <&pinctrl_usdhc3_100mhz>; pinctrl-2 = <&pinctrl_usdhc3_200mhz>; + assigned-clocks = <&clks IMX7D_USDHC3_ROOT_CLK>; + assigned-clock-rates = <400000000>; bus-width = <8>; + fsl,tuning-step = <2>; non-removable; - fsl,tuning-start-tap = <20>; - fsl,tuning-step= <2>; status = "okay"; }; + +&wdog1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_wdog>; + fsl,ext-reset-output; +}; + +&iomuxc { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_hog>; + + imx7d-sdb { + pinctrl_brcm_reg: brcmreggrp { + fsl,pins = < + MX7D_PAD_ECSPI2_MOSI__GPIO4_IO21 0x14 + >; + }; + + pinctrl_ecspi3: ecspi3grp { + fsl,pins = < + MX7D_PAD_SAI2_TX_SYNC__ECSPI3_MISO 0x2 + MX7D_PAD_SAI2_TX_BCLK__ECSPI3_MOSI 0x2 + MX7D_PAD_SAI2_RX_DATA__ECSPI3_SCLK 0x2 + MX7D_PAD_SD2_CD_B__GPIO5_IO9 0x59 + >; + }; + + pinctrl_enet1: enet1grp { + fsl,pins = < + MX7D_PAD_GPIO1_IO10__ENET1_MDIO 0x3 + MX7D_PAD_GPIO1_IO11__ENET1_MDC 0x3 + MX7D_PAD_ENET1_RGMII_TXC__ENET1_RGMII_TXC 0x1 + MX7D_PAD_ENET1_RGMII_TD0__ENET1_RGMII_TD0 0x1 + MX7D_PAD_ENET1_RGMII_TD1__ENET1_RGMII_TD1 0x1 + MX7D_PAD_ENET1_RGMII_TD2__ENET1_RGMII_TD2 0x1 + MX7D_PAD_ENET1_RGMII_TD3__ENET1_RGMII_TD3 0x1 + MX7D_PAD_ENET1_RGMII_TX_CTL__ENET1_RGMII_TX_CTL 0x1 + MX7D_PAD_ENET1_RGMII_RXC__ENET1_RGMII_RXC 0x1 + MX7D_PAD_ENET1_RGMII_RD0__ENET1_RGMII_RD0 0x1 + MX7D_PAD_ENET1_RGMII_RD1__ENET1_RGMII_RD1 0x1 + MX7D_PAD_ENET1_RGMII_RD2__ENET1_RGMII_RD2 0x1 + MX7D_PAD_ENET1_RGMII_RD3__ENET1_RGMII_RD3 0x1 + MX7D_PAD_ENET1_RGMII_RX_CTL__ENET1_RGMII_RX_CTL 0x1 + >; + }; + + pinctrl_enet2: enet2grp { + fsl,pins = < + MX7D_PAD_EPDC_GDSP__ENET2_RGMII_TXC 0x1 + MX7D_PAD_EPDC_SDCE2__ENET2_RGMII_TD0 0x1 + MX7D_PAD_EPDC_SDCE3__ENET2_RGMII_TD1 0x1 + MX7D_PAD_EPDC_GDCLK__ENET2_RGMII_TD2 0x1 + MX7D_PAD_EPDC_GDOE__ENET2_RGMII_TD3 0x1 + MX7D_PAD_EPDC_GDRL__ENET2_RGMII_TX_CTL 0x1 + MX7D_PAD_EPDC_SDCE1__ENET2_RGMII_RXC 0x1 + MX7D_PAD_EPDC_SDCLK__ENET2_RGMII_RD0 0x1 + MX7D_PAD_EPDC_SDLE__ENET2_RGMII_RD1 0x1 + MX7D_PAD_EPDC_SDOE__ENET2_RGMII_RD2 0x1 + MX7D_PAD_EPDC_SDSHR__ENET2_RGMII_RD3 0x1 + MX7D_PAD_EPDC_SDCE0__ENET2_RGMII_RX_CTL 0x1 + >; + }; + + pinctrl_enet2_reg: enet2reggrp { + fsl,pins = < + MX7D_PAD_LPSR_GPIO1_IO04__GPIO1_IO4 0x14 + >; + }; + + pinctrl_flexcan2: flexcan2grp { + fsl,pins = < + MX7D_PAD_GPIO1_IO14__FLEXCAN2_RX 0x59 + MX7D_PAD_GPIO1_IO15__FLEXCAN2_TX 0x59 + >; + }; + + pinctrl_flexcan2_reg: flexcan2reggrp { + fsl,pins = < + MX7D_PAD_EPDC_DATA14__GPIO2_IO14 0x59 /* CAN_STBY */ + >; + }; + + pinctrl_gpio_keys: gpio_keysgrp { + fsl,pins = < + MX7D_PAD_SD2_RESET_B__GPIO5_IO11 0x59 + MX7D_PAD_SD2_WP__GPIO5_IO10 0x59 + >; + }; + + pinctrl_hog: hoggrp { + fsl,pins = < + MX7D_PAD_ECSPI2_SS0__GPIO4_IO23 0x34 /* bt reg on */ + >; + }; + + pinctrl_i2c1: i2c1grp { + fsl,pins = < + MX7D_PAD_I2C1_SDA__I2C1_SDA 0x4000007f + MX7D_PAD_I2C1_SCL__I2C1_SCL 0x4000007f + >; + }; + + pinctrl_i2c2: i2c2grp { + fsl,pins = < + MX7D_PAD_I2C2_SDA__I2C2_SDA 0x4000007f + MX7D_PAD_I2C2_SCL__I2C2_SCL 0x4000007f + >; + }; + + pinctrl_i2c3: i2c3grp { + fsl,pins = < + MX7D_PAD_I2C3_SDA__I2C3_SDA 0x4000007f + MX7D_PAD_I2C3_SCL__I2C3_SCL 0x4000007f + >; + }; + + pinctrl_i2c4: i2c4grp { + fsl,pins = < + MX7D_PAD_SAI1_RX_BCLK__I2C4_SDA 0x4000007f + MX7D_PAD_SAI1_RX_SYNC__I2C4_SCL 0x4000007f + >; + }; + + pinctrl_lcdif: lcdifgrp { + fsl,pins = < + MX7D_PAD_LCD_DATA00__LCD_DATA0 0x79 + MX7D_PAD_LCD_DATA01__LCD_DATA1 0x79 + MX7D_PAD_LCD_DATA02__LCD_DATA2 0x79 + MX7D_PAD_LCD_DATA03__LCD_DATA3 0x79 + MX7D_PAD_LCD_DATA04__LCD_DATA4 0x79 + MX7D_PAD_LCD_DATA05__LCD_DATA5 0x79 + MX7D_PAD_LCD_DATA06__LCD_DATA6 0x79 + MX7D_PAD_LCD_DATA07__LCD_DATA7 0x79 + MX7D_PAD_LCD_DATA08__LCD_DATA8 0x79 + MX7D_PAD_LCD_DATA09__LCD_DATA9 0x79 + MX7D_PAD_LCD_DATA10__LCD_DATA10 0x79 + MX7D_PAD_LCD_DATA11__LCD_DATA11 0x79 + MX7D_PAD_LCD_DATA12__LCD_DATA12 0x79 + MX7D_PAD_LCD_DATA13__LCD_DATA13 0x79 + MX7D_PAD_LCD_DATA14__LCD_DATA14 0x79 + MX7D_PAD_LCD_DATA15__LCD_DATA15 0x79 + MX7D_PAD_LCD_DATA16__LCD_DATA16 0x79 + MX7D_PAD_LCD_DATA17__LCD_DATA17 0x79 + MX7D_PAD_LCD_DATA18__LCD_DATA18 0x79 + MX7D_PAD_LCD_DATA19__LCD_DATA19 0x79 + MX7D_PAD_LCD_DATA20__LCD_DATA20 0x79 + MX7D_PAD_LCD_DATA21__LCD_DATA21 0x79 + MX7D_PAD_LCD_DATA22__LCD_DATA22 0x79 + MX7D_PAD_LCD_DATA23__LCD_DATA23 0x79 + MX7D_PAD_LCD_CLK__LCD_CLK 0x79 + MX7D_PAD_LCD_ENABLE__LCD_ENABLE 0x79 + MX7D_PAD_LCD_VSYNC__LCD_VSYNC 0x79 + MX7D_PAD_LCD_HSYNC__LCD_HSYNC 0x79 + MX7D_PAD_LCD_RESET__LCD_RESET 0x79 + >; + }; + + pinctrl_spi4: spi4grp { + fsl,pins = < + MX7D_PAD_GPIO1_IO09__GPIO1_IO9 0x59 + MX7D_PAD_GPIO1_IO12__GPIO1_IO12 0x59 + MX7D_PAD_GPIO1_IO13__GPIO1_IO13 0x59 + >; + }; + + pinctrl_tsc2046_pendown: tsc2046_pendown { + fsl,pins = < + MX7D_PAD_EPDC_BDR1__GPIO2_IO29 0x59 + >; + }; + + pinctrl_uart1: uart1grp { + fsl,pins = < + MX7D_PAD_UART1_TX_DATA__UART1_DCE_TX 0x79 + MX7D_PAD_UART1_RX_DATA__UART1_DCE_RX 0x79 + >; + }; + + pinctrl_uart5: uart5grp { + fsl,pins = < + MX7D_PAD_SAI1_TX_BCLK__UART5_DCE_TX 0x79 + MX7D_PAD_SAI1_RX_DATA__UART5_DCE_RX 0x79 + MX7D_PAD_SAI1_TX_SYNC__UART5_DCE_CTS 0x79 + MX7D_PAD_SAI1_TX_DATA__UART5_DCE_RTS 0x79 + >; + }; + + pinctrl_uart6: uart6grp { + fsl,pins = < + MX7D_PAD_ECSPI1_MOSI__UART6_DCE_TX 0x79 + MX7D_PAD_ECSPI1_SCLK__UART6_DCE_RX 0x79 + MX7D_PAD_ECSPI1_SS0__UART6_DCE_CTS 0x79 + MX7D_PAD_ECSPI1_MISO__UART6_DCE_RTS 0x79 + >; + }; + + pinctrl_usdhc1: usdhc1grp { + fsl,pins = < + MX7D_PAD_SD1_CMD__SD1_CMD 0x59 + MX7D_PAD_SD1_CLK__SD1_CLK 0x19 + MX7D_PAD_SD1_DATA0__SD1_DATA0 0x59 + MX7D_PAD_SD1_DATA1__SD1_DATA1 0x59 + MX7D_PAD_SD1_DATA2__SD1_DATA2 0x59 + MX7D_PAD_SD1_DATA3__SD1_DATA3 0x59 + MX7D_PAD_SD1_CD_B__GPIO5_IO0 0x59 /* CD */ + MX7D_PAD_SD1_WP__GPIO5_IO1 0x59 /* WP */ + MX7D_PAD_SD1_RESET_B__GPIO5_IO2 0x59 /* vmmc */ + >; + }; + + pinctrl_usdhc2: usdhc2grp { + fsl,pins = < + MX7D_PAD_SD2_CMD__SD2_CMD 0x59 + MX7D_PAD_SD2_CLK__SD2_CLK 0x19 + MX7D_PAD_SD2_DATA0__SD2_DATA0 0x59 + MX7D_PAD_SD2_DATA1__SD2_DATA1 0x59 + MX7D_PAD_SD2_DATA2__SD2_DATA2 0x59 + MX7D_PAD_SD2_DATA3__SD2_DATA3 0x59 + >; + }; + + pinctrl_usdhc2_100mhz: usdhc2grp_100mhz { + fsl,pins = < + MX7D_PAD_SD2_CMD__SD2_CMD 0x5a + MX7D_PAD_SD2_CLK__SD2_CLK 0x1a + MX7D_PAD_SD2_DATA0__SD2_DATA0 0x5a + MX7D_PAD_SD2_DATA1__SD2_DATA1 0x5a + MX7D_PAD_SD2_DATA2__SD2_DATA2 0x5a + MX7D_PAD_SD2_DATA3__SD2_DATA3 0x5a + >; + }; + + pinctrl_usdhc2_200mhz: usdhc2grp_200mhz { + fsl,pins = < + MX7D_PAD_SD2_CMD__SD2_CMD 0x5b + MX7D_PAD_SD2_CLK__SD2_CLK 0x1b + MX7D_PAD_SD2_DATA0__SD2_DATA0 0x5b + MX7D_PAD_SD2_DATA1__SD2_DATA1 0x5b + MX7D_PAD_SD2_DATA2__SD2_DATA2 0x5b + MX7D_PAD_SD2_DATA3__SD2_DATA3 0x5b + >; + }; + + + pinctrl_usdhc3: usdhc3grp { + fsl,pins = < + MX7D_PAD_SD3_CMD__SD3_CMD 0x59 + MX7D_PAD_SD3_CLK__SD3_CLK 0x19 + MX7D_PAD_SD3_DATA0__SD3_DATA0 0x59 + MX7D_PAD_SD3_DATA1__SD3_DATA1 0x59 + MX7D_PAD_SD3_DATA2__SD3_DATA2 0x59 + MX7D_PAD_SD3_DATA3__SD3_DATA3 0x59 + MX7D_PAD_SD3_DATA4__SD3_DATA4 0x59 + MX7D_PAD_SD3_DATA5__SD3_DATA5 0x59 + MX7D_PAD_SD3_DATA6__SD3_DATA6 0x59 + MX7D_PAD_SD3_DATA7__SD3_DATA7 0x59 + MX7D_PAD_SD3_STROBE__SD3_STROBE 0x19 + >; + }; + + pinctrl_usdhc3_100mhz: usdhc3grp_100mhz { + fsl,pins = < + MX7D_PAD_SD3_CMD__SD3_CMD 0x5a + MX7D_PAD_SD3_CLK__SD3_CLK 0x1a + MX7D_PAD_SD3_DATA0__SD3_DATA0 0x5a + MX7D_PAD_SD3_DATA1__SD3_DATA1 0x5a + MX7D_PAD_SD3_DATA2__SD3_DATA2 0x5a + MX7D_PAD_SD3_DATA3__SD3_DATA3 0x5a + MX7D_PAD_SD3_DATA4__SD3_DATA4 0x5a + MX7D_PAD_SD3_DATA5__SD3_DATA5 0x5a + MX7D_PAD_SD3_DATA6__SD3_DATA6 0x5a + MX7D_PAD_SD3_DATA7__SD3_DATA7 0x5a + MX7D_PAD_SD3_STROBE__SD3_STROBE 0x1a + >; + }; + + pinctrl_usdhc3_200mhz: usdhc3grp_200mhz { + fsl,pins = < + MX7D_PAD_SD3_CMD__SD3_CMD 0x5b + MX7D_PAD_SD3_CLK__SD3_CLK 0x1b + MX7D_PAD_SD3_DATA0__SD3_DATA0 0x5b + MX7D_PAD_SD3_DATA1__SD3_DATA1 0x5b + MX7D_PAD_SD3_DATA2__SD3_DATA2 0x5b + MX7D_PAD_SD3_DATA3__SD3_DATA3 0x5b + MX7D_PAD_SD3_DATA4__SD3_DATA4 0x5b + MX7D_PAD_SD3_DATA5__SD3_DATA5 0x5b + MX7D_PAD_SD3_DATA6__SD3_DATA6 0x5b + MX7D_PAD_SD3_DATA7__SD3_DATA7 0x5b + MX7D_PAD_SD3_STROBE__SD3_STROBE 0x1b + >; + }; + }; +}; + +&pwm1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_pwm1>; + status = "okay"; +}; + +&iomuxc_lpsr { + pinctrl_wdog: wdoggrp { + fsl,pins = < + MX7D_PAD_LPSR_GPIO1_IO00__WDOG1_WDOG_B 0x74 + >; + }; + + pinctrl_pwm1: pwm1grp { + fsl,pins = < + MX7D_PAD_LPSR_GPIO1_IO01__PWM1_OUT 0x30 + >; + }; + + pinctrl_usb_otg2_vbus_reg: usbotg2vbusreggrp { + fsl,pins = < + MX7D_PAD_LPSR_GPIO1_IO07__GPIO1_IO7 0x14 + >; + }; +}; diff --git a/board/freescale/mx7dsabresd/mx7dsabresd.c b/board/freescale/mx7dsabresd/mx7dsabresd.c index f1120d67e3..70490ba68e 100644 --- a/board/freescale/mx7dsabresd/mx7dsabresd.c +++ b/board/freescale/mx7dsabresd/mx7dsabresd.c @@ -16,7 +16,6 @@ #include <fsl_esdhc_imx.h> #include <mmc.h> #include <miiphy.h> -#include <netdev.h> #include <power/pmic.h> #include <power/pfuze3000_pmic.h> #include "../common/pfuze.h" @@ -29,11 +28,6 @@ DECLARE_GLOBAL_DATA_PTR; #define UART_PAD_CTRL (PAD_CTL_DSE_3P3V_49OHM | \ PAD_CTL_PUS_PU100KOHM | PAD_CTL_HYS)
-#define ENET_PAD_CTRL (PAD_CTL_PUS_PU100KOHM | PAD_CTL_DSE_3P3V_49OHM) -#define ENET_PAD_CTRL_MII (PAD_CTL_DSE_3P3V_32OHM) - -#define ENET_RX_PAD_CTRL (PAD_CTL_PUS_PU100KOHM | PAD_CTL_DSE_3P3V_49OHM) - #define LCD_PAD_CTRL (PAD_CTL_HYS | PAD_CTL_PUS_PU100KOHM | \ PAD_CTL_DSE_3P3V_49OHM)
@@ -170,30 +164,6 @@ static int setup_lcd(void) } #endif
-#ifdef CONFIG_FEC_MXC -static iomux_v3_cfg_t const fec1_pads[] = { - MX7D_PAD_ENET1_RGMII_RX_CTL__ENET1_RGMII_RX_CTL | MUX_PAD_CTRL(ENET_RX_PAD_CTRL), - MX7D_PAD_ENET1_RGMII_RD0__ENET1_RGMII_RD0 | MUX_PAD_CTRL(ENET_RX_PAD_CTRL), - MX7D_PAD_ENET1_RGMII_RD1__ENET1_RGMII_RD1 | MUX_PAD_CTRL(ENET_RX_PAD_CTRL), - MX7D_PAD_ENET1_RGMII_RD2__ENET1_RGMII_RD2 | MUX_PAD_CTRL(ENET_RX_PAD_CTRL), - MX7D_PAD_ENET1_RGMII_RD3__ENET1_RGMII_RD3 | MUX_PAD_CTRL(ENET_RX_PAD_CTRL), - MX7D_PAD_ENET1_RGMII_RXC__ENET1_RGMII_RXC | MUX_PAD_CTRL(ENET_RX_PAD_CTRL), - MX7D_PAD_ENET1_RGMII_TX_CTL__ENET1_RGMII_TX_CTL | MUX_PAD_CTRL(ENET_PAD_CTRL), - MX7D_PAD_ENET1_RGMII_TD0__ENET1_RGMII_TD0 | MUX_PAD_CTRL(ENET_PAD_CTRL), - MX7D_PAD_ENET1_RGMII_TD1__ENET1_RGMII_TD1 | MUX_PAD_CTRL(ENET_PAD_CTRL), - MX7D_PAD_ENET1_RGMII_TD2__ENET1_RGMII_TD2 | MUX_PAD_CTRL(ENET_PAD_CTRL), - MX7D_PAD_ENET1_RGMII_TD3__ENET1_RGMII_TD3 | MUX_PAD_CTRL(ENET_PAD_CTRL), - MX7D_PAD_ENET1_RGMII_TXC__ENET1_RGMII_TXC | MUX_PAD_CTRL(ENET_PAD_CTRL), - MX7D_PAD_GPIO1_IO10__ENET1_MDIO | MUX_PAD_CTRL(ENET_PAD_CTRL_MII), - MX7D_PAD_GPIO1_IO11__ENET1_MDC | MUX_PAD_CTRL(ENET_PAD_CTRL_MII), -}; - -static void setup_iomux_fec(void) -{ - imx_iomux_v3_setup_multiple_pads(fec1_pads, ARRAY_SIZE(fec1_pads)); -} -#endif - static void setup_iomux_uart(void) { imx_iomux_v3_setup_multiple_pads(uart1_pads, ARRAY_SIZE(uart1_pads)); @@ -216,37 +186,6 @@ int mmc_map_to_kernel_blk(int dev_no) }
#ifdef CONFIG_FEC_MXC -int board_eth_init(bd_t *bis) -{ - int ret; - unsigned int gpio; - - ret = gpio_lookup_name("gpio_spi@0_5", NULL, NULL, &gpio); - if (ret) { - printf("GPIO: 'gpio_spi@0_5' not found\n"); - return -ENODEV; - } - - ret = gpio_request(gpio, "fec_rst"); - if (ret && ret != -EBUSY) { - printf("gpio: requesting pin %u failed\n", gpio); - return ret; - } - - gpio_direction_output(gpio, 0); - udelay(500); - gpio_direction_output(gpio, 1); - - setup_iomux_fec(); - - ret = fecmxc_initialize_multi(bis, 0, - CONFIG_FEC_MXC_PHYADDR, IMX_FEC_BASE); - if (ret) - printf("FEC1 MXC: %s:failed\n", __func__); - - return ret; -} - static int setup_fec(void) { struct iomuxc_gpr_base_regs *const iomuxc_gpr_regs @@ -260,7 +199,6 @@ static int setup_fec(void) return set_clk_enet(ENET_125MHZ); }
- int board_phy_config(struct phy_device *phydev) { /* enable rgmii rxc skew and phy mode select to RGMII copper */ diff --git a/configs/mx7dsabresd_defconfig b/configs/mx7dsabresd_defconfig index 3dac7136d2..48aa15a199 100644 --- a/configs/mx7dsabresd_defconfig +++ b/configs/mx7dsabresd_defconfig @@ -56,6 +56,12 @@ CONFIG_MMC_UHS_SUPPORT=y CONFIG_MMC_HS200_SUPPORT=y CONFIG_FSL_USDHC=y CONFIG_PHYLIB=y +CONFIG_PHY_BROADCOM=y +CONFIG_DM_ETH=y +CONFIG_DM_MDIO=y +CONFIG_DM_MDIO_MUX=y +CONFIG_FEC_MXC=y +CONFIG_RGMII=y CONFIG_MII=y CONFIG_PINCTRL=y CONFIG_PINCTRL_IMX7=y diff --git a/configs/mx7dsabresd_qspi_defconfig b/configs/mx7dsabresd_qspi_defconfig index 865ce30dc2..c105560305 100644 --- a/configs/mx7dsabresd_qspi_defconfig +++ b/configs/mx7dsabresd_qspi_defconfig @@ -61,6 +61,12 @@ CONFIG_SF_DEFAULT_SPEED=40000000 CONFIG_SPI_FLASH_EON=y CONFIG_SPI_FLASH_MACRONIX=y CONFIG_PHYLIB=y +CONFIG_PHY_BROADCOM=y +CONFIG_DM_ETH=y +CONFIG_DM_MDIO=y +CONFIG_DM_MDIO_MUX=y +CONFIG_FEC_MXC=y +CONFIG_RGMII=y CONFIG_MII=y CONFIG_PINCTRL=y CONFIG_PINCTRL_IMX7=y diff --git a/include/configs/mx7dsabresd.h b/include/configs/mx7dsabresd.h index 745507571d..f574669644 100644 --- a/include/configs/mx7dsabresd.h +++ b/include/configs/mx7dsabresd.h @@ -17,16 +17,6 @@ /* Size of malloc() pool */ #define CONFIG_SYS_MALLOC_LEN (32 * SZ_1M)
-/* Network */ -#define CONFIG_FEC_MXC -#define CONFIG_FEC_XCV_TYPE RGMII -#define CONFIG_ETHPRIME "FEC" -#define CONFIG_FEC_MXC_PHYADDR 0 - -#define CONFIG_PHY_BROADCOM -/* ENET1 */ -#define IMX_FEC_BASE ENET_IPS_BASE_ADDR - /* MMC Config*/ #define CONFIG_SYS_FSL_ESDHC_ADDR 0
Also sync device tree with v5.5-rc1 Signed-off-by: Joris Offouga offougajoris@gmail.com
Applied to u-boot-imx, -next, thanks !
Best regards, Stefano Babic
Hi Joris,
Has this patch been tested on the real hardware?
This is what we currently see:
U-Boot 2020.01-00620-g2d2f91a480 (Jan 20 2020 - 15:41:31 -0300)
CPU: Freescale i.MX7D rev1.2 1000 MHz (running at 792 MHz) CPU: Commercial temperature grade (0C to 95C) at 35C Reset cause: POR Model: Freescale i.MX7 SabreSD Board Board: i.MX7D SABRESD in secure mode DRAM: 1 GiB MMC: FSL_SDHC: 0, FSL_SDHC: 1, FSL_SDHC: 2 Loading Environment from MMC... OK Video: 480x272x24 In: serial Out: serial Err: serial Net: Could not get PHY for FEC0: addr 0 No ethernet found.
So Ethernet is not functional at all.
Do you plan to fix Ethernet on this board?
On Sun, Dec 8, 2019 at 2:02 PM Joris Offouga offougajoris@gmail.com wrote:
Also sync device tree with v5.5-rc1 Signed-off-by: Joris Offouga offougajoris@gmail.com
arch/arm/dts/imx7d-sdb-u-boot.dtsi | 3 + arch/arm/dts/imx7d-sdb.dts | 785 ++++++++++++++++------
Also, not happy that the dts sync was part of the same commit that converted to DM_ETH.
Thanks
Hi Fabio,
Le 20/01/2020 à 19:48, Fabio Estevam a écrit :
Hi Joris,
Has this patch been tested on the real hardware?
I tested and validate it before sending it, there must have been a problem with the merge.
This is what we currently see:
U-Boot 2020.01-00620-g2d2f91a480 (Jan 20 2020 - 15:41:31 -0300)
CPU: Freescale i.MX7D rev1.2 1000 MHz (running at 792 MHz) CPU: Commercial temperature grade (0C to 95C) at 35C Reset cause: POR Model: Freescale i.MX7 SabreSD Board Board: i.MX7D SABRESD in secure mode DRAM: 1 GiB MMC: FSL_SDHC: 0, FSL_SDHC: 1, FSL_SDHC: 2 Loading Environment from MMC... OK Video: 480x272x24 In: serial Out: serial Err: serial Net: Could not get PHY for FEC0: addr 0 No ethernet found.
So Ethernet is not functional at all.
Do you plan to fix Ethernet on this board?
On Sun, Dec 8, 2019 at 2:02 PM Joris Offouga offougajoris@gmail.com wrote:
Also sync device tree with v5.5-rc1 Signed-off-by: Joris Offouga offougajoris@gmail.com
arch/arm/dts/imx7d-sdb-u-boot.dtsi | 3 + arch/arm/dts/imx7d-sdb.dts | 785 ++++++++++++++++------
Also, not happy that the dts sync was part of the same commit that converted to DM_ETH.
Sorry for that indeed I should have made two different commit for this, I have the idea to revert the commit and I will send it split in two
Best regards,
Joris
Thanks
Hi Joris,
On Mon, Jan 20, 2020 at 5:21 PM Joris Offouga offougajoris@gmail.com wrote:
Sorry for that indeed I should have made two different commit for this, I have the idea to revert the commit and I will send it split in two
No need to revert. Let's focus on getting Ethernet to work again :-)
Thanks
Hi Fabio,
Le 20/01/2020 à 21:22, Fabio Estevam a écrit :
Hi Joris,
On Mon, Jan 20, 2020 at 5:21 PM Joris Offouga offougajoris@gmail.com wrote:
Sorry for that indeed I should have made two different commit for this, I have the idea to revert the commit and I will send it split in two
No need to revert. Let's focus on getting Ethernet to work again :-)
Thanks for your comprehension :-)
I think this bug is similar to the wandboard, I looked at this thread fairly quickly, did you finally fix it?
Thanks
Thanks
Hi Joris,
On Mon, Jan 20, 2020 at 5:26 PM Joris Offouga offougajoris@gmail.com wrote:
I think this bug is similar to the wandboard, I looked at this thread fairly quickly, did you finally fix it?
Which wandboard issue are you referring to?
Hi Fabio,
Le 20/01/2020 à 21:28, Fabio Estevam a écrit :
Hi Joris,
On Mon, Jan 20, 2020 at 5:26 PM Joris Offouga offougajoris@gmail.com wrote:
I think this bug is similar to the wandboard, I looked at this thread fairly quickly, did you finally fix it?
Which wandboard issue are you referring to?
This thread : https://lists.denx.de/pipermail/u-boot/2020-January/395560.html
Hi Joris,
On Mon, Jan 20, 2020 at 5:32 PM Joris Offouga offougajoris@gmail.com wrote:
This thread : https://lists.denx.de/pipermail/u-boot/2020-January/395560.html
This is an unrelated issue. wandboard support several versions and this issue happens with imx6dl-wandboard-revd1.
Ethernet does not work because revd1 is not properly detected (this is the root cause).
Hi Joris,
On Mon, Jan 20, 2020 at 5:37 PM Fabio Estevam festevam@gmail.com wrote:
Hi Joris,
On Mon, Jan 20, 2020 at 5:32 PM Joris Offouga offougajoris@gmail.com wrote:
This thread : https://lists.denx.de/pipermail/u-boot/2020-January/395560.html
This is an unrelated issue. wandboard support several versions and this issue happens with imx6dl-wandboard-revd1.
Ethernet does not work because revd1 is not properly detected (this is the root cause).
Just to avoid duplicate work: do you plan to fix Ethernet support on this board after DM_ETH conversion?
Thanks
Hi Fabio,
Le lun. 27 janv. 2020 à 16:58, Fabio Estevam festevam@gmail.com a écrit :
Hi Joris,
On Mon, Jan 20, 2020 at 5:37 PM Fabio Estevam festevam@gmail.com wrote:
Hi Joris,
On Mon, Jan 20, 2020 at 5:32 PM Joris Offouga offougajoris@gmail.com
wrote:
This thread : https://lists.denx.de/pipermail/u-boot/2020-January/395560.html
This is an unrelated issue. wandboard support several versions and this issue happens with imx6dl-wandboard-revd1.
Ethernet does not work because revd1 is not properly detected (this is the root cause).
Just to avoid duplicate work: do you plan to fix Ethernet support on this board after DM_ETH conversion?
I can't find a fix yet. If you find one it would be great.
Best regards, Joris
Thanks
Hi Joris,
On Mon, Jan 27, 2020 at 1:16 PM Joris OFFOUGA offougajoris@gmail.com wrote:
I can't find a fix yet. If you find one it would be great.
I noticed that the Ethernet regression happens because the ENET_RST_B signal keeps always at 0, which makes the PHY to never becomes active.
The Ethernet PHY reset comes from a GPIO expander (74LV595PW), which is connected to SPI GPIO lines.
Both the GPIO expander driver (CONFIG_DM_74X164) as well as the SPI GPIO driver (CONFIG_SOFT_SPI) are enabled at configs/mx7dsabresd_defconfig.
The device tree has:
&fec1 { .... phy-reset-gpios = <&extended_io 5 GPIO_ACTIVE_LOW>;
Port 5 of the 74LV595PW is the Ethernet PHY reset pin.
However, this is what we get in U-Boot:
Net: Could not get PHY for FEC0: addr 0 No ethernet found.
Not sure why DM is not properly bringing the Ethernet PHY back to 1.
Any ideas?
Thanks
On Mon, Jan 27, 2020 at 2:57 PM Fabio Estevam festevam@gmail.com wrote:
Hi Joris,
On Mon, Jan 27, 2020 at 1:16 PM Joris OFFOUGA offougajoris@gmail.com wrote:
I can't find a fix yet. If you find one it would be great.
I noticed that the Ethernet regression happens because the ENET_RST_B signal keeps always at 0, which makes the PHY to never becomes active.
The Ethernet PHY reset comes from a GPIO expander (74LV595PW), which is connected to SPI GPIO lines.
Both the GPIO expander driver (CONFIG_DM_74X164) as well as the SPI GPIO driver (CONFIG_SOFT_SPI) are enabled at configs/mx7dsabresd_defconfig.
The device tree has:
&fec1 { .... phy-reset-gpios = <&extended_io 5 GPIO_ACTIVE_LOW>;
Port 5 of the 74LV595PW is the Ethernet PHY reset pin.
However, this is what we get in U-Boot:
Net: Could not get PHY for FEC0: addr 0 No ethernet found.
Not sure why DM is not properly bringing the Ethernet PHY back to 1.
Running "dm tree" says that soft_spi has not been probed:
spi 0 [ ] soft_spi |-- spi4
Not sure why soft_spi does not get probed though.
The IO expander is on the soft_spi bus, so we need to get soft_spi to get probed first.
Thanks
On Mon, Jan 27, 2020 at 3:31 PM Fabio Estevam festevam@gmail.com wrote:
Running "dm tree" says that soft_spi has not been probed:
spi 0 [ ] soft_spi |-- spi4
Not sure why soft_spi does not get probed though.
The IO expander is on the soft_spi bus, so we need to get soft_spi to get probed first.
I managed to get Ethernet working again with this patch: https://lists.denx.de/pipermail/u-boot/2020-January/398438.html
Hi Fabio,
Le mer. 29 janv. 2020 à 15:43, Fabio Estevam festevam@gmail.com a écrit :
On Mon, Jan 27, 2020 at 3:31 PM Fabio Estevam festevam@gmail.com wrote:
Running "dm tree" says that soft_spi has not been probed:
spi 0 [ ] soft_spi |-- spi4
Not sure why soft_spi does not get probed though.
The IO expander is on the soft_spi bus, so we need to get soft_spi to get probed first.
I managed to get Ethernet working again with this patch: https://lists.denx.de/pipermail/u-boot/2020-January/398438.html
I good catch, I will test your patch soon Best regards Joris Offouga
Signed-off-by: Joris Offouga offougajoris@gmail.com --- configs/mx7dsabresd_defconfig | 13 ++--- configs/mx7dsabresd_qspi_defconfig | 14 ++--- include/configs/mx7dsabresd.h | 84 ++++++------------------------ 3 files changed, 25 insertions(+), 86 deletions(-)
diff --git a/configs/mx7dsabresd_defconfig b/configs/mx7dsabresd_defconfig index 48aa15a199..d15de386fc 100644 --- a/configs/mx7dsabresd_defconfig +++ b/configs/mx7dsabresd_defconfig @@ -9,13 +9,13 @@ CONFIG_ARMV7_BOOT_SEC_DEFAULT=y # CONFIG_ARMV7_VIRT is not set CONFIG_IMX_RDC=y CONFIG_IMX_BOOTAUX=y +CONFIG_DISTRO_DEFAULTS=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx7dsabresd/imximage.cfg" +CONFIG_BOOTCOMMAND="run finduuid; run distro_bootcmd" # CONFIG_CONSOLE_MUX is not set CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_BOUNCE_BUFFER=y -CONFIG_HUSH_PARSER=y # CONFIG_CMD_BOOTD is not set -CONFIG_CMD_BOOTZ=y # CONFIG_BOOTM_NETBSD is not set # CONFIG_BOOTM_PLAN9 is not set # CONFIG_BOOTM_RTEMS is not set @@ -30,17 +30,13 @@ CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y CONFIG_CMD_USB=y CONFIG_CMD_USB_MASS_STORAGE=y -CONFIG_CMD_DHCP=y -CONFIG_CMD_MII=y -CONFIG_CMD_PING=y CONFIG_CMD_BMP=y CONFIG_CMD_CACHE=y CONFIG_CMD_PMIC=y CONFIG_CMD_REGULATOR=y -CONFIG_CMD_EXT2=y -CONFIG_CMD_EXT4=y CONFIG_CMD_EXT4_WRITE=y -CONFIG_CMD_FAT=y +# CONFIG_ISO_PARTITION is not set +# CONFIG_EFI_PARTITION is not set CONFIG_OF_CONTROL=y CONFIG_DEFAULT_DEVICE_TREE="imx7d-sdb" CONFIG_SYS_RELOC_GD_ENV_ADDR=y @@ -78,7 +74,6 @@ CONFIG_USB=y CONFIG_DM_USB=y CONFIG_USB_EHCI_HCD=y CONFIG_MXC_USB_OTG_HACTIVE=y -CONFIG_USB_STORAGE=y CONFIG_USB_GADGET=y CONFIG_USB_GADGET_MANUFACTURER="FSL" CONFIG_USB_GADGET_VENDOR_NUM=0x0525 diff --git a/configs/mx7dsabresd_qspi_defconfig b/configs/mx7dsabresd_qspi_defconfig index c105560305..b2d5dc1c22 100644 --- a/configs/mx7dsabresd_qspi_defconfig +++ b/configs/mx7dsabresd_qspi_defconfig @@ -4,17 +4,18 @@ CONFIG_SYS_TEXT_BASE=0x87800000 CONFIG_TARGET_MX7DSABRESD=y CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0xC0000 +CONFIG_NR_DRAM_BANKS=1 CONFIG_ARMV7_BOOT_SEC_DEFAULT=y # CONFIG_ARMV7_VIRT is not set CONFIG_IMX_RDC=y CONFIG_IMX_BOOTAUX=y +CONFIG_DISTRO_DEFAULTS=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx7dsabresd/imximage.cfg" +CONFIG_BOOTCOMMAND="run finduuid; run distro_bootcmd" # CONFIG_CONSOLE_MUX is not set CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_BOUNCE_BUFFER=y -CONFIG_HUSH_PARSER=y # CONFIG_CMD_BOOTD is not set -CONFIG_CMD_BOOTZ=y # CONFIG_BOOTM_NETBSD is not set # CONFIG_BOOTM_PLAN9 is not set # CONFIG_BOOTM_RTEMS is not set @@ -29,17 +30,13 @@ CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y CONFIG_CMD_USB=y CONFIG_CMD_USB_MASS_STORAGE=y -CONFIG_CMD_DHCP=y -CONFIG_CMD_MII=y -CONFIG_CMD_PING=y CONFIG_CMD_BMP=y CONFIG_CMD_CACHE=y CONFIG_CMD_PMIC=y CONFIG_CMD_REGULATOR=y -CONFIG_CMD_EXT2=y -CONFIG_CMD_EXT4=y CONFIG_CMD_EXT4_WRITE=y -CONFIG_CMD_FAT=y +# CONFIG_ISO_PARTITION is not set +# CONFIG_EFI_PARTITION is not set CONFIG_OF_CONTROL=y CONFIG_DEFAULT_DEVICE_TREE="imx7d-sdb-qspi" CONFIG_SYS_RELOC_GD_ENV_ADDR=y @@ -84,7 +81,6 @@ CONFIG_USB=y CONFIG_DM_USB=y CONFIG_USB_EHCI_HCD=y CONFIG_MXC_USB_OTG_HACTIVE=y -CONFIG_USB_STORAGE=y CONFIG_USB_GADGET=y CONFIG_USB_GADGET_MANUFACTURER="FSL" CONFIG_USB_GADGET_VENDOR_NUM=0x0525 diff --git a/include/configs/mx7dsabresd.h b/include/configs/mx7dsabresd.h index f574669644..b1726b1d88 100644 --- a/include/configs/mx7dsabresd.h +++ b/include/configs/mx7dsabresd.h @@ -74,76 +74,25 @@ "image=zImage\0" \ "console=ttymxc0\0" \ "fdt_high=0xffffffff\0" \ + "finduuid=part uuid mmc 0:1 uuid\0" \ "initrd_high=0xffffffff\0" \ - "fdt_file=imx7d-sdb.dtb\0" \ + "fdtfile=imx7d-sdb.dtb\0" \ "fdt_addr=0x83000000\0" \ - "boot_fdt=try\0" \ - "ip_dyn=yes\0" \ + "fdt_addr_r=0x83000000\0" \ + "kernel_addr_r=" __stringify(CONFIG_LOADADDR) "\0" \ + "pxefile_addr_r=" __stringify(CONFIG_LOADADDR) "\0" \ + "ramdisk_addr_r=0x83000000\0" \ + "ramdiskaddr=0x83000000\0" \ + "scriptaddr=" __stringify(CONFIG_LOADADDR) "\0" \ "videomode=video=ctfb:x:480,y:272,depth:24,pclk:108695,le:8,ri:4,up:2,lo:4,hs:41,vs:10,sync:0,vmode:0\0" \ - "mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \ - "mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \ - "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \ - "mmcautodetect=yes\0" \ - "mmcargs=setenv bootargs console=${console},${baudrate} " \ - "root=${mmcroot}\0" \ - "loadbootscript=" \ - "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \ - "bootscript=echo Running bootscript from mmc ...; " \ - "source\0" \ - "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \ - "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \ - "mmcboot=echo Booting from mmc ...; " \ - "run mmcargs; " \ - "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ - "if run loadfdt; then " \ - "bootz ${loadaddr} - ${fdt_addr}; " \ - "else " \ - "if test ${boot_fdt} = try; then " \ - "bootz; " \ - "else " \ - "echo WARN: Cannot load the DT; " \ - "fi; " \ - "fi; " \ - "else " \ - "bootz; " \ - "fi;\0" \ - "netargs=setenv bootargs console=${console},${baudrate} " \ - "root=/dev/nfs " \ - "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \ - "netboot=echo Booting from net ...; " \ - "run netargs; " \ - "if test ${ip_dyn} = yes; then " \ - "setenv get_cmd dhcp; " \ - "else " \ - "setenv get_cmd tftp; " \ - "fi; " \ - "${get_cmd} ${image}; " \ - "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ - "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \ - "bootz ${loadaddr} - ${fdt_addr}; " \ - "else " \ - "if test ${boot_fdt} = try; then " \ - "bootz; " \ - "else " \ - "echo WARN: Cannot load the DT; " \ - "fi; " \ - "fi; " \ - "else " \ - "bootz; " \ - "fi;\0" - -#define CONFIG_BOOTCOMMAND \ - "mmc dev ${mmcdev};" \ - "mmc dev ${mmcdev}; if mmc rescan; then " \ - "if run loadbootscript; then " \ - "run bootscript; " \ - "else " \ - "if run loadimage; then " \ - "run mmcboot; " \ - "else run netboot; " \ - "fi; " \ - "fi; " \ - "else run netboot; fi" + BOOTENV + +#define BOOT_TARGET_DEVICES(func) \ + func(MMC, mmc, 0) \ + func(DHCP, dhcp, na) \ + func(PXE, pxe, na) + +#include <config_distro_bootcmd.h>
#define CONFIG_SYS_MEMTEST_START 0x80000000 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x20000000) @@ -187,7 +136,6 @@
#define CONFIG_SYS_MMC_ENV_DEV 0 /* USDHC1 */ #define CONFIG_SYS_MMC_ENV_PART 0 /* user area */ -#define CONFIG_MMCROOT "/dev/mmcblk0p2" /* USDHC1 */
/* USB Configs */ #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
Signed-off-by: Joris Offouga offougajoris@gmail.com
Applied to u-boot-imx, -next, thanks !
Best regards, Stefano Babic
This defconfig doesn't need it. Signed-off-by: Joris Offouga offougajoris@gmail.com
Applied to u-boot-imx, -next, thanks !
Best regards, Stefano Babic
participants (6)
-
Fabio Estevam -
Joris OFFOUGA -
Joris Offouga
-
Otavio Salvador -
sbabic＠denx.de -
Stefano Babic