[U-Boot-Users] [ARM] TI DaVinci (TMS320DM644x) support [2/5]
Signed-off-by: Sergey Kubushyn ksi@koi8.net
=== Cut === diff -purN u-boot.git.orig/board/davinci/nand.c u-boot.git/board/davinci/nand.c --- u-boot.git.orig/board/davinci/nand.c 1969-12-31 16:00:00.000000000 -0800 +++ u-boot.git/board/davinci/nand.c 2007-08-05 16:19:52.000000000 -0700 @@ -0,0 +1,389 @@ +/* + * NAND driver for TI DaVinci based boards. + * + * Copyright (C) 2007 Sergey Kubushyn ksi@koi8.net + * + * Based on Linux DaVinci NAND driver by TI. Original copyright follows: + */ + +/* + * + * linux/drivers/mtd/nand/nand_davinci.c + * + * NAND Flash Driver + * + * Copyright (C) 2006 Texas Instruments. + * + * ---------------------------------------------------------------------------- + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + * ---------------------------------------------------------------------------- + * + * Overview: + * This is a device driver for the NAND flash device found on the + * DaVinci board which utilizes the Samsung k9k2g08 part. + * + Modifications: + ver. 1.0: Feb 2005, Vinod/Sudhakar + - + * + */ + +#include <common.h> + +#ifdef CFG_USE_NAND +#if !defined(CFG_NAND_LEGACY) + +#include <nand.h> +#include <asm/arch/nand_defs.h> +#include <asm/arch/emif_defs.h> + +extern struct nand_chip nand_dev_desc[CFG_MAX_NAND_DEVICE]; + +static void nand_davinci_hwcontrol(struct mtd_info *mtd, int cmd) +{ + struct nand_chip *this = mtd->priv; + u_int32_t IO_ADDR_W = (u_int32_t)this->IO_ADDR_W; + + IO_ADDR_W &= ~(MASK_ALE|MASK_CLE); + + switch (cmd) { + case NAND_CTL_SETCLE: + IO_ADDR_W |= MASK_CLE; + break; + case NAND_CTL_SETALE: + IO_ADDR_W |= MASK_ALE; + break; + } + + this->IO_ADDR_W = (void *)IO_ADDR_W; +} + +/* Set WP on deselect, write enable on select */ +static void nand_davinci_select_chip(struct mtd_info *mtd, int chip) +{ +#define GPIO_SET_DATA01 0x01c67018 +#define GPIO_CLR_DATA01 0x01c6701c +#define GPIO_NAND_WP (1 << 4) +#ifdef SONATA_BOARD_GPIOWP + if (chip < 0) { + REG(GPIO_CLR_DATA01) |= GPIO_NAND_WP; + } else { + REG(GPIO_SET_DATA01) |= GPIO_NAND_WP; + } +#endif +} + +#ifdef CFG_NAND_HW_ECC +#ifdef CFG_NAND_LARGEPAGE +static struct nand_oobinfo davinci_nand_oobinfo = { + .useecc = MTD_NANDECC_AUTOPLACE, + .eccbytes = 12, + .eccpos = {8, 9, 10, 24, 25, 26, 40, 41, 42, 56, 57, 58}, + .oobfree = { {2, 6}, {12, 12}, {28, 12}, {44, 12}, {60, 4} } +}; +#elif defined(CFG_NAND_SMALLPAGE) +static struct nand_oobinfo davinci_nand_oobinfo = { + .useecc = MTD_NANDECC_AUTOPLACE, + .eccbytes = 3, + .eccpos = {0, 1, 2}, + .oobfree = { {6, 2}, {8, 8} } +}; +#else +#error "Either CFG_NAND_LARGEPAGE or CFG_NAND_SMALLPAGE must be defined!" +#endif + +static void nand_davinci_enable_hwecc(struct mtd_info *mtd, int mode) +{ + emifregs emif_addr; + int dummy; + + emif_addr = (emifregs)DAVINCI_ASYNC_EMIF_CNTRL_BASE; + + dummy = emif_addr->NANDF1ECC; + dummy = emif_addr->NANDF2ECC; + dummy = emif_addr->NANDF3ECC; + dummy = emif_addr->NANDF4ECC; + + emif_addr->NANDFCR |= (1 << 8); +} + +static u_int32_t nand_davinci_readecc(struct mtd_info *mtd, u_int32_t region) +{ + u_int32_t ecc = 0; + emifregs emif_base_addr; + + emif_base_addr = (emifregs)DAVINCI_ASYNC_EMIF_CNTRL_BASE; + + if (region == 1) + ecc = emif_base_addr->NANDF1ECC; + else if (region == 2) + ecc = emif_base_addr->NANDF2ECC; + else if (region == 3) + ecc = emif_base_addr->NANDF3ECC; + else if (region == 4) + ecc = emif_base_addr->NANDF4ECC; + + return(ecc); +} + +static int nand_davinci_calculate_ecc(struct mtd_info *mtd, const u_char *dat, u_char *ecc_code) +{ + u_int32_t tmp; + int region, n; + struct nand_chip *this = mtd->priv; + + n = (this->eccmode == NAND_ECC_HW12_2048) ? 4 : 1; + + region = 1; + while (n--) { + tmp = nand_davinci_readecc(mtd, region); + *ecc_code++ = tmp; + *ecc_code++ = tmp >> 16; + *ecc_code++ = ((tmp >> 8) & 0x0f) | ((tmp >> 20) & 0xf0); + region++; + } + return(0); +} + +static void nand_davinci_gen_true_ecc(u_int8_t *ecc_buf) +{ + u_int32_t tmp = ecc_buf[0] | (ecc_buf[1] << 16) | ((ecc_buf[2] & 0xf0) << 20) | ((ecc_buf[2] & 0x0f) << 8); + + ecc_buf[0] = ~(P64o(tmp) | P64e(tmp) | P32o(tmp) | P32e(tmp) | P16o(tmp) | P16e(tmp) | P8o(tmp) | P8e(tmp)); + ecc_buf[1] = ~(P1024o(tmp) | P1024e(tmp) | P512o(tmp) | P512e(tmp) | P256o(tmp) | P256e(tmp) | P128o(tmp) | P128e(tmp)); + ecc_buf[2] = ~( P4o(tmp) | P4e(tmp) | P2o(tmp) | P2e(tmp) | P1o(tmp) | P1e(tmp) | P2048o(tmp) | P2048e(tmp)); +} + +static int nand_davinci_compare_ecc(u_int8_t *ecc_nand, u_int8_t *ecc_calc, u_int8_t *page_data) +{ + u_int32_t i; + u_int8_t tmp0_bit[8], tmp1_bit[8], tmp2_bit[8]; + u_int8_t comp0_bit[8], comp1_bit[8], comp2_bit[8]; + u_int8_t ecc_bit[24]; + u_int8_t ecc_sum = 0; + u_int8_t find_bit = 0; + u_int32_t find_byte = 0; + int is_ecc_ff; + + is_ecc_ff = ((*ecc_nand == 0xff) && (*(ecc_nand + 1) == 0xff) && (*(ecc_nand + 2) == 0xff)); + + nand_davinci_gen_true_ecc(ecc_nand); + nand_davinci_gen_true_ecc(ecc_calc); + + for (i = 0; i <= 2; i++) { + *(ecc_nand + i) = ~(*(ecc_nand + i)); + *(ecc_calc + i) = ~(*(ecc_calc + i)); + } + + for (i = 0; i < 8; i++) { + tmp0_bit[i] = *ecc_nand % 2; + *ecc_nand = *ecc_nand / 2; + } + + for (i = 0; i < 8; i++) { + tmp1_bit[i] = *(ecc_nand + 1) % 2; + *(ecc_nand + 1) = *(ecc_nand + 1) / 2; + } + + for (i = 0; i < 8; i++) { + tmp2_bit[i] = *(ecc_nand + 2) % 2; + *(ecc_nand + 2) = *(ecc_nand + 2) / 2; + } + + for (i = 0; i < 8; i++) { + comp0_bit[i] = *ecc_calc % 2; + *ecc_calc = *ecc_calc / 2; + } + + for (i = 0; i < 8; i++) { + comp1_bit[i] = *(ecc_calc + 1) % 2; + *(ecc_calc + 1) = *(ecc_calc + 1) / 2; + } + + for (i = 0; i < 8; i++) { + comp2_bit[i] = *(ecc_calc + 2) % 2; + *(ecc_calc + 2) = *(ecc_calc + 2) / 2; + } + + for (i = 0; i< 6; i++) + ecc_bit[i] = tmp2_bit[i + 2] ^ comp2_bit[i + 2]; + + for (i = 0; i < 8; i++) + ecc_bit[i + 6] = tmp0_bit[i] ^ comp0_bit[i]; + + for (i = 0; i < 8; i++) + ecc_bit[i + 14] = tmp1_bit[i] ^ comp1_bit[i]; + + ecc_bit[22] = tmp2_bit[0] ^ comp2_bit[0]; + ecc_bit[23] = tmp2_bit[1] ^ comp2_bit[1]; + + for (i = 0; i < 24; i++) + ecc_sum += ecc_bit[i]; + + switch (ecc_sum) { + case 0: + /* Not reached because this function is not called if + ECC values are equal */ + return 0; + case 1: + /* Uncorrectable error */ + DEBUG (MTD_DEBUG_LEVEL0, "ECC UNCORRECTED_ERROR 1\n"); + return(-1); + case 12: + /* Correctable error */ + find_byte = (ecc_bit[23] << 8) + + (ecc_bit[21] << 7) + + (ecc_bit[19] << 6) + + (ecc_bit[17] << 5) + + (ecc_bit[15] << 4) + + (ecc_bit[13] << 3) + + (ecc_bit[11] << 2) + + (ecc_bit[9] << 1) + + ecc_bit[7]; + + find_bit = (ecc_bit[5] << 2) + (ecc_bit[3] << 1) + ecc_bit[1]; + + DEBUG (MTD_DEBUG_LEVEL0, "Correcting single bit ECC error at offset: %d, bit: %d\n", find_byte, find_bit); + + page_data[find_byte] ^= (1 << find_bit); + + return(0); + default: + if (is_ecc_ff) { + if (ecc_calc[0] == 0 && ecc_calc[1] == 0 && ecc_calc[2] == 0) + return(0); + } + DEBUG (MTD_DEBUG_LEVEL0, "UNCORRECTED_ERROR default\n"); + return(-1); + } +} + +static int nand_davinci_correct_data(struct mtd_info *mtd, u_char *dat, u_char *read_ecc, u_char *calc_ecc) +{ + struct nand_chip *this; + int block_count = 0, i, rc; + + this = mtd->priv; + block_count = (this->eccmode == NAND_ECC_HW12_2048) ? 4 : 1; + for (i = 0; i < block_count; i++) { + if (memcmp(read_ecc, calc_ecc, 3) != 0) { + rc = nand_davinci_compare_ecc(read_ecc, calc_ecc, dat); + if (rc < 0) { + return(rc); + } + } + read_ecc += 3; + calc_ecc += 3; + dat += 512; + } + return(0); +} +#endif + +static int nand_davinci_dev_ready(struct mtd_info *mtd) +{ + emifregs emif_addr; + + emif_addr = (emifregs)DAVINCI_ASYNC_EMIF_CNTRL_BASE; + + return(emif_addr->NANDFSR & 0x1); +} + +static int nand_davinci_waitfunc(struct mtd_info *mtd, struct nand_chip *this, int state) +{ + while(!nand_davinci_dev_ready(mtd)) {;} + *NAND_CE0CLE = NAND_STATUS; + return(*NAND_CE0DATA); +} + +static void nand_flash_init(void) +{ + u_int32_t acfg1 = 0x3ffffffc; + u_int32_t acfg2 = 0x3ffffffc; + u_int32_t acfg3 = 0x3ffffffc; + u_int32_t acfg4 = 0x3ffffffc; + emifregs emif_regs; + + /*------------------------------------------------------------------* + * NAND FLASH CHIP TIMEOUT @ 459 MHz * + * * + * AEMIF.CLK freq = PLL1/6 = 459/6 = 76.5 MHz * + * AEMIF.CLK period = 1/76.5 MHz = 13.1 ns * + * * + *------------------------------------------------------------------*/ + acfg1 = 0 + | (0 << 31 ) /* selectStrobe */ + | (0 << 30 ) /* extWait */ + | (1 << 26 ) /* writeSetup 10 ns */ + | (3 << 20 ) /* writeStrobe 40 ns */ + | (1 << 17 ) /* writeHold 10 ns */ + | (1 << 13 ) /* readSetup 10 ns */ + | (5 << 7 ) /* readStrobe 60 ns */ + | (1 << 4 ) /* readHold 10 ns */ + | (3 << 2 ) /* turnAround ?? ns */ + | (0 << 0 ) /* asyncSize 8-bit bus */ + ; + + emif_regs = (emifregs)DAVINCI_ASYNC_EMIF_CNTRL_BASE; + + emif_regs->AWCCR |= 0x10000000; + emif_regs->AB1CR = acfg1; /* 0x08244128 */; + emif_regs->AB2CR = acfg2; + emif_regs->AB3CR = acfg3; + emif_regs->AB4CR = acfg4; + emif_regs->NANDFCR = 0x00000101; +} + +int board_nand_init(struct nand_chip *nand) +{ + nand->IO_ADDR_R = (void __iomem *)NAND_CE0DATA; + nand->IO_ADDR_W = (void __iomem *)NAND_CE0DATA; + nand->chip_delay = 0; + nand->select_chip = nand_davinci_select_chip; +#ifdef CFG_NAND_USE_FLASH_BBT + nand->options = NAND_USE_FLASH_BBT; +#endif +#ifdef CFG_NAND_HW_ECC +#ifdef CFG_NAND_LARGEPAGE + nand->eccmode = NAND_ECC_HW12_2048; +#elif defined(CFG_NAND_SMALLPAGE) + nand->eccmode = NAND_ECC_HW3_512; +#else +#error "Either CFG_NAND_LARGEPAGE or CFG_NAND_SMALLPAGE must be defined!" +#endif + nand->autooob = &davinci_nand_oobinfo; + nand->calculate_ecc = nand_davinci_calculate_ecc; + nand->correct_data = nand_davinci_correct_data; + nand->enable_hwecc = nand_davinci_enable_hwecc; +#else + nand->eccmode = NAND_ECC_SOFT; +#endif + + /* Set address of hardware control function */ + nand->hwcontrol = nand_davinci_hwcontrol; + + nand->dev_ready = nand_davinci_dev_ready; + nand->waitfunc = nand_davinci_waitfunc; + + nand_flash_init(); + + return(0); +} + +#else +#error "U-Boot legacy NAND support not available for DaVinci chips" +#endif +#endif /* CFG_USE_NAND */ diff -purN u-boot.git.orig/common/cmd_nvedit.c u-boot.git/common/cmd_nvedit.c --- u-boot.git.orig/common/cmd_nvedit.c 2007-05-07 14:11:51.000000000 -0700 +++ u-boot.git/common/cmd_nvedit.c 2007-08-05 16:19:52.000000000 -0700 @@ -193,7 +193,12 @@ int _do_setenv (int flag, int argc, char * Ethernet Address and serial# can be set only once, * ver is readonly. */ +#ifdef CONFIG_HAS_UID + /* Allow serial# forced overwrite with 0xdeaf4add flag */ + if ( ((strcmp (name, "serial#") == 0) && (flag != 0xdeaf4add)) || +#else if ( (strcmp (name, "serial#") == 0) || +#endif ((strcmp (name, "ethaddr") == 0) #if defined(CONFIG_OVERWRITE_ETHADDR_ONCE) && defined(CONFIG_ETHADDR) && (strcmp ((char *)env_get_addr(oldval),MK_STR(CONFIG_ETHADDR)) != 0) @@ -397,7 +402,15 @@ void setenv (char *varname, char *varval _do_setenv (0, 3, argv); }
-int do_setenv ( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) +#ifdef CONFIG_HAS_UID +void forceenv (char *varname, char *varvalue) +{ + char *argv[4] = { "forceenv", varname, varvalue, NULL }; + _do_setenv (0xdeaf4add, 3, argv); +} +#endif + +int do_setenv (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) { if (argc < 2) { printf ("Usage:\n%s\n", cmdtp->usage); diff -purN u-boot.git.orig/CREDITS u-boot.git/CREDITS --- u-boot.git.orig/CREDITS 2007-04-04 12:28:34.000000000 -0700 +++ u-boot.git/CREDITS 2007-08-05 16:19:52.000000000 -0700 @@ -252,6 +252,10 @@ E: Raghu.Krishnaprasad@fci.com D: Support for Adder-II MPC852T evaluation board W: http://www.forcecomputers.com
+N: Sergey Kubushyn +E: ksi@koi8.net +D: Support for various TI DaVinci based boards. + N: Bernhard Kuhn E: bkuhn@metrowerks.com D Support for Coldfire CPU; Support for Motorola M5272C3 and M5282EVB boards diff -purN u-boot.git.orig/drivers/nand/nand_bbt.c u-boot.git/drivers/nand/nand_bbt.c --- u-boot.git.orig/drivers/nand/nand_bbt.c 2007-02-12 10:41:27.000000000 -0800 +++ u-boot.git/drivers/nand/nand_bbt.c 2007-08-05 16:19:52.000000000 -0700 @@ -152,7 +152,7 @@ static int read_bbt (struct mtd_info *mt continue; if (reserved_block_code && (tmp == reserved_block_code)) { - printk (KERN_DEBUG "nand_read_bbt: Reserved block at 0x%08x\n", + DEBUG(MTD_DEBUG_LEVEL0, "nand_read_bbt: Reserved block at 0x%08x\n", ((offs << 2) + (act >> 1)) << this->bbt_erase_shift); this->bbt[offs + (act >> 3)] |= 0x2 << (act & 0x06); continue; @@ -229,14 +229,14 @@ static int read_abs_bbts (struct mtd_inf if (td->options & NAND_BBT_VERSION) { nand_read_raw (mtd, buf, td->pages[0] << this->page_shift, mtd->oobblock, mtd->oobsize); td->version[0] = buf[mtd->oobblock + td->veroffs]; - printk (KERN_DEBUG "Bad block table at page %d, version 0x%02X\n", td->pages[0], td->version[0]); + DEBUG(MTD_DEBUG_LEVEL0, "Bad block table at page %d, version 0x%02X\n", td->pages[0], td->version[0]); }
/* Read the mirror version, if available */ if (md && (md->options & NAND_BBT_VERSION)) { nand_read_raw (mtd, buf, md->pages[0] << this->page_shift, mtd->oobblock, mtd->oobsize); md->version[0] = buf[mtd->oobblock + md->veroffs]; - printk (KERN_DEBUG "Bad block table at page %d, version 0x%02X\n", md->pages[0], md->version[0]); + DEBUG(MTD_DEBUG_LEVEL0, "Bad block table at page %d, version 0x%02X\n", md->pages[0], md->version[0]); }
return 1; @@ -375,7 +375,7 @@ static int search_bbt (struct mtd_info * if (td->pages[i] == -1) printk (KERN_WARNING "Bad block table not found for chip %d\n", i); else - printk (KERN_DEBUG "Bad block table found at page %d, version 0x%02X\n", td->pages[i], td->version[i]); + DEBUG(MTD_DEBUG_LEVEL0, "Bad block table found at page %d, version 0x%02X\n", td->pages[i], td->version[i]); } return 0; } @@ -569,7 +569,7 @@ write: printk (KERN_WARNING "nand_bbt: Error while writing bad block table %d\n", res); return res; } - printk (KERN_DEBUG "Bad block table written to 0x%08x, version 0x%02X\n", + DEBUG(MTD_DEBUG_LEVEL0, "Bad block table written to 0x%08x, version 0x%02X\n", (unsigned int) to, td->version[chip]);
/* Mark it as used */ diff -purN u-boot.git.orig/lib_arm/board.c u-boot.git/lib_arm/board.c --- u-boot.git.orig/lib_arm/board.c 2007-02-12 10:41:27.000000000 -0800 +++ u-boot.git/lib_arm/board.c 2007-08-05 16:19:52.000000000 -0700 @@ -364,6 +364,13 @@ void start_armboot (void) enable_interrupts ();
/* Perform network card initialisation if necessary */ +#ifdef CONFIG_DRIVER_TI_EMAC +extern void dm644x_eth_set_mac_addr (const u_int8_t *addr); + if (getenv ("ethaddr")) { + dm644x_eth_set_mac_addr(gd->bd->bi_enetaddr); + } +#endif + #ifdef CONFIG_DRIVER_CS8900 cs8900_get_enetaddr (gd->bd->bi_enetaddr); #endif diff -purN u-boot.git.orig/MAINTAINERS u-boot.git/MAINTAINERS --- u-boot.git.orig/MAINTAINERS 2007-08-04 22:07:13.000000000 -0700 +++ u-boot.git/MAINTAINERS 2007-08-05 16:19:52.000000000 -0700 @@ -444,6 +444,12 @@ Nishant Kamat nskamat@ti.com
omap1610h2 ARM926EJS
+Sergey Kubushyn ksi@koi8.net + + DV-EVM ARM926EJS + SONATA ARM926EJS + SCHMOOGIE ARM926EJS + Prakash Kumar prakash@embedx.com
cerf250 xscale diff -purN u-boot.git.orig/MAKEALL u-boot.git/MAKEALL --- u-boot.git.orig/MAKEALL 2007-08-04 22:07:13.000000000 -0700 +++ u-boot.git/MAKEALL 2007-08-05 16:19:52.000000000 -0700 @@ -219,7 +219,7 @@ LIST_ARM9=" \ omap1610h2 omap1610inn omap730p2 sbc2410x \ scb9328 smdk2400 smdk2410 trab \ VCMA9 versatile versatileab versatilepb \ - voiceblue \ + voiceblue davinci \ "
######################################################################### diff -purN u-boot.git.orig/Makefile u-boot.git/Makefile --- u-boot.git.orig/Makefile 2007-08-04 22:07:13.000000000 -0700 +++ u-boot.git/Makefile 2007-08-05 16:19:52.000000000 -0700 @@ -2018,6 +2018,9 @@ omap1510inn_config : unconfig omap5912osk_config : unconfig @$(MKCONFIG) $(@:_config=) arm arm926ejs omap5912osk NULL omap
+davinci_config : unconfig + @$(MKCONFIG) $(@:_config=) arm arm926ejs davinci NULL davinci + omap1610inn_config \ omap1610inn_cs0boot_config \ omap1610inn_cs3boot_config \ diff -purN u-boot.git.orig/net/eth.c u-boot.git/net/eth.c --- u-boot.git.orig/net/eth.c 2007-08-04 22:07:13.000000000 -0700 +++ u-boot.git/net/eth.c 2007-08-05 16:19:52.000000000 -0700 @@ -464,6 +464,8 @@ extern int at91rm9200_miiphy_initialize( extern int emac4xx_miiphy_initialize(bd_t *bis); extern int mcf52x2_miiphy_initialize(bd_t *bis); extern int ns7520_miiphy_initialize(bd_t *bis); +extern int dm644x_eth_miiphy_initialize(bd_t *bis); +
int eth_initialize(bd_t *bis) { @@ -484,6 +486,9 @@ int eth_initialize(bd_t *bis) #if defined(CONFIG_NETARM) ns7520_miiphy_initialize(bis); #endif +#if defined(CONFIG_DRIVER_TI_EMAC) + dm644x_eth_miiphy_initialize(bis); +#endif return 0; } #endif === Cut ===
--- ****************************************************************** * KSI@home KOI8 Net < > The impossible we do immediately. * * Las Vegas NV, USA < > Miracles require 24-hour notice. * ******************************************************************
ksi@koi8.net wrote:
diff -purN u-boot.git.orig/include/linux/mtd/mtd.h
u-boot.git/include/linux/mtd/mtd.h
--- u-boot.git.orig/include/linux/mtd/mtd.h 2007-02-12
10:41:27.000000000 -0800
+++ u-boot.git/include/linux/mtd/mtd.h 2007-08-05
16:19:52.000000000 -0700
@@ -11,6 +11,11 @@ #include <linux/types.h> #include <linux/mtd/mtd-abi.h>
+#if 0 +#define CONFIG_MTD_DEBUG 1 +#define CONFIG_MTD_DEBUG_VERBOSE 3 +#endif
#define MAX_MTD_DEVICES 16
#define MTD_ERASE_PENDING 0x01
@@ -201,11 +206,19 @@ static inline void mtd_erase_callback(st #define MTD_DEBUG_LEVEL3 (3) /* Noisy */
#ifdef CONFIG_MTD_DEBUG +#if 0 #define DEBUG(n, args...) \ do { \ if (n <= CONFIG_MTD_DEBUG_VERBOSE) \ printk(KERN_INFO args); \ } while(0) +#else +#define DEBUG(n, args...) \
- do { \
if (n <= CONFIG_MTD_DEBUG_VERBOSE) \printf(args); \- } while(0)
+#endif #else /* CONFIG_MTD_DEBUG */ #define DEBUG(n, args...) do { } while(0)
...
diff -purN u-boot.git.orig/drivers/nand/nand_bbt.c u-boot.git/drivers/nand/nand_bbt.c --- u-boot.git.orig/drivers/nand/nand_bbt.c 2007-02-12 10:41:27.000000000 -0800 +++ u-boot.git/drivers/nand/nand_bbt.c 2007-08-05 16:19:52.000000000 -0700 @@ -152,7 +152,7 @@ static int read_bbt (struct mtd_info *mt continue; if (reserved_block_code && (tmp == reserved_block_code)) {
printk (KERN_DEBUG "nand_read_bbt: Reserved block at 0x%08x\n",
DEBUG(MTD_DEBUG_LEVEL0, "nand_read_bbt: Reserved block at 0x%08x\n", ((offs << 2) + (act >> 1)) << this->bbt_erase_shift); this->bbt[offs + (act >> 3)] |= 0x2 << (act & 0x06); continue;@@ -229,14 +229,14 @@ static int read_abs_bbts (struct mtd_inf if (td->options & NAND_BBT_VERSION) { nand_read_raw (mtd, buf, td->pages[0] << this->page_shift, mtd->oobblock, mtd->oobsize); td->version[0] = buf[mtd->oobblock + td->veroffs];
printk (KERN_DEBUG "Bad block table at page %d, version 0x%02X\n", td->pages[0], td->version[0]);
DEBUG(MTD_DEBUG_LEVEL0, "Bad block table at page %d, version 0x%02X\n", td->pages[0], td->version[0]);}
/* Read the mirror version, if available */ if (md && (md->options & NAND_BBT_VERSION)) { nand_read_raw (mtd, buf, md->pages[0] << this->page_shift, mtd->oobblock, mtd->oobsize); md->version[0] = buf[mtd->oobblock + md->veroffs];
printk (KERN_DEBUG "Bad block table at page %d, version 0x%02X\n", md->pages[0], md->version[0]);
DEBUG(MTD_DEBUG_LEVEL0, "Bad block table at page %d, version 0x%02X\n", md->pages[0], md->version[0]);}
return 1;
@@ -375,7 +375,7 @@ static int search_bbt (struct mtd_info * if (td->pages[i] == -1) printk (KERN_WARNING "Bad block table not found for chip %d\n", i); else
printk (KERN_DEBUG "Bad block table found at page %d, version 0x%02X\n", td->pages[i], td->version[i]);
DEBUG(MTD_DEBUG_LEVEL0, "Bad block table found at page %d, version 0x%02X\n", td->pages[i], td->version[i]);@@ -569,7 +569,7 @@ write: printk (KERN_WARNING "nand_bbt: Error while writing bad block table %d\n", res); return res; }
printk (KERN_DEBUG "Bad block table written to 0x%08x, version 0x%02X\n",
DEBUG(MTD_DEBUG_LEVEL0, "Bad block table written to 0x%08x, version 0x%02X\n", (unsigned int) to, td->version[chip]);/* Mark it as used */
- Do we really need this? If yes, please check if you hit all "printk (KERN_DEBUG, .." statements. It looked to me that there was still one "printk (KERN_DEBUG, .." after applying your patch.
- Can anybody please check if patches [2/5] and [5/5] apply cleanly? I'm not sure whether I made anything wrong while saving the patches, but patch 2 and 5, which are modify existing files, have rejects for me.
So unfortunately, I can't actually compile DaVinci patches because
(a) recent git fails compiling for me in drivers/bios_emulator (b) patch [2/5] and [5/5] have rejects for me I have to resolve manually (c) if (a) and (b) is fixed, davinci.h needs changes for most recent git
So all comments from review only. Hope this helps at least a little.
Best regards
Dirk
In message 46B75655.9030603@googlemail.com you wrote:
printk (KERN_DEBUG "Bad block table written to 0x%08x, version 0x%02X\n",
DEBUG(MTD_DEBUG_LEVEL0, "Bad block table written to 0x%08x, version 0x%02X\n",
...
- Do we really need this? If yes, please check if you hit all "printk
(KERN_DEBUG, .." statements. It looked to me that there was still one "printk (KERN_DEBUG, .." after applying your patch.
I object to these changes. It makes perfectly sense to print these messages even in production code. The suggested patch changes this, as then the messages will ony be printed when debugging is enabled. Also, it makes comparing the driver against Linux kernel code (MTD subsystem) much harder.
(a) recent git fails compiling for me in drivers/bios_emulator
Feel free to use the version before the bios_emulator patcches were merged in. This should not matter for these purposes.
Best regards,
Wolfgang Denk
On Mon, 6 Aug 2007, Wolfgang Denk wrote:
In message 46B75655.9030603@googlemail.com you wrote:
printk (KERN_DEBUG "Bad block table written to 0x%08x,version 0x%02X\n",
DEBUG(MTD_DEBUG_LEVEL0, "Bad block table written to0x%08x, version 0x%02X\n", ...
- Do we really need this? If yes, please check if you hit all "printk
(KERN_DEBUG, .." statements. It looked to me that there was still one "printk (KERN_DEBUG, .." after applying your patch.
I object to these changes. It makes perfectly sense to print these messages even in production code. The suggested patch changes this, as then the messages will ony be printed when debugging is enabled. Also, it makes comparing the driver against Linux kernel code (MTD subsystem) much harder.
Oh, that's just cosmetics... The entire code does not require those at all. The only reason this was done is for getting rid of ugly debug display when using NAND flash-based BBT... I will remove those, no problems. And we don't use flash-based BBT anyway :)
(a) recent git fails compiling for me in drivers/bios_emulator
Feel free to use the version before the bios_emulator patcches were merged in. This should not matter for these purposes.
OK, what about those CONFIG* changes? I can do them but I'm under intense pressure right now so I don't have much time to spare -- 4 of my prototype boards came in and have to bring 'em up and send a change list for a respin.
--- ****************************************************************** * KSI@home KOI8 Net < > The impossible we do immediately. * * Las Vegas NV, USA < > Miracles require 24-hour notice. * ******************************************************************
In message Pine.LNX.4.64ksi.0708061223120.29456@home-gw.koi8.net you wrote:
Oh, that's just cosmetics... The entire code does not require those at all. The only reason this was done is for getting rid of ugly debug display when using NAND flash-based BBT... I will remove those, no problems. And we don't use flash-based BBT anyway :)
Thanks.
Feel free to use the version before the bios_emulator patcches were merged in. This should not matter for these purposes.
OK, what about those CONFIG* changes? I can do them but I'm under intense pressure right now so I don't have much time to spare -- 4 of my prototype boards came in and have to bring 'em up and send a change list for a respin.
I'm sorry, but we don't want to go back before that. We're all too happy to be there.
Best regards,
Wolfgang Denk
On Mon, 6 Aug 2007, Wolfgang Denk wrote:
In message Pine.LNX.4.64ksi.0708061223120.29456@home-gw.koi8.net you wrote:
Oh, that's just cosmetics... The entire code does not require those at
all.
The only reason this was done is for getting rid of ugly debug display
when
using NAND flash-based BBT... I will remove those, no problems. And we
don't
use flash-based BBT anyway :)
Thanks.
Feel free to use the version before the bios_emulator patcches were merged in. This should not matter for these purposes.
OK, what about those CONFIG* changes? I can do them but I'm under
intense
pressure right now so I don't have much time to spare -- 4 of my
prototype
boards came in and have to bring 'em up and send a change list for a
respin.
I'm sorry, but we don't want to go back before that. We're all too happy to be there.
OK, I'll waste yet another day and do it "New Style." But please, do not make another revolution today...
--- ****************************************************************** * KSI@home KOI8 Net < > The impossible we do immediately. * * Las Vegas NV, USA < > Miracles require 24-hour notice. * ******************************************************************
In message Pine.LNX.4.64ksi.0708061404350.29633@home-gw.koi8.net you wrote:
OK, I'll waste yet another day and do it "New Style." But please, do not make another revolution today...
Don't worry. No new flood of patches coming soon. My pipes are dry now.
Best regards,
Wolfgang Denk
participants (3)
-
Dirk Behme -
ksi＠koi8.net -
Wolfgang Denk