[U-Boot] [PATCH 1/2] net: zynq: Add debug message to phyread/phywrite
Add debug messages to phyread/write to help with PHY debug.
Signed-off-by: Michal Simek michal.simek@xilinx.com ---
drivers/net/zynq_gem.c | 13 ++++++++++++- 1 file changed, 12 insertions(+), 1 deletion(-)
diff --git a/drivers/net/zynq_gem.c b/drivers/net/zynq_gem.c index 9175d2cae8f7..3d21ad617359 100644 --- a/drivers/net/zynq_gem.c +++ b/drivers/net/zynq_gem.c @@ -208,12 +208,23 @@ static u32 phy_setup_op(struct eth_device *dev, u32 phy_addr, u32 regnum,
static u32 phyread(struct eth_device *dev, u32 phy_addr, u32 regnum, u16 *val) { - return phy_setup_op(dev, phy_addr, regnum, + u32 ret; + + ret = phy_setup_op(dev, phy_addr, regnum, ZYNQ_GEM_PHYMNTNC_OP_R_MASK, val); + + if (!ret) + debug("%s: phy_addr %d, regnum 0x%x, val 0x%x\n", __func__, + phy_addr, regnum, *val); + + return ret; }
static u32 phywrite(struct eth_device *dev, u32 phy_addr, u32 regnum, u16 data) { + debug("%s: phy_addr %d, regnum 0x%x, data 0x%x\n", __func__, phy_addr, + regnum, data); + return phy_setup_op(dev, phy_addr, regnum, ZYNQ_GEM_PHYMNTNC_OP_W_MASK, &data); }
MII is setup by default for all cases. The most of boards are using RGMII but PHY drivers are not doing any specific setting that's why MII setting was working fine. With TI DP83867 is necessary to setup paramaters based on interface type.
Use one setting per board for it which is something what will be removed when driver is moved to DM.
Signed-off-by: Michal Simek michal.simek@xilinx.com ---
drivers/net/zynq_gem.c | 9 ++++++++- 1 file changed, 8 insertions(+), 1 deletion(-)
diff --git a/drivers/net/zynq_gem.c b/drivers/net/zynq_gem.c index 3d21ad617359..72f1332c8008 100644 --- a/drivers/net/zynq_gem.c +++ b/drivers/net/zynq_gem.c @@ -156,6 +156,7 @@ struct zynq_gem_priv { int phyaddr; u32 emio; int init; + phy_interface_t interface; struct phy_device *phydev; struct mii_dev *bus; }; @@ -359,7 +360,7 @@ static int zynq_gem_init(struct eth_device *dev, bd_t * bis)
/* interface - look at tsec */ phydev = phy_connect(priv->bus, priv->phyaddr, dev, - PHY_INTERFACE_MODE_MII); + priv->interface);
phydev->supported = supported | ADVERTISED_Pause | ADVERTISED_Asym_Pause; @@ -546,6 +547,12 @@ int zynq_gem_initialize(bd_t *bis, phys_addr_t base_addr, priv->phyaddr = phy_addr; priv->emio = emio;
+#ifndef CONFIG_ZYNQ_GEM_INTERFACE + priv->interface = PHY_INTERFACE_MODE_MII; +#else + priv->interface = CONFIG_ZYNQ_GEM_INTERFACE; +#endif + sprintf(dev->name, "Gem.%lx", base_addr);
dev->iobase = base_addr;
On Tue, Oct 27, 2015 at 10:06 AM, Michal Simek michal.simek@xilinx.com wrote:
MII is setup by default for all cases. The most of boards are using RGMII but PHY drivers are not doing any specific setting that's why MII setting was working fine. With TI DP83867 is necessary to setup paramaters based on interface type.
Use one setting per board for it which is something what will be removed when driver is moved to DM.
Signed-off-by: Michal Simek michal.simek@xilinx.com
Acked-by: Joe Hershberger joe.hershberger@ni.com
On Tue, Oct 27, 2015 at 10:06 AM, Michal Simek michal.simek@xilinx.com wrote:
Add debug messages to phyread/write to help with PHY debug.
Signed-off-by: Michal Simek michal.simek@xilinx.com
Acked-by: Joe Hershberger joe.hershberger@ni.com
participants (2)
-
Joe Hershberger -
Michal Simek