These patches depend on the series patches(http://patchwork.ozlabs.org/patch/567250/).
From: Shaohui Xie Shaohui.Xie@freescale.com
Set Board Configuration Register to select the lpuart pins of various muxes.
Signed-off-by: Shaohui Xie Shaohui.Xie@freescale.com Signed-off-by: Mingkai Hu Mingkai.Hu@freescale.com --- board/freescale/ls1043aqds/ls1043aqds.c | 15 +++++++++++++++ 1 file changed, 15 insertions(+)
diff --git a/board/freescale/ls1043aqds/ls1043aqds.c b/board/freescale/ls1043aqds/ls1043aqds.c index d6696ca..4e38cb0 100644 --- a/board/freescale/ls1043aqds/ls1043aqds.c +++ b/board/freescale/ls1043aqds/ls1043aqds.c @@ -40,6 +40,9 @@ enum { #define CFG_SD_MUX3_MUX4 0x1 /* MUX4 */ #define CFG_SD_MUX4_SLOT3 0x0 /* SLOT3 TX/RX1 */ #define CFG_SD_MUX4_SLOT1 0x1 /* SLOT1 TX/RX3 */ +#define CFG_UART_MUX_MASK 0x6 +#define CFG_UART_MUX_SHIFT 1 +#define CFG_LPUART_EN 0x1
int checkboard(void) { @@ -218,7 +221,19 @@ void board_retimer_init(void)
int board_early_init_f(void) { +#ifdef CONFIG_LPUART + u8 uart; +#endif fsl_lsch2_early_init_f(); +#ifdef CONFIG_LPUART + /* + * we use lpuart1 as system console. + */ + uart = QIXIS_READ(brdcfg[14]); + uart &= ~CFG_UART_MUX_MASK; + uart |= CFG_LPUART_EN << CFG_UART_MUX_SHIFT; + QIXIS_WRITE(brdcfg[14], uart); +#endif
return 0; }
Hi: all,
This patch depends on the series patches(http://patchwork.ozlabs.org/patch/567250/).
Regards
Wenbin Song
-----Original Message----- From: Wenbin Song [mailto:wenbin.song@nxp.com] Sent: Wednesday, January 20, 2016 8:26 PM To: yorksun@freescale.com; Mingkai Hu mingkai.hu@nxp.com; Qianyu Gong qianyu.gong@nxp.com; Shaohui Xie shaohui.xie@nxp.com; Wenbin Song wenbin.song@nxp.com; u-boot@lists.denx.de; bmeng.cn@gmail.com Cc: Shaohui Xie Shaohui.Xie@freescale.com; Mingkai Hu Mingkai.Hu@freescale.com Subject: [PATCH v2 1/3] armv8/ls1043aqds: Select lpuart pins of various muxes
From: Shaohui Xie Shaohui.Xie@freescale.com
Set Board Configuration Register to select the lpuart pins of various muxes.
Signed-off-by: Shaohui Xie Shaohui.Xie@freescale.com Signed-off-by: Mingkai Hu Mingkai.Hu@freescale.com --- board/freescale/ls1043aqds/ls1043aqds.c | 15 +++++++++++++++ 1 file changed, 15 insertions(+)
diff --git a/board/freescale/ls1043aqds/ls1043aqds.c b/board/freescale/ls1043aqds/ls1043aqds.c index d6696ca..4e38cb0 100644 --- a/board/freescale/ls1043aqds/ls1043aqds.c +++ b/board/freescale/ls1043aqds/ls1043aqds.c @@ -40,6 +40,9 @@ enum { #define CFG_SD_MUX3_MUX4 0x1 /* MUX4 */ #define CFG_SD_MUX4_SLOT3 0x0 /* SLOT3 TX/RX1 */ #define CFG_SD_MUX4_SLOT1 0x1 /* SLOT1 TX/RX3 */ +#define CFG_UART_MUX_MASK 0x6 +#define CFG_UART_MUX_SHIFT 1 +#define CFG_LPUART_EN 0x1
int checkboard(void) { @@ -218,7 +221,19 @@ void board_retimer_init(void)
int board_early_init_f(void) { +#ifdef CONFIG_LPUART + u8 uart; +#endif fsl_lsch2_early_init_f(); +#ifdef CONFIG_LPUART + /* + * we use lpuart1 as system console. + */ + uart = QIXIS_READ(brdcfg[14]); + uart &= ~CFG_UART_MUX_MASK; + uart |= CFG_LPUART_EN << CFG_UART_MUX_SHIFT; + QIXIS_WRITE(brdcfg[14], uart); +#endif
return 0; } -- 2.1.0.27.g96db324
Hi Wenbin,
On Wed, Jan 20, 2016 at 8:25 PM, Wenbin Song wenbin.song@nxp.com wrote:
From: Shaohui Xie Shaohui.Xie@freescale.com
Set Board Configuration Register to select the lpuart pins of various muxes.
Signed-off-by: Shaohui Xie Shaohui.Xie@freescale.com Signed-off-by: Mingkai Hu Mingkai.Hu@freescale.com
board/freescale/ls1043aqds/ls1043aqds.c | 15 +++++++++++++++ 1 file changed, 15 insertions(+)
diff --git a/board/freescale/ls1043aqds/ls1043aqds.c b/board/freescale/ls1043aqds/ls1043aqds.c index d6696ca..4e38cb0 100644 --- a/board/freescale/ls1043aqds/ls1043aqds.c +++ b/board/freescale/ls1043aqds/ls1043aqds.c @@ -40,6 +40,9 @@ enum { #define CFG_SD_MUX3_MUX4 0x1 /* MUX4 */ #define CFG_SD_MUX4_SLOT3 0x0 /* SLOT3 TX/RX1 */ #define CFG_SD_MUX4_SLOT1 0x1 /* SLOT1 TX/RX3 */ +#define CFG_UART_MUX_MASK 0x6 +#define CFG_UART_MUX_SHIFT 1 +#define CFG_LPUART_EN 0x1
int checkboard(void) { @@ -218,7 +221,19 @@ void board_retimer_init(void)
int board_early_init_f(void) { +#ifdef CONFIG_LPUART
u8 uart;+#endif fsl_lsch2_early_init_f(); +#ifdef CONFIG_LPUART
/** we use lpuart1 as system console.*/
nits: please use single-line comment format if this line only fits one line.
uart = QIXIS_READ(brdcfg[14]);uart &= ~CFG_UART_MUX_MASK;uart |= CFG_LPUART_EN << CFG_UART_MUX_SHIFT;QIXIS_WRITE(brdcfg[14], uart);+#endif
return 0;}
Other than that,
Reviewed-by: Bin Meng bmeng.cn@gmail.com
Regards, Bin
Move new /chosen node out of the board device tree.
Signed-off-by: Wenbin Song wenbin.song@nxp.com --- arch/arm/dts/Makefile | 2 +- arch/arm/dts/fsl-ls1043a-qds-duart.dts | 20 ++++++ arch/arm/dts/fsl-ls1043a-qds.dts | 124 --------------------------------- arch/arm/dts/fsl-ls1043a-qds.dtsi | 123 ++++++++++++++++++++++++++++++++ configs/ls1043aqds_defconfig | 2 +- 5 files changed, 145 insertions(+), 126 deletions(-) create mode 100644 arch/arm/dts/fsl-ls1043a-qds-duart.dts delete mode 100644 arch/arm/dts/fsl-ls1043a-qds.dts create mode 100644 arch/arm/dts/fsl-ls1043a-qds.dtsi
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index 7706b41..302456c 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -96,7 +96,7 @@ dtb-$(CONFIG_LS102XA) += ls1021a-qds.dtb \ ls1021a-twr-duart.dtb ls1021a-twr-lpuart.dtb dtb-$(CONFIG_FSL_LSCH3) += fsl-ls2080a-qds.dtb \ fsl-ls2080a-rdb.dtb -dtb-$(CONFIG_FSL_LSCH2) += fsl-ls1043a-qds.dtb \ +dtb-$(CONFIG_FSL_LSCH2) += fsl-ls1043a-qds-duart.dtb \ fsl-ls1043a-rdb.dtb
dtb-$(CONFIG_MACH_SUN4I) += \ diff --git a/arch/arm/dts/fsl-ls1043a-qds-duart.dts b/arch/arm/dts/fsl-ls1043a-qds-duart.dts new file mode 100644 index 0000000..2715b3d --- /dev/null +++ b/arch/arm/dts/fsl-ls1043a-qds-duart.dts @@ -0,0 +1,20 @@ +/* + * Device Tree Include file for Freescale Layerscape-1043A family SoC. + * + * Copyright (C) 2015, Freescale Semiconductor + * + * Wenbin Song wenbin.song@nxp.com + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without any + * warranty of any kind, whether express or implied. + */ + +/dts-v1/; +#include "fsl-ls1043a-qds.dtsi" + +/ { + chosen { + stdout-path = &duart0; + }; +}; diff --git a/arch/arm/dts/fsl-ls1043a-qds.dts b/arch/arm/dts/fsl-ls1043a-qds.dts deleted file mode 100644 index 7435222..0000000 --- a/arch/arm/dts/fsl-ls1043a-qds.dts +++ /dev/null @@ -1,124 +0,0 @@ -/* - * Device Tree Include file for Freescale Layerscape-1043A family SoC. - * - * Copyright (C) 2015, Freescale Semiconductor - * - * Mingkai Hu Mingkai.hu@freescale.com - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. - */ - -/dts-v1/; -/include/ "fsl-ls1043a.dtsi" - -/ { - model = "LS1043A QDS Board"; -}; - -&i2c0 { - status = "okay"; - pca9547@77 { - compatible = "philips,pca9547"; - reg = <0x77>; - #address-cells = <1>; - #size-cells = <0>; - - i2c@0 { - #address-cells = <1>; - #size-cells = <0>; - reg = <0x0>; - - rtc@68 { - compatible = "dallas,ds3232"; - reg = <0x68>; - /* IRQ10_B */ - interrupts = <0 150 0x4>; - }; - }; - - i2c@2 { - #address-cells = <1>; - #size-cells = <0>; - reg = <0x2>; - - ina220@40 { - compatible = "ti,ina220"; - reg = <0x40>; - shunt-resistor = <1000>; - }; - - ina220@41 { - compatible = "ti,ina220"; - reg = <0x41>; - shunt-resistor = <1000>; - }; - }; - - i2c@3 { - #address-cells = <1>; - #size-cells = <0>; - reg = <0x3>; - - eeprom@56 { - compatible = "at24,24c512"; - reg = <0x56>; - }; - - eeprom@57 { - compatible = "at24,24c512"; - reg = <0x57>; - }; - - adt7461a@4c { - compatible = "adt7461a"; - reg = <0x4c>; - }; - }; - }; -}; - -&ifc { - #address-cells = <2>; - #size-cells = <1>; - /* NOR, NAND Flashes and FPGA on board */ - ranges = <0x0 0x0 0x0 0x60000000 0x08000000 - 0x2 0x0 0x0 0x7e800000 0x00010000 - 0x3 0x0 0x0 0x7fb00000 0x00000100>; - status = "okay"; - - nor@0,0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "cfi-flash"; - reg = <0x0 0x0 0x8000000>; - bank-width = <2>; - device-width = <1>; - }; - - nand@2,0 { - compatible = "fsl,ifc-nand"; - #address-cells = <1>; - #size-cells = <1>; - reg = <0x1 0x0 0x10000>; - }; - - fpga: board-control@3,0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "simple-bus"; - reg = <0x3 0x0 0x0000100>; - bank-width = <1>; - device-width = <1>; - ranges = <0 3 0 0x100>; - }; -}; - -&duart0 { - status = "okay"; -}; - -&duart1 { - status = "okay"; -}; diff --git a/arch/arm/dts/fsl-ls1043a-qds.dtsi b/arch/arm/dts/fsl-ls1043a-qds.dtsi new file mode 100644 index 0000000..6fa16b8 --- /dev/null +++ b/arch/arm/dts/fsl-ls1043a-qds.dtsi @@ -0,0 +1,123 @@ +/* + * Device Tree Include file for Freescale Layerscape-1043A family SoC. + * + * Copyright (C) 2015, Freescale Semiconductor + * + * Mingkai Hu Mingkai.hu@freescale.com + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without any + * warranty of any kind, whether express or implied. + */ + +/include/ "fsl-ls1043a.dtsi" + +/ { + model = "LS1043A QDS Board"; +}; + +&i2c0 { + status = "okay"; + pca9547@77 { + compatible = "philips,pca9547"; + reg = <0x77>; + #address-cells = <1>; + #size-cells = <0>; + + i2c@0 { + #address-cells = <1>; + #size-cells = <0>; + reg = <0x0>; + + rtc@68 { + compatible = "dallas,ds3232"; + reg = <0x68>; + /* IRQ10_B */ + interrupts = <0 150 0x4>; + }; + }; + + i2c@2 { + #address-cells = <1>; + #size-cells = <0>; + reg = <0x2>; + + ina220@40 { + compatible = "ti,ina220"; + reg = <0x40>; + shunt-resistor = <1000>; + }; + + ina220@41 { + compatible = "ti,ina220"; + reg = <0x41>; + shunt-resistor = <1000>; + }; + }; + + i2c@3 { + #address-cells = <1>; + #size-cells = <0>; + reg = <0x3>; + + eeprom@56 { + compatible = "at24,24c512"; + reg = <0x56>; + }; + + eeprom@57 { + compatible = "at24,24c512"; + reg = <0x57>; + }; + + adt7461a@4c { + compatible = "adt7461a"; + reg = <0x4c>; + }; + }; + }; +}; + +&ifc { + #address-cells = <2>; + #size-cells = <1>; + /* NOR, NAND Flashes and FPGA on board */ + ranges = <0x0 0x0 0x0 0x60000000 0x08000000 + 0x2 0x0 0x0 0x7e800000 0x00010000 + 0x3 0x0 0x0 0x7fb00000 0x00000100>; + status = "okay"; + + nor@0,0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "cfi-flash"; + reg = <0x0 0x0 0x8000000>; + bank-width = <2>; + device-width = <1>; + }; + + nand@2,0 { + compatible = "fsl,ifc-nand"; + #address-cells = <1>; + #size-cells = <1>; + reg = <0x1 0x0 0x10000>; + }; + + fpga: board-control@3,0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "simple-bus"; + reg = <0x3 0x0 0x0000100>; + bank-width = <1>; + device-width = <1>; + ranges = <0 3 0 0x100>; + }; +}; + +&duart0 { + status = "okay"; +}; + +&duart1 { + status = "okay"; +}; diff --git a/configs/ls1043aqds_defconfig b/configs/ls1043aqds_defconfig index 60fb0ad..c294e82 100644 --- a/configs/ls1043aqds_defconfig +++ b/configs/ls1043aqds_defconfig @@ -2,5 +2,5 @@ CONFIG_SYS_EXTRA_OPTIONS="SYS_FSL_DDR4" CONFIG_ARM=y CONFIG_TARGET_LS1043AQDS=y CONFIG_SYS_NS16550=y -CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-qds" +CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-qds-lpuart" CONFIG_OF_CONTROL=y
Hi: all,
This patch depends on the series patches(http://patchwork.ozlabs.org/patch/567250/).
Regards
Wenbin Song
-----Original Message----- From: Wenbin Song [mailto:wenbin.song@nxp.com] Sent: Wednesday, January 20, 2016 8:26 PM To: yorksun@freescale.com; Mingkai Hu mingkai.hu@nxp.com; Qianyu Gong qianyu.gong@nxp.com; Shaohui Xie shaohui.xie@nxp.com; Wenbin Song wenbin.song@nxp.com; u-boot@lists.denx.de; bmeng.cn@gmail.com Subject: [PATCH v2 2/3] armv8/ls1043aqds: Spilt off board device tree
Move new /chosen node out of the board device tree.
Signed-off-by: Wenbin Song wenbin.song@nxp.com --- arch/arm/dts/Makefile | 2 +- arch/arm/dts/fsl-ls1043a-qds-duart.dts | 20 ++++++ arch/arm/dts/fsl-ls1043a-qds.dts | 124 --------------------------------- arch/arm/dts/fsl-ls1043a-qds.dtsi | 123 ++++++++++++++++++++++++++++++++ configs/ls1043aqds_defconfig | 2 +- 5 files changed, 145 insertions(+), 126 deletions(-) create mode 100644 arch/arm/dts/fsl-ls1043a-qds-duart.dts delete mode 100644 arch/arm/dts/fsl-ls1043a-qds.dts create mode 100644 arch/arm/dts/fsl-ls1043a-qds.dtsi
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index 7706b41..302456c 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -96,7 +96,7 @@ dtb-$(CONFIG_LS102XA) += ls1021a-qds.dtb \ ls1021a-twr-duart.dtb ls1021a-twr-lpuart.dtb dtb-$(CONFIG_FSL_LSCH3) += fsl-ls2080a-qds.dtb \ fsl-ls2080a-rdb.dtb -dtb-$(CONFIG_FSL_LSCH2) += fsl-ls1043a-qds.dtb \ +dtb-$(CONFIG_FSL_LSCH2) += fsl-ls1043a-qds-duart.dtb \ fsl-ls1043a-rdb.dtb
dtb-$(CONFIG_MACH_SUN4I) += \ diff --git a/arch/arm/dts/fsl-ls1043a-qds-duart.dts b/arch/arm/dts/fsl-ls1043a-qds-duart.dts new file mode 100644 index 0000000..2715b3d --- /dev/null +++ b/arch/arm/dts/fsl-ls1043a-qds-duart.dts @@ -0,0 +1,20 @@ +/* + * Device Tree Include file for Freescale Layerscape-1043A family SoC. + * + * Copyright (C) 2015, Freescale Semiconductor + * + * Wenbin Song wenbin.song@nxp.com + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without any + * warranty of any kind, whether express or implied. + */ + +/dts-v1/; +#include "fsl-ls1043a-qds.dtsi" + +/ { + chosen { + stdout-path = &duart0; + }; +}; diff --git a/arch/arm/dts/fsl-ls1043a-qds.dts b/arch/arm/dts/fsl-ls1043a-qds.dts deleted file mode 100644 index 7435222..0000000 --- a/arch/arm/dts/fsl-ls1043a-qds.dts +++ /dev/null @@ -1,124 +0,0 @@ -/* - * Device Tree Include file for Freescale Layerscape-1043A family SoC. - * - * Copyright (C) 2015, Freescale Semiconductor - * - * Mingkai Hu Mingkai.hu@freescale.com - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. - */ - -/dts-v1/; -/include/ "fsl-ls1043a.dtsi" - -/ { - model = "LS1043A QDS Board"; -}; - -&i2c0 { - status = "okay"; - pca9547@77 { - compatible = "philips,pca9547"; - reg = <0x77>; - #address-cells = <1>; - #size-cells = <0>; - - i2c@0 { - #address-cells = <1>; - #size-cells = <0>; - reg = <0x0>; - - rtc@68 { - compatible = "dallas,ds3232"; - reg = <0x68>; - /* IRQ10_B */ - interrupts = <0 150 0x4>; - }; - }; - - i2c@2 { - #address-cells = <1>; - #size-cells = <0>; - reg = <0x2>; - - ina220@40 { - compatible = "ti,ina220"; - reg = <0x40>; - shunt-resistor = <1000>; - }; - - ina220@41 { - compatible = "ti,ina220"; - reg = <0x41>; - shunt-resistor = <1000>; - }; - }; - - i2c@3 { - #address-cells = <1>; - #size-cells = <0>; - reg = <0x3>; - - eeprom@56 { - compatible = "at24,24c512"; - reg = <0x56>; - }; - - eeprom@57 { - compatible = "at24,24c512"; - reg = <0x57>; - }; - - adt7461a@4c { - compatible = "adt7461a"; - reg = <0x4c>; - }; - }; - }; -}; - -&ifc { - #address-cells = <2>; - #size-cells = <1>; - /* NOR, NAND Flashes and FPGA on board */ - ranges = <0x0 0x0 0x0 0x60000000 0x08000000 - 0x2 0x0 0x0 0x7e800000 0x00010000 - 0x3 0x0 0x0 0x7fb00000 0x00000100>; - status = "okay"; - - nor@0,0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "cfi-flash"; - reg = <0x0 0x0 0x8000000>; - bank-width = <2>; - device-width = <1>; - }; - - nand@2,0 { - compatible = "fsl,ifc-nand"; - #address-cells = <1>; - #size-cells = <1>; - reg = <0x1 0x0 0x10000>; - }; - - fpga: board-control@3,0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "simple-bus"; - reg = <0x3 0x0 0x0000100>; - bank-width = <1>; - device-width = <1>; - ranges = <0 3 0 0x100>; - }; -}; - -&duart0 { - status = "okay"; -}; - -&duart1 { - status = "okay"; -}; diff --git a/arch/arm/dts/fsl-ls1043a-qds.dtsi b/arch/arm/dts/fsl-ls1043a-qds.dtsi new file mode 100644 index 0000000..6fa16b8 --- /dev/null +++ b/arch/arm/dts/fsl-ls1043a-qds.dtsi @@ -0,0 +1,123 @@ +/* + * Device Tree Include file for Freescale Layerscape-1043A family SoC. + * + * Copyright (C) 2015, Freescale Semiconductor + * + * Mingkai Hu Mingkai.hu@freescale.com + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without any + * warranty of any kind, whether express or implied. + */ + +/include/ "fsl-ls1043a.dtsi" + +/ { + model = "LS1043A QDS Board"; +}; + +&i2c0 { + status = "okay"; + pca9547@77 { + compatible = "philips,pca9547"; + reg = <0x77>; + #address-cells = <1>; + #size-cells = <0>; + + i2c@0 { + #address-cells = <1>; + #size-cells = <0>; + reg = <0x0>; + + rtc@68 { + compatible = "dallas,ds3232"; + reg = <0x68>; + /* IRQ10_B */ + interrupts = <0 150 0x4>; + }; + }; + + i2c@2 { + #address-cells = <1>; + #size-cells = <0>; + reg = <0x2>; + + ina220@40 { + compatible = "ti,ina220"; + reg = <0x40>; + shunt-resistor = <1000>; + }; + + ina220@41 { + compatible = "ti,ina220"; + reg = <0x41>; + shunt-resistor = <1000>; + }; + }; + + i2c@3 { + #address-cells = <1>; + #size-cells = <0>; + reg = <0x3>; + + eeprom@56 { + compatible = "at24,24c512"; + reg = <0x56>; + }; + + eeprom@57 { + compatible = "at24,24c512"; + reg = <0x57>; + }; + + adt7461a@4c { + compatible = "adt7461a"; + reg = <0x4c>; + }; + }; + }; +}; + +&ifc { + #address-cells = <2>; + #size-cells = <1>; + /* NOR, NAND Flashes and FPGA on board */ + ranges = <0x0 0x0 0x0 0x60000000 0x08000000 + 0x2 0x0 0x0 0x7e800000 0x00010000 + 0x3 0x0 0x0 0x7fb00000 0x00000100>; + status = "okay"; + + nor@0,0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "cfi-flash"; + reg = <0x0 0x0 0x8000000>; + bank-width = <2>; + device-width = <1>; + }; + + nand@2,0 { + compatible = "fsl,ifc-nand"; + #address-cells = <1>; + #size-cells = <1>; + reg = <0x1 0x0 0x10000>; + }; + + fpga: board-control@3,0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "simple-bus"; + reg = <0x3 0x0 0x0000100>; + bank-width = <1>; + device-width = <1>; + ranges = <0 3 0 0x100>; + }; +}; + +&duart0 { + status = "okay"; +}; + +&duart1 { + status = "okay"; +}; diff --git a/configs/ls1043aqds_defconfig b/configs/ls1043aqds_defconfig index 60fb0ad..c294e82 100644 --- a/configs/ls1043aqds_defconfig +++ b/configs/ls1043aqds_defconfig @@ -2,5 +2,5 @@ CONFIG_SYS_EXTRA_OPTIONS="SYS_FSL_DDR4" CONFIG_ARM=y CONFIG_TARGET_LS1043AQDS=y CONFIG_SYS_NS16550=y -CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-qds" +CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-qds-lpuart" CONFIG_OF_CONTROL=y -- 2.1.0.27.g96db324
Hi Wenbin,
On Wed, Jan 20, 2016 at 8:25 PM, Wenbin Song wenbin.song@nxp.com wrote:
Move new /chosen node out of the board device tree.
Signed-off-by: Wenbin Song wenbin.song@nxp.com
arch/arm/dts/Makefile | 2 +- arch/arm/dts/fsl-ls1043a-qds-duart.dts | 20 ++++++ arch/arm/dts/fsl-ls1043a-qds.dts | 124 --------------------------------- arch/arm/dts/fsl-ls1043a-qds.dtsi | 123 ++++++++++++++++++++++++++++++++
Please use 'git mv' to do such kind of operation.
configs/ls1043aqds_defconfig | 2 +- 5 files changed, 145 insertions(+), 126 deletions(-) create mode 100644 arch/arm/dts/fsl-ls1043a-qds-duart.dts delete mode 100644 arch/arm/dts/fsl-ls1043a-qds.dts create mode 100644 arch/arm/dts/fsl-ls1043a-qds.dtsi
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index 7706b41..302456c 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -96,7 +96,7 @@ dtb-$(CONFIG_LS102XA) += ls1021a-qds.dtb \ ls1021a-twr-duart.dtb ls1021a-twr-lpuart.dtb dtb-$(CONFIG_FSL_LSCH3) += fsl-ls2080a-qds.dtb \ fsl-ls2080a-rdb.dtb -dtb-$(CONFIG_FSL_LSCH2) += fsl-ls1043a-qds.dtb \ +dtb-$(CONFIG_FSL_LSCH2) += fsl-ls1043a-qds-duart.dtb \ fsl-ls1043a-rdb.dtb
dtb-$(CONFIG_MACH_SUN4I) += \ diff --git a/arch/arm/dts/fsl-ls1043a-qds-duart.dts b/arch/arm/dts/fsl-ls1043a-qds-duart.dts new file mode 100644 index 0000000..2715b3d --- /dev/null +++ b/arch/arm/dts/fsl-ls1043a-qds-duart.dts @@ -0,0 +1,20 @@ +/*
- Device Tree Include file for Freescale Layerscape-1043A family SoC.
This is not a 'Include file'.
- Copyright (C) 2015, Freescale Semiconductor
- Wenbin Song wenbin.song@nxp.com
- This file is licensed under the terms of the GNU General Public
- License version 2. This program is licensed "as is" without any
- warranty of any kind, whether express or implied.
Please use SPDX format.
- */
+/dts-v1/; +#include "fsl-ls1043a-qds.dtsi"
+/ {
chosen {stdout-path = &duart0;};+}; diff --git a/arch/arm/dts/fsl-ls1043a-qds.dts b/arch/arm/dts/fsl-ls1043a-qds.dts deleted file mode 100644 index 7435222..0000000 --- a/arch/arm/dts/fsl-ls1043a-qds.dts +++ /dev/null @@ -1,124 +0,0 @@ -/*
- Device Tree Include file for Freescale Layerscape-1043A family SoC.
- Copyright (C) 2015, Freescale Semiconductor
- Mingkai Hu Mingkai.hu@freescale.com
- This file is licensed under the terms of the GNU General Public
- License version 2. This program is licensed "as is" without any
- warranty of any kind, whether express or implied.
- */
-/dts-v1/; -/include/ "fsl-ls1043a.dtsi"
-/ {
model = "LS1043A QDS Board";-};
-&i2c0 {
status = "okay";pca9547@77 {compatible = "philips,pca9547";reg = <0x77>;#address-cells = <1>;#size-cells = <0>;i2c@0 {#address-cells = <1>;#size-cells = <0>;reg = <0x0>;rtc@68 {compatible = "dallas,ds3232";reg = <0x68>;/* IRQ10_B */interrupts = <0 150 0x4>;};};i2c@2 {#address-cells = <1>;#size-cells = <0>;reg = <0x2>;ina220@40 {compatible = "ti,ina220";reg = <0x40>;shunt-resistor = <1000>;};ina220@41 {compatible = "ti,ina220";reg = <0x41>;shunt-resistor = <1000>;};};i2c@3 {#address-cells = <1>;#size-cells = <0>;reg = <0x3>;eeprom@56 {compatible = "at24,24c512";reg = <0x56>;};eeprom@57 {compatible = "at24,24c512";reg = <0x57>;};adt7461a@4c {compatible = "adt7461a";reg = <0x4c>;};};};-};
-&ifc {
#address-cells = <2>;#size-cells = <1>;/* NOR, NAND Flashes and FPGA on board */ranges = <0x0 0x0 0x0 0x60000000 0x080000000x2 0x0 0x0 0x7e800000 0x000100000x3 0x0 0x0 0x7fb00000 0x00000100>;status = "okay";nor@0,0 {#address-cells = <1>;#size-cells = <1>;compatible = "cfi-flash";reg = <0x0 0x0 0x8000000>;bank-width = <2>;device-width = <1>;};nand@2,0 {compatible = "fsl,ifc-nand";#address-cells = <1>;#size-cells = <1>;reg = <0x1 0x0 0x10000>;};fpga: board-control@3,0 {#address-cells = <1>;#size-cells = <1>;compatible = "simple-bus";reg = <0x3 0x0 0x0000100>;bank-width = <1>;device-width = <1>;ranges = <0 3 0 0x100>;};-};
-&duart0 {
status = "okay";-};
-&duart1 {
status = "okay";-}; diff --git a/arch/arm/dts/fsl-ls1043a-qds.dtsi b/arch/arm/dts/fsl-ls1043a-qds.dtsi new file mode 100644 index 0000000..6fa16b8 --- /dev/null +++ b/arch/arm/dts/fsl-ls1043a-qds.dtsi @@ -0,0 +1,123 @@ +/*
- Device Tree Include file for Freescale Layerscape-1043A family SoC.
- Copyright (C) 2015, Freescale Semiconductor
- Mingkai Hu Mingkai.hu@freescale.com
- This file is licensed under the terms of the GNU General Public
- License version 2. This program is licensed "as is" without any
- warranty of any kind, whether express or implied.
- */
+/include/ "fsl-ls1043a.dtsi"
+/ {
model = "LS1043A QDS Board";+};
+&i2c0 {
status = "okay";pca9547@77 {compatible = "philips,pca9547";reg = <0x77>;#address-cells = <1>;#size-cells = <0>;i2c@0 {#address-cells = <1>;#size-cells = <0>;reg = <0x0>;rtc@68 {compatible = "dallas,ds3232";reg = <0x68>;/* IRQ10_B */interrupts = <0 150 0x4>;};};i2c@2 {#address-cells = <1>;#size-cells = <0>;reg = <0x2>;ina220@40 {compatible = "ti,ina220";reg = <0x40>;shunt-resistor = <1000>;};ina220@41 {compatible = "ti,ina220";reg = <0x41>;shunt-resistor = <1000>;};};i2c@3 {#address-cells = <1>;#size-cells = <0>;reg = <0x3>;eeprom@56 {compatible = "at24,24c512";reg = <0x56>;};eeprom@57 {compatible = "at24,24c512";reg = <0x57>;};adt7461a@4c {compatible = "adt7461a";reg = <0x4c>;};};};+};
+&ifc {
#address-cells = <2>;#size-cells = <1>;/* NOR, NAND Flashes and FPGA on board */ranges = <0x0 0x0 0x0 0x60000000 0x080000000x2 0x0 0x0 0x7e800000 0x000100000x3 0x0 0x0 0x7fb00000 0x00000100>;status = "okay";nor@0,0 {#address-cells = <1>;#size-cells = <1>;compatible = "cfi-flash";reg = <0x0 0x0 0x8000000>;bank-width = <2>;device-width = <1>;};nand@2,0 {compatible = "fsl,ifc-nand";#address-cells = <1>;#size-cells = <1>;reg = <0x1 0x0 0x10000>;};fpga: board-control@3,0 {#address-cells = <1>;#size-cells = <1>;compatible = "simple-bus";reg = <0x3 0x0 0x0000100>;bank-width = <1>;device-width = <1>;ranges = <0 3 0 0x100>;};+};
+&duart0 {
status = "okay";+};
+&duart1 {
status = "okay";+}; diff --git a/configs/ls1043aqds_defconfig b/configs/ls1043aqds_defconfig index 60fb0ad..c294e82 100644 --- a/configs/ls1043aqds_defconfig +++ b/configs/ls1043aqds_defconfig @@ -2,5 +2,5 @@ CONFIG_SYS_EXTRA_OPTIONS="SYS_FSL_DDR4" CONFIG_ARM=y CONFIG_TARGET_LS1043AQDS=y CONFIG_SYS_NS16550=y -CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-qds" +CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-qds-lpuart"
This should be "fsl-ls1043a-qds-duart"
CONFIG_OF_CONTROL=y
Regards, Bin
Add lpuart support using the driver model.
Signed-off-by: Wenbin Song wenbin.song@nxp.com --- arch/arm/dts/Makefile | 1 + arch/arm/dts/fsl-ls1043a-qds-lpuart.dts | 20 ++++++++++++ arch/arm/dts/fsl-ls1043a.dtsi | 54 +++++++++++++++++++++++++++++++++ configs/ls1043aqds_lpuart_defconfig | 10 ++++++ include/configs/ls1043aqds.h | 7 +++++ 5 files changed, 92 insertions(+) create mode 100644 arch/arm/dts/fsl-ls1043a-qds-lpuart.dts create mode 100644 configs/ls1043aqds_lpuart_defconfig
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index 302456c..a51275c 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -97,6 +97,7 @@ dtb-$(CONFIG_LS102XA) += ls1021a-qds.dtb \ dtb-$(CONFIG_FSL_LSCH3) += fsl-ls2080a-qds.dtb \ fsl-ls2080a-rdb.dtb dtb-$(CONFIG_FSL_LSCH2) += fsl-ls1043a-qds-duart.dtb \ + fsl-ls1043a-qds-lpuart.dtb \ fsl-ls1043a-rdb.dtb
dtb-$(CONFIG_MACH_SUN4I) += \ diff --git a/arch/arm/dts/fsl-ls1043a-qds-lpuart.dts b/arch/arm/dts/fsl-ls1043a-qds-lpuart.dts new file mode 100644 index 0000000..24168ad --- /dev/null +++ b/arch/arm/dts/fsl-ls1043a-qds-lpuart.dts @@ -0,0 +1,20 @@ +/* + * Device Tree Include file for Freescale Layerscape-1043A family SoC. + * + * Copyright (C) 2015, Freescale Semiconductor + * + * Wenbin Song wenbin.song@nxp.com + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without any + * warranty of any kind, whether express or implied. + */ + +/dts-v1/; +#include "fsl-ls1043a-qds.dtsi" + +/ { + chosen { + stdout-path = &lpuart0; + }; +}; diff --git a/arch/arm/dts/fsl-ls1043a.dtsi b/arch/arm/dts/fsl-ls1043a.dtsi index 85ea81e..12ea0ab 100644 --- a/arch/arm/dts/fsl-ls1043a.dtsi +++ b/arch/arm/dts/fsl-ls1043a.dtsi @@ -182,5 +182,59 @@ interrupts = <0 55 0x4>; clocks = <&clockgen 4 0>; }; + + lpuart0: serial@2950000 { + compatible = "fsl,ls1021a-lpuart"; + reg = <0x0 0x2950000 0x0 0x1000>; + interrupts = <0 48 0x4>; + clocks = <&sysclk>; + clock-names = "ipg"; + status = "disabled"; + }; + + lpuart1: serial@2960000 { + compatible = "fsl,ls1021a-lpuart"; + reg = <0x0 0x2960000 0x0 0x1000>; + interrupts = <0 49 0x4>; + clocks = <&sysclk>; + clock-names = "ipg"; + status = "disabled"; + }; + + lpuart2: serial@2970000 { + compatible = "fsl,ls1021a-lpuart"; + reg = <0x0 0x2970000 0x0 0x1000>; + interrupts = <0 50 0x4>; + clock-names = "ipg"; + clocks = <&sysclk>; + status = "disabled"; + }; + + lpuart3: serial@2980000 { + compatible = "fsl,ls1021a-lpuart"; + reg = <0x0 0x2980000 0x0 0x1000>; + interrupts = <0 51 0x4>; + clocks = <&sysclk>; + clock-names = "ipg"; + status = "disabled"; + }; + + lpuart4: serial@2990000 { + compatible = "fsl,ls1021a-lpuart"; + reg = <0x0 0x2990000 0x0 0x1000>; + interrupts = <0 52 0x4>; + clocks = <&sysclk>; + clock-names = "ipg"; + status = "disabled"; + }; + + lpuart5: serial@29a0000 { + compatible = "fsl,ls1021a-lpuart"; + reg = <0x0 0x29a0000 0x0 0x1000>; + interrupts = <0 53 0x4>; + clocks = <&sysclk>; + clock-names = "ipg"; + status = "disabled"; + }; }; }; diff --git a/configs/ls1043aqds_lpuart_defconfig b/configs/ls1043aqds_lpuart_defconfig new file mode 100644 index 0000000..2d6bb7b --- /dev/null +++ b/configs/ls1043aqds_lpuart_defconfig @@ -0,0 +1,10 @@ +CONFIG_SYS_EXTRA_OPTIONS="SYS_FSL_DDR4,LPUART" +CONFIG_ARM=y +CONFIG_TARGET_LS1043AQDS=y +CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-qds-lpuart" +CONFIG_OF_CONTROL=y +CONFIG_DM=y +CONFIG_SPI_FLASH=y +CONFIG_DM_SPI=y +CONFIG_FSL_LPUART=y +CONFIG_DM_SERIAL=y diff --git a/include/configs/ls1043aqds.h b/include/configs/ls1043aqds.h index 398f1c3..438476f 100644 --- a/include/configs/ls1043aqds.h +++ b/include/configs/ls1043aqds.h @@ -88,6 +88,13 @@ unsigned long get_board_ddr_clk(void); #define CONFIG_SYS_FSL_PBL_RCW board/freescale/ls1043aqds/ls1043aqds_rcw_sd_ifc.cfg #endif
+/* + * LPUART + */ +#ifdef CONFIG_LPUART +#define CONFIG_LPUART_32B_REG +#endif + /* SATA */ #define CONFIG_LIBATA #define CONFIG_SCSI_AHCI
Hi: all,
This patch depends on the series patches(http://patchwork.ozlabs.org/patch/567250/).
Regards
Wenbin Song
-----Original Message----- From: Wenbin Song [mailto:wenbin.song@nxp.com] Sent: Wednesday, January 20, 2016 8:26 PM To: yorksun@freescale.com; Mingkai Hu mingkai.hu@nxp.com; Qianyu Gong qianyu.gong@nxp.com; Shaohui Xie shaohui.xie@nxp.com; Wenbin Song wenbin.song@nxp.com; u-boot@lists.denx.de; bmeng.cn@gmail.com Subject: [PATCH v2 3/3] armv8/ls1043aqds: Add lpuart support
Add lpuart support using the driver model.
Signed-off-by: Wenbin Song wenbin.song@nxp.com --- arch/arm/dts/Makefile | 1 + arch/arm/dts/fsl-ls1043a-qds-lpuart.dts | 20 ++++++++++++ arch/arm/dts/fsl-ls1043a.dtsi | 54 +++++++++++++++++++++++++++++++++ configs/ls1043aqds_lpuart_defconfig | 10 ++++++ include/configs/ls1043aqds.h | 7 +++++ 5 files changed, 92 insertions(+) create mode 100644 arch/arm/dts/fsl-ls1043a-qds-lpuart.dts create mode 100644 configs/ls1043aqds_lpuart_defconfig
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index 302456c..a51275c 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -97,6 +97,7 @@ dtb-$(CONFIG_LS102XA) += ls1021a-qds.dtb \ dtb-$(CONFIG_FSL_LSCH3) += fsl-ls2080a-qds.dtb \ fsl-ls2080a-rdb.dtb dtb-$(CONFIG_FSL_LSCH2) += fsl-ls1043a-qds-duart.dtb \ + fsl-ls1043a-qds-lpuart.dtb \ fsl-ls1043a-rdb.dtb
dtb-$(CONFIG_MACH_SUN4I) += \ diff --git a/arch/arm/dts/fsl-ls1043a-qds-lpuart.dts b/arch/arm/dts/fsl-ls1043a-qds-lpuart.dts new file mode 100644 index 0000000..24168ad --- /dev/null +++ b/arch/arm/dts/fsl-ls1043a-qds-lpuart.dts @@ -0,0 +1,20 @@ +/* + * Device Tree Include file for Freescale Layerscape-1043A family SoC. + * + * Copyright (C) 2015, Freescale Semiconductor + * + * Wenbin Song wenbin.song@nxp.com + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without any + * warranty of any kind, whether express or implied. + */ + +/dts-v1/; +#include "fsl-ls1043a-qds.dtsi" + +/ { + chosen { + stdout-path = &lpuart0; + }; +}; diff --git a/arch/arm/dts/fsl-ls1043a.dtsi b/arch/arm/dts/fsl-ls1043a.dtsi index 85ea81e..12ea0ab 100644 --- a/arch/arm/dts/fsl-ls1043a.dtsi +++ b/arch/arm/dts/fsl-ls1043a.dtsi @@ -182,5 +182,59 @@ interrupts = <0 55 0x4>; clocks = <&clockgen 4 0>; }; + + lpuart0: serial@2950000 { + compatible = "fsl,ls1021a-lpuart"; + reg = <0x0 0x2950000 0x0 0x1000>; + interrupts = <0 48 0x4>; + clocks = <&sysclk>; + clock-names = "ipg"; + status = "disabled"; + }; + + lpuart1: serial@2960000 { + compatible = "fsl,ls1021a-lpuart"; + reg = <0x0 0x2960000 0x0 0x1000>; + interrupts = <0 49 0x4>; + clocks = <&sysclk>; + clock-names = "ipg"; + status = "disabled"; + }; + + lpuart2: serial@2970000 { + compatible = "fsl,ls1021a-lpuart"; + reg = <0x0 0x2970000 0x0 0x1000>; + interrupts = <0 50 0x4>; + clock-names = "ipg"; + clocks = <&sysclk>; + status = "disabled"; + }; + + lpuart3: serial@2980000 { + compatible = "fsl,ls1021a-lpuart"; + reg = <0x0 0x2980000 0x0 0x1000>; + interrupts = <0 51 0x4>; + clocks = <&sysclk>; + clock-names = "ipg"; + status = "disabled"; + }; + + lpuart4: serial@2990000 { + compatible = "fsl,ls1021a-lpuart"; + reg = <0x0 0x2990000 0x0 0x1000>; + interrupts = <0 52 0x4>; + clocks = <&sysclk>; + clock-names = "ipg"; + status = "disabled"; + }; + + lpuart5: serial@29a0000 { + compatible = "fsl,ls1021a-lpuart"; + reg = <0x0 0x29a0000 0x0 0x1000>; + interrupts = <0 53 0x4>; + clocks = <&sysclk>; + clock-names = "ipg"; + status = "disabled"; + }; }; }; diff --git a/configs/ls1043aqds_lpuart_defconfig b/configs/ls1043aqds_lpuart_defconfig new file mode 100644 index 0000000..2d6bb7b --- /dev/null +++ b/configs/ls1043aqds_lpuart_defconfig @@ -0,0 +1,10 @@ +CONFIG_SYS_EXTRA_OPTIONS="SYS_FSL_DDR4,LPUART" +CONFIG_ARM=y +CONFIG_TARGET_LS1043AQDS=y +CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-qds-lpuart" +CONFIG_OF_CONTROL=y +CONFIG_DM=y +CONFIG_SPI_FLASH=y +CONFIG_DM_SPI=y +CONFIG_FSL_LPUART=y +CONFIG_DM_SERIAL=y diff --git a/include/configs/ls1043aqds.h b/include/configs/ls1043aqds.h index 398f1c3..438476f 100644 --- a/include/configs/ls1043aqds.h +++ b/include/configs/ls1043aqds.h @@ -88,6 +88,13 @@ unsigned long get_board_ddr_clk(void); #define CONFIG_SYS_FSL_PBL_RCW board/freescale/ls1043aqds/ls1043aqds_rcw_sd_ifc.cfg #endif
+/* + * LPUART + */ +#ifdef CONFIG_LPUART +#define CONFIG_LPUART_32B_REG +#endif + /* SATA */ #define CONFIG_LIBATA #define CONFIG_SCSI_AHCI -- 2.1.0.27.g96db324
Hi Wenbin,
On Wed, Jan 20, 2016 at 8:25 PM, Wenbin Song wenbin.song@nxp.com wrote:
Add lpuart support using the driver model.
Signed-off-by: Wenbin Song wenbin.song@nxp.com
arch/arm/dts/Makefile | 1 + arch/arm/dts/fsl-ls1043a-qds-lpuart.dts | 20 ++++++++++++ arch/arm/dts/fsl-ls1043a.dtsi | 54 +++++++++++++++++++++++++++++++++ configs/ls1043aqds_lpuart_defconfig | 10 ++++++ include/configs/ls1043aqds.h | 7 +++++ 5 files changed, 92 insertions(+) create mode 100644 arch/arm/dts/fsl-ls1043a-qds-lpuart.dts create mode 100644 configs/ls1043aqds_lpuart_defconfig
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index 302456c..a51275c 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -97,6 +97,7 @@ dtb-$(CONFIG_LS102XA) += ls1021a-qds.dtb \ dtb-$(CONFIG_FSL_LSCH3) += fsl-ls2080a-qds.dtb \ fsl-ls2080a-rdb.dtb dtb-$(CONFIG_FSL_LSCH2) += fsl-ls1043a-qds-duart.dtb \
fsl-ls1043a-qds-lpuart.dtb \ fsl-ls1043a-rdb.dtbdtb-$(CONFIG_MACH_SUN4I) += \ diff --git a/arch/arm/dts/fsl-ls1043a-qds-lpuart.dts b/arch/arm/dts/fsl-ls1043a-qds-lpuart.dts new file mode 100644 index 0000000..24168ad --- /dev/null +++ b/arch/arm/dts/fsl-ls1043a-qds-lpuart.dts @@ -0,0 +1,20 @@ +/*
- Device Tree Include file for Freescale Layerscape-1043A family SoC.
This is not a 'Include file'.
- Copyright (C) 2015, Freescale Semiconductor
- Wenbin Song wenbin.song@nxp.com
- This file is licensed under the terms of the GNU General Public
- License version 2. This program is licensed "as is" without any
- warranty of any kind, whether express or implied.
- */
Please use SPDX format.
+/dts-v1/; +#include "fsl-ls1043a-qds.dtsi"
+/ {
chosen {stdout-path = &lpuart0;};+}; diff --git a/arch/arm/dts/fsl-ls1043a.dtsi b/arch/arm/dts/fsl-ls1043a.dtsi index 85ea81e..12ea0ab 100644 --- a/arch/arm/dts/fsl-ls1043a.dtsi +++ b/arch/arm/dts/fsl-ls1043a.dtsi @@ -182,5 +182,59 @@ interrupts = <0 55 0x4>; clocks = <&clockgen 4 0>; };
lpuart0: serial@2950000 {compatible = "fsl,ls1021a-lpuart";reg = <0x0 0x2950000 0x0 0x1000>;interrupts = <0 48 0x4>;clocks = <&sysclk>;clock-names = "ipg";status = "disabled";};lpuart1: serial@2960000 {compatible = "fsl,ls1021a-lpuart";reg = <0x0 0x2960000 0x0 0x1000>;interrupts = <0 49 0x4>;clocks = <&sysclk>;clock-names = "ipg";status = "disabled";};lpuart2: serial@2970000 {compatible = "fsl,ls1021a-lpuart";reg = <0x0 0x2970000 0x0 0x1000>;interrupts = <0 50 0x4>;clock-names = "ipg";clocks = <&sysclk>;status = "disabled";};lpuart3: serial@2980000 {compatible = "fsl,ls1021a-lpuart";reg = <0x0 0x2980000 0x0 0x1000>;interrupts = <0 51 0x4>;clocks = <&sysclk>;clock-names = "ipg";status = "disabled";};lpuart4: serial@2990000 {compatible = "fsl,ls1021a-lpuart";reg = <0x0 0x2990000 0x0 0x1000>;interrupts = <0 52 0x4>;clocks = <&sysclk>;clock-names = "ipg";status = "disabled";};lpuart5: serial@29a0000 {compatible = "fsl,ls1021a-lpuart";reg = <0x0 0x29a0000 0x0 0x1000>;interrupts = <0 53 0x4>;clocks = <&sysclk>;clock-names = "ipg";status = "disabled";};
You should also update fsl-ls1043a-qds.dtsi to mention below, to keep consistency with duart.
&lpuart0 { status = "okay"; };
...
};}; diff --git a/configs/ls1043aqds_lpuart_defconfig b/configs/ls1043aqds_lpuart_defconfig new file mode 100644 index 0000000..2d6bb7b --- /dev/null +++ b/configs/ls1043aqds_lpuart_defconfig @@ -0,0 +1,10 @@ +CONFIG_SYS_EXTRA_OPTIONS="SYS_FSL_DDR4,LPUART" +CONFIG_ARM=y +CONFIG_TARGET_LS1043AQDS=y +CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-qds-lpuart" +CONFIG_OF_CONTROL=y +CONFIG_DM=y +CONFIG_SPI_FLASH=y +CONFIG_DM_SPI=y +CONFIG_FSL_LPUART=y +CONFIG_DM_SERIAL=y
Please always create defconfig file with a sorted Kconfig option order. You can do this via 'make savedefconfig'.
diff --git a/include/configs/ls1043aqds.h b/include/configs/ls1043aqds.h index 398f1c3..438476f 100644 --- a/include/configs/ls1043aqds.h +++ b/include/configs/ls1043aqds.h @@ -88,6 +88,13 @@ unsigned long get_board_ddr_clk(void); #define CONFIG_SYS_FSL_PBL_RCW board/freescale/ls1043aqds/ls1043aqds_rcw_sd_ifc.cfg #endif
+/*
- LPUART
- */
nits: /* LPUART */
+#ifdef CONFIG_LPUART +#define CONFIG_LPUART_32B_REG +#endif
/* SATA */ #define CONFIG_LIBATA
#define CONFIG_SCSI_AHCI
Regards, Bin
participants (2)
-
Bin Meng -
Wenbin Song