Add settings for operating PLL at 933 MHz. This setting is useful in case the LPDDR4 DRAM should operate at 1866 MHz or 3733 MT/s.

Reviewed-by: Fabio Estevam festevam@denx.de Signed-off-by: Marek Vasut marex@denx.de Cc: Fabio Estevam festevam@denx.de Cc: Peng Fan peng.fan@nxp.com Cc: Stefano Babic sbabic@denx.de --- V2: Add RB by Fabio --- arch/arm/mach-imx/imx8m/clock_imx8mm.c | 1 + 1 file changed, 1 insertion(+)

diff --git a/arch/arm/mach-imx/imx8m/clock_imx8mm.c b/arch/arm/mach-imx/imx8m/clock_imx8mm.c index 76132defc21..4db55f86081 100644 --- a/arch/arm/mach-imx/imx8m/clock_imx8mm.c +++ b/arch/arm/mach-imx/imx8m/clock_imx8mm.c @@ -48,6 +48,7 @@ int enable_i2c_clk(unsigned char enable, unsigned i2c_num) #ifdef CONFIG_SPL_BUILD static struct imx_int_pll_rate_table imx8mm_fracpll_tbl[] = { PLL_1443X_RATE(1000000000U, 250, 3, 1, 0), + PLL_1443X_RATE(933000000U, 311, 4, 1, 0), PLL_1443X_RATE(800000000U, 300, 9, 0, 0), PLL_1443X_RATE(750000000U, 250, 8, 0, 0), PLL_1443X_RATE(650000000U, 325, 3, 2, 0),

Add entry for 3732 MT/s mode of operation of the LPDDR4, in which case the DDR PLL has to be configured in 933 MHz mode.

Reviewed-by: Fabio Estevam festevam@denx.de Signed-off-by: Marek Vasut marex@denx.de Cc: Fabio Estevam festevam@denx.de Cc: Peng Fan peng.fan@nxp.com Cc: Stefano Babic sbabic@denx.de --- V2: Add RB by Fabio --- drivers/ddr/imx/imx8m/ddrphy_utils.c | 4 ++++ 1 file changed, 4 insertions(+)

diff --git a/drivers/ddr/imx/imx8m/ddrphy_utils.c b/drivers/ddr/imx/imx8m/ddrphy_utils.c index 0f8baefb1f8..a54449e5f14 100644 --- a/drivers/ddr/imx/imx8m/ddrphy_utils.c +++ b/drivers/ddr/imx/imx8m/ddrphy_utils.c @@ -117,6 +117,10 @@ void ddrphy_init_set_dfi_clk(unsigned int drate) dram_pll_init(MHZ(1000)); dram_disable_bypass(); break; + case 3732: + dram_pll_init(MHZ(933)); + dram_disable_bypass(); + break; case 3200: dram_pll_init(MHZ(800)); dram_disable_bypass();

Add DT compatible string for PCA9450C PMIC. This is a variant of the PCA9450 PMIC with 6 A dual-phase buck regulator and 3 A buck regulator, and is software-wise compatible with the PCA9450B. This variant of the PCA9450 is designed for use as companion PMIC for i.MX8MP.

Reviewed-by: Fabio Estevam festevam@denx.de Reviewed-by: Jaehoon Chung jh80.chung@samsung.com Signed-off-by: Marek Vasut marex@denx.de Cc: Fabio Estevam festevam@denx.de Cc: Peng Fan peng.fan@nxp.com Cc: Stefano Babic sbabic@denx.de --- V2: Add RB by Fabio and Jaehoon --- drivers/power/pmic/pca9450.c | 1 + 1 file changed, 1 insertion(+)

diff --git a/drivers/power/pmic/pca9450.c b/drivers/power/pmic/pca9450.c index a886647f193..2394b196c56 100644 --- a/drivers/power/pmic/pca9450.c +++ b/drivers/power/pmic/pca9450.c @@ -83,6 +83,7 @@ static struct dm_pmic_ops pca9450_ops = { static const struct udevice_id pca9450_ids[] = { { .compatible = "nxp,pca9450a", .data = 0x25, }, { .compatible = "nxp,pca9450b", .data = 0x25, }, + { .compatible = "nxp,pca9450c", .data = 0x25, }, { } };

The upstream DT regulators node subnodes are named BUCKn and LDOn, the downstream DT regulators node subnodes are named buckn and ldon, add the upstream match.

Reviewed-by: Fabio Estevam festevam@denx.de Signed-off-by: Marek Vasut marex@denx.de Cc: Fabio Estevam festevam@denx.de Cc: Peng Fan peng.fan@nxp.com Cc: Stefano Babic sbabic@denx.de --- V2: Add RB by Fabio --- drivers/power/pmic/pca9450.c | 2 ++ 1 file changed, 2 insertions(+)

diff --git a/drivers/power/pmic/pca9450.c b/drivers/power/pmic/pca9450.c index 2394b196c56..26c876c9c45 100644 --- a/drivers/power/pmic/pca9450.c +++ b/drivers/power/pmic/pca9450.c @@ -19,8 +19,10 @@ DECLARE_GLOBAL_DATA_PTR; static const struct pmic_child_info pmic_children_info[] = { /* buck */ { .prefix = "b", .driver = PCA9450_REGULATOR_DRIVER}, + { .prefix = "B", .driver = PCA9450_REGULATOR_DRIVER}, /* ldo */ { .prefix = "l", .driver = PCA9450_REGULATOR_DRIVER}, + { .prefix = "L", .driver = PCA9450_REGULATOR_DRIVER}, { }, };

Add PCA9450 regulator driver. This is complementary driver for the BUCKn and LDOn regulators provided by the PCA9450 PMIC driver. Currently the driver permits reading the settngs and configuring the BUCKn and LDOn regulators.

Reviewed-by: Fabio Estevam festevam@denx.de Signed-off-by: Marek Vasut marex@denx.de Cc: Fabio Estevam festevam@denx.de Cc: Peng Fan peng.fan@nxp.com Cc: Stefano Babic sbabic@denx.de --- V2: Add RB by Fabio --- drivers/power/pmic/pca9450.c | 6 +- drivers/power/regulator/Kconfig | 15 ++ drivers/power/regulator/Makefile | 1 + drivers/power/regulator/pca9450.c | 333 ++++++++++++++++++++++++++++++ include/power/pca9450.h | 11 + 5 files changed, 363 insertions(+), 3 deletions(-) create mode 100644 drivers/power/regulator/pca9450.c

diff --git a/drivers/power/pmic/pca9450.c b/drivers/power/pmic/pca9450.c index 26c876c9c45..116ac49a8db 100644 --- a/drivers/power/pmic/pca9450.c +++ b/drivers/power/pmic/pca9450.c @@ -83,9 +83,9 @@ static struct dm_pmic_ops pca9450_ops = { };

static const struct udevice_id pca9450_ids[] = { - { .compatible = "nxp,pca9450a", .data = 0x25, }, - { .compatible = "nxp,pca9450b", .data = 0x25, }, - { .compatible = "nxp,pca9450c", .data = 0x25, }, + { .compatible = "nxp,pca9450a", .data = NXP_CHIP_TYPE_PCA9450A, }, + { .compatible = "nxp,pca9450b", .data = NXP_CHIP_TYPE_PCA9450BC, }, + { .compatible = "nxp,pca9450c", .data = NXP_CHIP_TYPE_PCA9450BC, }, { } };

diff --git a/drivers/power/regulator/Kconfig b/drivers/power/regulator/Kconfig index cd253b95f2f..d486bad6bdc 100644 --- a/drivers/power/regulator/Kconfig +++ b/drivers/power/regulator/Kconfig @@ -60,6 +60,21 @@ config SPL_DM_REGULATOR_BD71837 This config enables implementation of driver-model regulator uclass features for regulators on ROHM BD71837 and BD71847 in SPL.

+config DM_REGULATOR_PCA9450 + bool "Enable Driver Model for NXP PCA9450 regulators" + depends on DM_REGULATOR && DM_PMIC_PCA9450 + help + This config enables implementation of driver-model regulator uclass + features for regulators on NXP PCA9450 PMICs. PCA9450 contains 6 bucks + and 5 LDOS. The driver implements get/set api for value and enable. + +config SPL_DM_REGULATOR_PCA9450 + bool "Enable Driver Model for NXP PCA9450 regulators in SPL" + depends on DM_REGULATOR_PCA9450 + help + This config enables implementation of driver-model regulator uclass + features for regulators on ROHM PCA9450 in SPL. + config DM_REGULATOR_DA9063 bool "Enable Driver Model for REGULATOR DA9063" depends on DM_REGULATOR && DM_PMIC_DA9063 diff --git a/drivers/power/regulator/Makefile b/drivers/power/regulator/Makefile index 4efb32a3228..d2d17f7aed0 100644 --- a/drivers/power/regulator/Makefile +++ b/drivers/power/regulator/Makefile @@ -11,6 +11,7 @@ obj-$(CONFIG_$(SPL_)DM_REGULATOR_DA9063) += da9063.o obj-$(CONFIG_DM_REGULATOR_MAX77686) += max77686.o obj-$(CONFIG_$(SPL_)DM_PMIC_PFUZE100) += pfuze100.o obj-$(CONFIG_$(SPL_)DM_REGULATOR_BD71837) += bd71837.o +obj-$(CONFIG_$(SPL_)DM_REGULATOR_PCA9450) += pca9450.o obj-$(CONFIG_$(SPL_)REGULATOR_PWM) += pwm_regulator.o obj-$(CONFIG_$(SPL_)DM_REGULATOR_FAN53555) += fan53555.o obj-$(CONFIG_$(SPL_)DM_REGULATOR_COMMON) += regulator_common.o diff --git a/drivers/power/regulator/pca9450.c b/drivers/power/regulator/pca9450.c new file mode 100644 index 00000000000..4847c9f90f0 --- /dev/null +++ b/drivers/power/regulator/pca9450.c @@ -0,0 +1,333 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* + * NXP PCA9450 regulator driver + * Copyright (C) 2022 Marek Vasut marex@denx.de + * + * Largely based on: + * ROHM BD71837 regulator driver + */ + +#include <common.h> +#include <dm.h> +#include <log.h> +#include <linux/bitops.h> +#include <power/pca9450.h> +#include <power/pmic.h> +#include <power/regulator.h> + +#define HW_STATE_CONTROL 0 +#define DEBUG + +/** + * struct pca9450_vrange - describe linear range of voltages + * + * @min_volt: smallest voltage in range + * @step: how much voltage changes at each selector step + * @min_sel: smallest selector in the range + * @max_sel: maximum selector in the range + */ +struct pca9450_vrange { + unsigned int min_volt; + unsigned int step; + u8 min_sel; + u8 max_sel; +}; + +/** + * struct pca9450_plat - describe regulator control registers + * + * @name: name of the regulator. Used for matching the dt-entry + * @enable_reg: register address used to enable/disable regulator + * @enablemask: register mask used to enable/disable regulator + * @volt_reg: register address used to configure regulator voltage + * @volt_mask: register mask used to configure regulator voltage + * @ranges: pointer to ranges of regulator voltages and matching register + * values + * @numranges: number of voltage ranges pointed by ranges + * @dvs: whether the voltage can be changed when regulator is enabled + */ +struct pca9450_plat { + const char *name; + u8 enable_reg; + u8 enablemask; + u8 volt_reg; + u8 volt_mask; + struct pca9450_vrange *ranges; + unsigned int numranges; + bool dvs; +}; + +#define PCA_RANGE(_min, _vstep, _sel_low, _sel_hi) \ +{ \ + .min_volt = (_min), .step = (_vstep), \ + .min_sel = (_sel_low), .max_sel = (_sel_hi), \ +} + +#define PCA_DATA(_name, enreg, enmask, vreg, vmask, _range, _dvs) \ +{ \ + .name = (_name), .enable_reg = (enreg), .enablemask = (enmask), \ + .volt_reg = (vreg), .volt_mask = (vmask), .ranges = (_range), \ + .numranges = ARRAY_SIZE(_range), .dvs = (_dvs), \ +} + +static struct pca9450_vrange pca9450_buck123_vranges[] = { + PCA_RANGE(600000, 12500, 0, 0x7f), +}; + +static struct pca9450_vrange pca9450_buck456_vranges[] = { + PCA_RANGE(600000, 25000, 0, 0x70), + PCA_RANGE(3400000, 0, 0x71, 0x7f), +}; + +static struct pca9450_vrange pca9450_ldo1_vranges[] = { + PCA_RANGE(1600000, 100000, 0x0, 0x3), + PCA_RANGE(3000000, 100000, 0x4, 0x7), +}; + +static struct pca9450_vrange pca9450_ldo2_vranges[] = { + PCA_RANGE(800000, 50000, 0x0, 0x7), +}; + +static struct pca9450_vrange pca9450_ldo34_vranges[] = { + PCA_RANGE(800000, 100000, 0x0, 0x19), + PCA_RANGE(3300000, 0, 0x1a, 0x1f), +}; + +static struct pca9450_vrange pca9450_ldo5_vranges[] = { + PCA_RANGE(1800000, 100000, 0x0, 0xf), +}; + +/* + * We use enable mask 'HW_STATE_CONTROL' to indicate that this regulator + * must not be enabled or disabled by SW. The typical use-case for PCA9450 + * is powering NXP i.MX8. In this use-case we (for now) only allow control + * for BUCK4, BUCK5, BUCK6 which are not boot critical. + */ +static struct pca9450_plat pca9450_reg_data[] = { + /* Bucks 1-3 which support dynamic voltage scaling */ + PCA_DATA("BUCK1", PCA9450_BUCK1CTRL, HW_STATE_CONTROL, + PCA9450_BUCK1OUT_DVS0, DVS_BUCK_RUN_MASK, + pca9450_buck123_vranges, true), + PCA_DATA("BUCK2", PCA9450_BUCK2CTRL, HW_STATE_CONTROL, + PCA9450_BUCK2OUT_DVS0, DVS_BUCK_RUN_MASK, + pca9450_buck123_vranges, true), + PCA_DATA("BUCK3", PCA9450_BUCK3CTRL, HW_STATE_CONTROL, + PCA9450_BUCK3OUT_DVS0, DVS_BUCK_RUN_MASK, + pca9450_buck123_vranges, true), + /* Bucks 4-6 which do not support dynamic voltage scaling */ + PCA_DATA("BUCK4", PCA9450_BUCK4CTRL, HW_STATE_CONTROL, + PCA9450_BUCK4OUT, DVS_BUCK_RUN_MASK, + pca9450_buck456_vranges, false), + PCA_DATA("BUCK5", PCA9450_BUCK5CTRL, HW_STATE_CONTROL, + PCA9450_BUCK5OUT, DVS_BUCK_RUN_MASK, + pca9450_buck456_vranges, false), + PCA_DATA("BUCK6", PCA9450_BUCK6CTRL, HW_STATE_CONTROL, + PCA9450_BUCK6OUT, DVS_BUCK_RUN_MASK, + pca9450_buck456_vranges, false), + /* LDOs */ + PCA_DATA("LDO1", PCA9450_LDO1CTRL, HW_STATE_CONTROL, + PCA9450_LDO1CTRL, PCA9450_LDO12_MASK, + pca9450_ldo1_vranges, false), + PCA_DATA("LDO2", PCA9450_LDO2CTRL, HW_STATE_CONTROL, + PCA9450_LDO2CTRL, PCA9450_LDO12_MASK, + pca9450_ldo2_vranges, false), + PCA_DATA("LDO3", PCA9450_LDO3CTRL, HW_STATE_CONTROL, + PCA9450_LDO3CTRL, PCA9450_LDO34_MASK, + pca9450_ldo34_vranges, false), + PCA_DATA("LDO4", PCA9450_LDO4CTRL, HW_STATE_CONTROL, + PCA9450_LDO4CTRL, PCA9450_LDO34_MASK, + pca9450_ldo34_vranges, false), + PCA_DATA("LDO5", PCA9450_LDO5CTRL_H, HW_STATE_CONTROL, + PCA9450_LDO5CTRL_H, PCA9450_LDO5_MASK, + pca9450_ldo5_vranges, false), +}; + +static int vrange_find_value(struct pca9450_vrange *r, unsigned int sel, + unsigned int *val) +{ + if (!val || sel < r->min_sel || sel > r->max_sel) + return -EINVAL; + + *val = r->min_volt + r->step * (sel - r->min_sel); + return 0; +} + +static int vrange_find_selector(struct pca9450_vrange *r, int val, + unsigned int *sel) +{ + int ret = -EINVAL; + int num_vals = r->max_sel - r->min_sel + 1; + + if (val >= r->min_volt && + val <= r->min_volt + r->step * (num_vals - 1)) { + if (r->step) { + *sel = r->min_sel + ((val - r->min_volt) / r->step); + ret = 0; + } else { + *sel = r->min_sel; + ret = 0; + } + } + return ret; +} + +static int pca9450_get_enable(struct udevice *dev) +{ + struct pca9450_plat *plat = dev_get_plat(dev); + int val; + + /* + * boot critical regulators on pca9450 must not be controlled by sw + * due to the 'feature' which leaves power rails down if pca9450 is + * reseted to snvs state. hence we can't get the state here. + * + * if we are alive it means we probably are on run state and + * if the regulator can't be controlled we can assume it is + * enabled. + */ + if (plat->enablemask == HW_STATE_CONTROL) + return 1; + + val = pmic_reg_read(dev->parent, plat->enable_reg); + if (val < 0) + return val; + + return (val & plat->enablemask); +} + +static int pca9450_set_enable(struct udevice *dev, bool enable) +{ + int val = 0; + struct pca9450_plat *plat = dev_get_plat(dev); + + /* + * boot critical regulators on pca9450 must not be controlled by sw + * due to the 'feature' which leaves power rails down if pca9450 is + * reseted to snvs state. Hence we can't set the state here. + */ + if (plat->enablemask == HW_STATE_CONTROL) + return enable ? 0 : -EINVAL; + + if (enable) + val = plat->enablemask; + + return pmic_clrsetbits(dev->parent, plat->enable_reg, plat->enablemask, + val); +} + +static int pca9450_get_value(struct udevice *dev) +{ + struct pca9450_plat *plat = dev_get_plat(dev); + unsigned int reg, tmp; + int i, ret; + + ret = pmic_reg_read(dev->parent, plat->volt_reg); + if (ret < 0) + return ret; + + reg = ret; + reg &= plat->volt_mask; + + for (i = 0; i < plat->numranges; i++) { + struct pca9450_vrange *r = &plat->ranges[i]; + + if (!vrange_find_value(r, reg, &tmp)) + return tmp; + } + + pr_err("Unknown voltage value read from pmic\n"); + + return -EINVAL; +} + +static int pca9450_set_value(struct udevice *dev, int uvolt) +{ + struct pca9450_plat *plat = dev_get_plat(dev); + unsigned int sel; + int i, found = 0; + + /* + * An under/overshooting may occur if voltage is changed for other + * regulators but buck 1,2,3 or 4 when regulator is enabled. Prevent + * change to protect the HW + */ + if (!plat->dvs) + if (pca9450_get_enable(dev)) { + /* If the value is already set, skip the warning. */ + if (pca9450_get_value(dev) == uvolt) + return 0; + pr_err("Only DVS bucks can be changed when enabled\n"); + return -EINVAL; + } + + for (i = 0; i < plat->numranges; i++) { + struct pca9450_vrange *r = &plat->ranges[i]; + + found = !vrange_find_selector(r, uvolt, &sel); + if (found) { + unsigned int tmp; + + /* + * We require exactly the requested value to be + * supported - this can be changed later if needed + */ + found = !vrange_find_value(r, sel, &tmp); + if (found && tmp == uvolt) + break; + found = 0; + } + } + + if (!found) + return -EINVAL; + + return pmic_clrsetbits(dev->parent, plat->volt_reg, + plat->volt_mask, sel); +} + +static int pca9450_regulator_probe(struct udevice *dev) +{ + struct pca9450_plat *plat = dev_get_plat(dev); + int i, type; + + type = dev_get_driver_data(dev_get_parent(dev)); + + if (type != NXP_CHIP_TYPE_PCA9450A && type != NXP_CHIP_TYPE_PCA9450BC) { + debug("Unknown PMIC type\n"); + return -EINVAL; + } + + for (i = 0; i < ARRAY_SIZE(pca9450_reg_data); i++) { + if (strcmp(dev->name, pca9450_reg_data[i].name)) + continue; + + /* PCA9450B/PCA9450C uses BUCK1 and BUCK3 in dual-phase */ + if (type == NXP_CHIP_TYPE_PCA9450BC && + !strcmp(pca9450_reg_data[i].name, "BUCK3")) { + continue; + } + + *plat = pca9450_reg_data[i]; + + return 0; + } + + pr_err("Unknown regulator '%s'\n", dev->name); + + return -ENOENT; +} + +static const struct dm_regulator_ops pca9450_regulator_ops = { + .get_value = pca9450_get_value, + .set_value = pca9450_set_value, + .get_enable = pca9450_get_enable, + .set_enable = pca9450_set_enable, +}; + +U_BOOT_DRIVER(pca9450_regulator) = { + .name = PCA9450_REGULATOR_DRIVER, + .id = UCLASS_REGULATOR, + .ops = &pca9450_regulator_ops, + .probe = pca9450_regulator_probe, + .plat_auto = sizeof(struct pca9450_plat), +}; diff --git a/include/power/pca9450.h b/include/power/pca9450.h index 27703bb1f91..b714fc3477d 100644 --- a/include/power/pca9450.h +++ b/include/power/pca9450.h @@ -56,4 +56,15 @@ enum {

int power_pca9450_init(unsigned char bus, unsigned char addr);

+enum { + NXP_CHIP_TYPE_PCA9450A = 0, + NXP_CHIP_TYPE_PCA9450BC, + NXP_CHIP_TYPE_AMOUNT +}; + +#define DVS_BUCK_RUN_MASK 0x7f +#define PCA9450_LDO12_MASK 0x07 +#define PCA9450_LDO34_MASK 0x1f +#define PCA9450_LDO5_MASK 0x0f + #endif

The i.MX8M Mini and i.MX8M Plus flexspi IPs are compatible with one another, however the linux kernel DT uses separate compatible string for each SoC. Add the missing i.MX8MP compatible into this driver.

Reviewed-by: Peng Fan peng.fan@nxp.com Signed-off-by: Marek Vasut marex@denx.de Cc: Fabio Estevam festevam@denx.de Cc: Peng Fan peng.fan@nxp.com Cc: Stefano Babic sbabic@denx.de --- V2: Add RB by Peng --- drivers/spi/nxp_fspi.c | 1 + 1 file changed, 1 insertion(+)

diff --git a/drivers/spi/nxp_fspi.c b/drivers/spi/nxp_fspi.c index b7c922b1dfd..607c953987b 100644 --- a/drivers/spi/nxp_fspi.c +++ b/drivers/spi/nxp_fspi.c @@ -1053,6 +1053,7 @@ static const struct dm_spi_ops nxp_fspi_ops = { static const struct udevice_id nxp_fspi_ids[] = { { .compatible = "nxp,lx2160a-fspi", .data = (ulong)&lx2160a_data, }, { .compatible = "nxp,imx8mm-fspi", .data = (ulong)&imx8mm_data, }, + { .compatible = "nxp,imx8mp-fspi", .data = (ulong)&imx8mm_data, }, { } };

Decode ECSPI boot device in env_get_location() from i.MX8M ROMAPI tables. This is necessary to correctly identify env is in SPI NOR when the system boots from SPI NOR attached to ECSPI.

Reviewed-by: Fabio Estevam festevam@denx.de Signed-off-by: Marek Vasut marex@denx.de Cc: Fabio Estevam festevam@denx.de Cc: Peng Fan peng.fan@nxp.com Cc: Stefano Babic sbabic@denx.de --- V2: Add RB by Fabio --- arch/arm/include/asm/mach-imx/sys_proto.h | 1 + arch/arm/mach-imx/imx8m/soc.c | 4 ++++ 2 files changed, 5 insertions(+)

diff --git a/arch/arm/include/asm/mach-imx/sys_proto.h b/arch/arm/include/asm/mach-imx/sys_proto.h index 0c0c7814fb2..309f8d17959 100644 --- a/arch/arm/include/asm/mach-imx/sys_proto.h +++ b/arch/arm/include/asm/mach-imx/sys_proto.h @@ -159,6 +159,7 @@ enum boot_dev_type_e { BT_DEV_TYPE_MMC = 2, BT_DEV_TYPE_NAND = 3, BT_DEV_TYPE_FLEXSPINOR = 4, + BT_DEV_TYPE_SPI_NOR = 6,

BT_DEV_TYPE_USB = 0xE, BT_DEV_TYPE_MEM_DEV = 0xF, diff --git a/arch/arm/mach-imx/imx8m/soc.c b/arch/arm/mach-imx/imx8m/soc.c index 7397b99a1ee..8e972d9b0cb 100644 --- a/arch/arm/mach-imx/imx8m/soc.c +++ b/arch/arm/mach-imx/imx8m/soc.c @@ -599,6 +599,9 @@ enum boot_device get_boot_device(void) case BT_DEV_TYPE_FLEXSPINOR: boot_dev = QSPI_BOOT; break; + case BT_DEV_TYPE_SPI_NOR: + boot_dev = SPI_NOR_BOOT; + break; case BT_DEV_TYPE_USB: boot_dev = USB_BOOT; break; @@ -1337,6 +1340,7 @@ enum env_location env_get_location(enum env_operation op, int prio)

switch (dev) { case QSPI_BOOT: + case SPI_NOR_BOOT: if (IS_ENABLED(CONFIG_ENV_IS_IN_SPI_FLASH)) return ENVL_SPI_FLASH; return ENVL_NOWHERE;

In case the ops is not implemented, return 0 in the core right away. This is better than having multiple copies of functions which just return 0 in each power domain driver. Drop all those empty functions.

Signed-off-by: Marek Vasut marex@denx.de Cc: Patrick Delaunay patrick.delaunay@foss.st.com Cc: Simon Glass sjg@chromium.org --- drivers/power/domain/apple-pmgr.c | 30 ------------------- drivers/power/domain/bcm6328-power-domain.c | 6 ---- .../power/domain/imx8-power-domain-legacy.c | 16 ---------- drivers/power/domain/imx8-power-domain.c | 24 --------------- drivers/power/domain/imx8m-power-domain.c | 18 ----------- drivers/power/domain/meson-ee-pwrc.c | 12 -------- drivers/power/domain/meson-gx-pwrc-vpu.c | 12 -------- drivers/power/domain/mtk-power-domain.c | 6 ---- drivers/power/domain/power-domain-uclass.c | 8 ++--- drivers/power/domain/tegra186-power-domain.c | 26 ---------------- drivers/power/domain/ti-power-domain.c | 13 -------- drivers/power/domain/ti-sci-power-domain.c | 14 --------- 12 files changed, 4 insertions(+), 181 deletions(-)

diff --git a/drivers/power/domain/apple-pmgr.c b/drivers/power/domain/apple-pmgr.c index 4d06e76ff5e..402c5b1fd18 100644 --- a/drivers/power/domain/apple-pmgr.c +++ b/drivers/power/domain/apple-pmgr.c @@ -42,16 +42,6 @@ static int apple_reset_of_xlate(struct reset_ctl *reset_ctl, return 0; }

-static int apple_reset_request(struct reset_ctl *reset_ctl) -{ - return 0; -} - -static int apple_reset_free(struct reset_ctl *reset_ctl) -{ - return 0; -} - static int apple_reset_assert(struct reset_ctl *reset_ctl) { struct apple_pmgr_priv *priv = dev_get_priv(reset_ctl->dev->parent); @@ -80,8 +70,6 @@ static int apple_reset_deassert(struct reset_ctl *reset_ctl)

struct reset_ops apple_reset_ops = { .of_xlate = apple_reset_of_xlate, - .request = apple_reset_request, - .rfree = apple_reset_free, .rst_assert = apple_reset_assert, .rst_deassert = apple_reset_deassert, }; @@ -92,16 +80,6 @@ static struct driver apple_reset_driver = { .ops = &apple_reset_ops, };

-static int apple_pmgr_request(struct power_domain *power_domain) -{ - return 0; -} - -static int apple_pmgr_rfree(struct power_domain *power_domain) -{ - return 0; -} - static int apple_pmgr_ps_set(struct power_domain *power_domain, u32 pstate) { struct apple_pmgr_priv *priv = dev_get_priv(power_domain->dev); @@ -121,11 +99,6 @@ static int apple_pmgr_on(struct power_domain *power_domain) return apple_pmgr_ps_set(power_domain, APPLE_PMGR_PS_ACTIVE); }

-static int apple_pmgr_off(struct power_domain *power_domain) -{ - return 0; -} - static int apple_pmgr_of_xlate(struct power_domain *power_domain, struct ofnode_phandle_args *args) { @@ -167,10 +140,7 @@ static int apple_pmgr_probe(struct udevice *dev) }

struct power_domain_ops apple_pmgr_ops = { - .request = apple_pmgr_request, - .rfree = apple_pmgr_rfree, .on = apple_pmgr_on, - .off = apple_pmgr_off, .of_xlate = apple_pmgr_of_xlate, };

diff --git a/drivers/power/domain/bcm6328-power-domain.c b/drivers/power/domain/bcm6328-power-domain.c index 6e720e0798c..80144dd9772 100644 --- a/drivers/power/domain/bcm6328-power-domain.c +++ b/drivers/power/domain/bcm6328-power-domain.c @@ -24,11 +24,6 @@ static int bcm6328_power_domain_request(struct power_domain *power_domain) return 0; }

-static int bcm6328_power_domain_free(struct power_domain *power_domain) -{ - return 0; -} - static int bcm6328_power_domain_on(struct power_domain *power_domain) { struct bcm6328_power_domain *priv = dev_get_priv(power_domain->dev); @@ -64,7 +59,6 @@ static const struct udevice_id bcm6328_power_domain_ids[] = { };

struct power_domain_ops bcm6328_power_domain_ops = { - .rfree = bcm6328_power_domain_free, .off = bcm6328_power_domain_off, .on = bcm6328_power_domain_on, .request = bcm6328_power_domain_request, diff --git a/drivers/power/domain/imx8-power-domain-legacy.c b/drivers/power/domain/imx8-power-domain-legacy.c index e2fae2dbc86..bf45891bccd 100644 --- a/drivers/power/domain/imx8-power-domain-legacy.c +++ b/drivers/power/domain/imx8-power-domain-legacy.c @@ -84,20 +84,6 @@ int imx8_power_domain_lookup_name(const char *name, return 0; }

-static int imx8_power_domain_request(struct power_domain *power_domain) -{ - debug("%s(power_domain=%p)\n", __func__, power_domain); - - return 0; -} - -static int imx8_power_domain_free(struct power_domain *power_domain) -{ - debug("%s(power_domain=%p)\n", __func__, power_domain); - - return 0; -} - static int imx8_power_domain_on(struct power_domain *power_domain) { struct udevice *dev = power_domain->dev; @@ -364,8 +350,6 @@ static const struct udevice_id imx8_power_domain_ids[] = { };

struct power_domain_ops imx8_power_domain_ops = { - .request = imx8_power_domain_request, - .rfree = imx8_power_domain_free, .on = imx8_power_domain_on, .off = imx8_power_domain_off, .of_xlate = imx8_power_domain_of_xlate, diff --git a/drivers/power/domain/imx8-power-domain.c b/drivers/power/domain/imx8-power-domain.c index 6461ab23d62..17b5d57b19b 100644 --- a/drivers/power/domain/imx8-power-domain.c +++ b/drivers/power/domain/imx8-power-domain.c @@ -12,20 +12,6 @@ #include <asm/arch/power-domain.h> #include <asm/arch/sci/sci.h>

-static int imx8_power_domain_request(struct power_domain *power_domain) -{ - debug("%s(power_domain=%p)\n", __func__, power_domain); - - return 0; -} - -static int imx8_power_domain_free(struct power_domain *power_domain) -{ - debug("%s(power_domain=%p)\n", __func__, power_domain); - - return 0; -} - static int imx8_power_domain_on(struct power_domain *power_domain) { u32 resource_id = power_domain->id; @@ -60,13 +46,6 @@ static int imx8_power_domain_off(struct power_domain *power_domain) return 0; }

-static int imx8_power_domain_probe(struct udevice *dev) -{ - debug("%s(dev=%s)\n", __func__, dev->name); - - return 0; -} - static const struct udevice_id imx8_power_domain_ids[] = { { .compatible = "fsl,imx8qxp-scu-pd" }, { .compatible = "fsl,scu-pd" }, @@ -74,8 +53,6 @@ static const struct udevice_id imx8_power_domain_ids[] = { };

struct power_domain_ops imx8_power_domain_ops_v2 = { - .request = imx8_power_domain_request, - .rfree = imx8_power_domain_free, .on = imx8_power_domain_on, .off = imx8_power_domain_off, }; @@ -84,6 +61,5 @@ U_BOOT_DRIVER(imx8_power_domain_v2) = { .name = "imx8_power_domain_v2", .id = UCLASS_POWER_DOMAIN, .of_match = imx8_power_domain_ids, - .probe = imx8_power_domain_probe, .ops = &imx8_power_domain_ops_v2, }; diff --git a/drivers/power/domain/imx8m-power-domain.c b/drivers/power/domain/imx8m-power-domain.c index 5d34bc12902..6082ee6ff8c 100644 --- a/drivers/power/domain/imx8m-power-domain.c +++ b/drivers/power/domain/imx8m-power-domain.c @@ -18,16 +18,6 @@

DECLARE_GLOBAL_DATA_PTR;

-static int imx8m_power_domain_request(struct power_domain *power_domain) -{ - return 0; -} - -static int imx8m_power_domain_free(struct power_domain *power_domain) -{ - return 0; -} - static int imx8m_power_domain_on(struct power_domain *power_domain) { struct udevice *dev = power_domain->dev; @@ -100,11 +90,6 @@ static int imx8m_power_domain_bind(struct udevice *dev) return 0; }

-static int imx8m_power_domain_probe(struct udevice *dev) -{ - return 0; -} - static int imx8m_power_domain_of_to_plat(struct udevice *dev) { struct imx8m_power_domain_plat *pdata = dev_get_plat(dev); @@ -126,8 +111,6 @@ static const struct udevice_id imx8m_power_domain_ids[] = { };

struct power_domain_ops imx8m_power_domain_ops = { - .request = imx8m_power_domain_request, - .rfree = imx8m_power_domain_free, .on = imx8m_power_domain_on, .off = imx8m_power_domain_off, .of_xlate = imx8m_power_domain_of_xlate, @@ -138,7 +121,6 @@ U_BOOT_DRIVER(imx8m_power_domain) = { .id = UCLASS_POWER_DOMAIN, .of_match = imx8m_power_domain_ids, .bind = imx8m_power_domain_bind, - .probe = imx8m_power_domain_probe, .of_to_plat = imx8m_power_domain_of_to_plat, .plat_auto = sizeof(struct imx8m_power_domain_plat), .ops = &imx8m_power_domain_ops, diff --git a/drivers/power/domain/meson-ee-pwrc.c b/drivers/power/domain/meson-ee-pwrc.c index a4d50e701ae..676fded8080 100644 --- a/drivers/power/domain/meson-ee-pwrc.c +++ b/drivers/power/domain/meson-ee-pwrc.c @@ -273,16 +273,6 @@ static bool pwrc_ee_get_power(struct power_domain *power_domain) return (reg & pwrc_domain->top_pd->sleep_mask); }

-static int meson_ee_pwrc_request(struct power_domain *power_domain) -{ - return 0; -} - -static int meson_ee_pwrc_free(struct power_domain *power_domain) -{ - return 0; -} - static int meson_ee_pwrc_off(struct power_domain *power_domain) { struct meson_ee_pwrc_priv *priv = dev_get_priv(power_domain->dev); @@ -387,10 +377,8 @@ static int meson_ee_pwrc_of_xlate(struct power_domain *power_domain, }

struct power_domain_ops meson_ee_pwrc_ops = { - .rfree = meson_ee_pwrc_free, .off = meson_ee_pwrc_off, .on = meson_ee_pwrc_on, - .request = meson_ee_pwrc_request, .of_xlate = meson_ee_pwrc_of_xlate, };

diff --git a/drivers/power/domain/meson-gx-pwrc-vpu.c b/drivers/power/domain/meson-gx-pwrc-vpu.c index eb94af2cf83..612660ce89f 100644 --- a/drivers/power/domain/meson-gx-pwrc-vpu.c +++ b/drivers/power/domain/meson-gx-pwrc-vpu.c @@ -45,16 +45,6 @@ struct meson_gx_pwrc_vpu_priv { struct clk_bulk clks; };

-static int meson_pwrc_vpu_request(struct power_domain *power_domain) -{ - return 0; -} - -static int meson_pwrc_vpu_free(struct power_domain *power_domain) -{ - return 0; -} - static int meson_gx_pwrc_vpu_on(struct power_domain *power_domain) { struct meson_gx_pwrc_vpu_priv *priv = dev_get_priv(power_domain->dev); @@ -274,10 +264,8 @@ static int meson_pwrc_vpu_of_xlate(struct power_domain *power_domain, }

struct power_domain_ops meson_gx_pwrc_vpu_ops = { - .rfree = meson_pwrc_vpu_free, .off = meson_pwrc_vpu_off, .on = meson_pwrc_vpu_on, - .request = meson_pwrc_vpu_request, .of_xlate = meson_pwrc_vpu_of_xlate, };

diff --git a/drivers/power/domain/mtk-power-domain.c b/drivers/power/domain/mtk-power-domain.c index ca2ded00efa..3b84147d481 100644 --- a/drivers/power/domain/mtk-power-domain.c +++ b/drivers/power/domain/mtk-power-domain.c @@ -317,11 +317,6 @@ static int scpsys_power_request(struct power_domain *power_domain) return 0; }

-static int scpsys_power_free(struct power_domain *power_domain) -{ - return 0; -} - static int mtk_power_domain_hook(struct udevice *dev) { struct scp_domain *scpd = dev_get_priv(dev); @@ -399,7 +394,6 @@ static const struct udevice_id mtk_power_domain_ids[] = { };

struct power_domain_ops mtk_power_domain_ops = { - .rfree = scpsys_power_free, .off = scpsys_power_off, .on = scpsys_power_on, .request = scpsys_power_request, diff --git a/drivers/power/domain/power-domain-uclass.c b/drivers/power/domain/power-domain-uclass.c index 33f9206bd09..0c5823ceddf 100644 --- a/drivers/power/domain/power-domain-uclass.c +++ b/drivers/power/domain/power-domain-uclass.c @@ -71,7 +71,7 @@ int power_domain_get_by_index(struct udevice *dev, return ret; }

- ret = ops->request(power_domain); + ret = ops->request ? ops->request(power_domain) : 0; if (ret) { debug("ops->request() failed: %d\n", ret); return ret; @@ -91,7 +91,7 @@ int power_domain_free(struct power_domain *power_domain)

debug("%s(power_domain=%p)\n", __func__, power_domain);

- return ops->rfree(power_domain); + return ops->rfree ? ops->rfree(power_domain) : 0; }

int power_domain_on(struct power_domain *power_domain) @@ -100,7 +100,7 @@ int power_domain_on(struct power_domain *power_domain)

debug("%s(power_domain=%p)\n", __func__, power_domain);

- return ops->on(power_domain); + return ops->on ? ops->on(power_domain) : 0; }

int power_domain_off(struct power_domain *power_domain) @@ -109,7 +109,7 @@ int power_domain_off(struct power_domain *power_domain)

debug("%s(power_domain=%p)\n", __func__, power_domain);

- return ops->off(power_domain); + return ops->off ? ops->off(power_domain) : 0; }

#if CONFIG_IS_ENABLED(OF_REAL) diff --git a/drivers/power/domain/tegra186-power-domain.c b/drivers/power/domain/tegra186-power-domain.c index 707735cf851..46da541b75a 100644 --- a/drivers/power/domain/tegra186-power-domain.c +++ b/drivers/power/domain/tegra186-power-domain.c @@ -15,22 +15,6 @@ #define UPDATE BIT(0) #define ON BIT(1)

-static int tegra186_power_domain_request(struct power_domain *power_domain) -{ - debug("%s(power_domain=%p) (dev=%p, id=%lu)\n", __func__, - power_domain, power_domain->dev, power_domain->id); - - return 0; -} - -static int tegra186_power_domain_free(struct power_domain *power_domain) -{ - debug("%s(power_domain=%p) (dev=%p, id=%lu)\n", __func__, - power_domain, power_domain->dev, power_domain->id); - - return 0; -} - static int tegra186_power_domain_common(struct power_domain *power_domain, bool on) { @@ -73,22 +57,12 @@ static int tegra186_power_domain_off(struct power_domain *power_domain) }

struct power_domain_ops tegra186_power_domain_ops = { - .request = tegra186_power_domain_request, - .rfree = tegra186_power_domain_free, .on = tegra186_power_domain_on, .off = tegra186_power_domain_off, };

-static int tegra186_power_domain_probe(struct udevice *dev) -{ - debug("%s(dev=%p)\n", __func__, dev); - - return 0; -} - U_BOOT_DRIVER(tegra186_power_domain) = { .name = "tegra186_power_domain", .id = UCLASS_POWER_DOMAIN, - .probe = tegra186_power_domain_probe, .ops = &tegra186_power_domain_ops, }; diff --git a/drivers/power/domain/ti-power-domain.c b/drivers/power/domain/ti-power-domain.c index a7dadf2eea7..89e229b36f3 100644 --- a/drivers/power/domain/ti-power-domain.c +++ b/drivers/power/domain/ti-power-domain.c @@ -339,17 +339,6 @@ static int ti_power_domain_of_xlate(struct power_domain *pd,

return 0; } - -static int ti_power_domain_request(struct power_domain *pd) -{ - return 0; -} - -static int ti_power_domain_free(struct power_domain *pd) -{ - return 0; -} - static const struct udevice_id ti_power_domain_of_match[] = { { .compatible = "ti,sci-pm-domain" }, { /* sentinel */ } @@ -359,8 +348,6 @@ static struct power_domain_ops ti_power_domain_ops = { .on = ti_power_domain_on, .off = ti_power_domain_off, .of_xlate = ti_power_domain_of_xlate, - .request = ti_power_domain_request, - .rfree = ti_power_domain_free, };

U_BOOT_DRIVER(ti_pm_domains) = { diff --git a/drivers/power/domain/ti-sci-power-domain.c b/drivers/power/domain/ti-sci-power-domain.c index f18e45617a1..0140e5e5217 100644 --- a/drivers/power/domain/ti-sci-power-domain.c +++ b/drivers/power/domain/ti-sci-power-domain.c @@ -44,18 +44,6 @@ static int ti_sci_power_domain_probe(struct udevice *dev) return 0; }

-static int ti_sci_power_domain_request(struct power_domain *pd) -{ - debug("%s(pd=%p)\n", __func__, pd); - return 0; -} - -static int ti_sci_power_domain_free(struct power_domain *pd) -{ - debug("%s(pd=%p)\n", __func__, pd); - return 0; -} - static int ti_sci_power_domain_on(struct power_domain *pd) { struct ti_sci_power_domain_data *data = dev_get_priv(pd->dev); @@ -123,8 +111,6 @@ static const struct udevice_id ti_sci_power_domain_of_match[] = { };

static struct power_domain_ops ti_sci_power_domain_ops = { - .request = ti_sci_power_domain_request, - .rfree = ti_sci_power_domain_free, .on = ti_sci_power_domain_on, .off = ti_sci_power_domain_off, .of_xlate = ti_sci_power_domain_of_xlate,

In case the power domain node structure is gpc@303a0000/pgc/power-domain@N, do not bind power domain driver to the 'pgc' node, but rather descend into it and only bind power domain drivers to power-domain@N subnodes. This way we do not waste one useless driver instance associated with 'pgc' node.

Tested-By: Tim Harvey tharvey@gateworks.com #imx8mp-venice-defconfig Signed-off-by: Marek Vasut marex@denx.de Cc: Fabio Estevam festevam@gmail.com Cc: Peng Fan peng.fan@nxp.com Cc: Stefano Babic sbabic@denx.de --- V2: Add TB by Tim --- drivers/power/domain/imx8m-power-domain.c | 6 ++++++ 1 file changed, 6 insertions(+)

diff --git a/drivers/power/domain/imx8m-power-domain.c b/drivers/power/domain/imx8m-power-domain.c index 6082ee6ff8c..ac7411f8327 100644 --- a/drivers/power/domain/imx8m-power-domain.c +++ b/drivers/power/domain/imx8m-power-domain.c @@ -73,6 +73,12 @@ static int imx8m_power_domain_bind(struct udevice *dev) /* Bind the subnode to this driver */ name = fdt_get_name(gd->fdt_blob, offset, NULL);

+ /* Descend into 'pgc' subnode */ + if (!strstr(name, "power-domain")) { + offset = fdt_first_subnode(gd->fdt_blob, offset); + name = fdt_get_name(gd->fdt_blob, offset, NULL); + } + ret = device_bind_with_driver_data(dev, dev->driver, name, dev->driver_data, offset_to_ofnode(offset),

Implement power_domain_get_by_name() convenience function which parses DT property 'power-domain-names' and looks up power domain by matching name.

Signed-off-by: Marek Vasut marex@denx.de Cc: Patrick Delaunay patrick.delaunay@foss.st.com Cc: Simon Glass sjg@chromium.org --- drivers/power/domain/power-domain-uclass.c | 14 ++++++++++++++ include/power-domain.h | 21 +++++++++++++++++++++ 2 files changed, 35 insertions(+)

diff --git a/drivers/power/domain/power-domain-uclass.c b/drivers/power/domain/power-domain-uclass.c index 0c5823ceddf..74c33d4e2e0 100644 --- a/drivers/power/domain/power-domain-uclass.c +++ b/drivers/power/domain/power-domain-uclass.c @@ -80,6 +80,20 @@ int power_domain_get_by_index(struct udevice *dev, return 0; }

+int power_domain_get_by_name(struct udevice *dev, + struct power_domain *power_domain, const char *name) +{ + int index; + + index = dev_read_stringlist_search(dev, "power-domain-names", name); + if (index < 0) { + debug("fdt_stringlist_search() failed: %d\n", index); + return index; + } + + return power_domain_get_by_index(dev, power_domain, index); +} + int power_domain_get(struct udevice *dev, struct power_domain *power_domain) { return power_domain_get_by_index(dev, power_domain, 0); diff --git a/include/power-domain.h b/include/power-domain.h index 113276b5119..2ff6c77cd76 100644 --- a/include/power-domain.h +++ b/include/power-domain.h @@ -107,6 +107,27 @@ int power_domain_get_by_index(struct udevice *dev, } #endif

+/** + * power_domain_get_by_name - Get the named power domain for a device. + * + * @dev: The client device. + * @power_domain: A pointer to a power domain struct to initialize. + * @name: Power domain name to be powered on. + * + * Return: 0 if OK, or a negative error code. + */ +#if CONFIG_IS_ENABLED(POWER_DOMAIN) +int power_domain_get_by_name(struct udevice *dev, + struct power_domain *power_domain, const char *name); +#else +static inline +int power_domain_get_by_name(struct udevice *dev, + struct power_domain *power_domain, const char *name) +{ + return -ENOSYS; +} +#endif + /** * power_domain_free - Free a previously requested power domain. *

Add trivial driver for i.MX8MP HSIOMIX handling. This is responsible for enabling the GPCv2 power domains and clock for USB 3.0 and PCIe in the correct order. Currently supported is the USB 3.0 part which can be tested, PCIe support should be easy to add.

Tested-By: Tim Harvey tharvey@gateworks.com #imx8mp-venice-gw74xx Signed-off-by: Marek Vasut marex@denx.de Cc: Fabio Estevam festevam@gmail.com Cc: Peng Fan peng.fan@nxp.com Cc: Stefano Babic sbabic@denx.de --- V2: Drop two left over unused variables which triggered build warning V3: Add TB from Tim --- drivers/power/domain/Kconfig | 7 ++ drivers/power/domain/Makefile | 1 + drivers/power/domain/imx8mp-hsiomix.c | 159 ++++++++++++++++++++++++++ 3 files changed, 167 insertions(+) create mode 100644 drivers/power/domain/imx8mp-hsiomix.c

diff --git a/drivers/power/domain/Kconfig b/drivers/power/domain/Kconfig index 04fc0054323..7e1b8c072fa 100644 --- a/drivers/power/domain/Kconfig +++ b/drivers/power/domain/Kconfig @@ -40,6 +40,13 @@ config IMX8M_POWER_DOMAIN Enable support for manipulating NXP i.MX8M on-SoC power domains via requests to the ATF.

+config IMX8MP_HSIOMIX_BLKCTRL + bool "Enable i.MX8MP HSIOMIX domain driver" + depends on POWER_DOMAIN && IMX8MP + select CLK + help + Enable support for manipulating NXP i.MX8MP on-SoC HSIOMIX block controller. + config MTK_POWER_DOMAIN bool "Enable the MediaTek power domain driver" depends on POWER_DOMAIN && ARCH_MEDIATEK diff --git a/drivers/power/domain/Makefile b/drivers/power/domain/Makefile index 7c8af67dbd6..e6244776216 100644 --- a/drivers/power/domain/Makefile +++ b/drivers/power/domain/Makefile @@ -8,6 +8,7 @@ obj-$(CONFIG_APPLE_PMGR_POWER_DOMAIN) += apple-pmgr.o obj-$(CONFIG_BCM6328_POWER_DOMAIN) += bcm6328-power-domain.o obj-$(CONFIG_IMX8_POWER_DOMAIN) += imx8-power-domain-legacy.o imx8-power-domain.o obj-$(CONFIG_IMX8M_POWER_DOMAIN) += imx8m-power-domain.o +obj-$(CONFIG_IMX8MP_HSIOMIX_BLKCTRL) += imx8mp-hsiomix.o obj-$(CONFIG_MTK_POWER_DOMAIN) += mtk-power-domain.o obj-$(CONFIG_MESON_GX_VPU_POWER_DOMAIN) += meson-gx-pwrc-vpu.o obj-$(CONFIG_MESON_EE_POWER_DOMAIN) += meson-ee-pwrc.o diff --git a/drivers/power/domain/imx8mp-hsiomix.c b/drivers/power/domain/imx8mp-hsiomix.c new file mode 100644 index 00000000000..6a721a934a7 --- /dev/null +++ b/drivers/power/domain/imx8mp-hsiomix.c @@ -0,0 +1,159 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (C) 2022 Marek Vasut marex@denx.de + */ + +#include <common.h> +#include <asm/io.h> +#include <clk.h> +#include <dm.h> +#include <dm/device.h> +#include <dm/device_compat.h> +#include <power-domain-uclass.h> + +#include <dt-bindings/power/imx8mp-power.h> + +#define GPR_REG0 0x0 +#define PCIE_CLOCK_MODULE_EN BIT(0) +#define USB_CLOCK_MODULE_EN BIT(1) + +struct imx8mp_hsiomix_priv { + void __iomem *base; + struct clk clk_usb; + struct power_domain pd_bus; + struct power_domain pd_usb; + struct power_domain pd_usb_phy1; + struct power_domain pd_usb_phy2; +}; + +static int imx8mp_hsiomix_on(struct power_domain *power_domain) +{ + struct udevice *dev = power_domain->dev; + struct imx8mp_hsiomix_priv *priv = dev_get_priv(dev); + struct power_domain *domain; + int ret; + + ret = power_domain_on(&priv->pd_bus); + if (ret) + return ret; + + if (power_domain->id == IMX8MP_HSIOBLK_PD_USB) { + domain = &priv->pd_usb; + } else if (power_domain->id == IMX8MP_HSIOBLK_PD_USB_PHY1) { + domain = &priv->pd_usb_phy1; + } else if (power_domain->id == IMX8MP_HSIOBLK_PD_USB_PHY2) { + domain = &priv->pd_usb_phy2; + } else { + ret = -EINVAL; + goto err_pd; + } + + ret = power_domain_on(domain); + if (ret) + goto err_pd; + + ret = clk_enable(&priv->clk_usb); + if (ret) + goto err_clk; + + if (power_domain->id == IMX8MP_HSIOBLK_PD_USB) + setbits_le32(priv->base + GPR_REG0, USB_CLOCK_MODULE_EN); + + return 0; + +err_clk: + power_domain_off(domain); +err_pd: + power_domain_off(&priv->pd_bus); + return ret; +} + +static int imx8mp_hsiomix_off(struct power_domain *power_domain) +{ + struct udevice *dev = power_domain->dev; + struct imx8mp_hsiomix_priv *priv = dev_get_priv(dev); + + if (power_domain->id == IMX8MP_HSIOBLK_PD_USB) + clrbits_le32(priv->base + GPR_REG0, USB_CLOCK_MODULE_EN); + + clk_disable(&priv->clk_usb); + + if (power_domain->id == IMX8MP_HSIOBLK_PD_USB) + power_domain_off(&priv->pd_usb); + else if (power_domain->id == IMX8MP_HSIOBLK_PD_USB_PHY1) + power_domain_off(&priv->pd_usb_phy1); + else if (power_domain->id == IMX8MP_HSIOBLK_PD_USB_PHY2) + power_domain_off(&priv->pd_usb_phy2); + + power_domain_off(&priv->pd_bus); + + return 0; +} + +static int imx8mp_hsiomix_of_xlate(struct power_domain *power_domain, + struct ofnode_phandle_args *args) +{ + power_domain->id = args->args[0]; + + return 0; +} + +static int imx8mp_hsiomix_probe(struct udevice *dev) +{ + struct imx8mp_hsiomix_priv *priv = dev_get_priv(dev); + int ret; + + priv->base = dev_read_addr_ptr(dev); + + ret = clk_get_by_name(dev, "usb", &priv->clk_usb); + if (ret < 0) + return ret; + + ret = power_domain_get_by_name(dev, &priv->pd_bus, "bus"); + if (ret < 0) + goto err_pd_bus; + + ret = power_domain_get_by_name(dev, &priv->pd_usb, "usb"); + if (ret < 0) + goto err_pd_usb; + + ret = power_domain_get_by_name(dev, &priv->pd_usb_phy1, "usb-phy1"); + if (ret < 0) + goto err_pd_usb_phy1; + + ret = power_domain_get_by_name(dev, &priv->pd_usb_phy2, "usb-phy2"); + if (ret < 0) + goto err_pd_usb_phy2; + + return 0; + +err_pd_usb_phy2: + power_domain_free(&priv->pd_usb_phy1); +err_pd_usb_phy1: + power_domain_free(&priv->pd_usb); +err_pd_usb: + power_domain_free(&priv->pd_bus); +err_pd_bus: + clk_free(&priv->clk_usb); + return ret; +} + +static const struct udevice_id imx8mp_hsiomix_ids[] = { + { .compatible = "fsl,imx8mp-hsio-blk-ctrl" }, + { } +}; + +struct power_domain_ops imx8mp_hsiomix_ops = { + .on = imx8mp_hsiomix_on, + .off = imx8mp_hsiomix_off, + .of_xlate = imx8mp_hsiomix_of_xlate, +}; + +U_BOOT_DRIVER(imx8mp_hsiomix) = { + .name = "imx8mp_hsiomix", + .id = UCLASS_POWER_DOMAIN, + .of_match = imx8mp_hsiomix_ids, + .probe = imx8mp_hsiomix_probe, + .priv_auto = sizeof(struct imx8mp_hsiomix_priv), + .ops = &imx8mp_hsiomix_ops, +};

Add initial support for i.MX8MP USB PHY, i.MX8MP USB is similar to the i.MX8MQ, except for clock and power domain design customization.

Tested-By: Tim Harvey tharvey@gateworks.com #imx8mp-venice-gw74xx Signed-off-by: Marek Vasut marex@denx.de Cc: Fabio Estevam festevam@gmail.com Cc: Peng Fan peng.fan@nxp.com Cc: Stefano Babic sbabic@denx.de --- V2: Add TB from Tim --- drivers/phy/Kconfig | 6 ++-- drivers/phy/phy-imx8mq-usb.c | 66 +++++++++++++++++++++++++++++++++--- 2 files changed, 65 insertions(+), 7 deletions(-)

diff --git a/drivers/phy/Kconfig b/drivers/phy/Kconfig index d79798429b1..c01d9e09b90 100644 --- a/drivers/phy/Kconfig +++ b/drivers/phy/Kconfig @@ -275,11 +275,11 @@ config PHY_MTK_TPHY so you can easily distinguish them by banks layout.

config PHY_IMX8MQ_USB - bool "NXP i.MX8MQ USB PHY Driver" + bool "NXP i.MX8MQ/i.MX8MP USB PHY Driver" depends on PHY - depends on IMX8MQ + depends on IMX8MQ || IMX8MP help - Support the USB3.0 PHY in NXP i.MX8MQ SoC + Support the USB3.0 PHY in NXP i.MX8MQ or i.MX8MP SoC

config PHY_XILINX_ZYNQMP tristate "Xilinx ZynqMP PHY driver" diff --git a/drivers/phy/phy-imx8mq-usb.c b/drivers/phy/phy-imx8mq-usb.c index afbc7ad8dd4..69f01de5553 100644 --- a/drivers/phy/phy-imx8mq-usb.c +++ b/drivers/phy/phy-imx8mq-usb.c @@ -9,7 +9,9 @@ #include <dm.h> #include <errno.h> #include <generic-phy.h> +#include <linux/bitfield.h> #include <linux/bitops.h> +#include <linux/delay.h> #include <linux/err.h> #include <clk.h>

@@ -68,17 +70,22 @@ #define PHY_STS0_FSVPLUS BIT(3) #define PHY_STS0_FSVMINUS BIT(2)

+enum imx8mpq_phy_type { + IMX8MQ_PHY, + IMX8MP_PHY, +}; + struct imx8mq_usb_phy { #if CONFIG_IS_ENABLED(CLK) struct clk phy_clk; #endif void __iomem *base; + enum imx8mpq_phy_type type; };

static const struct udevice_id imx8mq_usb_phy_of_match[] = { - { - .compatible = "fsl,imx8mq-usb-phy", - }, + { .compatible = "fsl,imx8mq-usb-phy", .data = IMX8MQ_PHY }, + { .compatible = "fsl,imx8mp-usb-phy", .data = IMX8MP_PHY }, {}, };

@@ -111,6 +118,56 @@ static int imx8mq_usb_phy_init(struct phy *usb_phy) return 0; }

+static int imx8mp_usb_phy_init(struct phy *usb_phy) +{ + struct udevice *dev = usb_phy->dev; + struct imx8mq_usb_phy *imx_phy = dev_get_priv(dev); + u32 value; + + /* USB3.0 PHY signal fsel for 24M ref */ + value = readl(imx_phy->base + PHY_CTRL0); + value &= ~PHY_CTRL0_FSEL_MASK; + value |= FIELD_PREP(PHY_CTRL0_FSEL_MASK, PHY_CTRL0_FSEL_24M); + writel(value, imx_phy->base + PHY_CTRL0); + + /* Disable alt_clk_en and use internal MPLL clocks */ + value = readl(imx_phy->base + PHY_CTRL6); + value &= ~(PHY_CTRL6_ALT_CLK_SEL | PHY_CTRL6_ALT_CLK_EN); + writel(value, imx_phy->base + PHY_CTRL6); + + value = readl(imx_phy->base + PHY_CTRL1); + value &= ~(PHY_CTRL1_VDATSRCENB0 | PHY_CTRL1_VDATDETENB0); + value |= PHY_CTRL1_RESET | PHY_CTRL1_ATERESET; + writel(value, imx_phy->base + PHY_CTRL1); + + value = readl(imx_phy->base + PHY_CTRL0); + value |= PHY_CTRL0_REF_SSP_EN; + writel(value, imx_phy->base + PHY_CTRL0); + + value = readl(imx_phy->base + PHY_CTRL2); + value |= PHY_CTRL2_TXENABLEN0 | PHY_CTRL2_OTG_DISABLE; + writel(value, imx_phy->base + PHY_CTRL2); + + udelay(10); + + value = readl(imx_phy->base + PHY_CTRL1); + value &= ~(PHY_CTRL1_RESET | PHY_CTRL1_ATERESET); + writel(value, imx_phy->base + PHY_CTRL1); + + return 0; +} + +static int imx8mpq_usb_phy_init(struct phy *usb_phy) +{ + struct udevice *dev = usb_phy->dev; + struct imx8mq_usb_phy *imx_phy = dev_get_priv(dev); + + if (imx_phy->type == IMX8MP_PHY) + return imx8mp_usb_phy_init(usb_phy); + else + return imx8mq_usb_phy_init(usb_phy); +} + static int imx8mq_usb_phy_power_on(struct phy *usb_phy) { struct udevice *dev = usb_phy->dev; @@ -158,7 +215,7 @@ static int imx8mq_usb_phy_exit(struct phy *usb_phy) }

struct phy_ops imx8mq_usb_phy_ops = { - .init = imx8mq_usb_phy_init, + .init = imx8mpq_usb_phy_init, .power_on = imx8mq_usb_phy_power_on, .power_off = imx8mq_usb_phy_power_off, .exit = imx8mq_usb_phy_exit, @@ -168,6 +225,7 @@ int imx8mq_usb_phy_probe(struct udevice *dev) { struct imx8mq_usb_phy *priv = dev_get_priv(dev);

+ priv->type = dev_get_driver_data(dev); priv->base = dev_read_addr_ptr(dev);

if (!priv->base)

Rename the select_dr_mode callback to glue_configure, the callback is used for more than enforcing controller mode even on the TI chips, so change the name to a more generic one. No functional change.

Tested-By: Tim Harvey tharvey@gateworks.com #imx8mp-venice-gw74xx Signed-off-by: Marek Vasut marex@denx.de Cc: Angus Ainslie angus@akkea.ca Cc: Bin Meng bmeng.cn@gmail.com Cc: Fabio Estevam festevam@gmail.com Cc: Kunihiko Hayashi hayashi.kunihiko@socionext.com Cc: Michal Simek michal.simek@xilinx.com Cc: Peng Fan peng.fan@nxp.com Cc: Stefano Babic sbabic@denx.de --- V2: Add TB by Tim --- drivers/usb/dwc3/dwc3-generic.c | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-)

diff --git a/drivers/usb/dwc3/dwc3-generic.c b/drivers/usb/dwc3/dwc3-generic.c index 01bd0ca190e..7e3814207e4 100644 --- a/drivers/usb/dwc3/dwc3-generic.c +++ b/drivers/usb/dwc3/dwc3-generic.c @@ -219,11 +219,11 @@ U_BOOT_DRIVER(dwc3_generic_host) = { #endif

struct dwc3_glue_ops { - void (*select_dr_mode)(struct udevice *dev, int index, + void (*glue_configure)(struct udevice *dev, int index, enum usb_dr_mode mode); };

-void dwc3_ti_select_dr_mode(struct udevice *dev, int index, +void dwc3_ti_glue_configure(struct udevice *dev, int index, enum usb_dr_mode mode) { #define USBOTGSS_UTMI_OTG_STATUS 0x0084 @@ -304,7 +304,7 @@ enum dwc3_omap_utmi_mode { }

struct dwc3_glue_ops ti_ops = { - .select_dr_mode = dwc3_ti_select_dr_mode, + .glue_configure = dwc3_ti_glue_configure, };

static int dwc3_glue_bind(struct udevice *parent) @@ -435,8 +435,8 @@ static int dwc3_glue_probe(struct udevice *dev)

dr_mode = usb_get_dr_mode(dev_ofnode(child)); device_find_next_child(&child); - if (ops && ops->select_dr_mode) - ops->select_dr_mode(dev, index, dr_mode); + if (ops && ops->glue_configure) + ops->glue_configure(dev, index, dr_mode); index++; }

Add DT bindings for a subset of GPCv2 which handles USB and PCIe PDs, HSIOMIX PD controller and missing USB PD properties. This is required to bring up the DWC3 USB controller up.

This is based on linux next and patches which are still pending review, but which are likely going to be part of Linux 5.19: b2d67d7bdf74 ("arm64: dts: imx8mp: disable usb3_phy1") 290918c72a29 ("arm64: dts: imx8mp: Add memory for USB3 glue layer to usb3 nodes") https://www.spinics.net/lists/arm-kernel/msg958501.html

Tested-By: Tim Harvey tharvey@gateworks.com #imx8mp-venice-gw74xx Signed-off-by: Marek Vasut marex@denx.de Cc: Fabio Estevam festevam@gmail.com Cc: Peng Fan peng.fan@nxp.com Cc: Stefano Babic sbabic@denx.de --- V2: Add TB by Tim --- arch/arm/dts/imx8mp.dtsi | 72 ++++++++++++++++++++++++++++++++++++++-- 1 file changed, 70 insertions(+), 2 deletions(-)

diff --git a/arch/arm/dts/imx8mp.dtsi b/arch/arm/dts/imx8mp.dtsi index f9d64253c8a..79b65750da9 100644 --- a/arch/arm/dts/imx8mp.dtsi +++ b/arch/arm/dts/imx8mp.dtsi @@ -4,6 +4,7 @@ */

#include <dt-bindings/clock/imx8mp-clock.h> +#include <dt-bindings/power/imx8mp-power.h> #include <dt-bindings/gpio/gpio.h> #include <dt-bindings/input/input.h> #include <dt-bindings/interrupt-controller/arm-gic.h> @@ -434,6 +435,44 @@ interrupts = <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>; #reset-cells = <1>; }; + + gpc: gpc@303a0000 { + compatible = "fsl,imx8mp-gpc"; + reg = <0x303a0000 0x1000>; + interrupt-parent = <&gic>; + interrupt-controller; + #interrupt-cells = <3>; + + pgc { + #address-cells = <1>; + #size-cells = <0>; + + pgc_pcie_phy: power-domain@1 { + #power-domain-cells = <0>; + reg = <IMX8MP_POWER_DOMAIN_PCIE_PHY>; + }; + + pgc_usb1_phy: power-domain@2 { + #power-domain-cells = <0>; + reg = <IMX8MP_POWER_DOMAIN_USB1_PHY>; + }; + + pgc_usb2_phy: power-domain@3 { + #power-domain-cells = <0>; + reg = <IMX8MP_POWER_DOMAIN_USB2_PHY>; + }; + + pgc_hsiomix: power-domains@17 { + #power-domain-cells = <0>; + reg = <IMX8MP_POWER_DOMAIN_HSIOMIX>; + clocks = <&clk IMX8MP_CLK_HSIO_AXI>, + <&clk IMX8MP_CLK_HSIO_ROOT>; + assigned-clocks = <&clk IMX8MP_CLK_HSIO_AXI>; + assigned-clock-parents = <&clk IMX8MP_SYS_PLL2_500M>; + assigned-clock-rates = <500000000>; + }; + }; + }; };

aips2: bus@30400000 { @@ -842,6 +881,28 @@ }; };

+ aips4: bus@32c00000 { + compatible = "fsl,aips-bus", "simple-bus"; + reg = <0x32c00000 0x400000>; + #address-cells = <1>; + #size-cells = <1>; + ranges; + + hsio_blk_ctrl: blk-ctrl@32f10000 { + compatible = "fsl,imx8mp-hsio-blk-ctrl", "syscon"; + reg = <0x32f10000 0x24>; + clocks = <&clk IMX8MP_CLK_USB_ROOT>, + <&clk IMX8MP_CLK_PCIE_ROOT>; + clock-names = "usb", "pcie"; + power-domains = <&pgc_hsiomix>, <&pgc_hsiomix>, + <&pgc_usb1_phy>, <&pgc_usb2_phy>, + <&pgc_hsiomix>, <&pgc_pcie_phy>; + power-domain-names = "bus", "usb", "usb-phy1", + "usb-phy2", "pcie", "pcie-phy"; + #power-domain-cells = <1>; + }; + }; + gic: interrupt-controller@38800000 { compatible = "arm,gic-v3"; reg = <0x38800000 0x10000>, @@ -865,17 +926,20 @@ clock-names = "phy"; assigned-clocks = <&clk IMX8MP_CLK_USB_PHY_REF>; assigned-clock-parents = <&clk IMX8MP_CLK_24M>; + power-domains = <&hsio_blk_ctrl IMX8MP_HSIOBLK_PD_USB_PHY1>; #phy-cells = <0>; status = "disabled"; };

usb3_0: usb@32f10100 { compatible = "fsl,imx8mp-dwc3"; - reg = <0x32f10100 0x8>; + reg = <0x32f10100 0x8>, + <0x381f0000 0x20>; clocks = <&clk IMX8MP_CLK_HSIO_ROOT>, <&clk IMX8MP_CLK_USB_ROOT>; clock-names = "hsio", "suspend"; interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>; + power-domains = <&hsio_blk_ctrl IMX8MP_HSIOBLK_PD_USB>; #address-cells = <1>; #size-cells = <1>; dma-ranges = <0x40000000 0x40000000 0xc0000000>; @@ -907,16 +971,20 @@ clock-names = "phy"; assigned-clocks = <&clk IMX8MP_CLK_USB_PHY_REF>; assigned-clock-parents = <&clk IMX8MP_CLK_24M>; + power-domains = <&hsio_blk_ctrl IMX8MP_HSIOBLK_PD_USB_PHY2>; #phy-cells = <0>; + status = "disabled"; };

usb3_1: usb@32f10108 { compatible = "fsl,imx8mp-dwc3"; - reg = <0x32f10108 0x8>; + reg = <0x32f10108 0x8>, + <0x382f0000 0x20>; clocks = <&clk IMX8MP_CLK_HSIO_ROOT>, <&clk IMX8MP_CLK_USB_ROOT>; clock-names = "hsio", "suspend"; interrupts = <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>; + power-domains = <&hsio_blk_ctrl IMX8MP_HSIOBLK_PD_USB>; #address-cells = <1>; #size-cells = <1>; dma-ranges = <0x40000000 0x40000000 0xc0000000>;