[U-Boot] [PATCH V2 1/5] ARM: fix u-boot.lds for -ffunction-sections/-fdata-sections
From: Stephen Warren swarren@nvidia.com
When -ffunction-sections or -fdata-section are used, symbols are placed into sections such as .data.eserial1_device and .bss.serial_current. Update the linker script to explicitly include these. Without this change (at least with my gcc-4.5.3 built using crosstool-ng), I see that the sections do end up being included, but __bss_end__ gets set to the same value as __bss_start.
Signed-off-by: Stephen Warren swarren@nvidia.com --- v2: Removed changes from some entries where it wasn't needed. --- arch/arm/cpu/u-boot.lds | 8 ++++---- 1 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/arch/arm/cpu/u-boot.lds b/arch/arm/cpu/u-boot.lds index e49ca0c..9153c3d 100644 --- a/arch/arm/cpu/u-boot.lds +++ b/arch/arm/cpu/u-boot.lds @@ -34,8 +34,8 @@ SECTIONS .text : { __image_copy_start = .; - CPUDIR/start.o (.text) - *(.text) + CPUDIR/start.o (.text*) + *(.text*) }
. = ALIGN(4); @@ -43,7 +43,7 @@ SECTIONS
. = ALIGN(4); .data : { - *(.data) + *(.data*) }
. = ALIGN(4); @@ -81,7 +81,7 @@ SECTIONS
.bss __rel_dyn_start (OVERLAY) : { __bss_start = .; - *(.bss) + *(.bss*) . = ALIGN(4); __bss_end__ = .; }
From: Stephen Warren swarren@nvidia.com
Add an ASSERT() to u-boot.lds to detect an SPL that doesn't fit within SPL_TEXT_BASE..SPL_MAX_SIZE.
Different .lds files implement this check in two possible ways: 1) An ASSERT() like this 2) Defining a MEMORY region of size SPL_MAX_SIZE, and re-directing all linker output into that region. Since u-boot.lds is used for both SPL and main U-Boot, this would entail only sometimes defining a MEMORY region, and only sometimes performing that redirection, and hence option (1) was deemed much simpler, and hence implemented.
Note that this causes build failures at least for NVIDIA Tegra Seaboard and Ventana. However, these are legitimate; the SPL doesn't fit within the required space, and this does cause runtime issues.
Signed-off-by: Stephen Warren swarren@nvidia.com --- v2: New patch; replaced checks in Makefile. --- arch/arm/cpu/u-boot.lds | 4 ++++ 1 files changed, 4 insertions(+), 0 deletions(-)
diff --git a/arch/arm/cpu/u-boot.lds b/arch/arm/cpu/u-boot.lds index 9153c3d..ec2a273 100644 --- a/arch/arm/cpu/u-boot.lds +++ b/arch/arm/cpu/u-boot.lds @@ -92,3 +92,7 @@ SECTIONS /DISCARD/ : { *(.interp*) } /DISCARD/ : { *(.gnu*) } } + +#if defined(CONFIG_SPL_TEXT_BASE) && defined(CONFIG_SPL_MAX_SIZE) +ASSERT(__bss_end__ < (CONFIG_SPL_TEXT_BASE + CONFIG_SPL_MAX_SIZE), "SPL image too big"); +#endif
On Thu, Oct 18, 2012 at 4:25 PM, Stephen Warren swarren@wwwdotorg.org wrote:
From: Stephen Warren swarren@nvidia.com
Add an ASSERT() to u-boot.lds to detect an SPL that doesn't fit within SPL_TEXT_BASE..SPL_MAX_SIZE.
Different .lds files implement this check in two possible ways:
- An ASSERT() like this
- Defining a MEMORY region of size SPL_MAX_SIZE, and re-directing all linker output into that region. Since u-boot.lds is used for both SPL and main U-Boot, this would entail only sometimes defining a MEMORY region, and only sometimes performing that redirection, and hence option (1) was deemed much simpler, and hence implemented.
Note that this causes build failures at least for NVIDIA Tegra Seaboard and Ventana. However, these are legitimate; the SPL doesn't fit within the required space, and this does cause runtime issues.
Signed-off-by: Stephen Warren swarren@nvidia.com
Acked-by: Simon Glass sjg@chromium.org
Nice!
v2: New patch; replaced checks in Makefile.
arch/arm/cpu/u-boot.lds | 4 ++++ 1 files changed, 4 insertions(+), 0 deletions(-)
diff --git a/arch/arm/cpu/u-boot.lds b/arch/arm/cpu/u-boot.lds index 9153c3d..ec2a273 100644 --- a/arch/arm/cpu/u-boot.lds +++ b/arch/arm/cpu/u-boot.lds @@ -92,3 +92,7 @@ SECTIONS /DISCARD/ : { *(.interp*) } /DISCARD/ : { *(.gnu*) } }
+#if defined(CONFIG_SPL_TEXT_BASE) && defined(CONFIG_SPL_MAX_SIZE) +ASSERT(__bss_end__ < (CONFIG_SPL_TEXT_BASE + CONFIG_SPL_MAX_SIZE), "SPL image too big");
+#endif
1.7.0.4
On Thu, Oct 18, 2012 at 04:25:56PM -0700, Stephen Warren wrote:
From: Stephen Warren swarren@nvidia.com
Add an ASSERT() to u-boot.lds to detect an SPL that doesn't fit within SPL_TEXT_BASE..SPL_MAX_SIZE.
Different .lds files implement this check in two possible ways:
- An ASSERT() like this
- Defining a MEMORY region of size SPL_MAX_SIZE, and re-directing all linker output into that region. Since u-boot.lds is used for both SPL and main U-Boot, this would entail only sometimes defining a MEMORY region, and only sometimes performing that redirection, and hence option (1) was deemed much simpler, and hence implemented.
Note that this causes build failures at least for NVIDIA Tegra Seaboard and Ventana. However, these are legitimate; the SPL doesn't fit within the required space, and this does cause runtime issues.
Acked-by: Allen Martin amartin@nvidia.com
Signed-off-by: Stephen Warren swarren@nvidia.com
v2: New patch; replaced checks in Makefile.
arch/arm/cpu/u-boot.lds | 4 ++++ 1 files changed, 4 insertions(+), 0 deletions(-)
diff --git a/arch/arm/cpu/u-boot.lds b/arch/arm/cpu/u-boot.lds index 9153c3d..ec2a273 100644 --- a/arch/arm/cpu/u-boot.lds +++ b/arch/arm/cpu/u-boot.lds @@ -92,3 +92,7 @@ SECTIONS /DISCARD/ : { *(.interp*) } /DISCARD/ : { *(.gnu*) } }
+#if defined(CONFIG_SPL_TEXT_BASE) && defined(CONFIG_SPL_MAX_SIZE) +ASSERT(__bss_end__ < (CONFIG_SPL_TEXT_BASE + CONFIG_SPL_MAX_SIZE), "SPL image too big");
+#endif
1.7.0.4
From: Stephen Warren swarren@nvidia.com
For Tegra, the SPL and main U-Boot are concatenated together to form a single memory image. Hence, the maximum SPL size is the different in TEXT_BASE for SPL and main U-Boot. Instead of manually calculating SPL_MAX_SIZE based on those two TEXT_BASE, which can lead to errors if one TEXT_BASE is changed without updating SPL_MAX_SIZE, simply perform the calculation automatically.
Signed-off-by: Stephen Warren swarren@nvidia.com --- v2: New patch. --- include/configs/tegra20-common.h | 3 ++- 1 files changed, 2 insertions(+), 1 deletions(-)
diff --git a/include/configs/tegra20-common.h b/include/configs/tegra20-common.h index 70c5cfb..c0c93e5 100644 --- a/include/configs/tegra20-common.h +++ b/include/configs/tegra20-common.h @@ -188,7 +188,8 @@ #define CONFIG_SPL #define CONFIG_SPL_NAND_SIMPLE #define CONFIG_SPL_TEXT_BASE 0x00108000 -#define CONFIG_SPL_MAX_SIZE 0x00004000 +#define CONFIG_SPL_MAX_SIZE (CONFIG_SYS_TEXT_BASE - \ + CONFIG_SPL_TEXT_BASE) #define CONFIG_SYS_SPL_MALLOC_START 0x00090000 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x00010000 #define CONFIG_SPL_STACK 0x000ffffc
Hi Stephen,
On Thu, Oct 18, 2012 at 4:25 PM, Stephen Warren swarren@wwwdotorg.org wrote:
From: Stephen Warren swarren@nvidia.com
For Tegra, the SPL and main U-Boot are concatenated together to form a single memory image. Hence, the maximum SPL size is the different in TEXT_BASE for SPL and main U-Boot. Instead of manually calculating
s/for/between/ ?
SPL_MAX_SIZE based on those two TEXT_BASE, which can lead to errors if one TEXT_BASE is changed without updating SPL_MAX_SIZE, simply perform the calculation automatically.
Signed-off-by: Stephen Warren swarren@nvidia.com
Acked-by: Simon Glass sjg@chromium.org
v2: New patch.
include/configs/tegra20-common.h | 3 ++- 1 files changed, 2 insertions(+), 1 deletions(-)
diff --git a/include/configs/tegra20-common.h b/include/configs/tegra20-common.h index 70c5cfb..c0c93e5 100644 --- a/include/configs/tegra20-common.h +++ b/include/configs/tegra20-common.h @@ -188,7 +188,8 @@ #define CONFIG_SPL #define CONFIG_SPL_NAND_SIMPLE #define CONFIG_SPL_TEXT_BASE 0x00108000 -#define CONFIG_SPL_MAX_SIZE 0x00004000 +#define CONFIG_SPL_MAX_SIZE (CONFIG_SYS_TEXT_BASE - \
CONFIG_SPL_TEXT_BASE)#define CONFIG_SYS_SPL_MALLOC_START 0x00090000 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x00010000
#define CONFIG_SPL_STACK 0x000ffffc
1.7.0.4
Regards, Simon
On Thu, Oct 18, 2012 at 04:25:57PM -0700, Stephen Warren wrote:
From: Stephen Warren swarren@nvidia.com
For Tegra, the SPL and main U-Boot are concatenated together to form a single memory image. Hence, the maximum SPL size is the different in TEXT_BASE for SPL and main U-Boot. Instead of manually calculating SPL_MAX_SIZE based on those two TEXT_BASE, which can lead to errors if one TEXT_BASE is changed without updating SPL_MAX_SIZE, simply perform the calculation automatically.
Acked-by: Allen Martin amartin@nvidia.com
Signed-off-by: Stephen Warren swarren@nvidia.com
v2: New patch.
include/configs/tegra20-common.h | 3 ++- 1 files changed, 2 insertions(+), 1 deletions(-)
diff --git a/include/configs/tegra20-common.h b/include/configs/tegra20-common.h index 70c5cfb..c0c93e5 100644 --- a/include/configs/tegra20-common.h +++ b/include/configs/tegra20-common.h @@ -188,7 +188,8 @@ #define CONFIG_SPL #define CONFIG_SPL_NAND_SIMPLE #define CONFIG_SPL_TEXT_BASE 0x00108000 -#define CONFIG_SPL_MAX_SIZE 0x00004000 +#define CONFIG_SPL_MAX_SIZE (CONFIG_SYS_TEXT_BASE - \
CONFIG_SPL_TEXT_BASE)#define CONFIG_SYS_SPL_MALLOC_START 0x00090000 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x00010000
#define CONFIG_SPL_STACK 0x000ffffc
1.7.0.4
From: Stephen Warren swarren@nvidia.com
Seaboard and Ventana are very similar boards, and so share the seaboard.c board file. The one difference needed so far is detected at run-time by calling machine_is_ventana(). This bloats the Ventana build with code that is never used. Switch to detecting Ventana at compile time to remove bloat. This shaves ~5K off the SPL size on Ventana, and makes the SPL fit within the max size.
Signed-off-by: Stephen Warren swarren@nvidia.com --- v2: New patch to replace modification of CONFIG_SYS_TEXT_BASE. --- board/nvidia/seaboard/seaboard.c | 4 ++-- 1 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/board/nvidia/seaboard/seaboard.c b/board/nvidia/seaboard/seaboard.c index 4e8a183..6dce57f 100644 --- a/board/nvidia/seaboard/seaboard.c +++ b/board/nvidia/seaboard/seaboard.c @@ -35,6 +35,7 @@
/* TODO: Remove this code when the SPI switch is working */ #ifndef CONFIG_SPI_UART_SWITCH +#if CONFIG_MACH_TYPE != MACH_TYPE_VENTANA /* * Routine: gpio_config_uart_seaboard * Description: Force GPIO_PI3 low on Seaboard so UART4 works. @@ -48,11 +49,10 @@ static void gpio_config_uart_seaboard(void)
void gpio_early_init_uart(void) { - if (machine_is_ventana()) - return; gpio_config_uart_seaboard(); } #endif +#endif
#ifdef CONFIG_TEGRA_MMC /*
Hi Stephen,
On Thu, Oct 18, 2012 at 4:25 PM, Stephen Warren swarren@wwwdotorg.org wrote:
From: Stephen Warren swarren@nvidia.com
Seaboard and Ventana are very similar boards, and so share the seaboard.c board file. The one difference needed so far is detected at run-time by calling machine_is_ventana(). This bloats the Ventana build with code that is never used. Switch to detecting Ventana at compile time to remove bloat. This shaves ~5K off the SPL size on Ventana, and makes the SPL fit within the max size.
Signed-off-by: Stephen Warren swarren@nvidia.com
v2: New patch to replace modification of CONFIG_SYS_TEXT_BASE.
board/nvidia/seaboard/seaboard.c | 4 ++-- 1 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/board/nvidia/seaboard/seaboard.c b/board/nvidia/seaboard/seaboard.c index 4e8a183..6dce57f 100644 --- a/board/nvidia/seaboard/seaboard.c +++ b/board/nvidia/seaboard/seaboard.c @@ -35,6 +35,7 @@
/* TODO: Remove this code when the SPI switch is working */ #ifndef CONFIG_SPI_UART_SWITCH +#if CONFIG_MACH_TYPE != MACH_TYPE_VENTANA
I guess this forks the board type again, so that it is no longer defined by the fdt. Is that what you intend, or do I have it wrong?
/*
- Routine: gpio_config_uart_seaboard
- Description: Force GPIO_PI3 low on Seaboard so UART4 works.
@@ -48,11 +49,10 @@ static void gpio_config_uart_seaboard(void)
void gpio_early_init_uart(void) {
if (machine_is_ventana())return; gpio_config_uart_seaboard();} #endif +#endif
#ifdef CONFIG_TEGRA_MMC /* -- 1.7.0.4
Regards, Simon
On 10/19/2012 01:51 PM, Simon Glass wrote:
Hi Stephen,
On Thu, Oct 18, 2012 at 4:25 PM, Stephen Warren swarren@wwwdotorg.org wrote:
Seaboard and Ventana are very similar boards, and so share the seaboard.c board file. The one difference needed so far is detected at run-time by calling machine_is_ventana(). This bloats the Ventana build with code that is never used. Switch to detecting Ventana at compile time to remove bloat. This shaves ~5K off the SPL size on Ventana, and makes the SPL fit within the max size.
diff --git a/board/nvidia/seaboard/seaboard.c b/board/nvidia/seaboard/seaboard.c
/* TODO: Remove this code when the SPI switch is working */ #ifndef CONFIG_SPI_UART_SWITCH +#if CONFIG_MACH_TYPE != MACH_TYPE_VENTANA
I guess this forks the board type again, so that it is no longer defined by the fdt. Is that what you intend, or do I have it wrong?
This particular conditional was never driven by DT anyway; the original code called machine_is_ventana() which I believe would have been evaluated at compile time (and if not, the run-time evaluation wouldn't have been DT-driven).
I imagine the code I modified here will be ripped out soon anyway; you'd agreed to removing all the SPI/UART switching logic on Seaboard once the LCD patches were in; we can all just set the jumper to "UART" mode instead of "GPIO-controlled" then:-)
On Thu, Oct 18, 2012 at 04:25:58PM -0700, Stephen Warren wrote:
From: Stephen Warren swarren@nvidia.com
Seaboard and Ventana are very similar boards, and so share the seaboard.c board file. The one difference needed so far is detected at run-time by calling machine_is_ventana(). This bloats the Ventana build with code that is never used. Switch to detecting Ventana at compile time to remove bloat. This shaves ~5K off the SPL size on Ventana, and makes the SPL fit within the max size.
Signed-off-by: Stephen Warren swarren@nvidia.com
v2: New patch to replace modification of CONFIG_SYS_TEXT_BASE.
board/nvidia/seaboard/seaboard.c | 4 ++-- 1 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/board/nvidia/seaboard/seaboard.c b/board/nvidia/seaboard/seaboard.c index 4e8a183..6dce57f 100644 --- a/board/nvidia/seaboard/seaboard.c +++ b/board/nvidia/seaboard/seaboard.c @@ -35,6 +35,7 @@
/* TODO: Remove this code when the SPI switch is working */ #ifndef CONFIG_SPI_UART_SWITCH +#if CONFIG_MACH_TYPE != MACH_TYPE_VENTANA
Why not roll this into the previous #ifdef intead of the back to back #ifdefs?
/*
- Routine: gpio_config_uart_seaboard
- Description: Force GPIO_PI3 low on Seaboard so UART4 works.
@@ -48,11 +49,10 @@ static void gpio_config_uart_seaboard(void)
void gpio_early_init_uart(void) {
- if (machine_is_ventana())
return;} #endif +#endif
#ifdef CONFIG_TEGRA_MMC /* -- 1.7.0.4
-Allen
On 10/19/2012 11:54 PM, Allen Martin wrote:
On Thu, Oct 18, 2012 at 04:25:58PM -0700, Stephen Warren wrote:
From: Stephen Warren swarren@nvidia.com
Seaboard and Ventana are very similar boards, and so share the seaboard.c board file. The one difference needed so far is detected at run-time by calling machine_is_ventana(). This bloats the Ventana build with code that is never used. Switch to detecting Ventana at compile time to remove bloat. This shaves ~5K off the SPL size on Ventana, and makes the SPL fit within the max size.
Signed-off-by: Stephen Warren swarren@nvidia.com
v2: New patch to replace modification of CONFIG_SYS_TEXT_BASE.
board/nvidia/seaboard/seaboard.c | 4 ++-- 1 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/board/nvidia/seaboard/seaboard.c b/board/nvidia/seaboard/seaboard.c index 4e8a183..6dce57f 100644 --- a/board/nvidia/seaboard/seaboard.c +++ b/board/nvidia/seaboard/seaboard.c @@ -35,6 +35,7 @@
/* TODO: Remove this code when the SPI switch is working */ #ifndef CONFIG_SPI_UART_SWITCH +#if CONFIG_MACH_TYPE != MACH_TYPE_VENTANA
Why not roll this into the previous #ifdef intead of the back to back #ifdefs?
I guess I could, although it's going to get line-wrapped anyway due to length...
On Mon, Oct 22, 2012 at 09:09:46AM -0700, Stephen Warren wrote:
On 10/19/2012 11:54 PM, Allen Martin wrote:
On Thu, Oct 18, 2012 at 04:25:58PM -0700, Stephen Warren wrote:
From: Stephen Warren swarren@nvidia.com
Seaboard and Ventana are very similar boards, and so share the seaboard.c board file. The one difference needed so far is detected at run-time by calling machine_is_ventana(). This bloats the Ventana build with code that is never used. Switch to detecting Ventana at compile time to remove bloat. This shaves ~5K off the SPL size on Ventana, and makes the SPL fit within the max size.
Signed-off-by: Stephen Warren swarren@nvidia.com
v2: New patch to replace modification of CONFIG_SYS_TEXT_BASE.
board/nvidia/seaboard/seaboard.c | 4 ++-- 1 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/board/nvidia/seaboard/seaboard.c b/board/nvidia/seaboard/seaboard.c index 4e8a183..6dce57f 100644 --- a/board/nvidia/seaboard/seaboard.c +++ b/board/nvidia/seaboard/seaboard.c @@ -35,6 +35,7 @@
/* TODO: Remove this code when the SPI switch is working */ #ifndef CONFIG_SPI_UART_SWITCH +#if CONFIG_MACH_TYPE != MACH_TYPE_VENTANA
Why not roll this into the previous #ifdef intead of the back to back #ifdefs?
I guess I could, although it's going to get line-wrapped anyway due to length...
Just a nit, your call. Either way:
Acked-by: Allen Martin amartin@nvidia.com
And the whole series:
Tested-by: Allen Martin amartin@nvidia.com
From: Stephen Warren swarren@nvidia.com
Seaboard has a GPIO that switches an external mux between Tegra's debug UART and SPI flash. This is initialized from the SPL so that SPL debug output can be seen. Simplify the code that does this, and don't actually request the GPIO in the SPL; just program it. This saves ~4.5K from the size of the SPL, mostly BSS due to the large gpio_names[] table that is no longer required. This makes Seaboard's SPL fit within the current max size.
Signed-off-by: Stephen Warren swarren@nvidia.com --- v2: New patch to replace modification of CONFIG_SYS_TEXT_BASE. --- board/nvidia/seaboard/seaboard.c | 14 ++++---------- 1 files changed, 4 insertions(+), 10 deletions(-)
diff --git a/board/nvidia/seaboard/seaboard.c b/board/nvidia/seaboard/seaboard.c index 6dce57f..c08ca80 100644 --- a/board/nvidia/seaboard/seaboard.c +++ b/board/nvidia/seaboard/seaboard.c @@ -26,6 +26,7 @@ #include <asm/arch/tegra.h> #include <asm/arch/clock.h> #include <asm/arch/funcmux.h> +#include <asm/arch/gpio.h> #include <asm/arch/pinmux.h> #include <asm/arch-tegra/mmc.h> #include <asm/gpio.h> @@ -36,21 +37,14 @@ /* TODO: Remove this code when the SPI switch is working */ #ifndef CONFIG_SPI_UART_SWITCH #if CONFIG_MACH_TYPE != MACH_TYPE_VENTANA -/* - * Routine: gpio_config_uart_seaboard - * Description: Force GPIO_PI3 low on Seaboard so UART4 works. - */ -static void gpio_config_uart_seaboard(void) +void gpio_early_init_uart(void) { /* Enable UART via GPIO_PI3 (port 8, bit 3) so serial console works */ +#ifndef CONFIG_SPL_BUILD gpio_request(GPIO_PI3, NULL); +#endif gpio_direction_output(GPIO_PI3, 0); } - -void gpio_early_init_uart(void) -{ - gpio_config_uart_seaboard(); -} #endif #endif
On Thu, Oct 18, 2012 at 4:25 PM, Stephen Warren swarren@wwwdotorg.org wrote:
From: Stephen Warren swarren@nvidia.com
Seaboard has a GPIO that switches an external mux between Tegra's debug UART and SPI flash. This is initialized from the SPL so that SPL debug output can be seen. Simplify the code that does this, and don't actually request the GPIO in the SPL; just program it. This saves ~4.5K from the size of the SPL, mostly BSS due to the large gpio_names[] table that is no longer required. This makes Seaboard's SPL fit within the current max size.
Signed-off-by: Stephen Warren swarren@nvidia.com
Acked-by: Simon Glass sjg@chromium.org
v2: New patch to replace modification of CONFIG_SYS_TEXT_BASE.
board/nvidia/seaboard/seaboard.c | 14 ++++---------- 1 files changed, 4 insertions(+), 10 deletions(-)
diff --git a/board/nvidia/seaboard/seaboard.c b/board/nvidia/seaboard/seaboard.c index 6dce57f..c08ca80 100644 --- a/board/nvidia/seaboard/seaboard.c +++ b/board/nvidia/seaboard/seaboard.c @@ -26,6 +26,7 @@ #include <asm/arch/tegra.h> #include <asm/arch/clock.h> #include <asm/arch/funcmux.h> +#include <asm/arch/gpio.h> #include <asm/arch/pinmux.h> #include <asm/arch-tegra/mmc.h> #include <asm/gpio.h> @@ -36,21 +37,14 @@ /* TODO: Remove this code when the SPI switch is working */ #ifndef CONFIG_SPI_UART_SWITCH #if CONFIG_MACH_TYPE != MACH_TYPE_VENTANA -/*
- Routine: gpio_config_uart_seaboard
- Description: Force GPIO_PI3 low on Seaboard so UART4 works.
- */
-static void gpio_config_uart_seaboard(void) +void gpio_early_init_uart(void) { /* Enable UART via GPIO_PI3 (port 8, bit 3) so serial console works */ +#ifndef CONFIG_SPL_BUILD gpio_request(GPIO_PI3, NULL); +#endif gpio_direction_output(GPIO_PI3, 0); }
-void gpio_early_init_uart(void) -{
gpio_config_uart_seaboard();-} #endif #endif
-- 1.7.0.4
On Thu, Oct 18, 2012 at 04:25:59PM -0700, Stephen Warren wrote:
From: Stephen Warren swarren@nvidia.com
Seaboard has a GPIO that switches an external mux between Tegra's debug UART and SPI flash. This is initialized from the SPL so that SPL debug output can be seen. Simplify the code that does this, and don't actually request the GPIO in the SPL; just program it. This saves ~4.5K from the size of the SPL, mostly BSS due to the large gpio_names[] table that is no longer required. This makes Seaboard's SPL fit within the current max size.
Acked-by: Allen Martin amartin@nvidia.com
Signed-off-by: Stephen Warren swarren@nvidia.com
v2: New patch to replace modification of CONFIG_SYS_TEXT_BASE.
board/nvidia/seaboard/seaboard.c | 14 ++++---------- 1 files changed, 4 insertions(+), 10 deletions(-)
diff --git a/board/nvidia/seaboard/seaboard.c b/board/nvidia/seaboard/seaboard.c index 6dce57f..c08ca80 100644 --- a/board/nvidia/seaboard/seaboard.c +++ b/board/nvidia/seaboard/seaboard.c @@ -26,6 +26,7 @@ #include <asm/arch/tegra.h> #include <asm/arch/clock.h> #include <asm/arch/funcmux.h> +#include <asm/arch/gpio.h> #include <asm/arch/pinmux.h> #include <asm/arch-tegra/mmc.h> #include <asm/gpio.h> @@ -36,21 +37,14 @@ /* TODO: Remove this code when the SPI switch is working */ #ifndef CONFIG_SPI_UART_SWITCH #if CONFIG_MACH_TYPE != MACH_TYPE_VENTANA -/*
- Routine: gpio_config_uart_seaboard
- Description: Force GPIO_PI3 low on Seaboard so UART4 works.
- */
-static void gpio_config_uart_seaboard(void) +void gpio_early_init_uart(void) { /* Enable UART via GPIO_PI3 (port 8, bit 3) so serial console works */ +#ifndef CONFIG_SPL_BUILD gpio_request(GPIO_PI3, NULL); +#endif gpio_direction_output(GPIO_PI3, 0); }
-void gpio_early_init_uart(void) -{
- gpio_config_uart_seaboard();
-} #endif #endif
-- 1.7.0.4
On Thu, Oct 18, 2012 at 04:25:55PM -0700, Stephen Warren wrote:
From: Stephen Warren swarren@nvidia.com
When -ffunction-sections or -fdata-section are used, symbols are placed into sections such as .data.eserial1_device and .bss.serial_current. Update the linker script to explicitly include these. Without this change (at least with my gcc-4.5.3 built using crosstool-ng), I see that the sections do end up being included, but __bss_end__ gets set to the same value as __bss_start.
Acked-by: Allen Martin amartin@nvidia.com
Signed-off-by: Stephen Warren swarren@nvidia.com
v2: Removed changes from some entries where it wasn't needed.
arch/arm/cpu/u-boot.lds | 8 ++++---- 1 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/arch/arm/cpu/u-boot.lds b/arch/arm/cpu/u-boot.lds index e49ca0c..9153c3d 100644 --- a/arch/arm/cpu/u-boot.lds +++ b/arch/arm/cpu/u-boot.lds @@ -34,8 +34,8 @@ SECTIONS .text : { __image_copy_start = .;
CPUDIR/start.o (.text)*(.text)
CPUDIR/start.o (.text*)*(.text*)}
. = ALIGN(4);
@@ -43,7 +43,7 @@ SECTIONS
. = ALIGN(4); .data : {
*(.data)
*(.data*)}
. = ALIGN(4);
@@ -81,7 +81,7 @@ SECTIONS
.bss __rel_dyn_start (OVERLAY) : { __bss_start = .;
*(.bss)
*(.bss*)-- 1.7.0.4
Hi Stephen,
On Thu, 18 Oct 2012 17:25:55 -0600, Stephen Warren swarren@wwwdotorg.org wrote:
From: Stephen Warren swarren@nvidia.com
When -ffunction-sections or -fdata-section are used, symbols are placed into sections such as .data.eserial1_device and .bss.serial_current. Update the linker script to explicitly include these. Without this change (at least with my gcc-4.5.3 built using crosstool-ng), I see that the sections do end up being included, but __bss_end__ gets set to the same value as __bss_start.
Signed-off-by: Stephen Warren swarren@nvidia.com
v2: Removed changes from some entries where it wasn't needed.
arch/arm/cpu/u-boot.lds | 8 ++++---- 1 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/arch/arm/cpu/u-boot.lds b/arch/arm/cpu/u-boot.lds index e49ca0c..9153c3d 100644 --- a/arch/arm/cpu/u-boot.lds +++ b/arch/arm/cpu/u-boot.lds @@ -34,8 +34,8 @@ SECTIONS .text : { __image_copy_start = .;
CPUDIR/start.o (.text)*(.text)
CPUDIR/start.o (.text*)*(.text*)}
. = ALIGN(4);
@@ -43,7 +43,7 @@ SECTIONS
. = ALIGN(4); .data : {
*(.data)
*(.data*)}
. = ALIGN(4);
@@ -81,7 +81,7 @@ SECTIONS
.bss __rel_dyn_start (OVERLAY) : { __bss_start = .;
*(.bss)
*(.bss*)
Applied (this patch only in the series) to u-boot-arm/master, thanks!
Amicalement,
On Fri, 26 Oct 2012 23:25:01 +0200, Albert ARIBAUD albert.u.boot@aribaud.net wrote:
Hi Stephen,
On Thu, 18 Oct 2012 17:25:55 -0600, Stephen Warren swarren@wwwdotorg.org wrote:
From: Stephen Warren swarren@nvidia.com
When -ffunction-sections or -fdata-section are used, symbols are placed into sections such as .data.eserial1_device and .bss.serial_current. Update the linker script to explicitly include these. Without this change (at least with my gcc-4.5.3 built using crosstool-ng), I see that the sections do end up being included, but __bss_end__ gets set to the same value as __bss_start.
Signed-off-by: Stephen Warren swarren@nvidia.com
v2: Removed changes from some entries where it wasn't needed.
arch/arm/cpu/u-boot.lds | 8 ++++---- 1 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/arch/arm/cpu/u-boot.lds b/arch/arm/cpu/u-boot.lds index e49ca0c..9153c3d 100644 --- a/arch/arm/cpu/u-boot.lds +++ b/arch/arm/cpu/u-boot.lds @@ -34,8 +34,8 @@ SECTIONS .text : { __image_copy_start = .;
CPUDIR/start.o (.text)*(.text)
CPUDIR/start.o (.text*)*(.text*)}
. = ALIGN(4);
@@ -43,7 +43,7 @@ SECTIONS
. = ALIGN(4); .data : {
*(.data)
*(.data*)}
. = ALIGN(4);
@@ -81,7 +81,7 @@ SECTIONS
.bss __rel_dyn_start (OVERLAY) : { __bss_start = .;
*(.bss)
*(.bss*)Applied (this patch only in the series) to u-boot-arm/master, thanks!
Correction applied was V3, not V2, of the patch.
Amicalement,
participants (4)
-
Albert ARIBAUD -
Allen Martin -
Simon Glass -
Stephen Warren