[U-Boot] [PATCH v2 0/9] Amlogic Meson GXBaby and ODROID-C2 support
Hi,
this series adds a very basic support for Amlogic S905 SoC (GXBaby) and for the ODROID-C2 board [1], and is based on u-boot sources available from the board vendor [2]. At the moment the only supported devices are the integrated UART and Ethernet adapter.
Changes since v1: - updated DTS files from Linux kernel - added Ethernet support - first 16MiB of RAM are now marked as unavailable; this seems to be required to successfully boot Linux - fixed typo in config file
[1] http://www.hardkernel.com/main/products/prdt_info.php?g_code=G145457216438 [2] https://github.com/hardkernel/u-boot/tree/odroidc2-v2015.01
Beniamino Galvani (9): arm: add initial support for Amlogic Meson and ODROID-C2 arm: dts: import Meson files serial: add support for Amlogic Meson UART arm: meson: use device tree board: odroid-c2: enable serial net: designware: fix descriptor layout and warnings on 64-bit archs net: designware: add generic device tree compatible id arm: dts: add ethernet node to Meson gxbb board: odroid-c2: add Ethernet support
arch/arm/Kconfig | 5 + arch/arm/Makefile | 1 + arch/arm/dts/Makefile | 2 + arch/arm/dts/meson-gxbb-odroidc2.dts | 73 +++++++++++++ arch/arm/dts/meson-gxbb.dtsi | 187 +++++++++++++++++++++++++++++++++ arch/arm/include/asm/arch-meson/gxbb.h | 64 +++++++++++ arch/arm/mach-meson/Kconfig | 31 ++++++ arch/arm/mach-meson/Makefile | 7 ++ arch/arm/mach-meson/board.c | 70 ++++++++++++ board/hardkernel/odroid-c2/Kconfig | 12 +++ board/hardkernel/odroid-c2/MAINTAINERS | 6 ++ board/hardkernel/odroid-c2/Makefile | 7 ++ board/hardkernel/odroid-c2/README | 34 ++++++ board/hardkernel/odroid-c2/odroid-c2.c | 32 ++++++ configs/odroid-c2_defconfig | 23 ++++ drivers/net/designware.c | 55 +++++----- drivers/net/designware.h | 4 +- drivers/serial/Kconfig | 14 +++ drivers/serial/Makefile | 1 + drivers/serial/serial_meson.c | 162 ++++++++++++++++++++++++++++ include/configs/odroid-c2.h | 56 ++++++++++ 21 files changed, 817 insertions(+), 29 deletions(-) create mode 100644 arch/arm/dts/meson-gxbb-odroidc2.dts create mode 100644 arch/arm/dts/meson-gxbb.dtsi create mode 100644 arch/arm/include/asm/arch-meson/gxbb.h create mode 100644 arch/arm/mach-meson/Kconfig create mode 100644 arch/arm/mach-meson/Makefile create mode 100644 arch/arm/mach-meson/board.c create mode 100644 board/hardkernel/odroid-c2/Kconfig create mode 100644 board/hardkernel/odroid-c2/MAINTAINERS create mode 100644 board/hardkernel/odroid-c2/Makefile create mode 100644 board/hardkernel/odroid-c2/README create mode 100644 board/hardkernel/odroid-c2/odroid-c2.c create mode 100644 configs/odroid-c2_defconfig create mode 100644 drivers/serial/serial_meson.c create mode 100644 include/configs/odroid-c2.h
Support the Amlogic Meson GXBaby platform.
Signed-off-by: Beniamino Galvani b.galvani@gmail.com --- arch/arm/Kconfig | 5 ++++ arch/arm/Makefile | 1 + arch/arm/include/asm/arch-meson/gxbb.h | 10 +++++++ arch/arm/mach-meson/Kconfig | 31 +++++++++++++++++++ arch/arm/mach-meson/Makefile | 7 +++++ arch/arm/mach-meson/board.c | 45 ++++++++++++++++++++++++++++ board/hardkernel/odroid-c2/Kconfig | 12 ++++++++ board/hardkernel/odroid-c2/MAINTAINERS | 6 ++++ board/hardkernel/odroid-c2/Makefile | 7 +++++ board/hardkernel/odroid-c2/README | 34 +++++++++++++++++++++ board/hardkernel/odroid-c2/odroid-c2.c | 7 +++++ configs/odroid-c2_defconfig | 11 +++++++ include/configs/odroid-c2.h | 55 ++++++++++++++++++++++++++++++++++ 13 files changed, 231 insertions(+) create mode 100644 arch/arm/include/asm/arch-meson/gxbb.h create mode 100644 arch/arm/mach-meson/Kconfig create mode 100644 arch/arm/mach-meson/Makefile create mode 100644 arch/arm/mach-meson/board.c create mode 100644 board/hardkernel/odroid-c2/Kconfig create mode 100644 board/hardkernel/odroid-c2/MAINTAINERS create mode 100644 board/hardkernel/odroid-c2/Makefile create mode 100644 board/hardkernel/odroid-c2/README create mode 100644 board/hardkernel/odroid-c2/odroid-c2.c create mode 100644 configs/odroid-c2_defconfig create mode 100644 include/configs/odroid-c2.h
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index b82ec18..c768ab4 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -456,6 +456,9 @@ config ARCH_KEYSTONE select SUPPORT_SPL select CMD_POWEROFF
+config ARCH_MESON + bool "Amlogic Meson" + config ARCH_MX7 bool "Freescale MX7" select CPU_V7 @@ -770,6 +773,8 @@ source "arch/arm/mach-orion5x/Kconfig"
source "arch/arm/cpu/armv7/rmobile/Kconfig"
+source "arch/arm/mach-meson/Kconfig" + source "arch/arm/mach-rockchip/Kconfig"
source "arch/arm/mach-s5pc1xx/Kconfig" diff --git a/arch/arm/Makefile b/arch/arm/Makefile index ce006ae..4df4e7a 100644 --- a/arch/arm/Makefile +++ b/arch/arm/Makefile @@ -49,6 +49,7 @@ machine-$(CONFIG_ARCH_HIGHBANK) += highbank machine-$(CONFIG_ARCH_KEYSTONE) += keystone # TODO: rename CONFIG_KIRKWOOD -> CONFIG_ARCH_KIRKWOOD machine-$(CONFIG_KIRKWOOD) += kirkwood +machine-$(CONFIG_ARCH_MESON) += meson machine-$(CONFIG_ARCH_MVEBU) += mvebu # TODO: rename CONFIG_TEGRA -> CONFIG_ARCH_TEGRA # TODO: rename CONFIG_ORION5X -> CONFIG_ARCH_ORION5X diff --git a/arch/arm/include/asm/arch-meson/gxbb.h b/arch/arm/include/asm/arch-meson/gxbb.h new file mode 100644 index 0000000..0eec270 --- /dev/null +++ b/arch/arm/include/asm/arch-meson/gxbb.h @@ -0,0 +1,10 @@ +/* + * (C) Copyright 2016 - Beniamino Galvani b.galvani@gmail.com + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __GXBB_H__ +#define __GXBB_H__ + +#endif /* __GXBB_H__ */ diff --git a/arch/arm/mach-meson/Kconfig b/arch/arm/mach-meson/Kconfig new file mode 100644 index 0000000..77d3cfe --- /dev/null +++ b/arch/arm/mach-meson/Kconfig @@ -0,0 +1,31 @@ +if ARCH_MESON + +config MESON_GXBB + bool "Support Meson GXBaby" + select ARM64 + select DM + select DM_SERIAL + help + The Amlogic Meson GXBaby (S905) is an ARM SoC with a + quad-core Cortex-A53 CPU and a Mali-450 GPU. + +if MESON_GXBB + +config TARGET_ODROID_C2 + bool "ODROID-C2" + help + ODROID-C2 is a single board computer based on Meson GXBaby + with 2 GiB of RAM, Gigabit Ethernet, HDMI, 4 USB, micro-SD + slot, eMMC, IR receiver and a 40-pin GPIO header. + +endif + +config SYS_SOC + default "meson" + +config SYS_MALLOC_F_LEN + default 0x1000 + +source "board/hardkernel/odroid-c2/Kconfig" + +endif diff --git a/arch/arm/mach-meson/Makefile b/arch/arm/mach-meson/Makefile new file mode 100644 index 0000000..44e3d63 --- /dev/null +++ b/arch/arm/mach-meson/Makefile @@ -0,0 +1,7 @@ +# +# Copyright (c) 2016 Beniamino Galvani b.galvani@gmail.com +# +# SPDX-License-Identifier: GPL-2.0+ +# + +obj-y += board.o diff --git a/arch/arm/mach-meson/board.c b/arch/arm/mach-meson/board.c new file mode 100644 index 0000000..346a2c2 --- /dev/null +++ b/arch/arm/mach-meson/board.c @@ -0,0 +1,45 @@ +/* + * (C) Copyright 2016 Beniamino Galvani b.galvani@gmail.com + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <common.h> +#include <asm/arch/gxbb.h> +#include <asm/armv8/mmu.h> + +DECLARE_GLOBAL_DATA_PTR; + +int board_init(void) +{ + return 0; +} + +int dram_init(void) +{ + return 0; +} + +void reset_cpu(ulong addr) +{ +} + +static struct mm_region gxbb_mem_map[] = { + { + .base = 0x0UL, + .size = 0x80000000UL, + .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) | + PTE_BLOCK_INNER_SHARE + }, { + .base = 0x80000000UL, + .size = 0x80000000UL, + .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) | + PTE_BLOCK_NON_SHARE | + PTE_BLOCK_PXN | PTE_BLOCK_UXN + }, { + /* List terminator */ + 0, + } +}; + +struct mm_region *mem_map = gxbb_mem_map; diff --git a/board/hardkernel/odroid-c2/Kconfig b/board/hardkernel/odroid-c2/Kconfig new file mode 100644 index 0000000..687d9c6 --- /dev/null +++ b/board/hardkernel/odroid-c2/Kconfig @@ -0,0 +1,12 @@ +if TARGET_ODROID_C2 + +config SYS_BOARD + default "odroid-c2" + +config SYS_VENDOR + default "hardkernel" + +config SYS_CONFIG_NAME + default "odroid-c2" + +endif diff --git a/board/hardkernel/odroid-c2/MAINTAINERS b/board/hardkernel/odroid-c2/MAINTAINERS new file mode 100644 index 0000000..23ae1e7 --- /dev/null +++ b/board/hardkernel/odroid-c2/MAINTAINERS @@ -0,0 +1,6 @@ +ODROID-C2 +M: Beniamino Galvani b.galvani@gmail.com +S: Maintained +F: board/hardkernel/odroid-c2/ +F: include/configs/odroid-c2.h +F: configs/odroid-c2_defconfig diff --git a/board/hardkernel/odroid-c2/Makefile b/board/hardkernel/odroid-c2/Makefile new file mode 100644 index 0000000..571044b --- /dev/null +++ b/board/hardkernel/odroid-c2/Makefile @@ -0,0 +1,7 @@ +# +# (C) Copyright 2016 Beniamino Galvani b.galvani@gmail.com +# +# SPDX-License-Identifier: GPL-2.0+ +# + +obj-y := odroid-c2.o diff --git a/board/hardkernel/odroid-c2/README b/board/hardkernel/odroid-c2/README new file mode 100644 index 0000000..b900694 --- /dev/null +++ b/board/hardkernel/odroid-c2/README @@ -0,0 +1,34 @@ +* U-Boot for ODROID-C2: quick guide + +** Compile u-boot + + > export ARCH=arm + > export CROSS_COMPILE=aarch64-none-elf- + > make odroid-c2_defconfig + > make + +** Create the image + + > DIR=odroid-c2 + > git clone --depth 1 \ + https://github.com/hardkernel/u-boot.git -b odroidc2-v2015.01 \ + $DIR + > $DIR/fip/fip_create --bl30 $DIR/fip/gxb/bl30.bin \ + --bl301 $DIR/fip/gxb/bl301.bin \ + --bl31 $DIR/fip/gxb/bl31.bin \ + --bl33 u-boot.bin \ + $DIR/fip.bin + > $DIR/fip/fip_create --dump $DIR/fip.bin + > cat $DIR/fip/gxb/bl2.package $DIR/fip.bin > $DIR/boot_new.bin + > $DIR/fip/gxb/aml_encrypt_gxb --bootsig \ + --input $DIR/boot_new.bin \ + --output $DIR/u-boot.img + > dd if=$DIR/u-boot.img of=$DIR/u-boot.gxbb bs=512 skip=96 + +** Write u-boot to a SD card + + > DEV=/dev/your_sd_device + > BL1=$DIR/sd_fuse/bl1.bin.hardkernel + > dd if=$BL1 of=$DEV conv=fsync bs=1 count=442 + > dd if=$BL1 of=$DEV conv=fsync bs=512 skip=1 seek=1 + > dd if=$DIR/u-boot.gxbb of=$DEV conv=fsync bs=512 seek=97 diff --git a/board/hardkernel/odroid-c2/odroid-c2.c b/board/hardkernel/odroid-c2/odroid-c2.c new file mode 100644 index 0000000..6a1485f --- /dev/null +++ b/board/hardkernel/odroid-c2/odroid-c2.c @@ -0,0 +1,7 @@ +/* + * (C) Copyright 2016 Beniamino Galvani b.galvani@gmail.com + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <common.h> diff --git a/configs/odroid-c2_defconfig b/configs/odroid-c2_defconfig new file mode 100644 index 0000000..8e6df12 --- /dev/null +++ b/configs/odroid-c2_defconfig @@ -0,0 +1,11 @@ +CONFIG_ARM=y +CONFIG_ARCH_MESON=y +CONFIG_MESON_GXBB=y +CONFIG_TARGET_ODROID_C2=y +# CONFIG_CMD_BDI is not set +# CONFIG_CMD_IMI is not set +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_LOADS is not set +# CONFIG_CMD_FPGA is not set +# CONFIG_CMD_SOURCE is not set +# CONFIG_CMD_SETEXPR is not set diff --git a/include/configs/odroid-c2.h b/include/configs/odroid-c2.h new file mode 100644 index 0000000..0e9ad1c --- /dev/null +++ b/include/configs/odroid-c2.h @@ -0,0 +1,55 @@ +/* + * Configuration for ODROID-C2 + * (C) Copyright 2016 Beniamino Galvani b.galvani@gmail.com + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __CONFIG_H +#define __CONFIG_H + +#define CONFIG_CPU_ARMV8 +#define CONFIG_REMAKE_ELF +#define CONFIG_SYS_CACHELINE_SIZE 64 +#define CONFIG_SYS_NO_FLASH +#define CONFIG_NR_DRAM_BANKS 1 +#define CONFIG_ENV_IS_NOWHERE 1 +#define CONFIG_ENV_SIZE 0x2000 +#define CONFIG_SYS_MAXARGS 32 +#define CONFIG_SYS_MALLOC_LEN (32 << 20) +#define CONFIG_SYS_CBSIZE 1024 +#define CONFIG_DISPLAY_BOARDINFO + +#define CONFIG_SYS_SDRAM_BASE 0 +#define CONFIG_SYS_TEXT_BASE 0x01000000 +#define CONFIG_SYS_INIT_SP_ADDR 0x20000000 +#define CONFIG_SYS_LOAD_ADDR CONFIG_SYS_TEXT_BASE + +/* Generic Interrupt Controller Definitions */ +#define GICD_BASE 0xc4301000 +#define GICC_BASE 0xc4302000 + +#if !defined(CONFIG_IDENT_STRING) +# define CONFIG_IDENT_STRING " odroid-c2" +#endif + +/* Serial setup */ +#define CONFIG_CONS_INDEX 0 +#define CONFIG_BAUDRATE 115200 +#define CONFIG_SYS_BAUDRATE_TABLE \ + { 4800, 9600, 19200, 38400, 57600, 115200 } + +#define CONFIG_CMD_ENV + +/* Monitor Command Prompt */ +/* Console I/O Buffer Size */ +#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ + sizeof(CONFIG_SYS_PROMPT) + 16) +#define CONFIG_SYS_HUSH_PARSER +#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE +#define CONFIG_SYS_LONGHELP +#define CONFIG_CMDLINE_EDITING + +#include <config_distro_defaults.h> + +#endif /* __CONFIG_H */
On Sun, Apr 03, 2016 at 09:18:09AM +0200, Beniamino Galvani wrote:
Support the Amlogic Meson GXBaby platform.
Signed-off-by: Beniamino Galvani b.galvani@gmail.com
[snip]
diff --git a/arch/arm/include/asm/arch-meson/gxbb.h b/arch/arm/include/asm/arch-meson/gxbb.h new file mode 100644 index 0000000..0eec270 --- /dev/null +++ b/arch/arm/include/asm/arch-meson/gxbb.h @@ -0,0 +1,10 @@ +/*
- (C) Copyright 2016 - Beniamino Galvani b.galvani@gmail.com
- SPDX-License-Identifier: GPL-2.0+
- */
+#ifndef __GXBB_H__ +#define __GXBB_H__
+#endif /* __GXBB_H__ */
Why do we need an empty header? Ah, I see later in the series...
diff --git a/arch/arm/mach-meson/board.c b/arch/arm/mach-meson/board.c new file mode 100644 index 0000000..346a2c2 --- /dev/null +++ b/arch/arm/mach-meson/board.c
[snip]
+int board_init(void) +{
- return 0;
+}
This really should go into the board/ board file
diff --git a/board/hardkernel/odroid-c2/README b/board/hardkernel/odroid-c2/README new file mode 100644 index 0000000..b900694 --- /dev/null +++ b/board/hardkernel/odroid-c2/README @@ -0,0 +1,34 @@ +* U-Boot for ODROID-C2: quick guide
+** Compile u-boot
+** Create the image
https://github.com/hardkernel/u-boot.git -b odroidc2-v2015.01 \$DIR--bl301 $DIR/fip/gxb/bl301.bin \--bl31 $DIR/fip/gxb/bl31.bin \--bl33 u-boot.bin \$DIR/fip.bin--input $DIR/boot_new.bin \--output $DIR/u-boot.img
Why can't we have these tools in mainline? Yes, the binaries (likely) need to live elsewhere, and we should perhaps give links on how to grab / build the particular supported blobs. See board/hisilicon/hikey/README for an example.
diff --git a/board/hardkernel/odroid-c2/odroid-c2.c b/board/hardkernel/odroid-c2/odroid-c2.c new file mode 100644 index 0000000..6a1485f --- /dev/null +++ b/board/hardkernel/odroid-c2/odroid-c2.c @@ -0,0 +1,7 @@ +/*
- (C) Copyright 2016 Beniamino Galvani b.galvani@gmail.com
- SPDX-License-Identifier: GPL-2.0+
- */
+#include <common.h>
And we shouldn't have an empty file here. I see later on in the series we patch this file which means we should probably be squashing some patches together or reworking things a bit. Also, you set CONFIG_DISPLAY_BOARDINFO but never define checkboard to print out the device we're on, which would be a good thing to populate here.
Import device tree files for Meson gxbb and ODROID-C2 from Linux kernel.
Signed-off-by: Beniamino Galvani b.galvani@gmail.com --- arch/arm/dts/Makefile | 2 + arch/arm/dts/meson-gxbb-odroidc2.dts | 69 ++++++++++++++ arch/arm/dts/meson-gxbb.dtsi | 178 +++++++++++++++++++++++++++++++++++ 3 files changed, 249 insertions(+) create mode 100644 arch/arm/dts/meson-gxbb-odroidc2.dts create mode 100644 arch/arm/dts/meson-gxbb.dtsi
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index ea635e4..a6c0842 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -24,6 +24,8 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += \ rk3288-jerry.dtb \ rk3288-rock2-square.dtb \ rk3036-sdk.dtb +dtb-$(CONFIG_ARCH_MESON) += \ + meson-gxbb-odroidc2.dtb dtb-$(CONFIG_TEGRA) += tegra20-harmony.dtb \ tegra20-medcom-wide.dtb \ tegra20-paz00.dtb \ diff --git a/arch/arm/dts/meson-gxbb-odroidc2.dts b/arch/arm/dts/meson-gxbb-odroidc2.dts new file mode 100644 index 0000000..653c2fa --- /dev/null +++ b/arch/arm/dts/meson-gxbb-odroidc2.dts @@ -0,0 +1,69 @@ +/* + * Copyright (c) 2016 Andreas Färber + * Copyright (c) 2016 BayLibre, Inc. + * Author: Kevin Hilman khilman@kernel.org + * + * This file is dual-licensed: you can use it either under the terms + * of the GPL or the X11 license, at your option. Note that this dual + * licensing only applies to this file, and not this project as a + * whole. + * + * a) This library is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of the + * License, or (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * Or, alternatively, + * + * b) Permission is hereby granted, free of charge, to any person + * obtaining a copy of this software and associated documentation + * files (the "Software"), to deal in the Software without + * restriction, including without limitation the rights to use, + * copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following + * conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + */ + +/dts-v1/; + +#include "meson-gxbb.dtsi" + +/ { + compatible = "hardkernel,odroid-c2", "amlogic,meson-gxbb"; + model = "Hardkernel ODROID-C2"; + + aliases { + serial0 = &uart_AO; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + memory@0 { + device_type = "memory"; + reg = <0x0 0x0 0x0 0x80000000>; + }; +}; + +&uart_AO { + status = "okay"; +}; diff --git a/arch/arm/dts/meson-gxbb.dtsi b/arch/arm/dts/meson-gxbb.dtsi new file mode 100644 index 0000000..832815d --- /dev/null +++ b/arch/arm/dts/meson-gxbb.dtsi @@ -0,0 +1,178 @@ +/* + * Copyright (c) 2016 Andreas Färber + * + * This file is dual-licensed: you can use it either under the terms + * of the GPL or the X11 license, at your option. Note that this dual + * licensing only applies to this file, and not this project as a + * whole. + * + * a) This library is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of the + * License, or (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * Or, alternatively, + * + * b) Permission is hereby granted, free of charge, to any person + * obtaining a copy of this software and associated documentation + * files (the "Software"), to deal in the Software without + * restriction, including without limitation the rights to use, + * copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following + * conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + */ + +#include <dt-bindings/gpio/gpio.h> +#include <dt-bindings/interrupt-controller/irq.h> +#include <dt-bindings/interrupt-controller/arm-gic.h> + +/ { + compatible = "amlogic,meson-gxbb"; + interrupt-parent = <&gic>; + #address-cells = <2>; + #size-cells = <2>; + + cpus { + #address-cells = <0x2>; + #size-cells = <0x0>; + + cpu0: cpu@0 { + device_type = "cpu"; + compatible = "arm,cortex-a53", "arm,armv8"; + reg = <0x0 0x0>; + enable-method = "psci"; + }; + + cpu1: cpu@1 { + device_type = "cpu"; + compatible = "arm,cortex-a53", "arm,armv8"; + reg = <0x0 0x1>; + enable-method = "psci"; + }; + + cpu2: cpu@2 { + device_type = "cpu"; + compatible = "arm,cortex-a53", "arm,armv8"; + reg = <0x0 0x2>; + enable-method = "psci"; + }; + + cpu3: cpu@3 { + device_type = "cpu"; + compatible = "arm,cortex-a53", "arm,armv8"; + reg = <0x0 0x3>; + enable-method = "psci"; + }; + }; + + arm-pmu { + compatible = "arm,cortex-a53-pmu"; + interrupts = <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>; + interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>; + }; + + psci { + compatible = "arm,psci-0.2"; + method = "smc"; + }; + + timer { + compatible = "arm,armv8-timer"; + interrupts = <GIC_PPI 13 + (GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_EDGE_RISING)>, + <GIC_PPI 14 + (GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_EDGE_RISING)>, + <GIC_PPI 11 + (GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_EDGE_RISING)>, + <GIC_PPI 10 + (GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_EDGE_RISING)>; + }; + + xtal: xtal-clk { + compatible = "fixed-clock"; + clock-frequency = <24000000>; + clock-output-names = "xtal"; + #clock-cells = <0>; + }; + + soc { + compatible = "simple-bus"; + #address-cells = <2>; + #size-cells = <2>; + ranges; + + cbus: cbus@c1100000 { + compatible = "simple-bus"; + reg = <0x0 0xc1100000 0x0 0x100000>; + #address-cells = <2>; + #size-cells = <2>; + ranges = <0x0 0x0 0x0 0xc1100000 0x0 0x100000>; + + uart_A: serial@84c0 { + compatible = "amlogic,meson-uart"; + reg = <0x0 0x084c0 0x0 0x14>; + interrupts = <GIC_SPI 26 IRQ_TYPE_EDGE_RISING>; + clocks = <&xtal>; + status = "disabled"; + }; + }; + + gic: interrupt-controller@c4301000 { + compatible = "arm,gic-400"; + reg = <0x0 0xc4301000 0 0x1000>, + <0x0 0xc4302000 0 0x2000>, + <0x0 0xc4304000 0 0x2000>, + <0x0 0xc4306000 0 0x2000>; + interrupt-controller; + interrupts = <GIC_PPI 9 + (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_HIGH)>; + #interrupt-cells = <3>; + #address-cells = <0>; + }; + + aobus: aobus@c8100000 { + compatible = "simple-bus"; + reg = <0x0 0xc8100000 0x0 0x100000>; + #address-cells = <2>; + #size-cells = <2>; + ranges = <0x0 0x0 0x0 0xc8100000 0x0 0x100000>; + + uart_AO: serial@4c0 { + compatible = "amlogic,meson-uart"; + reg = <0x0 0x004c0 0x0 0x14>; + interrupts = <GIC_SPI 193 IRQ_TYPE_EDGE_RISING>; + clocks = <&xtal>; + status = "disabled"; + }; + }; + + apb: apb@d0000000 { + compatible = "simple-bus"; + reg = <0x0 0xd0000000 0x0 0x200000>; + #address-cells = <2>; + #size-cells = <2>; + ranges = <0x0 0x0 0x0 0xd0000000 0x0 0x200000>; + }; + }; +};
On Sun, Apr 03, 2016 at 09:18:10AM +0200, Beniamino Galvani wrote:
Import device tree files for Meson gxbb and ODROID-C2 from Linux kernel.
Signed-off-by: Beniamino Galvani b.galvani@gmail.com
Reviewed-by: Tom Rini trini@konsulko.com
Implement a driver for the UART adapter available in Meson SoCs.
Signed-off-by: Beniamino Galvani b.galvani@gmail.com --- drivers/serial/Kconfig | 14 ++++ drivers/serial/Makefile | 1 + drivers/serial/serial_meson.c | 162 ++++++++++++++++++++++++++++++++++++++++++ 3 files changed, 177 insertions(+) create mode 100644 drivers/serial/serial_meson.c
diff --git a/drivers/serial/Kconfig b/drivers/serial/Kconfig index 2a770a1..47e26ab 100644 --- a/drivers/serial/Kconfig +++ b/drivers/serial/Kconfig @@ -112,6 +112,14 @@ config DEBUG_UART_S5P will need to provide parameters to make this work. The driver will be available until the real driver-model serial is running.
+config DEBUG_UART_MESON + bool "Amlogic Meson" + depends on MESON_SERIAL + help + Select this to enable a debug UART using the serial_meson driver. You + will need to provide parameters to make this work. The driver will + be available until the real driver-model serial is running. + config DEBUG_UART_UARTLITE bool "Xilinx Uartlite" help @@ -320,4 +328,10 @@ config XILINX_UARTLITE If you have a Xilinx based board and want to use the uartlite serial ports, say Y to this option. If unsure, say N.
+config MESON_SERIAL + bool "Support for Amlogic Meson UART" + depends on DM_SERIAL && ARCH_MESON + help + If you have an Amlogic Meson based board and want to use the on-chip + serial ports, say Y to this option. If unsure, say N. endmenu diff --git a/drivers/serial/Makefile b/drivers/serial/Makefile index ee7147a..4fe1eb3 100644 --- a/drivers/serial/Makefile +++ b/drivers/serial/Makefile @@ -26,6 +26,7 @@ obj-$(CONFIG_SYS_NS16550) += ns16550.o obj-$(CONFIG_S5P) += serial_s5p.o obj-$(CONFIG_MXC_UART) += serial_mxc.o obj-$(CONFIG_PXA_SERIAL) += serial_pxa.o +obj-$(CONFIG_MESON_SERIAL) += serial_meson.o obj-$(CONFIG_S3C24X0_SERIAL) += serial_s3c24x0.o obj-$(CONFIG_XILINX_UARTLITE) += serial_xuartlite.o obj-$(CONFIG_SANDBOX_SERIAL) += sandbox.o diff --git a/drivers/serial/serial_meson.c b/drivers/serial/serial_meson.c new file mode 100644 index 0000000..140b2d4 --- /dev/null +++ b/drivers/serial/serial_meson.c @@ -0,0 +1,162 @@ +/* + * (C) Copyright 2016 Beniamino Galvani b.galvani@gmail.com + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <common.h> +#include <dm.h> +#include <errno.h> +#include <fdtdec.h> +#include <linux/compiler.h> +#include <serial.h> + +DECLARE_GLOBAL_DATA_PTR; + +struct meson_uart { + uint32_t wfifo; + uint32_t rfifo; + uint32_t control; + uint32_t status; + uint32_t misc; +}; + +struct meson_serial_platdata { + struct meson_uart *reg; +}; + +/* AML_UART_STATUS bits */ +#define AML_UART_PARITY_ERR BIT(16) +#define AML_UART_FRAME_ERR BIT(17) +#define AML_UART_TX_FIFO_WERR BIT(18) +#define AML_UART_RX_EMPTY BIT(20) +#define AML_UART_TX_FULL BIT(21) +#define AML_UART_TX_EMPTY BIT(22) +#define AML_UART_XMIT_BUSY BIT(25) +#define AML_UART_ERR (AML_UART_PARITY_ERR | \ + AML_UART_FRAME_ERR | \ + AML_UART_TX_FIFO_WERR) + +/* AML_UART_CONTROL bits */ +#define AML_UART_TX_EN BIT(12) +#define AML_UART_RX_EN BIT(13) +#define AML_UART_TX_RST BIT(22) +#define AML_UART_RX_RST BIT(23) +#define AML_UART_CLR_ERR BIT(24) + +static void __maybe_unused meson_serial_init(struct meson_uart *uart) +{ + u32 val; + + val = readl(&uart->control); + val |= (AML_UART_RX_RST | AML_UART_TX_RST | AML_UART_CLR_ERR); + writel(val, &uart->control); + val &= ~(AML_UART_RX_RST | AML_UART_TX_RST | AML_UART_CLR_ERR); + writel(val, &uart->control); + val |= (AML_UART_RX_EN | AML_UART_TX_EN); + writel(val, &uart->control); +} + +static int meson_serial_probe(struct udevice *dev) +{ + struct meson_serial_platdata *plat = dev->platdata; + struct meson_uart *const uart = plat->reg; + + meson_serial_init(uart); + + return 0; +} + +static int meson_serial_getc(struct udevice *dev) +{ + struct meson_serial_platdata *plat = dev->platdata; + struct meson_uart *const uart = plat->reg; + + if (readl(&uart->status) & AML_UART_RX_EMPTY) + return -EAGAIN; + + return readl(&uart->rfifo) & 0xff; +} + +static int meson_serial_putc(struct udevice *dev, const char ch) +{ + struct meson_serial_platdata *plat = dev->platdata; + struct meson_uart *const uart = plat->reg; + + if (readl(&uart->status) & AML_UART_TX_FULL) + return -EAGAIN; + + writel(ch, &uart->wfifo); + + return 0; +} + +static int meson_serial_pending(struct udevice *dev, bool input) +{ + struct meson_serial_platdata *plat = dev->platdata; + struct meson_uart *const uart = plat->reg; + uint32_t status = readl(&uart->status); + + if (input) + return !(status & AML_UART_RX_EMPTY); + else + return !(status & AML_UART_TX_FULL); +} + +static int meson_serial_ofdata_to_platdata(struct udevice *dev) +{ + struct meson_serial_platdata *plat = dev->platdata; + fdt_addr_t addr; + + addr = dev_get_addr(dev); + if (addr == FDT_ADDR_T_NONE) + return -EINVAL; + + plat->reg = (struct meson_uart *)addr; + + return 0; +} + +static const struct dm_serial_ops meson_serial_ops = { + .putc = meson_serial_putc, + .pending = meson_serial_pending, + .getc = meson_serial_getc, +}; + +static const struct udevice_id meson_serial_ids[] = { + { .compatible = "amlogic,meson-uart" }, + { } +}; + +U_BOOT_DRIVER(serial_meson) = { + .name = "serial_meson", + .id = UCLASS_SERIAL, + .of_match = meson_serial_ids, + .probe = meson_serial_probe, + .ops = &meson_serial_ops, + .flags = DM_FLAG_PRE_RELOC, + .ofdata_to_platdata = meson_serial_ofdata_to_platdata, + .platdata_auto_alloc_size = sizeof(struct meson_serial_platdata), +}; + +#ifdef CONFIG_DEBUG_UART_MESON + +#include <debug_uart.h> + +static inline void _debug_uart_init(void) +{ +} + +static inline void _debug_uart_putc(int ch) +{ + struct meson_uart *regs = (struct meson_uart *)CONFIG_DEBUG_UART_BASE; + + while (readl(®s->status) & AML_UART_TX_FULL) + ; + + writel(ch, ®s->wfifo); +} + +DEBUG_UART_FUNCS + +#endif
On Sun, Apr 03, 2016 at 09:18:11AM +0200, Beniamino Galvani wrote:
Implement a driver for the UART adapter available in Meson SoCs.
Signed-off-by: Beniamino Galvani b.galvani@gmail.com
Reviewed-by: Tom Rini trini@konsulko.com
Convert the board and config files to the use of device tree.
Signed-off-by: Beniamino Galvani b.galvani@gmail.com --- arch/arm/mach-meson/board.c | 25 +++++++++++++++++++++++++ configs/odroid-c2_defconfig | 2 ++ 2 files changed, 27 insertions(+)
diff --git a/arch/arm/mach-meson/board.c b/arch/arm/mach-meson/board.c index 346a2c2..945a5f4 100644 --- a/arch/arm/mach-meson/board.c +++ b/arch/arm/mach-meson/board.c @@ -5,6 +5,8 @@ */
#include <common.h> +#include <libfdt.h> +#include <linux/err.h> #include <asm/arch/gxbb.h> #include <asm/armv8/mmu.h>
@@ -17,9 +19,32 @@ int board_init(void)
int dram_init(void) { + const fdt32_t *val; + int offset; + int len; + + offset = fdt_path_offset(gd->fdt_blob, "/memory"); + if (offset < 0) + return -EINVAL; + + val = fdt_getprop(gd->fdt_blob, offset, "reg", &len); + if (len < sizeof(*val) * 4) + return -EINVAL; + + /* Don't use fdt64_t to avoid unaligned access */ + gd->ram_size = (uint64_t)fdt32_to_cpu(val[2]) << 32; + gd->ram_size |= fdt32_to_cpu(val[3]); + return 0; }
+void dram_init_banksize(void) +{ + /* Reserve first 16 MiB of RAM */ + gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE + (16 * 1024 * 1024); + gd->bd->bi_dram[0].size = gd->ram_size - (16 * 1024 * 1024); +} + void reset_cpu(ulong addr) { } diff --git a/configs/odroid-c2_defconfig b/configs/odroid-c2_defconfig index 8e6df12..765076a 100644 --- a/configs/odroid-c2_defconfig +++ b/configs/odroid-c2_defconfig @@ -2,6 +2,7 @@ CONFIG_ARM=y CONFIG_ARCH_MESON=y CONFIG_MESON_GXBB=y CONFIG_TARGET_ODROID_C2=y +CONFIG_DEFAULT_DEVICE_TREE="meson-gxbb-odroidc2" # CONFIG_CMD_BDI is not set # CONFIG_CMD_IMI is not set # CONFIG_CMD_IMLS is not set @@ -9,3 +10,4 @@ CONFIG_TARGET_ODROID_C2=y # CONFIG_CMD_FPGA is not set # CONFIG_CMD_SOURCE is not set # CONFIG_CMD_SETEXPR is not set +CONFIG_OF_CONTROL=y
On Sun, Apr 03, 2016 at 09:18:12AM +0200, Beniamino Galvani wrote:
Convert the board and config files to the use of device tree.
Signed-off-by: Beniamino Galvani b.galvani@gmail.com
Since we're always adding this board with device tree support, this should be folded into the first patch. Along with importing the initial device tree from the kernel (and just say what release / githash it's from). For the contents:
Reviewed-by: Tom Rini trini@konsulko.com
Enable serial support in the ODROID-C2 configuration.
Signed-off-by: Beniamino Galvani b.galvani@gmail.com --- configs/odroid-c2_defconfig | 7 +++++++ 1 file changed, 7 insertions(+)
diff --git a/configs/odroid-c2_defconfig b/configs/odroid-c2_defconfig index 765076a..069f02d 100644 --- a/configs/odroid-c2_defconfig +++ b/configs/odroid-c2_defconfig @@ -11,3 +11,10 @@ CONFIG_DEFAULT_DEVICE_TREE="meson-gxbb-odroidc2" # CONFIG_CMD_SOURCE is not set # CONFIG_CMD_SETEXPR is not set CONFIG_OF_CONTROL=y +CONFIG_DEBUG_UART=y +CONFIG_DEBUG_UART_MESON=y +CONFIG_DEBUG_UART_BASE=0xc81004c0 +CONFIG_DEBUG_UART_CLOCK=24000000 +CONFIG_DEBUG_UART_ANNOUNCE=y +CONFIG_DEBUG_UART_SKIP_INIT=y +CONFIG_MESON_SERIAL=y
On Sun, Apr 03, 2016 at 09:18:13AM +0200, Beniamino Galvani wrote:
Enable serial support in the ODROID-C2 configuration.
Signed-off-by: Beniamino Galvani b.galvani@gmail.com
Reviewed-by: Tom Rini trini@konsulko.com
But this too should be folded in with the initial support. In fact, I would go so far as to say that in general, the initial platform patch should be enough to boot the platform. So UART, DDR (and anything that all requires), board itself. If we're not adding a new eth driver, enabling eth is fine too. If that means adding some driver fixes first, make them the first patches in the series. Thanks!
On Sun, Apr 03, 2016 at 12:09:44PM -0400, Tom Rini wrote:
But this too should be folded in with the initial support. In fact, I would go so far as to say that in general, the initial platform patch should be enough to boot the platform. So UART, DDR (and anything that all requires), board itself. If we're not adding a new eth driver, enabling eth is fine too. If that means adding some driver fixes first, make them the first patches in the series. Thanks!
I'll do, thanks.
Beniamino
All members of the DMA descriptor must be 32-bit, even on 64-bit architectures: change the type to u32 to ensure this. Also, fix other warnings.
Signed-off-by: Beniamino Galvani b.galvani@gmail.com --- drivers/net/designware.c | 54 ++++++++++++++++++++++++------------------------ drivers/net/designware.h | 4 ++-- 2 files changed, 29 insertions(+), 29 deletions(-)
diff --git a/drivers/net/designware.c b/drivers/net/designware.c index ca58f34..78d6901 100644 --- a/drivers/net/designware.c +++ b/drivers/net/designware.c @@ -98,8 +98,8 @@ static void tx_descs_init(struct dw_eth_dev *priv)
for (idx = 0; idx < CONFIG_TX_DESCR_NUM; idx++) { desc_p = &desc_table_p[idx]; - desc_p->dmamac_addr = &txbuffs[idx * CONFIG_ETH_BUFSIZE]; - desc_p->dmamac_next = &desc_table_p[idx + 1]; + desc_p->dmamac_addr = (ulong)&txbuffs[idx * CONFIG_ETH_BUFSIZE]; + desc_p->dmamac_next = (ulong)&desc_table_p[idx + 1];
#if defined(CONFIG_DW_ALTDESCRIPTOR) desc_p->txrx_status &= ~(DESC_TXSTS_TXINT | DESC_TXSTS_TXLAST | @@ -117,11 +117,11 @@ static void tx_descs_init(struct dw_eth_dev *priv) }
/* Correcting the last pointer of the chain */ - desc_p->dmamac_next = &desc_table_p[0]; + desc_p->dmamac_next = (ulong)&desc_table_p[0];
/* Flush all Tx buffer descriptors at once */ - flush_dcache_range((unsigned int)priv->tx_mac_descrtable, - (unsigned int)priv->tx_mac_descrtable + + flush_dcache_range((ulong)priv->tx_mac_descrtable, + (ulong)priv->tx_mac_descrtable + sizeof(priv->tx_mac_descrtable));
writel((ulong)&desc_table_p[0], &dma_p->txdesclistaddr); @@ -142,13 +142,12 @@ static void rx_descs_init(struct dw_eth_dev *priv) * Otherwise there's a chance to get some of them flushed in RAM when * GMAC is already pushing data to RAM via DMA. This way incoming from * GMAC data will be corrupted. */ - flush_dcache_range((unsigned int)rxbuffs, (unsigned int)rxbuffs + - RX_TOTAL_BUFSIZE); + flush_dcache_range((ulong)rxbuffs, (ulong)rxbuffs + RX_TOTAL_BUFSIZE);
for (idx = 0; idx < CONFIG_RX_DESCR_NUM; idx++) { desc_p = &desc_table_p[idx]; - desc_p->dmamac_addr = &rxbuffs[idx * CONFIG_ETH_BUFSIZE]; - desc_p->dmamac_next = &desc_table_p[idx + 1]; + desc_p->dmamac_addr = (ulong)&rxbuffs[idx * CONFIG_ETH_BUFSIZE]; + desc_p->dmamac_next = (ulong)&desc_table_p[idx + 1];
desc_p->dmamac_cntl = (MAC_MAX_FRAME_SZ & DESC_RXCTRL_SIZE1MASK) | @@ -158,11 +157,11 @@ static void rx_descs_init(struct dw_eth_dev *priv) }
/* Correcting the last pointer of the chain */ - desc_p->dmamac_next = &desc_table_p[0]; + desc_p->dmamac_next = (ulong)&desc_table_p[0];
/* Flush all Rx buffer descriptors at once */ - flush_dcache_range((unsigned int)priv->rx_mac_descrtable, - (unsigned int)priv->rx_mac_descrtable + + flush_dcache_range((ulong)priv->rx_mac_descrtable, + (ulong)priv->rx_mac_descrtable + sizeof(priv->rx_mac_descrtable));
writel((ulong)&desc_table_p[0], &dma_p->rxdesclistaddr); @@ -290,12 +289,11 @@ static int _dw_eth_send(struct dw_eth_dev *priv, void *packet, int length) struct eth_dma_regs *dma_p = priv->dma_regs_p; u32 desc_num = priv->tx_currdescnum; struct dmamacdescr *desc_p = &priv->tx_mac_descrtable[desc_num]; - uint32_t desc_start = (uint32_t)desc_p; - uint32_t desc_end = desc_start + + ulong desc_start = (ulong)desc_p; + ulong desc_end = desc_start + roundup(sizeof(*desc_p), ARCH_DMA_MINALIGN); - uint32_t data_start = (uint32_t)desc_p->dmamac_addr; - uint32_t data_end = data_start + - roundup(length, ARCH_DMA_MINALIGN); + ulong data_start = desc_p->dmamac_addr; + ulong data_end = data_start + roundup(length, ARCH_DMA_MINALIGN); /* * Strictly we only need to invalidate the "txrx_status" field * for the following check, but on some platforms we cannot @@ -312,7 +310,7 @@ static int _dw_eth_send(struct dw_eth_dev *priv, void *packet, int length) return -EPERM; }
- memcpy(desc_p->dmamac_addr, packet, length); + memcpy((void *)data_start, packet, length);
/* Flush data to be sent */ flush_dcache_range(data_start, data_end); @@ -352,11 +350,11 @@ static int _dw_eth_recv(struct dw_eth_dev *priv, uchar **packetp) u32 status, desc_num = priv->rx_currdescnum; struct dmamacdescr *desc_p = &priv->rx_mac_descrtable[desc_num]; int length = -EAGAIN; - uint32_t desc_start = (uint32_t)desc_p; - uint32_t desc_end = desc_start + + ulong desc_start = (ulong)desc_p; + ulong desc_end = desc_start + roundup(sizeof(*desc_p), ARCH_DMA_MINALIGN); - uint32_t data_start = (uint32_t)desc_p->dmamac_addr; - uint32_t data_end; + ulong data_start = desc_p->dmamac_addr; + ulong data_end;
/* Invalidate entire buffer descriptor */ invalidate_dcache_range(desc_start, desc_end); @@ -372,7 +370,7 @@ static int _dw_eth_recv(struct dw_eth_dev *priv, uchar **packetp) /* Invalidate received data */ data_end = data_start + roundup(length, ARCH_DMA_MINALIGN); invalidate_dcache_range(data_start, data_end); - *packetp = desc_p->dmamac_addr; + *packetp = (uchar *)(ulong)desc_p->dmamac_addr; }
return length; @@ -382,8 +380,8 @@ static int _dw_free_pkt(struct dw_eth_dev *priv) { u32 desc_num = priv->rx_currdescnum; struct dmamacdescr *desc_p = &priv->rx_mac_descrtable[desc_num]; - uint32_t desc_start = (uint32_t)desc_p; - uint32_t desc_end = desc_start + + ulong desc_start = (ulong)desc_p; + ulong desc_end = desc_start + roundup(sizeof(*desc_p), ARCH_DMA_MINALIGN);
/* @@ -583,6 +581,7 @@ static int designware_eth_probe(struct udevice *dev) struct eth_pdata *pdata = dev_get_platdata(dev); struct dw_eth_dev *priv = dev_get_priv(dev); u32 iobase = pdata->iobase; + ulong ioaddr; int ret;
#ifdef CONFIG_DM_PCI @@ -601,8 +600,9 @@ static int designware_eth_probe(struct udevice *dev) #endif
debug("%s, iobase=%x, priv=%p\n", __func__, iobase, priv); - priv->mac_regs_p = (struct eth_mac_regs *)iobase; - priv->dma_regs_p = (struct eth_dma_regs *)(iobase + DW_DMA_BASE_OFFSET); + ioaddr = iobase; + priv->mac_regs_p = (struct eth_mac_regs *)ioaddr; + priv->dma_regs_p = (struct eth_dma_regs *)(ioaddr + DW_DMA_BASE_OFFSET); priv->interface = pdata->phy_interface; priv->max_speed = pdata->max_speed;
diff --git a/drivers/net/designware.h b/drivers/net/designware.h index ed6344c..d48df7b 100644 --- a/drivers/net/designware.h +++ b/drivers/net/designware.h @@ -110,8 +110,8 @@ struct eth_dma_regs { struct dmamacdescr { u32 txrx_status; u32 dmamac_cntl; - void *dmamac_addr; - struct dmamacdescr *dmamac_next; + u32 dmamac_addr; + u32 dmamac_next; } __aligned(ARCH_DMA_MINALIGN);
/*
On Sun, Apr 03, 2016 at 09:18:14AM +0200, Beniamino Galvani wrote:
All members of the DMA descriptor must be 32-bit, even on 64-bit architectures: change the type to u32 to ensure this. Also, fix other warnings.
Signed-off-by: Beniamino Galvani b.galvani@gmail.com
Reviewed-by: Tom Rini trini@konsulko.com
And I would say this should be patch #1.
On Sun, Apr 3, 2016 at 2:18 AM, Beniamino Galvani b.galvani@gmail.com wrote:
All members of the DMA descriptor must be 32-bit, even on 64-bit architectures: change the type to u32 to ensure this. Also, fix other warnings.
Signed-off-by: Beniamino Galvani b.galvani@gmail.com
Acked-by: Joe Hershberger joe.hershberger@ni.com
Add a generic 'snps,dwmac' compatible id to the Synopsys Designware MAC driver.
Signed-off-by: Beniamino Galvani b.galvani@gmail.com --- drivers/net/designware.c | 1 + 1 file changed, 1 insertion(+)
diff --git a/drivers/net/designware.c b/drivers/net/designware.c index 78d6901..f6d8670 100644 --- a/drivers/net/designware.c +++ b/drivers/net/designware.c @@ -662,6 +662,7 @@ static int designware_eth_ofdata_to_platdata(struct udevice *dev) static const struct udevice_id designware_eth_ids[] = { { .compatible = "allwinner,sun7i-a20-gmac" }, { .compatible = "altr,socfpga-stmmac" }, + { .compatible = "snps,dwmac" }, { } };
On Sun, Apr 03, 2016 at 09:18:15AM +0200, Beniamino Galvani wrote:
Add a generic 'snps,dwmac' compatible id to the Synopsys Designware MAC driver.
Signed-off-by: Beniamino Galvani b.galvani@gmail.com
Reviewed-by: Tom Rini trini@konsulko.com
... and this should be patch #2.
On Sun, Apr 3, 2016 at 2:18 AM, Beniamino Galvani b.galvani@gmail.com wrote:
Add a generic 'snps,dwmac' compatible id to the Synopsys Designware MAC driver.
Signed-off-by: Beniamino Galvani b.galvani@gmail.com
Acked-by: Joe Hershberger joe.hershberger@ni.com
Add a node for the Synopsys Designware Ethernet adapter available on Meson SoCs to the Meson GXBaby DTS files. The node is not present in DTS files used in Linux kernel.
Signed-off-by: Beniamino Galvani b.galvani@gmail.com --- arch/arm/dts/meson-gxbb-odroidc2.dts | 4 ++++ arch/arm/dts/meson-gxbb.dtsi | 9 +++++++++ 2 files changed, 13 insertions(+)
diff --git a/arch/arm/dts/meson-gxbb-odroidc2.dts b/arch/arm/dts/meson-gxbb-odroidc2.dts index 653c2fa..408235d 100644 --- a/arch/arm/dts/meson-gxbb-odroidc2.dts +++ b/arch/arm/dts/meson-gxbb-odroidc2.dts @@ -67,3 +67,7 @@ &uart_AO { status = "okay"; }; + +&gmac0 { + status = "okay"; +}; diff --git a/arch/arm/dts/meson-gxbb.dtsi b/arch/arm/dts/meson-gxbb.dtsi index 832815d..44a54e7 100644 --- a/arch/arm/dts/meson-gxbb.dtsi +++ b/arch/arm/dts/meson-gxbb.dtsi @@ -167,6 +167,15 @@ }; };
+ gmac0: ethernet@c9410000 { + compatible = "snps,dwmac"; + reg = <0x0 0xc9410000 0x0 0x10000>; + interrupts = <0 8 1>; + interrupt-names = "macirq"; + phy-mode = "rgmii"; + status = "disabled"; + }; + apb: apb@d0000000 { compatible = "simple-bus"; reg = <0x0 0xd0000000 0x0 0x200000>;
On Sun, Apr 3, 2016 at 9:18 AM, Beniamino Galvani b.galvani@gmail.com wrote:
Add a node for the Synopsys Designware Ethernet adapter available on Meson SoCs to the Meson GXBaby DTS files. The node is not present in DTS files used in Linux kernel.
Signed-off-by: Beniamino Galvani b.galvani@gmail.com
arch/arm/dts/meson-gxbb-odroidc2.dts | 4 ++++ arch/arm/dts/meson-gxbb.dtsi | 9 +++++++++ 2 files changed, 13 insertions(+)
diff --git a/arch/arm/dts/meson-gxbb-odroidc2.dts b/arch/arm/dts/meson-gxbb-odroidc2.dts index 653c2fa..408235d 100644 --- a/arch/arm/dts/meson-gxbb-odroidc2.dts +++ b/arch/arm/dts/meson-gxbb-odroidc2.dts @@ -67,3 +67,7 @@ &uart_AO { status = "okay"; };
+&gmac0 {
status = "okay";+}; diff --git a/arch/arm/dts/meson-gxbb.dtsi b/arch/arm/dts/meson-gxbb.dtsi index 832815d..44a54e7 100644 --- a/arch/arm/dts/meson-gxbb.dtsi +++ b/arch/arm/dts/meson-gxbb.dtsi @@ -167,6 +167,15 @@ }; };
gmac0: ethernet@c9410000 {compatible = "snps,dwmac";reg = <0x0 0xc9410000 0x0 0x10000>;interrupts = <0 8 1>;interrupt-names = "macirq";phy-mode = "rgmii";status = "disabled";};apb: apb@d0000000 { compatible = "simple-bus"; reg = <0x0 0xd0000000 0x0 0x200000>;
Adding this gmac node means that this DTS is already different from the DTS we have in mainline. This makes me wonder how in u-boot we manages the difference in the DT between the kernel and u-boot. Are they supposed to be always in sync or we expect to have two different DTs?
On Sun, Apr 03, 2016 at 11:12:14AM +0200, Carlo Caione wrote:
On Sun, Apr 3, 2016 at 9:18 AM, Beniamino Galvani b.galvani@gmail.com wrote:
Add a node for the Synopsys Designware Ethernet adapter available on Meson SoCs to the Meson GXBaby DTS files. The node is not present in DTS files used in Linux kernel.
Signed-off-by: Beniamino Galvani b.galvani@gmail.com
arch/arm/dts/meson-gxbb-odroidc2.dts | 4 ++++ arch/arm/dts/meson-gxbb.dtsi | 9 +++++++++ 2 files changed, 13 insertions(+)
diff --git a/arch/arm/dts/meson-gxbb-odroidc2.dts b/arch/arm/dts/meson-gxbb-odroidc2.dts index 653c2fa..408235d 100644 --- a/arch/arm/dts/meson-gxbb-odroidc2.dts +++ b/arch/arm/dts/meson-gxbb-odroidc2.dts @@ -67,3 +67,7 @@ &uart_AO { status = "okay"; };
+&gmac0 {
status = "okay";+}; diff --git a/arch/arm/dts/meson-gxbb.dtsi b/arch/arm/dts/meson-gxbb.dtsi index 832815d..44a54e7 100644 --- a/arch/arm/dts/meson-gxbb.dtsi +++ b/arch/arm/dts/meson-gxbb.dtsi @@ -167,6 +167,15 @@ }; };
gmac0: ethernet@c9410000 {compatible = "snps,dwmac";reg = <0x0 0xc9410000 0x0 0x10000>;interrupts = <0 8 1>;interrupt-names = "macirq";phy-mode = "rgmii";status = "disabled";};apb: apb@d0000000 { compatible = "simple-bus"; reg = <0x0 0xd0000000 0x0 0x200000>;Adding this gmac node means that this DTS is already different from the DTS we have in mainline. This makes me wonder how in u-boot we manages the difference in the DT between the kernel and u-boot. Are they supposed to be always in sync or we expect to have two different DTs?
The expectation is that we keep them in sync, aside from "u-boot," prefixed items. It's OK to sync with whatever the authorative tree is for a device if it hasn't made it into Linus' tree just yet. New bindings also need to be accepted upstream before we pull them in.
On Sun, Apr 03, 2016 at 09:18:16AM +0200, Beniamino Galvani wrote:
Add a node for the Synopsys Designware Ethernet adapter available on Meson SoCs to the Meson GXBaby DTS files. The node is not present in DTS files used in Linux kernel.
Signed-off-by: Beniamino Galvani b.galvani@gmail.com
Reviewed-by: Tom Rini trini@konsulko.com
... but why is this not yet in the kernel device tree? Has it just not made it up from the SoC tree?
On Sun, Apr 03, 2016 at 12:09:33PM -0400, Tom Rini wrote:
Add a node for the Synopsys Designware Ethernet adapter available on Meson SoCs to the Meson GXBaby DTS files. The node is not present in DTS files used in Linux kernel.
... but why is this not yet in the kernel device tree? Has it just not made it up from the SoC tree?
Because kernel doesn't have yet an Ethernet driver for Meson GXBaby to set the platform-specific registers needed to program the MII mode, clocks and other things (the settings that are in patch 9/9 of this submission). And without documentation it's hard to write one and get it right.
So this patch adds a new uboot-only node to the DTS for Ethernet. This doesn't seem problematic to me WRT synchronization with kernel DTS because no new bindings or driver changes are needed; and whenever the same node will be added to kernel we'll only have to update it in u-boot.
If it is not acceptable to have a DTS different to kernel one, I'll have to find a different solution, any suggestions? Should I use U_BOOT_DEVICE and platform_data inside the board file instead?
Maybe I will submit v3 of the series without Ethernet while I figure out this.
Beniamino
On Sun, Apr 03, 2016 at 10:17:05PM +0200, Beniamino Galvani wrote:
On Sun, Apr 03, 2016 at 12:09:33PM -0400, Tom Rini wrote:
Add a node for the Synopsys Designware Ethernet adapter available on Meson SoCs to the Meson GXBaby DTS files. The node is not present in DTS files used in Linux kernel.
... but why is this not yet in the kernel device tree? Has it just not made it up from the SoC tree?
Because kernel doesn't have yet an Ethernet driver for Meson GXBaby to set the platform-specific registers needed to program the MII mode, clocks and other things (the settings that are in patch 9/9 of this submission). And without documentation it's hard to write one and get it right.
So you're just not submitting the binding for the kernel at this point? If so, yes, sticking with pdata is probably better since when we've been in this situation before the bindings were actively being worked on the kernel side as well and we just resynced when things were finalized.
Add initialization code for the Ethernet adapter on ODROID-C2 and enable the driver.
Signed-off-by: Beniamino Galvani b.galvani@gmail.com --- arch/arm/include/asm/arch-meson/gxbb.h | 54 ++++++++++++++++++++++++++++++++++ board/hardkernel/odroid-c2/odroid-c2.c | 25 ++++++++++++++++ configs/odroid-c2_defconfig | 3 ++ include/configs/odroid-c2.h | 1 + 4 files changed, 83 insertions(+)
diff --git a/arch/arm/include/asm/arch-meson/gxbb.h b/arch/arm/include/asm/arch-meson/gxbb.h index 0eec270..59fae9f 100644 --- a/arch/arm/include/asm/arch-meson/gxbb.h +++ b/arch/arm/include/asm/arch-meson/gxbb.h @@ -7,4 +7,58 @@ #ifndef __GXBB_H__ #define __GXBB_H__
+#define GXBB_PERIPHS_BASE 0xc8834400 +#define GXBB_PERIPHS_ADDR(off) (GXBB_PERIPHS_BASE + ((off) << 2)) + +#define GXBB_GPIO_0_EN GXBB_PERIPHS_ADDR(0x0c) +#define GXBB_GPIO_0_OUT GXBB_PERIPHS_ADDR(0x0d) +#define GXBB_GPIO_0_IN GXBB_PERIPHS_ADDR(0x0e) +#define GXBB_GPIO_1_EN GXBB_PERIPHS_ADDR(0x0f) +#define GXBB_GPIO_1_OUT GXBB_PERIPHS_ADDR(0x10) +#define GXBB_GPIO_1_IN GXBB_PERIPHS_ADDR(0x11) +#define GXBB_GPIO_2_EN GXBB_PERIPHS_ADDR(0x12) +#define GXBB_GPIO_2_OUT GXBB_PERIPHS_ADDR(0x13) +#define GXBB_GPIO_2_IN GXBB_PERIPHS_ADDR(0x14) +#define GXBB_GPIO_3_EN GXBB_PERIPHS_ADDR(0x15) +#define GXBB_GPIO_3_OUT GXBB_PERIPHS_ADDR(0x16) +#define GXBB_GPIO_3_IN GXBB_PERIPHS_ADDR(0x17) +#define GXBB_GPIO_4_EN GXBB_PERIPHS_ADDR(0x18) +#define GXBB_GPIO_4_OUT GXBB_PERIPHS_ADDR(0x19) +#define GXBB_GPIO_4_IN GXBB_PERIPHS_ADDR(0x1a) +#define GXBB_GPIO_5_EN GXBB_PERIPHS_ADDR(0x1b) +#define GXBB_GPIO_5_OUT GXBB_PERIPHS_ADDR(0x1c) +#define GXBB_GPIO_5_IN GXBB_PERIPHS_ADDR(0x1d) +#define GXBB_GPIO_6_EN GXBB_PERIPHS_ADDR(0x08) +#define GXBB_GPIO_6_OUT GXBB_PERIPHS_ADDR(0x09) +#define GXBB_GPIO_6_IN GXBB_PERIPHS_ADDR(0x0a) + +#define GXBB_PINMUX_0 GXBB_PERIPHS_ADDR(0x2c) +#define GXBB_PINMUX_1 GXBB_PERIPHS_ADDR(0x2d) +#define GXBB_PINMUX_2 GXBB_PERIPHS_ADDR(0x2e) +#define GXBB_PINMUX_3 GXBB_PERIPHS_ADDR(0x2f) +#define GXBB_PINMUX_4 GXBB_PERIPHS_ADDR(0x30) +#define GXBB_PINMUX_5 GXBB_PERIPHS_ADDR(0x31) +#define GXBB_PINMUX_6 GXBB_PERIPHS_ADDR(0x32) +#define GXBB_PINMUX_7 GXBB_PERIPHS_ADDR(0x33) +#define GXBB_PINMUX_8 GXBB_PERIPHS_ADDR(0x34) +#define GXBB_PINMUX_9 GXBB_PERIPHS_ADDR(0x35) +#define GXBB_PINMUX_10 GXBB_PERIPHS_ADDR(0x36) +#define GXBB_PINMUX_11 GXBB_PERIPHS_ADDR(0x37) +#define GXBB_PINMUX_12 GXBB_PERIPHS_ADDR(0x38) + +#define GXBB_ETH_REG_0 GXBB_PERIPHS_ADDR(0x50) +#define GXBB_ETH_REG_1 GXBB_PERIPHS_ADDR(0x51) + +#define GXBB_HIU_BASE 0xc883c000 +#define GXBB_HIU_ADDR(off) (GXBB_HIU_BASE + ((off) << 2)) + +#define GXBB_MEM_PD_REG_0 GXBB_HIU_ADDR(0x40) + +/* Clock gates */ +#define GXBB_GCLK_MPEG_0 GXBB_HIU_ADDR(0x50) +#define GXBB_GCLK_MPEG_1 GXBB_HIU_ADDR(0x51) +#define GXBB_GCLK_MPEG_2 GXBB_HIU_ADDR(0x52) +#define GXBB_GCLK_MPEG_OTHER GXBB_HIU_ADDR(0x53) +#define GXBB_GCLK_MPEG_AO GXBB_HIU_ADDR(0x54) + #endif /* __GXBB_H__ */ diff --git a/board/hardkernel/odroid-c2/odroid-c2.c b/board/hardkernel/odroid-c2/odroid-c2.c index 6a1485f..2d82d11 100644 --- a/board/hardkernel/odroid-c2/odroid-c2.c +++ b/board/hardkernel/odroid-c2/odroid-c2.c @@ -5,3 +5,28 @@ */
#include <common.h> +#include <asm/io.h> +#include <asm/arch/gxbb.h> + +#ifdef CONFIG_MISC_INIT_R +int misc_init_r(void) +{ + /* Select Ethernet function */ + setbits_le32(GXBB_PINMUX_6, 0x3fff); + + /* Set RGMII mode */ + setbits_le32(GXBB_ETH_REG_0, 0x1621); + + /* Enable clocks */ + setbits_le32(GXBB_GCLK_MPEG_1, 1 << 3); + clrbits_le32(GXBB_MEM_PD_REG_0, (1 << 3) | (1 << 2)); + + /* Reset PHY on GPIOZ_14 */ + clrbits_le32(GXBB_GPIO_3_EN, 1 << 14); + clrbits_le32(GXBB_GPIO_3_OUT, 1 << 14); + udelay(100000); + setbits_le32(GXBB_GPIO_3_OUT, 1 << 14); + + return 0; +} +#endif /* CONFIG_MISC_INIT_R */ diff --git a/configs/odroid-c2_defconfig b/configs/odroid-c2_defconfig index 069f02d..a771b20 100644 --- a/configs/odroid-c2_defconfig +++ b/configs/odroid-c2_defconfig @@ -11,6 +11,9 @@ CONFIG_DEFAULT_DEVICE_TREE="meson-gxbb-odroidc2" # CONFIG_CMD_SOURCE is not set # CONFIG_CMD_SETEXPR is not set CONFIG_OF_CONTROL=y +CONFIG_NET_RANDOM_ETHADDR=y +CONFIG_DM_ETH=y +CONFIG_ETH_DESIGNWARE=y CONFIG_DEBUG_UART=y CONFIG_DEBUG_UART_MESON=y CONFIG_DEBUG_UART_BASE=0xc81004c0 diff --git a/include/configs/odroid-c2.h b/include/configs/odroid-c2.h index 0e9ad1c..12bc086 100644 --- a/include/configs/odroid-c2.h +++ b/include/configs/odroid-c2.h @@ -19,6 +19,7 @@ #define CONFIG_SYS_MALLOC_LEN (32 << 20) #define CONFIG_SYS_CBSIZE 1024 #define CONFIG_DISPLAY_BOARDINFO +#define CONFIG_MISC_INIT_R
#define CONFIG_SYS_SDRAM_BASE 0 #define CONFIG_SYS_TEXT_BASE 0x01000000
On Sun, Apr 03, 2016 at 09:18:17AM +0200, Beniamino Galvani wrote:
Add initialization code for the Ethernet adapter on ODROID-C2 and enable the driver.
Signed-off-by: Beniamino Galvani b.galvani@gmail.com
For the contents:
Reviewed-by: Tom Rini trini@konsulko.com
On Sun, Apr 3, 2016 at 2:18 AM, Beniamino Galvani b.galvani@gmail.com wrote:
Add initialization code for the Ethernet adapter on ODROID-C2 and enable the driver.
Signed-off-by: Beniamino Galvani b.galvani@gmail.com
arch/arm/include/asm/arch-meson/gxbb.h | 54 ++++++++++++++++++++++++++++++++++ board/hardkernel/odroid-c2/odroid-c2.c | 25 ++++++++++++++++ configs/odroid-c2_defconfig | 3 ++ include/configs/odroid-c2.h | 1 + 4 files changed, 83 insertions(+)
diff --git a/arch/arm/include/asm/arch-meson/gxbb.h b/arch/arm/include/asm/arch-meson/gxbb.h index 0eec270..59fae9f 100644 --- a/arch/arm/include/asm/arch-meson/gxbb.h +++ b/arch/arm/include/asm/arch-meson/gxbb.h @@ -7,4 +7,58 @@ #ifndef __GXBB_H__ #define __GXBB_H__
+#define GXBB_PERIPHS_BASE 0xc8834400 +#define GXBB_PERIPHS_ADDR(off) (GXBB_PERIPHS_BASE + ((off) << 2))
+#define GXBB_GPIO_0_EN GXBB_PERIPHS_ADDR(0x0c) +#define GXBB_GPIO_0_OUT GXBB_PERIPHS_ADDR(0x0d) +#define GXBB_GPIO_0_IN GXBB_PERIPHS_ADDR(0x0e) +#define GXBB_GPIO_1_EN GXBB_PERIPHS_ADDR(0x0f) +#define GXBB_GPIO_1_OUT GXBB_PERIPHS_ADDR(0x10) +#define GXBB_GPIO_1_IN GXBB_PERIPHS_ADDR(0x11) +#define GXBB_GPIO_2_EN GXBB_PERIPHS_ADDR(0x12) +#define GXBB_GPIO_2_OUT GXBB_PERIPHS_ADDR(0x13) +#define GXBB_GPIO_2_IN GXBB_PERIPHS_ADDR(0x14) +#define GXBB_GPIO_3_EN GXBB_PERIPHS_ADDR(0x15) +#define GXBB_GPIO_3_OUT GXBB_PERIPHS_ADDR(0x16) +#define GXBB_GPIO_3_IN GXBB_PERIPHS_ADDR(0x17) +#define GXBB_GPIO_4_EN GXBB_PERIPHS_ADDR(0x18) +#define GXBB_GPIO_4_OUT GXBB_PERIPHS_ADDR(0x19) +#define GXBB_GPIO_4_IN GXBB_PERIPHS_ADDR(0x1a) +#define GXBB_GPIO_5_EN GXBB_PERIPHS_ADDR(0x1b) +#define GXBB_GPIO_5_OUT GXBB_PERIPHS_ADDR(0x1c) +#define GXBB_GPIO_5_IN GXBB_PERIPHS_ADDR(0x1d) +#define GXBB_GPIO_6_EN GXBB_PERIPHS_ADDR(0x08) +#define GXBB_GPIO_6_OUT GXBB_PERIPHS_ADDR(0x09) +#define GXBB_GPIO_6_IN GXBB_PERIPHS_ADDR(0x0a)
+#define GXBB_PINMUX_0 GXBB_PERIPHS_ADDR(0x2c) +#define GXBB_PINMUX_1 GXBB_PERIPHS_ADDR(0x2d) +#define GXBB_PINMUX_2 GXBB_PERIPHS_ADDR(0x2e) +#define GXBB_PINMUX_3 GXBB_PERIPHS_ADDR(0x2f) +#define GXBB_PINMUX_4 GXBB_PERIPHS_ADDR(0x30) +#define GXBB_PINMUX_5 GXBB_PERIPHS_ADDR(0x31) +#define GXBB_PINMUX_6 GXBB_PERIPHS_ADDR(0x32) +#define GXBB_PINMUX_7 GXBB_PERIPHS_ADDR(0x33) +#define GXBB_PINMUX_8 GXBB_PERIPHS_ADDR(0x34) +#define GXBB_PINMUX_9 GXBB_PERIPHS_ADDR(0x35) +#define GXBB_PINMUX_10 GXBB_PERIPHS_ADDR(0x36) +#define GXBB_PINMUX_11 GXBB_PERIPHS_ADDR(0x37) +#define GXBB_PINMUX_12 GXBB_PERIPHS_ADDR(0x38)
+#define GXBB_ETH_REG_0 GXBB_PERIPHS_ADDR(0x50) +#define GXBB_ETH_REG_1 GXBB_PERIPHS_ADDR(0x51)
+#define GXBB_HIU_BASE 0xc883c000 +#define GXBB_HIU_ADDR(off) (GXBB_HIU_BASE + ((off) << 2))
+#define GXBB_MEM_PD_REG_0 GXBB_HIU_ADDR(0x40)
+/* Clock gates */ +#define GXBB_GCLK_MPEG_0 GXBB_HIU_ADDR(0x50) +#define GXBB_GCLK_MPEG_1 GXBB_HIU_ADDR(0x51) +#define GXBB_GCLK_MPEG_2 GXBB_HIU_ADDR(0x52) +#define GXBB_GCLK_MPEG_OTHER GXBB_HIU_ADDR(0x53) +#define GXBB_GCLK_MPEG_AO GXBB_HIU_ADDR(0x54)
#endif /* __GXBB_H__ */ diff --git a/board/hardkernel/odroid-c2/odroid-c2.c b/board/hardkernel/odroid-c2/odroid-c2.c index 6a1485f..2d82d11 100644 --- a/board/hardkernel/odroid-c2/odroid-c2.c +++ b/board/hardkernel/odroid-c2/odroid-c2.c @@ -5,3 +5,28 @@ */
#include <common.h> +#include <asm/io.h> +#include <asm/arch/gxbb.h>
+#ifdef CONFIG_MISC_INIT_R +int misc_init_r(void) +{
/* Select Ethernet function */setbits_le32(GXBB_PINMUX_6, 0x3fff);/* Set RGMII mode */setbits_le32(GXBB_ETH_REG_0, 0x1621);
It would be good to have constants for all these magic numbers.
/* Enable clocks */setbits_le32(GXBB_GCLK_MPEG_1, 1 << 3);
Use the BIT() macro for this type of thing. Probably use the BIT() macro in another named macro for the meaning of the magic bit.
clrbits_le32(GXBB_MEM_PD_REG_0, (1 << 3) | (1 << 2));/* Reset PHY on GPIOZ_14 */clrbits_le32(GXBB_GPIO_3_EN, 1 << 14);clrbits_le32(GXBB_GPIO_3_OUT, 1 << 14);udelay(100000);setbits_le32(GXBB_GPIO_3_OUT, 1 << 14);return 0;+} +#endif /* CONFIG_MISC_INIT_R */ diff --git a/configs/odroid-c2_defconfig b/configs/odroid-c2_defconfig index 069f02d..a771b20 100644 --- a/configs/odroid-c2_defconfig +++ b/configs/odroid-c2_defconfig @@ -11,6 +11,9 @@ CONFIG_DEFAULT_DEVICE_TREE="meson-gxbb-odroidc2" # CONFIG_CMD_SOURCE is not set # CONFIG_CMD_SETEXPR is not set CONFIG_OF_CONTROL=y +CONFIG_NET_RANDOM_ETHADDR=y +CONFIG_DM_ETH=y +CONFIG_ETH_DESIGNWARE=y CONFIG_DEBUG_UART=y CONFIG_DEBUG_UART_MESON=y CONFIG_DEBUG_UART_BASE=0xc81004c0 diff --git a/include/configs/odroid-c2.h b/include/configs/odroid-c2.h index 0e9ad1c..12bc086 100644 --- a/include/configs/odroid-c2.h +++ b/include/configs/odroid-c2.h @@ -19,6 +19,7 @@ #define CONFIG_SYS_MALLOC_LEN (32 << 20) #define CONFIG_SYS_CBSIZE 1024 #define CONFIG_DISPLAY_BOARDINFO +#define CONFIG_MISC_INIT_R
#define CONFIG_SYS_SDRAM_BASE 0
#define CONFIG_SYS_TEXT_BASE 0x01000000
2.7.3
U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
On Sun, Apr 03, 2016 at 07:20:10PM -0500, Joe Hershberger wrote:
+#ifdef CONFIG_MISC_INIT_R +int misc_init_r(void) +{
/* Select Ethernet function */setbits_le32(GXBB_PINMUX_6, 0x3fff);/* Set RGMII mode */setbits_le32(GXBB_ETH_REG_0, 0x1621);It would be good to have constants for all these magic numbers.
/* Enable clocks */setbits_le32(GXBB_GCLK_MPEG_1, 1 << 3);Use the BIT() macro for this type of thing. Probably use the BIT() macro in another named macro for the meaning of the magic bit.
I updated known values with macros in v3 (but left 0x3fff as is because its meaning is not documented). Thanks!
Beniamino
participants (4)
-
Beniamino Galvani -
Carlo Caione -
Joe Hershberger -
Tom Rini