[U-Boot] [PATCH] powerpc/mpc85xx: SECURE BOOT- corrected CSPR settings for BSC9132QDS NAND

In case of secure boot from NAND, CSPR and FTIM settings are same as non-secure NAND boot. CSPR0 is configured as NAND and CSPR1 is configured as NOR.
Signed-off-by: Aneesh Bansal aneesh.bansal@freescale.com --- include/configs/BSC9132QDS.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/include/configs/BSC9132QDS.h b/include/configs/BSC9132QDS.h index 37e8725..2234874 100644 --- a/include/configs/BSC9132QDS.h +++ b/include/configs/BSC9132QDS.h @@ -361,7 +361,7 @@ combinations. this should be removed later #endif
/* Set up IFC registers for boot location NOR/NAND */ -#if defined(CONFIG_NAND) +#if defined(CONFIG_NAND) || defined(CONFIG_NAND_SECBOOT) #define CONFIG_SYS_CSPR0 CONFIG_SYS_NAND_CSPR #define CONFIG_SYS_AMASK0 CONFIG_SYS_NAND_AMASK #define CONFIG_SYS_CSOR0 CONFIG_SYS_NAND_CSOR

On 05/13/2014 11:15 PM, Aneesh Bansal wrote:
In case of secure boot from NAND, CSPR and FTIM settings are same as non-secure NAND boot. CSPR0 is configured as NAND and CSPR1 is configured as NOR.
Signed-off-by: Aneesh Bansal aneesh.bansal@freescale.com
Applied to u-boot-mpc85xx/master.
York
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Aneesh Bansal
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York Sun