Signed-off-by: Magnus Lilja lilja.magnus@gmail.com --- MAKEALL | 3 +- Makefile | 9 ++- board/freescale/mx31pdk/config.mk | 4 + board/freescale/mx31pdk/lowlevel_init.S | 93 +++++++++++++++++++++++++++ board/freescale/mx31pdk/u-boot-nand.lds | 33 ++++++++++ include/configs/mx31pdk.h | 19 +++++- nand_spl/board/freescale/mx31pdk/Makefile | 54 +++++++++++++++ nand_spl/board/freescale/mx31pdk/config.mk | 5 ++ nand_spl/board/freescale/mx31pdk/u-boot.lds | 36 ++++++++++ 9 files changed, 251 insertions(+), 5 deletions(-) create mode 100644 board/freescale/mx31pdk/u-boot-nand.lds create mode 100644 nand_spl/board/freescale/mx31pdk/Makefile create mode 100644 nand_spl/board/freescale/mx31pdk/config.mk create mode 100644 nand_spl/board/freescale/mx31pdk/u-boot.lds

diff --git a/MAKEALL b/MAKEALL index aaa6dea..615acbb 100755 --- a/MAKEALL +++ b/MAKEALL @@ -548,7 +548,8 @@ LIST_ARM11=" \ imx31_phycore \ imx31_phycore_eet \ mx31ads \ - mx31pdk \ + mx31pdk \ + mx31pdk_nand \ qong \ smdk6400 \ " diff --git a/Makefile b/Makefile index 99ebcc5..c377313 100644 --- a/Makefile +++ b/Makefile @@ -369,7 +369,7 @@ $(LDSCRIPT): depend $(NAND_SPL): $(TIMESTAMP_FILE) $(VERSION_FILE) $(obj)include/autoconf.mk $(MAKE) -C nand_spl/board/$(BOARDDIR) all

-$(U_BOOT_NAND): $(NAND_SPL) $(obj)u-boot.bin +$(U_BOOT_NAND): $(NAND_SPL) $(obj)u-boot.bin $(obj)include/autoconf.mk cat $(obj)nand_spl/u-boot-spl-16k.bin $(obj)u-boot.bin > $(obj)u-boot-nand.bin

$(ONENAND_IPL): $(TIMESTAMP_FILE) $(VERSION_FILE) $(obj)include/autoconf.mk @@ -3087,6 +3087,13 @@ mx31ads_config : unconfig mx31pdk_config : unconfig @$(MKCONFIG) $(@:_config=) arm arm1136 mx31pdk freescale mx31

+mx31pdk_nand_config : unconfig + @mkdir -p $(obj)include $(obj)board/freescale/mx31pdk + @mkdir -p $(obj)nand_spl/board/freescale/mx31pdk + @echo "#define CONFIG_NAND_U_BOOT" > $(obj)include/config.h + @$(MKCONFIG) -n $@ -a mx31pdk arm arm1136 mx31pdk freescale mx31 + @echo "CONFIG_NAND_U_BOOT = y" >> $(obj)include/config.mk + omap2420h4_config : unconfig @$(MKCONFIG) $(@:_config=) arm arm1136 omap2420h4 NULL omap24xx

diff --git a/board/freescale/mx31pdk/config.mk b/board/freescale/mx31pdk/config.mk index d34dc02..dcaa09f 100644 --- a/board/freescale/mx31pdk/config.mk +++ b/board/freescale/mx31pdk/config.mk @@ -1 +1,5 @@ +ifdef CONFIG_NAND_SPL +TEXT_BASE = 0x87ec0000 +else TEXT_BASE = 0x87f00000 +endif diff --git a/board/freescale/mx31pdk/lowlevel_init.S b/board/freescale/mx31pdk/lowlevel_init.S index ec5eedb..602eb53 100644 --- a/board/freescale/mx31pdk/lowlevel_init.S +++ b/board/freescale/mx31pdk/lowlevel_init.S @@ -26,5 +26,98 @@

.globl lowlevel_init

+#ifdef CONFIG_NAND_SPL +#include <asm/arch/mx31-regs.h> + +.macro REG reg, val + ldr r2, =\reg + ldr r3, =\val + str r3, [r2] +.endm + +.macro REG8 reg, val + ldr r2, =\reg + ldr r3, =\val + strb r3, [r2] +.endm + +.macro DELAY loops + ldr r2, =\loops +1: + subs r2, r2, #1 + nop + bcs 1b +.endm + +.globl lowlevel_init +lowlevel_init: + /* Also setup the Peripheral Port Remap register inside the core */ + ldr r0, =ARM_PPMRR /* start from AIPS 2GB region */ + mcr p15, 0, r0, c15, c2, 4 + + REG IPU_CONF, IPU_CONF_DI_EN + REG CCM_CCMR, 0x074B0BF5 + + DELAY 0x40000 + + REG CCM_CCMR, 0x074B0BF5 | CCMR_MPE + REG CCM_CCMR, (0x074B0BF5 | CCMR_MPE) & ~CCMR_MDS + + /* Set up clock to 532MHz */ + REG CCM_PDR0, 0xFF871D58 + REG CCM_MPCTL, 0x0033280C + + REG CCM_SPCTL, PLL_PD(1) | PLL_MFD(4) | PLL_MFI(12) | PLL_MFN(1) + + /* Set up CPLD on CS5 */ + REG CSCR_U(5), 0x0000D843 + REG CSCR_L(5), 0x22252521 + REG CSCR_A(5), 0x22220A00 + + /* Set up MX31 DDR Memory Controller */ + REG 0x43FAC26C, 0 /* SDCLK */ + REG 0x43FAC270, 0 /* CAS */ + REG 0x43FAC274, 0 /* RAS */ + REG 0x43FAC27C, 0x1000 /* CS2 CSD0) */ + REG 0x43FAC284, 0 /* DQM3 */ + REG 0x43FAC288, 0 /* DQM2, DQM1, DQM0, SD31-SD0, A25-A0, MA10 0x288..0x2DC) */ + REG 0x43FAC28C, 0 + REG 0x43FAC290, 0 + REG 0x43FAC294, 0 + REG 0x43FAC298, 0 + REG 0x43FAC29C, 0 + REG 0x43FAC2A0, 0 + REG 0x43FAC2A4, 0 + REG 0x43FAC2A8, 0 + REG 0x43FAC2AC, 0 + REG 0x43FAC2B0, 0 + REG 0x43FAC2B4, 0 + REG 0x43FAC2B8, 0 + REG 0x43FAC2BC, 0 + REG 0x43FAC2C0, 0 + REG 0x43FAC2C4, 0 + REG 0x43FAC2C8, 0 + REG 0x43FAC2CC, 0 + REG 0x43FAC2D0, 0 + REG 0x43FAC2D4, 0 + REG 0x43FAC2D8, 0 + REG 0x43FAC2DC, 0 + REG 0xB8001010, 0x00000004 + REG 0xB8001004, 0x006ac73a + REG 0xB8001000, 0x92100000 + REG 0x80000f00, 0x12344321 + REG 0xB8001000, 0xa2100000 + REG 0x80000000, 0x12344321 + REG 0x80000000, 0x12344321 + REG 0xB8001000, 0xb2100000 + REG8 0x80000033, 0xda + REG8 0x81000000, 0xff + REG 0xB8001000, 0x82226080 + REG 0x80000000, 0xDEADBEEF + REG 0xB8001010, 0x0000000c + + mov pc, lr +#else lowlevel_init: mov pc, lr +#endif diff --git a/board/freescale/mx31pdk/u-boot-nand.lds b/board/freescale/mx31pdk/u-boot-nand.lds new file mode 100644 index 0000000..b604480 --- /dev/null +++ b/board/freescale/mx31pdk/u-boot-nand.lds @@ -0,0 +1,33 @@ +OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm") +OUTPUT_ARCH(arm) +ENTRY(_start) +SECTIONS +{ + . = 0x00000000; + + . = ALIGN(4); + .text : + { + cpu/arm1136/start.o (.text) + *(.text) + } + + . = ALIGN(4); + .rodata : { *(.rodata) } + + . = ALIGN(4); + .data : { *(.data) } + + . = ALIGN(4); + .got : { *(.got) } + + . = .; + __u_boot_cmd_start = .; + .u_boot_cmd : { *(.u_boot_cmd) } + __u_boot_cmd_end = .; + + . = ALIGN(4); + __bss_start = .; + .bss : { *(.bss) } + _end = .; +} diff --git a/include/configs/mx31pdk.h b/include/configs/mx31pdk.h index deda70d..5f293ba 100644 --- a/include/configs/mx31pdk.h +++ b/include/configs/mx31pdk.h @@ -45,10 +45,10 @@ #define CONFIG_SETUP_MEMORY_TAGS 1 #define CONFIG_INITRD_TAG 1

-/* No support for NAND boot for i.MX31 PDK yet, so we rely on some other - * program to initialize the SDRAM. - */ +#if defined(CONFIG_NAND_U_BOOT) && !defined(CONFIG_NAND_SPL) #define CONFIG_SKIP_LOWLEVEL_INIT +#define CONFIG_SKIP_RELOCATE_UBOOT +#endif

/* * Size of malloc() pool @@ -158,5 +158,18 @@

#define CONFIG_ENV_SIZE (128 * 1024)

+#define CFG_NAND_U_BOOT_OFFS 0x800 +#define CFG_NAND_U_BOOT_SIZE 0x30000 +#define CFG_NAND_U_BOOT_DST 0x87f00000 /* Load U-Boot to this address */ +#define CFG_NAND_U_BOOT_START CFG_NAND_U_BOOT_DST +#define CFG_NAND_SPL_DST (CFG_NAND_U_BOOT_DST - 0x40000) + +#define CFG_NAND_PAGE_SIZE 0x800 +#define CFG_NAND_BLOCK_SIZE (128 * 1024) +#define CFG_NAND_PAGE_COUNT 64 +/* for NAND_SPL */ +#define CFG_NAND_CHIP_SIZE (256 * 1024 * 1024) +#define CFG_NAND_PAGES_PER_BLOCK CFG_NAND_PAGE_COUNT + #endif /* __CONFIG_H */

diff --git a/nand_spl/board/freescale/mx31pdk/Makefile b/nand_spl/board/freescale/mx31pdk/Makefile new file mode 100644 index 0000000..866b35e --- /dev/null +++ b/nand_spl/board/freescale/mx31pdk/Makefile @@ -0,0 +1,54 @@ +CONFIG_NAND_SPL = y + +include $(TOPDIR)/config.mk +include $(TOPDIR)/nand_spl/board/$(BOARDDIR)/config.mk + +LDSCRIPT= $(TOPDIR)/nand_spl/board/$(BOARDDIR)/u-boot.lds +LDFLAGS = -Bstatic -T $(LDSCRIPT) -Ttext $(TEXT_BASE) $(PLATFORM_LDFLAGS) +AFLAGS += -DCONFIG_NAND_SPL +CFLAGS += -DCONFIG_NAND_SPL + +SOBJS = start.o lowlevel_init.o +COBJS = nand_boot_mx31.o + +SRCS := $(SRCTREE)/nand_spl/nand_boot_mx31.c +SRCS += $(SRCTREE)/cpu/arm1136/start.S +SRCS += $(SRCTREE)/board/freescale/mx31pdk/lowlevel_init.S +OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS)) +__OBJS := $(SOBJS) $(COBJS) +LNDIR := $(OBJTREE)/nand_spl/board/$(BOARDDIR) + +nandobj := $(OBJTREE)/nand_spl/ + +ALL = $(nandobj)u-boot-spl $(nandobj)u-boot-spl.bin $(nandobj)u-boot-spl-16k.bin + +all: $(obj).depend $(ALL) + +$(nandobj)u-boot-spl-16k.bin: $(nandobj)u-boot-spl + $(OBJCOPY) ${OBJCFLAGS} --pad-to=$(PAD_TO) -O binary $< $@ + +$(nandobj)u-boot-spl.bin: $(nandobj)u-boot-spl + $(OBJCOPY) ${OBJCFLAGS} -O binary $< $@ + +$(nandobj)u-boot-spl: $(OBJS) + cd $(LNDIR) && $(LD) $(LDFLAGS) $(__OBJS) \ + -Map $(nandobj)u-boot-spl.map \ + -o $(nandobj)u-boot-spl + +######################################################################### + +$(obj)%.o: $(SRCTREE)/cpu/arm1136/%.S + $(CC) $(AFLAGS) -c -o $@ $< + +$(obj)%.o: $(SRCTREE)/board/freescale/mx31pdk/%.S + $(CC) $(AFLAGS) -c -o $@ $< + +$(obj)%.o: $(SRCTREE)/nand_spl/%.c + $(CC) $(CFLAGS) -c -o $@ $< + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +######################################################################### diff --git a/nand_spl/board/freescale/mx31pdk/config.mk b/nand_spl/board/freescale/mx31pdk/config.mk new file mode 100644 index 0000000..119934b --- /dev/null +++ b/nand_spl/board/freescale/mx31pdk/config.mk @@ -0,0 +1,5 @@ +PAD_TO := $(shell expr $$[$(TEXT_BASE) + 2048]) + +ifeq ($(debug),1) +PLATFORM_CPPFLAGS += -DDEBUG +endif diff --git a/nand_spl/board/freescale/mx31pdk/u-boot.lds b/nand_spl/board/freescale/mx31pdk/u-boot.lds new file mode 100644 index 0000000..2780e11 --- /dev/null +++ b/nand_spl/board/freescale/mx31pdk/u-boot.lds @@ -0,0 +1,36 @@ +OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm") +OUTPUT_ARCH(arm) +ENTRY(_start) +SECTIONS +{ + . = 0x00000000; + + . = ALIGN(4); + .text : + { + start.o (.text) + lowlevel_init.o (.text) + nand_boot_mx31.o (.text) + *(.text) + . = 2K; + } + + . = ALIGN(4); + .rodata : { *(.rodata) } + + . = ALIGN(4); + .data : { *(.data) } + + . = ALIGN(4); + .got : { *(.got) } + + . = .; + __u_boot_cmd_start = .; + .u_boot_cmd : { *(.u_boot_cmd) } + __u_boot_cmd_end = .; + + . = ALIGN(4); + __bss_start = .; + .bss : { *(.bss) } + _end = .; +}

2009/5/9 Jean-Christophe PLAGNIOL-VILLARD plagnioj@jcrosoft.com:

On 21:56 Sun 03 May     , Magnus Lilja wrote:

...

Signed-off-by: Magnus Lilja lilja.magnus@gmail.com

MAKEALL                                     |    3 +-  Makefile                                    |    9 ++-  board/freescale/mx31pdk/config.mk           |    4 +  board/freescale/mx31pdk/lowlevel_init.S     |   93 +++++++++++++++++++++++++++  board/freescale/mx31pdk/u-boot-nand.lds     |   33 ++++++++++  include/configs/mx31pdk.h                   |   19 +++++-  nand_spl/board/freescale/mx31pdk/Makefile   |   54 +++++++++++++++  nand_spl/board/freescale/mx31pdk/config.mk  |    5 ++  nand_spl/board/freescale/mx31pdk/u-boot.lds |   36 ++++++++++  9 files changed, 251 insertions(+), 5 deletions(-)  create mode 100644 board/freescale/mx31pdk/u-boot-nand.lds  create mode 100644 nand_spl/board/freescale/mx31pdk/Makefile  create mode 100644 nand_spl/board/freescale/mx31pdk/config.mk  create mode 100644 nand_spl/board/freescale/mx31pdk/u-boot.lds

diff --git a/MAKEALL b/MAKEALL index aaa6dea..615acbb 100755 --- a/MAKEALL +++ b/MAKEALL @@ -548,7 +548,8 @@ LIST_ARM11="                      \       imx31_phycore           \       imx31_phycore_eet       \       mx31ads                 \

• mx31pdk                 \

• mx31pdk                 \
• mx31pdk_nand            \

qong                    \       smdk6400                \  " diff --git a/Makefile b/Makefile index 99ebcc5..c377313 100644 --- a/Makefile +++ b/Makefile @@ -369,7 +369,7 @@ $(LDSCRIPT):      depend  $(NAND_SPL): $(TIMESTAMP_FILE) $(VERSION_FILE) $(obj)include/autoconf.mk               $(MAKE) -C nand_spl/board/$(BOARDDIR) all

-$(U_BOOT_NAND):      $(NAND_SPL) $(obj)u-boot.bin +$(U_BOOT_NAND):      $(NAND_SPL) $(obj)u-boot.bin $(obj)include/autoconf.mk

why?

Maxim added this, I haven't investigated if the dependency is needed or not.

...

cat $(obj)nand_spl/u-boot-spl-16k.bin $(obj)u-boot.bin > $(obj)u-boot-nand.bin

$(ONENAND_IPL):      $(TIMESTAMP_FILE) $(VERSION_FILE) $(obj)include/autoconf.mk @@ -3087,6 +3087,13 @@ mx31ads_config         : unconfig  mx31pdk_config               : unconfig       @$(MKCONFIG) $(@:_config=) arm arm1136 mx31pdk freescale mx31

+mx31pdk_nand_config  : unconfig

• @mkdir -p $(obj)include $(obj)board/freescale/mx31pdk
• @mkdir -p $(obj)nand_spl/board/freescale/mx31pdk
• @echo "#define CONFIG_NAND_U_BOOT" > $(obj)include/config.h
• @$(MKCONFIG) -n $@ -a mx31pdk arm arm1136 mx31pdk freescale mx31
• @echo "CONFIG_NAND_U_BOOT = y" >> $(obj)include/config.mk

IIRC no need it will generate from the config.h

I don't understand the comment. What will generate what from config.h?

...

omap2420h4_config    : unconfig       @$(MKCONFIG) $(@:_config=) arm arm1136 omap2420h4 NULL omap24xx

diff --git a/board/freescale/mx31pdk/config.mk b/board/freescale/mx31pdk/config.mk index d34dc02..dcaa09f 100644 --- a/board/freescale/mx31pdk/config.mk +++ b/board/freescale/mx31pdk/config.mk @@ -1 +1,5 @@ +ifdef CONFIG_NAND_SPL +TEXT_BASE = 0x87ec0000 +else  TEXT_BASE = 0x87f00000 +endif diff --git a/board/freescale/mx31pdk/lowlevel_init.S b/board/freescale/mx31pdk/lowlevel_init.S index ec5eedb..602eb53 100644 --- a/board/freescale/mx31pdk/lowlevel_init.S +++ b/board/freescale/mx31pdk/lowlevel_init.S @@ -26,5 +26,98 @@

.globl lowlevel_init

+#ifdef CONFIG_NAND_SPL +#include <asm/arch/mx31-regs.h>

+.macro REG reg, val

• ldr     r2, =\reg
• ldr     r3, =\val
• str     r3, [r2]

+.endm

+.macro REG8 reg, val

• ldr     r2, =\reg
• ldr     r3, =\val
• strb    r3, [r2]

+.endm

+.macro DELAY loops

• ldr     r2, =\loops

+1:

• subs    r2, r2, #1
• nop
• bcs     1b

+.endm

NACK as already reply to the kirwood patch we must have common macro please use the attached file as based work

I don't see any file attached to you e-mail, so which attached file? Can you point to the relevant kirkwood patch? Is the patch in some git-tree?

...

+.globl lowlevel_init +lowlevel_init:

• /* Also setup the Peripheral Port Remap register inside the core */
• ldr     r0, =ARM_PPMRR      /* start from AIPS 2GB region */
• mcr     p15, 0, r0, c15, c2, 4

for all hard code value please use macro and if possible macro to generate them

Hmm. You want me to create a macro that expands to the above code?

...

• REG     IPU_CONF, IPU_CONF_DI_EN
• REG     CCM_CCMR, 0x074B0BF5
• REG     0xB8001010, 0x0000000c

<snip> > +     mov     pc, lr > +#else >  lowlevel_init: >       mov     pc, lr why?

See my answer in patch 2.

...

+#endif diff --git a/board/freescale/mx31pdk/u-boot-nand.lds b/board/freescale/mx31pdk/u-boot-nand.lds new file mode 100644 index 0000000..b604480 --- /dev/null +++ b/board/freescale/mx31pdk/u-boot-nand.lds

no need anymore

I'll try with your lds cleanup patch.

Thanks, Magnus

...

...

...

diff --git a/board/freescale/mx31pdk/config.mk b/board/freescale/mx31pdk/config.mk index d34dc02..dcaa09f 100644 --- a/board/freescale/mx31pdk/config.mk +++ b/board/freescale/mx31pdk/config.mk @@ -1 +1,5 @@ +ifdef CONFIG_NAND_SPL +TEXT_BASE = 0x87ec0000 +else  TEXT_BASE = 0x87f00000 +endif

+.macro DELAY loops

• ldr     r2, =\loops

+1:

• subs    r2, r2, #1
• nop
• bcs     1b

+.endm

NACK as already reply to the kirwood patch we must have common macro please use the attached file as based work

I don't see any file attached to you e-mail, so which attached file? Can you point to the relevant kirkwood patch? Is the patch in some git-tree?

no not yet so I've forget to re-attached it

There's a minor problem in the timer macro, fixed by replacing "sub" with "subs".

Are you OK with me posting the file as a separate patch with your From+signed-off as part of my patch series or will you add the file to arm-next yourself?

Regards, Magnus

+++ b/board/freescale/mx31pdk/lowlevel_init.S @@ -0,0 +1,30 @@ +/*

• • (C) Copyright 2008 Magnus Lilja lilja.magnus@gmail.com
• • See file CREDITS for list of people who contributed to this
• • project.
• • This program is free software; you can redistribute it and/or
• • modify it under the terms of the GNU General Public License as
• • published by the Free Software Foundation; either version 2 of
• • the License, or (at your option) any later version.
• • This program is distributed in the hope that it will be useful,
• • but WITHOUT ANY WARRANTY; without even the implied warranty of
• • MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
• • GNU General Public License for more details.
• • You should have received a copy of the GNU General Public License
• • along with this program; if not, write to the Free Software
• • Foundation, Inc., 59 Temple Place, Suite 330, Boston,
• • MA 02111-1307 USA
• */

+/*

• • This is just to keep the linker happy.
• */

+.globl lowlevel_init

+lowlevel_init:

• mov pc, lr

why do you need it?

diff --git a/board/freescale/mx31pdk/mx31pdk.c b/board/freescale/mx31pdk/mx31pdk.c new file mode 100644 index 0000000..9eed979 --- /dev/null +++ b/board/freescale/mx31pdk/mx31pdk.c @@ -0,0 +1,76 @@ +/*

• • (C) Copyright 2008 Magnus Lilja lilja.magnus@gmail.com
• • (c) 2007 Pengutronix, Sascha Hauer s.hauer@pengutronix.de
• • See file CREDITS for list of people who contributed to this
• • project.
• • This program is free software; you can redistribute it and/or
• • modify it under the terms of the GNU General Public License as
• • published by the Free Software Foundation; either version 2 of
• • the License, or (at your option) any later version.
• • This program is distributed in the hope that it will be useful,
• • but WITHOUT ANY WARRANTY; without even the implied warranty of
• • MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
• • GNU General Public License for more details.
• • You should have received a copy of the GNU General Public License
• • along with this program; if not, write to the Free Software
• • Foundation, Inc., 59 Temple Place, Suite 330, Boston,
• • MA 02111-1307 USA
• */

+#include <common.h> +#include <asm/arch/mx31.h> +#include <asm/arch/mx31-regs.h>

+DECLARE_GLOBAL_DATA_PTR;

+int dram_init(void) +{

• gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
• gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
• return 0;

+}

+int board_init(void) +{

• /* CS5: CPLD incl. network controller */
• __REG(CSCR_U(5)) = 0x0000d843;
• __REG(CSCR_L(5)) = 0x22252521;
• __REG(CSCR_A(5)) = 0x22220a00;
• /* setup pins for UART1 */
• mx31_gpio_mux(MUX_RXD1__UART1_RXD_MUX);
• mx31_gpio_mux(MUX_TXD1__UART1_TXD_MUX);
• mx31_gpio_mux(MUX_RTS1__UART1_RTS_B);
• mx31_gpio_mux(MUX_CTS1__UART1_CTS_B);

I think it's time to create common device init functions as done for davinci or at91

• /* SPI2 */
• mx31_gpio_mux(MUX_CSPI2_SS2__CSPI2_SS2_B);
• mx31_gpio_mux(MUX_CSPI2_SCLK__CSPI2_CLK);
• mx31_gpio_mux(MUX_CSPI2_SPI_RDY__CSPI2_DATAREADY_B);
• mx31_gpio_mux(MUX_CSPI2_MOSI__CSPI2_MOSI);
• mx31_gpio_mux(MUX_CSPI2_MISO__CSPI2_MISO);
• mx31_gpio_mux(MUX_CSPI2_SS0__CSPI2_SS0_B);
• mx31_gpio_mux(MUX_CSPI2_SS1__CSPI2_SS1_B);

ditto

• /* start SPI2 clock */
• __REG(CCM_CGR2) = __REG(CCM_CGR2) | (3 << 4);
• gd->bd->bi_arch_number = MACH_TYPE_MX31_3DS; /* board id for linux */
• gd->bd->bi_boot_params = 0x80000100; /* adress of boot parameters */

please use this style

RAM_BASE + 0x100 as other arm board

• return 0;

+}

diff --git a/board/freescale/mx31pdk/u-boot.lds b/board/freescale/mx31pdk/u-boot.lds new file mode 100644 index 0000000..e96509a --- /dev/null +++ b/board/freescale/mx31pdk/u-boot.lds

I've send a patch that unify all arm lds so this one is not anymore needed

@@ -0,0 +1,59 @@ +/*

• • You should have received a copy of the GNU General Public License
• • along with this program; if not, write to the Free Software
• • Foundation, Inc., 59 Temple Place, Suite 330, Boston,
• • MA 02111-1307 USA
• */

+#ifndef __CONFIG_H +#define __CONFIG_H

+#include <asm/arch/mx31-regs.h>

why?

+/* High Level Configuration Options */ +#define CONFIG_ARM1136 1 /* This is an arm1136 CPU core */

^^^^ whitespate please remove

+#define CONFIG_MX31 1 /* in a mx31 */

^^^^ whitespate please remove

+#define CONFIG_MX31_HCLK_FREQ 26000000 +#define CONFIG_MX31_CLK32 32768

+#define CONFIG_DISPLAY_CPUINFO +#define CONFIG_DISPLAY_BOARDINFO

+#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */

^^^^ whitespate please remove

+#define CONFIG_SETUP_MEMORY_TAGS 1 +#define CONFIG_INITRD_TAG 1

+/* No support for NAND boot for i.MX31 PDK yet, so we rely on some other

• • program to initialize the SDRAM.
• */

+#define CONFIG_SKIP_LOWLEVEL_INIT

+/*

• • Size of malloc() pool
• */

+#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128 * 1024) +/* Bytes reserved for initial data */ +#define CONFIG_SYS_GBL_DATA_SIZE 128

+/*

• • Hardware drivers
• */

+#define CONFIG_MX31_UART 1 +#define CONFIG_SYS_MX31_UART1 1

+#define CONFIG_HARD_SPI 1 +#define CONFIG_MXC_SPI 1 +#define CONFIG_DEFAULT_SPI_BUS 1 +#define CONFIG_DEFAULT_SPI_MODE (SPI_MODE_2 | SPI_CS_HIGH)

+#define CONFIG_RTC_MC13783 1

+/* MC13783 connected to CSPI2 and SS2 */ +#define CONFIG_MC13783_SPI_BUS 1 +#define CONFIG_MC13783_SPI_CS 2

+/* allow to overwrite serial and ethaddr */ +#define CONFIG_ENV_OVERWRITE +#define CONFIG_CONS_INDEX 1 +#define CONFIG_BAUDRATE 115200 +#define CONFIG_SYS_BAUDRATE_TABLE {9600, 19200, 38400, 57600, 115200}

+/***********************************************************

• • Command definition
• ***********************************************************/

+#include <config_cmd_default.h>

+#define CONFIG_CMD_MII +#define CONFIG_CMD_PING +#define CONFIG_CMD_SPI +#define CONFIG_CMD_DATE

+/* Disabled due to compilation errors in cmd_bootm.c (IMLS seems to require

• • that CFG_NO_FLASH is undefined).
• */

please remove the comment

+#undef CONFIG_CMD_IMLS

+#define CONFIG_BOOTDELAY 3

+#define CONFIG_EXTRA_ENV_SETTINGS \

• "bootargs_base=setenv bootargs console=ttymxc0,115200\0" \
• "bootargs_nfs=setenv bootargs $(bootargs) root=/dev/nfs " \

• "ip=dhcp nfsroot=$(serverip):$(nfsrootfs),v3,tcp\0"	\
  

• "bootcmd=run bootcmd_net\0" \
• "bootcmd_net=run bootargs_base bootargs_mtd bootargs_nfs; " \

• "tftpboot 0x81000000 uImage-mx31; bootm\0"
  

+#define CONFIG_DRIVER_SMC911X 1 +#define CONFIG_DRIVER_SMC911X_BASE CS5_BASE +#define CONFIG_DRIVER_SMC911X_32_BIT 1

+/*

• • Miscellaneous configurable options
• */

+#define CONFIG_SYS_LONGHELP /* undef to save memory */ +#define CONFIG_SYS_PROMPT "uboot> " +#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */

^^ whitespate please remove

+/* Print Buffer Size */ +#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \

• 		sizeof(CONFIG_SYS_PROMPT)+16)
  

+/* max number of command args */ +#define CONFIG_SYS_MAXARGS 16 +/* Boot Argument Buffer Size */ +#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE

+#define CONFIG_SYS_MEMTEST_START PHYS_SDRAM_1 /* memtest works on */

^^ whitespate please remove

+#define CONFIG_SYS_MEMTEST_END 0x10000

+#define CONFIG_SYS_LOAD_ADDR 0x81000000 /* default load address */

+#define CONFIG_SYS_HZ 1000

+#define CONFIG_CMDLINE_EDITING 1

+/*-----------------------------------------------------------------------

• • Stack sizes
• • The stack sizes are set up in start.S using the settings below
• */

+#define CONFIG_STACKSIZE (128 * 1024) /* regular stack */

+/*-----------------------------------------------------------------------

• • Physical Memory Map
• */

+#define CONFIG_NR_DRAM_BANKS 1 +#define PHYS_SDRAM_1 CSD0_BASE +#define PHYS_SDRAM_1_SIZE (128 * 1024 * 1024)

+/*-----------------------------------------------------------------------

• • FLASH and environment organization
• */

+/* No NOR flash present */ +#define CONFIG_SYS_NO_FLASH 1

+#define CONFIG_ENV_IS_NOWHERE 1

^ whitespate please remove

Best Regards, J.

...

...

+/*

• • This is just to keep the linker happy.
• */

+.globl lowlevel_init

+lowlevel_init:

• mov     pc, lr

why do you need it?

start.S:cpu_init_crit needs it and I haven't defined SKIP_LOWLEVEL. Might be possible to define SKIP_LOWLEVEL_INIT and get rid of the above line.

if you do not need to do any lowlevel_init yes please

...

...

diff --git a/board/freescale/mx31pdk/mx31pdk.c b/board/freescale/mx31pdk/mx31pdk.c new file mode 100644 index 0000000..9eed979 --- /dev/null +++ b/board/freescale/mx31pdk/mx31pdk.c @@ -0,0 +1,76 @@ +/*

...

...

+int board_init(void) +{

• /* CS5: CPLD incl. network controller */
• __REG(CSCR_U(5)) = 0x0000d843;
• __REG(CSCR_L(5)) = 0x22252521;
• __REG(CSCR_A(5)) = 0x22220a00;
• /* setup pins for UART1 */
• mx31_gpio_mux(MUX_RXD1__UART1_RXD_MUX);
• mx31_gpio_mux(MUX_TXD1__UART1_TXD_MUX);
• mx31_gpio_mux(MUX_RTS1__UART1_RTS_B);
• mx31_gpio_mux(MUX_CTS1__UART1_CTS_B);

I think it's time to create common device init functions as done for davinci or at91

I think I prefer the at91 way of doing this, I can create cpu/arm1136/mx31/serial.c and spi.c.

as I tks please note I'll regroup all devices init fuctions in one file per cpu maybe you can create a devices.c

...

...

• /* SPI2 */
• mx31_gpio_mux(MUX_CSPI2_SS2__CSPI2_SS2_B);
• mx31_gpio_mux(MUX_CSPI2_SCLK__CSPI2_CLK);
• mx31_gpio_mux(MUX_CSPI2_SPI_RDY__CSPI2_DATAREADY_B);
• mx31_gpio_mux(MUX_CSPI2_MOSI__CSPI2_MOSI);
• mx31_gpio_mux(MUX_CSPI2_MISO__CSPI2_MISO);
• mx31_gpio_mux(MUX_CSPI2_SS0__CSPI2_SS0_B);
• mx31_gpio_mux(MUX_CSPI2_SS1__CSPI2_SS1_B);

diff --git a/board/freescale/mx31pdk/u-boot.lds b/board/freescale/mx31pdk/u-boot.lds new file mode 100644 index 0000000..e96509a --- /dev/null +++ b/board/freescale/mx31pdk/u-boot.lds

I've send a patch that unify all arm lds so this one is not anymore needed

I'll try it. Are you planning other major changes that will affect these patches in the near future?

no

...

...

@@ -0,0 +1,59 @@ +/*

• • You should have received a copy of the GNU General Public License
• • along with this program; if not, write to the Free Software
• • Foundation, Inc., 59 Temple Place, Suite 330, Boston,
• • MA 02111-1307 USA
• */

+#ifndef __CONFIG_H +#define __CONFIG_H

+#include <asm/arch/mx31-regs.h>

why?

So we can use symbolic names for Ethernet base address, SDRAM base address. I.e. instead of writing e.g. 0xB6000000 we can write CS5_BASE. I can switch to hard coded numerical values and get rid of the #include if requested.

if you include it in the final c files you do not need to include mx31-regs.h always

...

...

+/***********************************************************

• • Command definition
• ***********************************************************/

+#include <config_cmd_default.h>

+#define CONFIG_CMD_MII +#define CONFIG_CMD_PING +#define CONFIG_CMD_SPI +#define CONFIG_CMD_DATE

+/* Disabled due to compilation errors in cmd_bootm.c (IMLS seems to require

• • that CFG_NO_FLASH is undefined).
• */

please remove the comment

The comment was added since Wolfgang asked why IMLS was disabled when I posted a similar set of patches last year, so I'm going to keep the comment.

ok

Best Regards, J.

On 21:56 Sun 03 May , Magnus Lilja wrote:

This patch adds the NAND SPL framework needed to boot i.MX31 boards from NAND.

The patch is based on the work by Maxim Artamonov <scn1874 at yandex.ru > (which was signed-off-by him).

so please add it too and please fix the @

Signed-off-by: Magnus Lilja lilja.magnus@gmail.com

cpu/arm1136/start.S | 29 +++-- include/asm-arm/arch-mx31/mx31-regs.h | 90 +++++++++++++ nand_spl/nand_boot_mx31.c | 223 +++++++++++++++++++++++++++++++++ 3 files changed, 331 insertions(+), 11 deletions(-) create mode 100644 nand_spl/nand_boot_mx31.c

diff --git a/cpu/arm1136/start.S b/cpu/arm1136/start.S index e622338..9bbbaf1 100644 --- a/cpu/arm1136/start.S +++ b/cpu/arm1136/start.S @@ -1,6 +1,9 @@ /*

• armboot - Startup Code for OMP2420/ARM1136 CPU-core

• • Copyright (c) 2008 Maxim Artamonov, <scn1874 at yandex.ru>

please remove

• Copyright (c) 2004 Texas Instruments r-woodruff2@ti.com
• Copyright (c) 2001 Marius Gr�ger mag@sysgo.de

@@ -32,7 +35,7 @@ #include <version.h> .globl _start _start: b reset -#ifdef CONFIG_ONENAND_IPL +#if defined(CONFIG_ONENAND_IPL) || defined(CONFIG_NAND_SPL)

create a better CONFIG_ because we could need for other boot mode

ldr pc, _hang ldr pc, _hang ldr pc, _hang @@ -156,9 +159,9 @@ relocate: /* relocate U-Boot to RAM */ adr r0, _start /* r0 <- current position of code */ ldr r1, _TEXT_BASE /* test if we run from flash or RAM */ cmp r0, r1 /* don't reloc during debug */ -#ifndef CONFIG_ONENAND_IPL +#if !defined(CONFIG_ONENAND_IPL) && !defined(CONFIG_NAND_SPL) beq stack_setup -#endif /* CONFIG_ONENAND_IPL */ +#endif /* !CONFIG_ONENAND_IPL && !CONFIG_NAND_SPL*/

#endif /* CONFIG_ONENAND_IPL */

<snip>

diff --git a/nand_spl/nand_boot_mx31.c b/nand_spl/nand_boot_mx31.c new file mode 100644 index 0000000..d698d2a --- /dev/null +++ b/nand_spl/nand_boot_mx31.c @@ -0,0 +1,223 @@

<snip>

+static void mx31_nand_page_address(unsigned int page_address) +{

• unsigned int page_count;
• writew(0x00, NFC_FLASH_ADDR);
• writew(NFC_ADDR, NFC_CONFIG2);
• mx31_wait_ready();
• /* code only for 2kb flash */
• if (CFG_NAND_PAGE_SIZE == 0x800) {

• writew(0x00, NFC_FLASH_ADDR);
  

• writew(NFC_ADDR, NFC_CONFIG2);
  

• mx31_wait_ready();
  

• }
• page_count = CFG_NAND_CHIP_SIZE / CFG_NAND_PAGE_SIZE;

please use CONFIG_SYS_ or CONFIG_ and why not detect it?

• if (page_address <= page_count) {

• page_count--; /* transform 0x01000000 to 0x00ffffff */
  

• do {
  

• 	writew(page_address & 0xff, NFC_FLASH_ADDR);
  

• 	writew(NFC_ADDR, NFC_CONFIG2);
  

• 	mx31_wait_ready();
  

• 	page_address = page_address >> 8;
  

• 	page_count = page_count >> 8;
  

• } while (page_count);
  

• }

+}

<snip>

+static int nand_load(unsigned int from, unsigned int size, unsigned char *buf) +{

• int i, bb;
• mx31_nand_init();
• /* convert from to page number */
• from = from / CFG_NAND_PAGE_SIZE;
• i = 0;
• while (i < (size/CFG_NAND_PAGE_SIZE)) {

• if ((from * CFG_NAND_PAGE_SIZE) >= CFG_NAND_CHIP_SIZE)
  

• 	return 2; /* memory segment violation */
  

• bb = mx31_read_page(from, buf);
  

• if (bb < 0)
  

• 	return -1;
  

• /* checking first page of each block */
  

• /* if this page has bb marker, then skip whole block */
  

• if ((!(from % CFG_NAND_PAGES_PER_BLOCK)) && bb) {
  

please use CONFIG_SYS_ or CONFIG_ and why not detect it?

• 	from = from + CFG_NAND_PAGES_PER_BLOCK;
  

• } else {
  

• 	i++;
  

• 	from++;
  

• 	buf = buf + CFG_NAND_PAGE_SIZE;
  

please use CONFIG_SYS_ or CONFIG_ and why not detect it?

• }
  

• }
• return 0;

+}

+/*

• • The main entry for NAND booting. It's necessary that SDRAM is already
• • configured and available since this code loads the main U-Boot image
• • from NAND into SDRAM and starts it from there.
• */

+void nand_boot(void) +{

• __attribute__((noreturn)) void (*uboot)(void);
• /* CFG_NAND_U_BOOT_OFFS and CFG_NAND_U_BOOT_SIZE must */

please use CONFIG_SYS_ or CONFIG_ and so on

• /* be aligned to full pages */

please use this style of multiple ligne comment /* * */

Best Regards, J.

On 21:31 Sun 10 May , Magnus Lilja wrote:

2009/5/9 Jean-Christophe PLAGNIOL-VILLARD plagnioj@jcrosoft.com:

...

On 21:56 Sun 03 May     , Magnus Lilja wrote:

...

@@ -32,7 +35,7 @@  #include <version.h>  .globl _start  _start: b    reset -#ifdef CONFIG_ONENAND_IPL +#if defined(CONFIG_ONENAND_IPL) || defined(CONFIG_NAND_SPL)

create a better CONFIG_ because we could need for other boot mode

A better CONFIG_ than what? CONFIG_NAND_SPL is already used elsewhere in U-boot when booting from NAND.

IIRC in this case the purpose is to reduce the size of the start.S to allow more code in the ipl & spl

...

...

ldr     pc, _hang       ldr     pc, _hang       ldr     pc, _hang @@ -156,9 +159,9 @@ relocate:                         /* relocate U-Boot to RAM           */       adr     r0, _start              /* r0 <- current position of code   */       ldr     r1, _TEXT_BASE          /* test if we run from flash or RAM */       cmp     r0, r1                  /* don't reloc during debug         */ -#ifndef CONFIG_ONENAND_IPL +#if !defined(CONFIG_ONENAND_IPL) && !defined(CONFIG_NAND_SPL)       beq     stack_setup -#endif       /* CONFIG_ONENAND_IPL */ +#endif       /* !CONFIG_ONENAND_IPL && !CONFIG_NAND_SPL*/

#endif       /* CONFIG_ONENAND_IPL */

• }
• page_count = CFG_NAND_CHIP_SIZE / CFG_NAND_PAGE_SIZE;

please use CONFIG_SYS_ or CONFIG_

Will do.

...

and why not detect it?

Might be possible, I'll look into it to see if it's doable.

tks

Best Regards, J.

On Sun, May 03, 2009 at 09:56:57PM +0200, Magnus Lilja wrote:

This patch adds the NAND SPL framework needed to boot i.MX31 boards from NAND.

Sorry for the delay...

diff --git a/include/asm-arm/arch-mx31/mx31-regs.h b/include/asm-arm/arch-mx31/mx31-regs.h index a8a05c8..3d811d7 100644 --- a/include/asm-arm/arch-mx31/mx31-regs.h +++ b/include/asm-arm/arch-mx31/mx31-regs.h @@ -194,4 +194,94 @@ #define CS5_BASE 0xB6000000 #define PCMCIA_MEM_BASE 0xC0000000

+/*

• • NAND controller
• */

+#define NFC_BASE_ADDR 0xB8000000

+/*

• • Addresses for NFC registers
• */

+#define NFC_BUF_SIZE (NFC_BASE_ADDR + 0xE00) +#define NFC_BUF_ADDR (NFC_BASE_ADDR + 0xE04) +#define NFC_FLASH_ADDR (NFC_BASE_ADDR + 0xE06) +#define NFC_FLASH_CMD (NFC_BASE_ADDR + 0xE08)

The NFC register info should go in its own header, as it exists on more than just MX31 (e.g. mpc5xxx). Should probably use register structs rather than #defines.

+/*

• • Addresses for NFC RAM BUFFER Main area 0
• */

+#define MAIN_AREA0 (NFC_BASE_ADDR + 0x000) +#define MAIN_AREA1 (NFC_BASE_ADDR + 0x200) +#define MAIN_AREA2 (NFC_BASE_ADDR + 0x400) +#define MAIN_AREA3 (NFC_BASE_ADDR + 0x600)

+/*

• • Addresses for NFC SPARE BUFFER Spare area 0
• */

+#define SPARE_AREA0 (NFC_BASE_ADDR + 0x800) +#define SPARE_AREA1 (NFC_BASE_ADDR + 0x810) +#define SPARE_AREA2 (NFC_BASE_ADDR + 0x820) +#define SPARE_AREA3 (NFC_BASE_ADDR + 0x830)

NFC_MAIN_AREA0, etc.

diff --git a/nand_spl/nand_boot_mx31.c b/nand_spl/nand_boot_mx31.c new file mode 100644 index 0000000..d698d2a --- /dev/null +++ b/nand_spl/nand_boot_mx31.c

What in this file is MX31-specific? Even if you don't have other chips to test on, please try to provide a framework for generic NFC support so the next chip only needs to tweak the details. That may be as simple as s/mx31/nfc/.

+static void mx31_wait_ready(void) +{

• while (1) {

• if (readw(NFC_CONFIG2) & NFC_INT) {
  

• 	uint32_t tmp;
  

• 	/* Reset interrupt flag */
  

• 	tmp = readw(NFC_CONFIG2);
  

• 	tmp &= ~NFC_INT;
  

• 	writew(tmp, NFC_CONFIG2);
  

• 	break;
  

• }
  

• }

+}

while (!(readw(NFC_CONFIG2) & NFC_INT)) ;

tmp = readw(NFC_CONFIG2); ...

+static void mx31_nand_page_address(unsigned int page_address) +{

• unsigned int page_count;
• writew(0x00, NFC_FLASH_ADDR);
• writew(NFC_ADDR, NFC_CONFIG2);
• mx31_wait_ready();
• /* code only for 2kb flash */
• if (CFG_NAND_PAGE_SIZE == 0x800) {

• writew(0x00, NFC_FLASH_ADDR);
  

• writew(NFC_ADDR, NFC_CONFIG2);
  

• mx31_wait_ready();
  

• }
• page_count = CFG_NAND_CHIP_SIZE / CFG_NAND_PAGE_SIZE;
• if (page_address <= page_count) {

• page_count--; /* transform 0x01000000 to 0x00ffffff */
  

• do {
  

• 	writew(page_address & 0xff, NFC_FLASH_ADDR);
  

• 	writew(NFC_ADDR, NFC_CONFIG2);
  

• 	mx31_wait_ready();
  

• 	page_address = page_address >> 8;
  

• 	page_count = page_count >> 8;
  

• } while (page_count);
  

• }

Does the number of address bytes really need to depend on the size of the flash chip, or can you base it on the number of non-zero bytes in page_address (the chip will know when the address phase is over because ALE drops)?

+static int mx31_nand_check_ecc(void) +{

• unsigned short ecc_status_register;
• ecc_status_register = readw(NFC_ECC_STATUS_RESULT);
• if (ecc_status_register != 0)

• return 1; /* error */
  

• return 0;

+}

How about just "return readw(NFC_ECC_STATUS_RESULT);"?

+static int mx31_read_page(unsigned int page_address, unsigned char *buf) +{

• int i;
• volatile u32 *p1;
• volatile u32 *p2;
• u32 a;

s/p1/src/ s/p2/dest/

s/a/something (just a little) more descriptive/ -- my first guess was "address", but that doesn't seem right...

No volatile; use I/O accessors.

• writew(0, NFC_BUF_ADDR); /* read in first 0 buffer */
• mx31_nand_command(NAND_CMD_READ0);
• mx31_nand_page_address(page_address);
• if (CFG_NAND_CHIP_SIZE >= 0x08000000)

• mx31_nand_command(NAND_CMD_READSTART);
  

Is it guaranteed that all NAND chips above that size will be large page and all chips below that size will be small page?

• /* it is hardware specific code for 8-bit 512B NAND-flash spare area */
• p1++;
• a = *p1;
• a = (a & 0x0000ff00) >> 8;
• if (a != 0xff) /* bad block marker verify */

• return 1; /* potential bad block */
  

• return 0;

The bad block location is typically different (offset 0 rather than 5) with large page flash.

• /* checking first page of each block */
  

I believe some NAND chips may mark a block bad in its second page...

-Scott