[PULL] u-boot-riscv/master

Hi Tom,
The following changes since commit faac9dee8e0629326dc122f4624fc4897e3f38b0:
Prepare v2023.04-rc2 (2023-02-13 18:39:15 -0500)
are available in the Git repository at:
https://source.denx.de/u-boot/custodians/u-boot-riscv.git
for you to fetch changes up to 7574b6476afc1fd76816be6567458f6ca4f44234:
riscv: binman: Add help message for missing blobs (2023-02-17 19:07:48 +0800)
CI result shows no issue: https://source.denx.de/u-boot/custodians/u-boot-riscv/-/pipelines/15225
----------------------------------------------------------------
- binman: Add help message if opensbi is absent when building u-boot SPL - AndesTech: rename cpu and board name to 'andesv5' and 'ae350' - Clean up cache operation for Andes ae350 platform
---------------------------------------------------------------- Leo Yu-Chi Liang (3): riscv: Remove redundant Kconfig "RISCV_NDS_CACHE" riscv: Rename Andes cpu and board names riscv: ae350: Adjust the memory layout of ae350
Rick Chen (1): riscv: binman: Add help message for missing blobs
Yu Chien Peter Lin (10): riscv: global_data.h: Correct the comment for PLICSW board: AndesTech: ax25-ae350.c: Enable v5l2-cache in spl_board_init() driver: cache: cache-v5l2: Update memory-mapped scheme to support Gen2 platform riscv: cpu: ax25: Simplify cache enabling logic in harts_early_init() riscv: ae350: dts: Update L2 cache compatible string riscv: ax25: cache.c: Cleanups to L1/L2 cache function used in SPL configs: ae350: Enable v5l2 cache for AE350 platforms in SPL configs: ae350: Increase maximum retry count for AE350 platforms configs: ae350: Display CPU and board info for AE350 platforms driver: cache-v5l2: Fix type casting warning on RV32
arch/riscv/Kconfig | 8 ++++---- arch/riscv/cpu/{ax25 => andesv5}/Kconfig | 11 +---------- arch/riscv/cpu/{ax25 => andesv5}/Makefile | 0 arch/riscv/cpu/andesv5/cache.c | 130 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ arch/riscv/cpu/andesv5/cpu.c | 50 ++++++++++++++++++++++++++++++++++++++++++++++++ arch/riscv/cpu/{ax25 => andesv5}/spl.c | 0 arch/riscv/cpu/ax25/cache.c | 172 --------------------------------------------------------------------------------------------------------------------------------------------------------------------- arch/riscv/cpu/ax25/cpu.c | 75 ------------------------------------------------------------------------ arch/riscv/dts/Makefile | 2 +- arch/riscv/dts/ae350_32.dts | 2 +- arch/riscv/dts/ae350_64.dts | 2 +- arch/riscv/dts/binman.dtsi | 1 + arch/riscv/include/asm/arch-andes/csr.h | 31 ++++++++++++++++++++++++++++++ arch/riscv/include/asm/global_data.h | 2 +- board/AndesTech/{ax25-ae350 => ae350}/Kconfig | 8 ++++---- board/AndesTech/{ax25-ae350 => ae350}/MAINTAINERS | 6 +++--- board/AndesTech/{ax25-ae350 => ae350}/Makefile | 2 +- board/AndesTech/{ax25-ae350/ax25-ae350.c => ae350/ae350.c} | 17 +++++++++-------- configs/ae350_rv32_defconfig | 5 ++++- configs/ae350_rv32_spl_defconfig | 13 +++++++++---- configs/ae350_rv32_spl_xip_defconfig | 13 +++++++++---- configs/ae350_rv32_xip_defconfig | 5 ++++- configs/ae350_rv64_defconfig | 5 ++++- configs/ae350_rv64_spl_defconfig | 13 +++++++++---- configs/ae350_rv64_spl_xip_defconfig | 13 +++++++++---- configs/ae350_rv64_xip_defconfig | 5 ++++- doc/board/AndesTech/{ax25-ae350.rst => ae350.rst} | 16 ++++++++-------- doc/board/AndesTech/index.rst | 2 +- drivers/cache/Kconfig | 1 - drivers/cache/cache-v5l2.c | 36 +++++++++++++++++++++++++---------- include/configs/{ax25-ae350.h => ae350.h} | 0 tools/binman/missing-blob-help | 6 ++++++ 32 files changed, 331 insertions(+), 321 deletions(-) rename arch/riscv/cpu/{ax25 => andesv5}/Kconfig (66%) rename arch/riscv/cpu/{ax25 => andesv5}/Makefile (100%) create mode 100644 arch/riscv/cpu/andesv5/cache.c create mode 100644 arch/riscv/cpu/andesv5/cpu.c rename arch/riscv/cpu/{ax25 => andesv5}/spl.c (100%) delete mode 100644 arch/riscv/cpu/ax25/cache.c delete mode 100644 arch/riscv/cpu/ax25/cpu.c create mode 100644 arch/riscv/include/asm/arch-andes/csr.h rename board/AndesTech/{ax25-ae350 => ae350}/Kconfig (88%) rename board/AndesTech/{ax25-ae350 => ae350}/MAINTAINERS (80%) rename board/AndesTech/{ax25-ae350 => ae350}/Makefile (87%) rename board/AndesTech/{ax25-ae350/ax25-ae350.c => ae350/ae350.c} (95%) rename doc/board/AndesTech/{ax25-ae350.rst => ae350.rst} (98%) rename include/configs/{ax25-ae350.h => ae350.h} (100%)
Best regards, Leo

On Fri, Feb 17, 2023 at 12:12:18PM +0000, Leo Liang wrote:
Hi Tom,
The following changes since commit faac9dee8e0629326dc122f4624fc4897e3f38b0:
Prepare v2023.04-rc2 (2023-02-13 18:39:15 -0500)
are available in the Git repository at:
https://source.denx.de/u-boot/custodians/u-boot-riscv.git
for you to fetch changes up to 7574b6476afc1fd76816be6567458f6ca4f44234:
riscv: binman: Add help message for missing blobs (2023-02-17 19:07:48 +0800)
CI result shows no issue: https://source.denx.de/u-boot/custodians/u-boot-riscv/-/pipelines/15225
I've taken this to u-boot/master, but for the rest of the cycle please make sure any changes for master are clearly bug fixes, and otherwise apply to next instead. Thanks!

On Fri, Feb 17, 2023 at 10:01:54AM -0500, Tom Rini wrote:
On Fri, Feb 17, 2023 at 12:12:18PM +0000, Leo Liang wrote:
Hi Tom,
The following changes since commit faac9dee8e0629326dc122f4624fc4897e3f38b0:
Prepare v2023.04-rc2 (2023-02-13 18:39:15 -0500)
are available in the Git repository at:
https://source.denx.de/u-boot/custodians/u-boot-riscv.git
for you to fetch changes up to 7574b6476afc1fd76816be6567458f6ca4f44234:
riscv: binman: Add help message for missing blobs (2023-02-17 19:07:48 +0800)
CI result shows no issue: https://source.denx.de/u-boot/custodians/u-boot-riscv/-/pipelines/15225
I've taken this to u-boot/master, but for the rest of the cycle please make sure any changes for master are clearly bug fixes, and otherwise apply to next instead. Thanks!
Hi Tom,
Understood! Thanks for merging this!
Best regards, Leo
-- Tom
participants (2)
-
Leo Liang
-
Tom Rini