[PATCH v3 0/3] imx8m: introduce high speed mode support in usdhc
This patch series is targeted to address issues that can be observed with various sd cards connected to i.MX8M derivatives.
Current configuration of usdhc dts nodes for imx8m SOC derivatives does experience issues with recognition and mode switch for various sd card types from different manufacturers, sometimes leading to an abrupted boot process, either during attempt to load kernel image from attached media or failure to recognize the sd card when switch to higher speed mode is performed.
Modifications in patches introduced are aimed to resolve those issue by introducing a short delay when mode switch in attempted, and enabling high speed mode quirks for all imx8m derivatives.
-- Changes in v3: - Fix binding names, which had incorrect 'u-boot,' prefix used. - Introduce additional patch to turn on config options required to enable the support for high speed modes in eSDHC driver components.
Andrey Zhizhikin (3): ARM: dts: imx8m: increase off-on delay on the SD Vcc regulator ARM: dts: imx8m: add UHS or HS400/HS400ES properties configs: imx8m: enable eMMC HS400ES and SD UHS mode on EVK
arch/arm/dts/fsl-imx8qm-mek-u-boot.dtsi | 3 +++ arch/arm/dts/fsl-imx8qxp-mek-u-boot.dtsi | 3 +++ arch/arm/dts/imx8mm-beacon-kit-u-boot.dtsi | 4 ++++ arch/arm/dts/imx8mm-evk-u-boot.dtsi | 8 ++++++++ arch/arm/dts/imx8mn-ddr4-evk-u-boot.dtsi | 8 ++++++++ arch/arm/dts/imx8mp-evk-u-boot.dtsi | 8 ++++++++ arch/arm/dts/imx8mq-evk-u-boot.dtsi | 14 ++++++++++++++ arch/arm/dts/imx8mq-phanbell-u-boot.dtsi | 5 +++++ configs/imx8mm_evk_defconfig | 4 ++++ configs/imx8mn_ddr4_evk_defconfig | 4 ++++ configs/imx8mp_evk_defconfig | 3 +++ 11 files changed, 64 insertions(+) create mode 100644 arch/arm/dts/imx8mq-evk-u-boot.dtsi create mode 100644 arch/arm/dts/imx8mq-phanbell-u-boot.dtsi
base-commit: ee1e04558ff8c8ed812b986939447f129bb0b0bb
Some SD Card controller and power circuitry has increased capacitance, which keeps the internal logic remains powered after regulator is switch off. This is generally the case when card is switched to SD104 mode, where a power cycle should be performed. In case if the card internal logic remains powered, it causes a subsequent failure of mode transition, effectively leading to failed enumeration.
Introduce a delay of 20 msec in order to provide a possibility for internal card circuitry to drain voltages and perform a power cycle correctly.
Similar fix is done in commit c49d0ac38a76 ("ARM: dts: rmobile: Increase off-on delay on the SD Vcc regulator") targeted Renesas SOCs.
Signed-off-by: Andrey Zhizhikin andrey.zhizhikin@leica-geosystems.com Cc: Stefano Babic sbabic@denx.de --- Changes in v3: - No changes since v2
Changes in v2: - Moved u-boot binding for imx8mq-evk to separate autoincluded dtsi files
arch/arm/dts/imx8mm-beacon-kit-u-boot.dtsi | 4 ++++ arch/arm/dts/imx8mm-evk-u-boot.dtsi | 4 ++++ arch/arm/dts/imx8mn-ddr4-evk-u-boot.dtsi | 4 ++++ arch/arm/dts/imx8mp-evk-u-boot.dtsi | 4 ++++ arch/arm/dts/imx8mq-evk-u-boot.dtsi | 5 +++++ arch/arm/dts/imx8mq-phanbell-u-boot.dtsi | 5 +++++ 6 files changed, 26 insertions(+) create mode 100644 arch/arm/dts/imx8mq-evk-u-boot.dtsi create mode 100644 arch/arm/dts/imx8mq-phanbell-u-boot.dtsi
diff --git a/arch/arm/dts/imx8mm-beacon-kit-u-boot.dtsi b/arch/arm/dts/imx8mm-beacon-kit-u-boot.dtsi index fc1aebb2fe..6d80a529ae 100644 --- a/arch/arm/dts/imx8mm-beacon-kit-u-boot.dtsi +++ b/arch/arm/dts/imx8mm-beacon-kit-u-boot.dtsi @@ -37,6 +37,10 @@ /delete-property/ assigned-clock-rates; };
+®_usdhc2_vmmc { + u-boot,off-on-delay-us = <20000>; +}; + &fec1 { phy-reset-gpios = <&gpio4 22 GPIO_ACTIVE_LOW>; }; diff --git a/arch/arm/dts/imx8mm-evk-u-boot.dtsi b/arch/arm/dts/imx8mm-evk-u-boot.dtsi index b5c12105a9..9f77d3c6ff 100644 --- a/arch/arm/dts/imx8mm-evk-u-boot.dtsi +++ b/arch/arm/dts/imx8mm-evk-u-boot.dtsi @@ -46,6 +46,10 @@ u-boot,dm-spl; };
+®_usdhc2_vmmc { + u-boot,off-on-delay-us = <20000>; +}; + &pinctrl_reg_usdhc2_vmmc { u-boot,dm-spl; }; diff --git a/arch/arm/dts/imx8mn-ddr4-evk-u-boot.dtsi b/arch/arm/dts/imx8mn-ddr4-evk-u-boot.dtsi index 4419679d4c..98b0b9891b 100644 --- a/arch/arm/dts/imx8mn-ddr4-evk-u-boot.dtsi +++ b/arch/arm/dts/imx8mn-ddr4-evk-u-boot.dtsi @@ -47,6 +47,10 @@ u-boot,dm-spl; };
+®_usdhc2_vmmc { + u-boot,off-on-delay-us = <20000>; +}; + &pinctrl_uart2 { u-boot,dm-spl; }; diff --git a/arch/arm/dts/imx8mp-evk-u-boot.dtsi b/arch/arm/dts/imx8mp-evk-u-boot.dtsi index 24a93ac2d6..2452e9175c 100644 --- a/arch/arm/dts/imx8mp-evk-u-boot.dtsi +++ b/arch/arm/dts/imx8mp-evk-u-boot.dtsi @@ -48,6 +48,10 @@ u-boot,dm-spl; };
+®_usdhc2_vmmc { + u-boot,off-on-delay-us = <20000>; +}; + ®_usdhc2_vmmc { u-boot,dm-spl; }; diff --git a/arch/arm/dts/imx8mq-evk-u-boot.dtsi b/arch/arm/dts/imx8mq-evk-u-boot.dtsi new file mode 100644 index 0000000000..4712cf6a44 --- /dev/null +++ b/arch/arm/dts/imx8mq-evk-u-boot.dtsi @@ -0,0 +1,5 @@ +// SPDX-License-Identifier: (GPL-2.0 OR MIT) + +®_usdhc2_vmmc { + u-boot,off-on-delay-us = <20000>; +}; diff --git a/arch/arm/dts/imx8mq-phanbell-u-boot.dtsi b/arch/arm/dts/imx8mq-phanbell-u-boot.dtsi new file mode 100644 index 0000000000..4712cf6a44 --- /dev/null +++ b/arch/arm/dts/imx8mq-phanbell-u-boot.dtsi @@ -0,0 +1,5 @@ +// SPDX-License-Identifier: (GPL-2.0 OR MIT) + +®_usdhc2_vmmc { + u-boot,off-on-delay-us = <20000>; +};
Some SD Card controller and power circuitry has increased capacitance, which keeps the internal logic remains powered after regulator is switch off. This is generally the case when card is switched to SD104 mode, where a power cycle should be performed. In case if the card internal logic remains powered, it causes a subsequent failure of mode transition, effectively leading to failed enumeration. Introduce a delay of 20 msec in order to provide a possibility for internal card circuitry to drain voltages and perform a power cycle correctly. Similar fix is done in commit c49d0ac38a76 ("ARM: dts: rmobile: Increase off-on delay on the SD Vcc regulator") targeted Renesas SOCs. Signed-off-by: Andrey Zhizhikin andrey.zhizhikin@leica-geosystems.com Cc: Stefano Babic sbabic@denx.de
Applied to u-boot-imx, master, thanks !
Best regards, Stefano Babic
i.MX8M series provide support for high speed grades in their usdhc controllers, which has eMMC and SDHC connected to them.
Enable this support across the entire i.MX8M family by providing quirks to usdhc controllers designated by storage media connected to them.
Signed-off-by: Andrey Zhizhikin andrey.zhizhikin@leica-geosystems.com Cc: Stefano Babic sbabic@denx.de Cc: Ye Li ye.li@nxp.com --- Changes in v3: - Fix binding names, which had incorrect 'u-boot,' prefix used
Changes in v2: - Moved u-boot binding for imx8mq-evk and imx8mq-phanbell to separate autoincluded dtsi files
arch/arm/dts/fsl-imx8qm-mek-u-boot.dtsi | 3 +++ arch/arm/dts/fsl-imx8qxp-mek-u-boot.dtsi | 3 +++ arch/arm/dts/imx8mm-evk-u-boot.dtsi | 4 ++++ arch/arm/dts/imx8mn-ddr4-evk-u-boot.dtsi | 4 ++++ arch/arm/dts/imx8mp-evk-u-boot.dtsi | 4 ++++ arch/arm/dts/imx8mq-evk-u-boot.dtsi | 9 +++++++++ 6 files changed, 27 insertions(+)
diff --git a/arch/arm/dts/fsl-imx8qm-mek-u-boot.dtsi b/arch/arm/dts/fsl-imx8qm-mek-u-boot.dtsi index 80d6475b7c..9e0d264b71 100644 --- a/arch/arm/dts/fsl-imx8qm-mek-u-boot.dtsi +++ b/arch/arm/dts/fsl-imx8qm-mek-u-boot.dtsi @@ -118,8 +118,11 @@
&usdhc1 { u-boot,dm-spl; + mmc-hs400-1_8v; };
&usdhc2 { u-boot,dm-spl; + sd-uhs-sdr104; + sd-uhs-ddr50; }; diff --git a/arch/arm/dts/fsl-imx8qxp-mek-u-boot.dtsi b/arch/arm/dts/fsl-imx8qxp-mek-u-boot.dtsi index 771ab635f1..701af4434d 100644 --- a/arch/arm/dts/fsl-imx8qxp-mek-u-boot.dtsi +++ b/arch/arm/dts/fsl-imx8qxp-mek-u-boot.dtsi @@ -118,8 +118,11 @@
&usdhc1 { u-boot,dm-spl; + mmc-hs400-1_8v; };
&usdhc2 { u-boot,dm-spl; + sd-uhs-sdr104; + sd-uhs-ddr50; }; diff --git a/arch/arm/dts/imx8mm-evk-u-boot.dtsi b/arch/arm/dts/imx8mm-evk-u-boot.dtsi index 9f77d3c6ff..e843a5648e 100644 --- a/arch/arm/dts/imx8mm-evk-u-boot.dtsi +++ b/arch/arm/dts/imx8mm-evk-u-boot.dtsi @@ -100,10 +100,14 @@
&usdhc2 { u-boot,dm-spl; + sd-uhs-sdr104; + sd-uhs-ddr50; };
&usdhc3 { u-boot,dm-spl; + mmc-hs400-1_8v; + mmc-hs400-enhanced-strobe; };
&i2c1 { diff --git a/arch/arm/dts/imx8mn-ddr4-evk-u-boot.dtsi b/arch/arm/dts/imx8mn-ddr4-evk-u-boot.dtsi index 98b0b9891b..025090fff4 100644 --- a/arch/arm/dts/imx8mn-ddr4-evk-u-boot.dtsi +++ b/arch/arm/dts/imx8mn-ddr4-evk-u-boot.dtsi @@ -97,10 +97,14 @@
&usdhc2 { u-boot,dm-spl; + sd-uhs-sdr104; + sd-uhs-ddr50; };
&usdhc3 { u-boot,dm-spl; + mmc-hs400-1_8v; + mmc-hs400-enhanced-strobe; };
&wdog1 { diff --git a/arch/arm/dts/imx8mp-evk-u-boot.dtsi b/arch/arm/dts/imx8mp-evk-u-boot.dtsi index 2452e9175c..4f00b5a3a9 100644 --- a/arch/arm/dts/imx8mp-evk-u-boot.dtsi +++ b/arch/arm/dts/imx8mp-evk-u-boot.dtsi @@ -126,10 +126,14 @@
&usdhc2 { u-boot,dm-spl; + sd-uhs-sdr104; + sd-uhs-ddr50; };
&usdhc3 { u-boot,dm-spl; + mmc-hs400-1_8v; + mmc-hs400-enhanced-strobe; };
&wdog1 { diff --git a/arch/arm/dts/imx8mq-evk-u-boot.dtsi b/arch/arm/dts/imx8mq-evk-u-boot.dtsi index 4712cf6a44..44af663727 100644 --- a/arch/arm/dts/imx8mq-evk-u-boot.dtsi +++ b/arch/arm/dts/imx8mq-evk-u-boot.dtsi @@ -3,3 +3,12 @@ ®_usdhc2_vmmc { u-boot,off-on-delay-us = <20000>; }; + +&usdhc1 { + mmc-hs400-1_8v; +}; + +&usdhc2 { + sd-uhs-sdr104; + sd-uhs-ddr50; +};
i.MX8M series provide support for high speed grades in their usdhc controllers, which has eMMC and SDHC connected to them. Enable this support across the entire i.MX8M family by providing quirks to usdhc controllers designated by storage media connected to them. Signed-off-by: Andrey Zhizhikin andrey.zhizhikin@leica-geosystems.com Cc: Stefano Babic sbabic@denx.de Cc: Ye Li ye.li@nxp.com
Applied to u-boot-imx, master, thanks !
Best regards, Stefano Babic
i.MX8M series includes support for high speed modes in uSDHC controllers. Turn on corresponding configuration options for EVK boards, which would enable high speed modes to be included in U-Boot.
Signed-off-by: Andrey Zhizhikin andrey.zhizhikin@leica-geosystems.com --- configs/imx8mm_evk_defconfig | 4 ++++ configs/imx8mn_ddr4_evk_defconfig | 4 ++++ configs/imx8mp_evk_defconfig | 3 +++ 3 files changed, 11 insertions(+)
diff --git a/configs/imx8mm_evk_defconfig b/configs/imx8mm_evk_defconfig index 91d3bc3ac9..1aef1ab40d 100644 --- a/configs/imx8mm_evk_defconfig +++ b/configs/imx8mm_evk_defconfig @@ -66,6 +66,10 @@ CONFIG_DM_I2C=y CONFIG_SYS_I2C_MXC=y CONFIG_DM_MMC=y CONFIG_SUPPORT_EMMC_BOOT=y +CONFIG_MMC_IO_VOLTAGE=y +CONFIG_MMC_UHS_SUPPORT=y +CONFIG_MMC_HS400_ES_SUPPORT=y +CONFIG_MMC_HS400_SUPPORT=y CONFIG_FSL_ESDHC_IMX=y CONFIG_PHYLIB=y CONFIG_PHY_ATHEROS=y diff --git a/configs/imx8mn_ddr4_evk_defconfig b/configs/imx8mn_ddr4_evk_defconfig index 22e5f5aeea..41889c4624 100644 --- a/configs/imx8mn_ddr4_evk_defconfig +++ b/configs/imx8mn_ddr4_evk_defconfig @@ -65,6 +65,10 @@ CONFIG_DM_I2C=y CONFIG_SYS_I2C_MXC=y CONFIG_DM_MMC=y CONFIG_SUPPORT_EMMC_BOOT=y +CONFIG_MMC_IO_VOLTAGE=y +CONFIG_MMC_UHS_SUPPORT=y +CONFIG_MMC_HS400_ES_SUPPORT=y +CONFIG_MMC_HS400_SUPPORT=y CONFIG_FSL_ESDHC_IMX=y CONFIG_PHYLIB=y CONFIG_DM_ETH=y diff --git a/configs/imx8mp_evk_defconfig b/configs/imx8mp_evk_defconfig index cd5724e811..f84696f030 100644 --- a/configs/imx8mp_evk_defconfig +++ b/configs/imx8mp_evk_defconfig @@ -70,6 +70,9 @@ CONFIG_LED_GPIO=y CONFIG_DM_MMC=y CONFIG_SUPPORT_EMMC_BOOT=y CONFIG_MMC_IO_VOLTAGE=y +CONFIG_MMC_UHS_SUPPORT=y +CONFIG_MMC_HS400_ES_SUPPORT=y +CONFIG_MMC_HS400_SUPPORT=y CONFIG_FSL_ESDHC_IMX=y CONFIG_PHYLIB=y CONFIG_DM_ETH=y
i.MX8M series includes support for high speed modes in uSDHC controllers. Turn on corresponding configuration options for EVK boards, which would enable high speed modes to be included in U-Boot. Signed-off-by: Andrey Zhizhikin andrey.zhizhikin@leica-geosystems.com
Applied to u-boot-imx, master, thanks !
Best regards, Stefano Babic
participants (2)
-
Andrey Zhizhikin -
sbabic＠denx.de