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Content preview: Clean the iomux definitions at grf_rk322x.h, and move them into pinctrl-driver for resolving the compiling error of redefinition. After that, define the uart2 iomux at rk322x-board file. Signed-off-by: David Wu david.wu@rock-chips.com --- [...]

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0.6 RCVD_IN_SORBS_WEB RBL: SORBS: sender is an abusable web server [58.22.7.114 listed in dnsbl.sorbs.net] 2.7 RCVD_IN_PSBL RBL: Received via a relay in PSBL [211.157.147.133 listed in psbl.surriel.com] 2.4 RCVD_IN_MSPIKE_L5 RBL: Very bad reputation (-5) [211.157.147.133 listed in bl.mailspike.net] 0.8 UPPERCASE_50_75 message body is 50-75% uppercase 0.0 RCVD_IN_MSPIKE_BL Mailspike blacklisted Clean the iomux definitions at grf_rk322x.h, and move them into pinctrl-driver for resolving the compiling error of redefinition. After that, define the uart2 iomux at rk322x-board file.

Signed-off-by: David Wu david.wu@rock-chips.com

Changes in v2:

• New patch

arch/arm/include/asm/arch-rockchip/grf_rk322x.h | 455 ------------------------ arch/arm/mach-rockchip/rk322x-board-spl.c | 20 +- arch/arm/mach-rockchip/rk322x-board.c | 16 + drivers/pinctrl/rockchip/pinctrl_rk322x.c | 453 +++++++++++++++++++++++ 4 files changed, 488 insertions(+), 456 deletions(-)

Acked-by: Philipp Tomsich philipp.tomsich@theobroma-systems.com

Hi David,

Am Donnerstag, 9. November 2017, 17:24:58 CET schrieb David Wu:

diff --git a/arch/arm/mach-rockchip/rk322x-board-spl.c b/arch/arm/mach-rockchip/rk322x-board-spl.c index 35f4f97..f7c6045 100644 --- a/arch/arm/mach-rockchip/rk322x-board-spl.c +++ b/arch/arm/mach-rockchip/rk322x-board-spl.c @@ -30,7 +30,25 @@ DECLARE_GLOBAL_DATA_PTR;

void board_debug_uart_init(void) { -static struct rk322x_grf * const grf = (void *)GRF_BASE;

•   static struct rk322x_grf * const grf = (void *)GRF_BASE;
  

•   enum {
  

•           GPIO1B2_SHIFT           = 4,
  

•           GPIO1B2_MASK            = 3 << GPIO1B2_SHIFT,
  

•           GPIO1B2_UART1_SIN,
  

•           GPIO1B2_UART21_SIN,
  

•           GPIO1B1_SHIFT           = 2,
  

•           GPIO1B1_MASK            = 3 << GPIO1B1_SHIFT,
  

•           GPIO1B1_UART1_SOUT,
  

•           GPIO1B1_UART21_SOUT,
  

You seem to drop the GPIO1B1_GPIO = 0, line, so the enum counting wil get jumbled, because GPIO1B1_UART1_SOUT for example will get to be 4 instead of the 1 it needs to be.

This may be true for the other patches for the other socs as well, so you may want to double check?

Heiko