[U-Boot] Patch dependency
The below patches depend on the series patches(http://patchwork.ozlabs.org/patch/567250/).
[PATCH v3 1/3] armv8/ls1043aqds: Select lpuart pins of various muxes [PATCH v3 2/3] armv8/ls1043aqds: Spilt off board device tree [PATCH v3 3/3] armv8/ls1043aqds: Add lpuart support
From: Shaohui Xie Shaohui.Xie@freescale.com
Set Board Configuration Register to select the lpuart pins of various muxes.
Signed-off-by: Shaohui Xie Shaohui.Xie@freescale.com Signed-off-by: Mingkai Hu Mingkai.Hu@freescale.com --- board/freescale/ls1043aqds/ls1043aqds.c | 15 +++++++++++++++ 1 file changed, 15 insertions(+)
diff --git a/board/freescale/ls1043aqds/ls1043aqds.c b/board/freescale/ls1043aqds/ls1043aqds.c index d6696ca..67f4c4b 100644 --- a/board/freescale/ls1043aqds/ls1043aqds.c +++ b/board/freescale/ls1043aqds/ls1043aqds.c @@ -40,6 +40,9 @@ enum { #define CFG_SD_MUX3_MUX4 0x1 /* MUX4 */ #define CFG_SD_MUX4_SLOT3 0x0 /* SLOT3 TX/RX1 */ #define CFG_SD_MUX4_SLOT1 0x1 /* SLOT1 TX/RX3 */ +#define CFG_UART_MUX_MASK 0x6 +#define CFG_UART_MUX_SHIFT 1 +#define CFG_LPUART_EN 0x1
int checkboard(void) { @@ -218,7 +221,19 @@ void board_retimer_init(void)
int board_early_init_f(void) { +#ifdef CONFIG_LPUART + u8 uart; +#endif fsl_lsch2_early_init_f(); +#ifdef CONFIG_LPUART + + /* We use lpuart1 as system console. */ + + uart = QIXIS_READ(brdcfg[14]); + uart &= ~CFG_UART_MUX_MASK; + uart |= CFG_LPUART_EN << CFG_UART_MUX_SHIFT; + QIXIS_WRITE(brdcfg[14], uart); +#endif
return 0; }
Hi Wenbin,
On Thu, Jan 21, 2016 at 2:32 PM, Wenbin Song wenbin.song@nxp.com wrote:
From: Shaohui Xie Shaohui.Xie@freescale.com
Set Board Configuration Register to select the lpuart pins of various muxes.
Signed-off-by: Shaohui Xie Shaohui.Xie@freescale.com Signed-off-by: Mingkai Hu Mingkai.Hu@freescale.com
Please always include a changelog when you do new version so that other people know what's changed.
board/freescale/ls1043aqds/ls1043aqds.c | 15 +++++++++++++++ 1 file changed, 15 insertions(+)
diff --git a/board/freescale/ls1043aqds/ls1043aqds.c b/board/freescale/ls1043aqds/ls1043aqds.c index d6696ca..67f4c4b 100644 --- a/board/freescale/ls1043aqds/ls1043aqds.c +++ b/board/freescale/ls1043aqds/ls1043aqds.c @@ -40,6 +40,9 @@ enum { #define CFG_SD_MUX3_MUX4 0x1 /* MUX4 */ #define CFG_SD_MUX4_SLOT3 0x0 /* SLOT3 TX/RX1 */ #define CFG_SD_MUX4_SLOT1 0x1 /* SLOT1 TX/RX3 */ +#define CFG_UART_MUX_MASK 0x6 +#define CFG_UART_MUX_SHIFT 1 +#define CFG_LPUART_EN 0x1
int checkboard(void) { @@ -218,7 +221,19 @@ void board_retimer_init(void)
int board_early_init_f(void) { +#ifdef CONFIG_LPUART
u8 uart;+#endif fsl_lsch2_early_init_f(); +#ifdef CONFIG_LPUART
nits: this blank line is not needed
/* We use lpuart1 as system console. */
nits: ending period is not needed
uart = QIXIS_READ(brdcfg[14]);uart &= ~CFG_UART_MUX_MASK;uart |= CFG_LPUART_EN << CFG_UART_MUX_SHIFT;QIXIS_WRITE(brdcfg[14], uart);+#endif
return 0;}
Other than that, Reviewed-by: Bin Meng bmeng.cn@gmail.com
Regards, Bin
Hi Wenbin,
On Thu, Jan 21, 2016 at 4:35 PM, Bin Meng bmeng.cn@gmail.com wrote:
Hi Wenbin,
On Thu, Jan 21, 2016 at 2:32 PM, Wenbin Song wenbin.song@nxp.com wrote:
From: Shaohui Xie Shaohui.Xie@freescale.com
Set Board Configuration Register to select the lpuart pins of various muxes.
Signed-off-by: Shaohui Xie Shaohui.Xie@freescale.com Signed-off-by: Mingkai Hu Mingkai.Hu@freescale.com
Please always include a changelog when you do new version so that other people know what's changed.
board/freescale/ls1043aqds/ls1043aqds.c | 15 +++++++++++++++ 1 file changed, 15 insertions(+)
diff --git a/board/freescale/ls1043aqds/ls1043aqds.c b/board/freescale/ls1043aqds/ls1043aqds.c index d6696ca..67f4c4b 100644 --- a/board/freescale/ls1043aqds/ls1043aqds.c +++ b/board/freescale/ls1043aqds/ls1043aqds.c @@ -40,6 +40,9 @@ enum { #define CFG_SD_MUX3_MUX4 0x1 /* MUX4 */ #define CFG_SD_MUX4_SLOT3 0x0 /* SLOT3 TX/RX1 */ #define CFG_SD_MUX4_SLOT1 0x1 /* SLOT1 TX/RX3 */ +#define CFG_UART_MUX_MASK 0x6 +#define CFG_UART_MUX_SHIFT 1 +#define CFG_LPUART_EN 0x1
int checkboard(void) { @@ -218,7 +221,19 @@ void board_retimer_init(void)
int board_early_init_f(void) { +#ifdef CONFIG_LPUART
u8 uart;+#endif fsl_lsch2_early_init_f(); +#ifdef CONFIG_LPUART
nits: this blank line is not needed
/* We use lpuart1 as system console. */
One more question: in your patch 3, you listed lpuart0 as the /chosen node, but here the comments says lpuart1. Which one is correct?
nits: ending period is not needed
uart = QIXIS_READ(brdcfg[14]);uart &= ~CFG_UART_MUX_MASK;uart |= CFG_LPUART_EN << CFG_UART_MUX_SHIFT;QIXIS_WRITE(brdcfg[14], uart);+#endif
return 0;}
Other than that, Reviewed-by: Bin Meng bmeng.cn@gmail.com
Regards, Bin
Move new /chosen node out of the board device tree.
Signed-off-by: Wenbin Song wenbin.song@nxp.com --- arch/arm/dts/Makefile | 2 +- arch/arm/dts/fsl-ls1043a-qds-duart.dts | 16 ++++++++++++++++ .../dts/{fsl-ls1043a-qds.dts => fsl-ls1043a-qds.dtsi} | 1 - configs/ls1043aqds_defconfig | 2 +- 4 files changed, 18 insertions(+), 3 deletions(-) create mode 100644 arch/arm/dts/fsl-ls1043a-qds-duart.dts rename arch/arm/dts/{fsl-ls1043a-qds.dts => fsl-ls1043a-qds.dtsi} (99%)
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index 7706b41..302456c 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -96,7 +96,7 @@ dtb-$(CONFIG_LS102XA) += ls1021a-qds.dtb \ ls1021a-twr-duart.dtb ls1021a-twr-lpuart.dtb dtb-$(CONFIG_FSL_LSCH3) += fsl-ls2080a-qds.dtb \ fsl-ls2080a-rdb.dtb -dtb-$(CONFIG_FSL_LSCH2) += fsl-ls1043a-qds.dtb \ +dtb-$(CONFIG_FSL_LSCH2) += fsl-ls1043a-qds-duart.dtb \ fsl-ls1043a-rdb.dtb
dtb-$(CONFIG_MACH_SUN4I) += \ diff --git a/arch/arm/dts/fsl-ls1043a-qds-duart.dts b/arch/arm/dts/fsl-ls1043a-qds-duart.dts new file mode 100644 index 0000000..2124e38 --- /dev/null +++ b/arch/arm/dts/fsl-ls1043a-qds-duart.dts @@ -0,0 +1,16 @@ +/* + * Device Tree file for Freescale Layerscape-1043A family SoC. + * + * Copyright (C) 2015, Freescale Semiconductor + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +/dts-v1/; +#include "fsl-ls1043a-qds.dtsi" + +/ { + chosen { + stdout-path = &duart0; + }; +}; diff --git a/arch/arm/dts/fsl-ls1043a-qds.dts b/arch/arm/dts/fsl-ls1043a-qds.dtsi similarity index 99% rename from arch/arm/dts/fsl-ls1043a-qds.dts rename to arch/arm/dts/fsl-ls1043a-qds.dtsi index 7435222..6fa16b8 100644 --- a/arch/arm/dts/fsl-ls1043a-qds.dts +++ b/arch/arm/dts/fsl-ls1043a-qds.dtsi @@ -10,7 +10,6 @@ * warranty of any kind, whether express or implied. */
-/dts-v1/; /include/ "fsl-ls1043a.dtsi"
/ { diff --git a/configs/ls1043aqds_defconfig b/configs/ls1043aqds_defconfig index 60fb0ad..1fd530d 100644 --- a/configs/ls1043aqds_defconfig +++ b/configs/ls1043aqds_defconfig @@ -2,5 +2,5 @@ CONFIG_SYS_EXTRA_OPTIONS="SYS_FSL_DDR4" CONFIG_ARM=y CONFIG_TARGET_LS1043AQDS=y CONFIG_SYS_NS16550=y -CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-qds" +CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-qds-duart" CONFIG_OF_CONTROL=y
On Thu, Jan 21, 2016 at 2:32 PM, Wenbin Song wenbin.song@nxp.com wrote:
Move new /chosen node out of the board device tree.
Signed-off-by: Wenbin Song wenbin.song@nxp.com
arch/arm/dts/Makefile | 2 +- arch/arm/dts/fsl-ls1043a-qds-duart.dts | 16 ++++++++++++++++ .../dts/{fsl-ls1043a-qds.dts => fsl-ls1043a-qds.dtsi} | 1 - configs/ls1043aqds_defconfig | 2 +- 4 files changed, 18 insertions(+), 3 deletions(-) create mode 100644 arch/arm/dts/fsl-ls1043a-qds-duart.dts rename arch/arm/dts/{fsl-ls1043a-qds.dts => fsl-ls1043a-qds.dtsi} (99%)
Reviewed-by: Bin Meng bmeng.cn@gmail.com
Add lpuart support using the driver model.
Signed-off-by: Wenbin Song wenbin.song@nxp.com --- arch/arm/dts/Makefile | 1 + arch/arm/dts/fsl-ls1043a-qds-lpuart.dts | 16 ++++++++++ arch/arm/dts/fsl-ls1043a-qds.dtsi | 4 +++ arch/arm/dts/fsl-ls1043a.dtsi | 54 +++++++++++++++++++++++++++++++++ configs/ls1043aqds_lpuart_defconfig | 10 ++++++ include/configs/ls1043aqds.h | 7 +++++ 6 files changed, 92 insertions(+) create mode 100644 arch/arm/dts/fsl-ls1043a-qds-lpuart.dts create mode 100644 configs/ls1043aqds_lpuart_defconfig
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index 302456c..a51275c 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -97,6 +97,7 @@ dtb-$(CONFIG_LS102XA) += ls1021a-qds.dtb \ dtb-$(CONFIG_FSL_LSCH3) += fsl-ls2080a-qds.dtb \ fsl-ls2080a-rdb.dtb dtb-$(CONFIG_FSL_LSCH2) += fsl-ls1043a-qds-duart.dtb \ + fsl-ls1043a-qds-lpuart.dtb \ fsl-ls1043a-rdb.dtb
dtb-$(CONFIG_MACH_SUN4I) += \ diff --git a/arch/arm/dts/fsl-ls1043a-qds-lpuart.dts b/arch/arm/dts/fsl-ls1043a-qds-lpuart.dts new file mode 100644 index 0000000..18adb97 --- /dev/null +++ b/arch/arm/dts/fsl-ls1043a-qds-lpuart.dts @@ -0,0 +1,16 @@ +/* + * Device Tree file for Freescale Layerscape-1043A family SoC. + * + * Copyright (C) 2015, Freescale Semiconductor + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +/dts-v1/; +#include "fsl-ls1043a-qds.dtsi" + +/ { + chosen { + stdout-path = &lpuart0; + }; +}; diff --git a/arch/arm/dts/fsl-ls1043a-qds.dtsi b/arch/arm/dts/fsl-ls1043a-qds.dtsi index 6fa16b8..b9dad72 100644 --- a/arch/arm/dts/fsl-ls1043a-qds.dtsi +++ b/arch/arm/dts/fsl-ls1043a-qds.dtsi @@ -121,3 +121,7 @@ &duart1 { status = "okay"; }; + +&lpuart0 { + status = "okay"; +}; diff --git a/arch/arm/dts/fsl-ls1043a.dtsi b/arch/arm/dts/fsl-ls1043a.dtsi index 85ea81e..12ea0ab 100644 --- a/arch/arm/dts/fsl-ls1043a.dtsi +++ b/arch/arm/dts/fsl-ls1043a.dtsi @@ -182,5 +182,59 @@ interrupts = <0 55 0x4>; clocks = <&clockgen 4 0>; }; + + lpuart0: serial@2950000 { + compatible = "fsl,ls1021a-lpuart"; + reg = <0x0 0x2950000 0x0 0x1000>; + interrupts = <0 48 0x4>; + clocks = <&sysclk>; + clock-names = "ipg"; + status = "disabled"; + }; + + lpuart1: serial@2960000 { + compatible = "fsl,ls1021a-lpuart"; + reg = <0x0 0x2960000 0x0 0x1000>; + interrupts = <0 49 0x4>; + clocks = <&sysclk>; + clock-names = "ipg"; + status = "disabled"; + }; + + lpuart2: serial@2970000 { + compatible = "fsl,ls1021a-lpuart"; + reg = <0x0 0x2970000 0x0 0x1000>; + interrupts = <0 50 0x4>; + clock-names = "ipg"; + clocks = <&sysclk>; + status = "disabled"; + }; + + lpuart3: serial@2980000 { + compatible = "fsl,ls1021a-lpuart"; + reg = <0x0 0x2980000 0x0 0x1000>; + interrupts = <0 51 0x4>; + clocks = <&sysclk>; + clock-names = "ipg"; + status = "disabled"; + }; + + lpuart4: serial@2990000 { + compatible = "fsl,ls1021a-lpuart"; + reg = <0x0 0x2990000 0x0 0x1000>; + interrupts = <0 52 0x4>; + clocks = <&sysclk>; + clock-names = "ipg"; + status = "disabled"; + }; + + lpuart5: serial@29a0000 { + compatible = "fsl,ls1021a-lpuart"; + reg = <0x0 0x29a0000 0x0 0x1000>; + interrupts = <0 53 0x4>; + clocks = <&sysclk>; + clock-names = "ipg"; + status = "disabled"; + }; }; }; diff --git a/configs/ls1043aqds_lpuart_defconfig b/configs/ls1043aqds_lpuart_defconfig new file mode 100644 index 0000000..21d6407 --- /dev/null +++ b/configs/ls1043aqds_lpuart_defconfig @@ -0,0 +1,10 @@ +CONFIG_ARM=y +CONFIG_TARGET_LS1043AQDS=y +CONFIG_DM_SERIAL=y +CONFIG_DM_SPI=y +CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-qds-lpuart" +CONFIG_SYS_EXTRA_OPTIONS="SYS_FSL_DDR4,LPUART" +CONFIG_OF_CONTROL=y +CONFIG_DM=y +CONFIG_SPI_FLASH=y +CONFIG_FSL_LPUART=y diff --git a/include/configs/ls1043aqds.h b/include/configs/ls1043aqds.h index 398f1c3..e5c77cb 100644 --- a/include/configs/ls1043aqds.h +++ b/include/configs/ls1043aqds.h @@ -88,6 +88,13 @@ unsigned long get_board_ddr_clk(void); #define CONFIG_SYS_FSL_PBL_RCW board/freescale/ls1043aqds/ls1043aqds_rcw_sd_ifc.cfg #endif
+ +/* LPUART */ + +#ifdef CONFIG_LPUART +#define CONFIG_LPUART_32B_REG +#endif + /* SATA */ #define CONFIG_LIBATA #define CONFIG_SCSI_AHCI
Hi Wenbin,
On Thu, Jan 21, 2016 at 2:32 PM, Wenbin Song wenbin.song@nxp.com wrote:
Add lpuart support using the driver model.
Signed-off-by: Wenbin Song wenbin.song@nxp.com
arch/arm/dts/Makefile | 1 + arch/arm/dts/fsl-ls1043a-qds-lpuart.dts | 16 ++++++++++ arch/arm/dts/fsl-ls1043a-qds.dtsi | 4 +++ arch/arm/dts/fsl-ls1043a.dtsi | 54 +++++++++++++++++++++++++++++++++ configs/ls1043aqds_lpuart_defconfig | 10 ++++++ include/configs/ls1043aqds.h | 7 +++++ 6 files changed, 92 insertions(+) create mode 100644 arch/arm/dts/fsl-ls1043a-qds-lpuart.dts create mode 100644 configs/ls1043aqds_lpuart_defconfig
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index 302456c..a51275c 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -97,6 +97,7 @@ dtb-$(CONFIG_LS102XA) += ls1021a-qds.dtb \ dtb-$(CONFIG_FSL_LSCH3) += fsl-ls2080a-qds.dtb \ fsl-ls2080a-rdb.dtb dtb-$(CONFIG_FSL_LSCH2) += fsl-ls1043a-qds-duart.dtb \
fsl-ls1043a-qds-lpuart.dtb \ fsl-ls1043a-rdb.dtbdtb-$(CONFIG_MACH_SUN4I) += \ diff --git a/arch/arm/dts/fsl-ls1043a-qds-lpuart.dts b/arch/arm/dts/fsl-ls1043a-qds-lpuart.dts new file mode 100644 index 0000000..18adb97 --- /dev/null +++ b/arch/arm/dts/fsl-ls1043a-qds-lpuart.dts @@ -0,0 +1,16 @@ +/*
- Device Tree file for Freescale Layerscape-1043A family SoC.
- Copyright (C) 2015, Freescale Semiconductor
- SPDX-License-Identifier: GPL-2.0+
- */
+/dts-v1/; +#include "fsl-ls1043a-qds.dtsi"
+/ {
chosen {stdout-path = &lpuart0;};+}; diff --git a/arch/arm/dts/fsl-ls1043a-qds.dtsi b/arch/arm/dts/fsl-ls1043a-qds.dtsi index 6fa16b8..b9dad72 100644 --- a/arch/arm/dts/fsl-ls1043a-qds.dtsi +++ b/arch/arm/dts/fsl-ls1043a-qds.dtsi @@ -121,3 +121,7 @@ &duart1 { status = "okay"; };
+&lpuart0 {
status = "okay";+}; diff --git a/arch/arm/dts/fsl-ls1043a.dtsi b/arch/arm/dts/fsl-ls1043a.dtsi index 85ea81e..12ea0ab 100644 --- a/arch/arm/dts/fsl-ls1043a.dtsi +++ b/arch/arm/dts/fsl-ls1043a.dtsi @@ -182,5 +182,59 @@ interrupts = <0 55 0x4>; clocks = <&clockgen 4 0>; };
lpuart0: serial@2950000 {compatible = "fsl,ls1021a-lpuart";reg = <0x0 0x2950000 0x0 0x1000>;interrupts = <0 48 0x4>;clocks = <&sysclk>;clock-names = "ipg";status = "disabled";};lpuart1: serial@2960000 {compatible = "fsl,ls1021a-lpuart";reg = <0x0 0x2960000 0x0 0x1000>;interrupts = <0 49 0x4>;clocks = <&sysclk>;clock-names = "ipg";status = "disabled";};lpuart2: serial@2970000 {compatible = "fsl,ls1021a-lpuart";reg = <0x0 0x2970000 0x0 0x1000>;interrupts = <0 50 0x4>;clock-names = "ipg";clocks = <&sysclk>;status = "disabled";};lpuart3: serial@2980000 {compatible = "fsl,ls1021a-lpuart";reg = <0x0 0x2980000 0x0 0x1000>;interrupts = <0 51 0x4>;clocks = <&sysclk>;clock-names = "ipg";status = "disabled";};lpuart4: serial@2990000 {compatible = "fsl,ls1021a-lpuart";reg = <0x0 0x2990000 0x0 0x1000>;interrupts = <0 52 0x4>;clocks = <&sysclk>;clock-names = "ipg";status = "disabled";};lpuart5: serial@29a0000 {compatible = "fsl,ls1021a-lpuart";reg = <0x0 0x29a0000 0x0 0x1000>;interrupts = <0 53 0x4>;clocks = <&sysclk>;clock-names = "ipg";status = "disabled";}; };}; diff --git a/configs/ls1043aqds_lpuart_defconfig b/configs/ls1043aqds_lpuart_defconfig new file mode 100644 index 0000000..21d6407 --- /dev/null +++ b/configs/ls1043aqds_lpuart_defconfig @@ -0,0 +1,10 @@ +CONFIG_ARM=y +CONFIG_TARGET_LS1043AQDS=y +CONFIG_DM_SERIAL=y +CONFIG_DM_SPI=y +CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-qds-lpuart" +CONFIG_SYS_EXTRA_OPTIONS="SYS_FSL_DDR4,LPUART" +CONFIG_OF_CONTROL=y +CONFIG_DM=y +CONFIG_SPI_FLASH=y +CONFIG_FSL_LPUART=y diff --git a/include/configs/ls1043aqds.h b/include/configs/ls1043aqds.h index 398f1c3..e5c77cb 100644 --- a/include/configs/ls1043aqds.h +++ b/include/configs/ls1043aqds.h @@ -88,6 +88,13 @@ unsigned long get_board_ddr_clk(void); #define CONFIG_SYS_FSL_PBL_RCW board/freescale/ls1043aqds/ls1043aqds_rcw_sd_ifc.cfg #endif
nits: please remove this blank line.
+/* LPUART */
nits: please remove this blank line.
+#ifdef CONFIG_LPUART +#define CONFIG_LPUART_32B_REG +#endif
/* SATA */ #define CONFIG_LIBATA
#define CONFIG_SCSI_AHCI
Other than that,
Reviewed-by: Bin Meng bmeng.cn@gmail.com
Regards, Bin
participants (2)
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Bin Meng -
Wenbin Song