[U-Boot] [PATCH 00/10] MIPS: unify low-level assembly code
The patch-set changes some parts of the low-level assembly code in order to minimize the difference between the mips32, mips64 and xburst implementation. Do it in small steps to make review easier.
The series is based on the testing branch of the MIPS custodian tree.
Cc: Daniel Schwierzeck daniel.schwierzeck@googlemail.com
Gabor Juhos (10): MIPS: mips32/start.S: use t8 register for dynamic relocation MIPS: mips32/start.S: rework relocation info check MIPS: xburst/start.S: save relocation address in s2 register MIPS: xburst/start.S: save relocation offset in s1 register MIPS: xburst/start.S: save gd in s0 register MIPS: xburst/start.S: use t8 register for dynamic relocation MIPS: xburst/start.S: rework relocation info check MIPS: mips32/cache.S: save return address in t9 register MIPS: mips32/cache.S: store cache line size in t8 register MIPS: mips32/cache.S: use v1 register for indirect function calls
arch/mips/cpu/mips32/cache.S | 16 ++++++++-------- arch/mips/cpu/mips32/start.S | 24 ++++++++++++------------ arch/mips/cpu/xburst/start.S | 41 ++++++++++++++++++++++------------------- 3 files changed, 42 insertions(+), 39 deletions(-)
-- 1.7.10
Synchronize the code with mips64/start.S, in order to allow further unifications.
Signed-off-by: Gabor Juhos juhosg@openwrt.org Cc: Daniel Schwierzeck daniel.schwierzeck@googlemail.com --- arch/mips/cpu/mips32/start.S | 18 +++++++++--------- 1 file changed, 9 insertions(+), 9 deletions(-)
diff --git a/arch/mips/cpu/mips32/start.S b/arch/mips/cpu/mips32/start.S index a448f9f..439aee4 100644 --- a/arch/mips/cpu/mips32/start.S +++ b/arch/mips/cpu/mips32/start.S @@ -221,19 +221,19 @@ in_ram: * generated by GNU ld. Skip these reserved entries from relocation. */ lw t3, -4(t0) # t3 <-- num_got_entries - lw t4, -8(t0) # t4 <-- _GLOBAL_OFFSET_TABLE_ - add t4, s1 # t4 now holds relocated _G_O_T_ - addi t4, t4, 8 # skipping first two entries + lw t8, -8(t0) # t8 <-- _GLOBAL_OFFSET_TABLE_ + add t8, s1 # t8 now holds relocated _G_O_T_ + addi t8, t8, 8 # skipping first two entries li t2, 2 1: - lw t1, 0(t4) + lw t1, 0(t8) beqz t1, 2f add t1, s1 - sw t1, 0(t4) + sw t1, 0(t8) 2: addi t2, 1 blt t2, t3, 1b - addi t4, 4 + addi t8, 4
/* Update dynamic relocations */ lw t1, -16(t0) # t1 <-- __rel_dyn_start @@ -251,11 +251,11 @@ in_ram:
lw t3, -8(t1) # t3 <-- location to fix up in FLASH
- lw t4, 0(t3) # t4 <-- original pointer - add t4, s1 # t4 <-- adjusted pointer + lw t8, 0(t3) # t8 <-- original pointer + add t8, s1 # t8 <-- adjusted pointer
add t3, s1 # t3 <-- location to fix up in RAM - sw t4, 0(t3) + sw t8, 0(t3)
2: blt t1, t2, 1b
Make it similar to the code in mips64/start.S, in order to allow further unifications.
Signed-off-by: Gabor Juhos juhosg@openwrt.org Cc: Daniel Schwierzeck daniel.schwierzeck@googlemail.com --- arch/mips/cpu/mips32/start.S | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/arch/mips/cpu/mips32/start.S b/arch/mips/cpu/mips32/start.S index 439aee4..b78a025 100644 --- a/arch/mips/cpu/mips32/start.S +++ b/arch/mips/cpu/mips32/start.S @@ -243,10 +243,10 @@ in_ram: addi t1, 8
1: - lw t3, -4(t1) # t3 <-- relocation info + lw t8, -4(t1) # t8 <-- relocation info
- sub t3, 3 - bnez t3, 2f # skip non R_MIPS_REL32 entries + li t3, 3 + bne t8, t3, 2f # skip non R_MIPS_REL32 entries nop
lw t3, -8(t1) # t3 <-- location to fix up in FLASH
Synchronize the code with mips{32,64}/start.S, in order to allow further unifications.
Signed-off-by: Gabor Juhos juhosg@openwrt.org Cc: Daniel Schwierzeck daniel.schwierzeck@googlemail.com --- arch/mips/cpu/xburst/start.S | 8 +++++--- 1 file changed, 5 insertions(+), 3 deletions(-)
diff --git a/arch/mips/cpu/xburst/start.S b/arch/mips/cpu/xburst/start.S index d2c064b..33111c7 100644 --- a/arch/mips/cpu/xburst/start.S +++ b/arch/mips/cpu/xburst/start.S @@ -63,8 +63,10 @@ _start: relocate_code: move sp, a0 # set new stack pointer
+ move s2, a2 # save destination address in s2 + li t0, CONFIG_SYS_MONITOR_BASE - sub t6, a2, t0 # t6 <-- relocation offset + sub t6, s2, t0 # t6 <-- relocation offset
la t3, in_ram lw t2, -12(t3) # t2 <-- __image_copy_end @@ -112,7 +114,7 @@ relocate_code: nop
/* Jump to where we've relocated ourselves */ - addi t0, a2, in_ram - _start + addi t0, s2, in_ram - _start jr t0 nop
@@ -187,6 +189,6 @@ in_ram: move a0, a1 # a0 <-- gd la t9, board_init_r jr t9 - move a1, a2 + move a1, s2
.end relocate_code
Synchronize the code with mips{32,64}/start.S, in order to allow further unifications.
Signed-off-by: Gabor Juhos juhosg@openwrt.org Cc: Daniel Schwierzeck daniel.schwierzeck@googlemail.com --- arch/mips/cpu/xburst/start.S | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-)
diff --git a/arch/mips/cpu/xburst/start.S b/arch/mips/cpu/xburst/start.S index 33111c7..0fb8e7f 100644 --- a/arch/mips/cpu/xburst/start.S +++ b/arch/mips/cpu/xburst/start.S @@ -66,13 +66,13 @@ relocate_code: move s2, a2 # save destination address in s2
li t0, CONFIG_SYS_MONITOR_BASE - sub t6, s2, t0 # t6 <-- relocation offset + sub s1, s2, t0 # s1 <-- relocation offset
la t3, in_ram lw t2, -12(t3) # t2 <-- __image_copy_end move t1, a2
- add gp, t6 # adjust gp + add gp, s1 # adjust gp
/* * t0 = source address @@ -133,13 +133,13 @@ in_ram: */ lw t3, -4(t0) # t3 <-- num_got_entries lw t4, -8(t0) # t4 <-- _GLOBAL_OFFSET_TABLE_ - add t4, t6 # t4 now holds relocated _G_O_T_ + add t4, s1 # t4 now holds relocated _G_O_T_ addi t4, t4, 8 # skipping first two entries li t2, 2 1: lw t1, 0(t4) beqz t1, 2f - add t1, t6 + add t1, s1 sw t1, 0(t4) 2: addi t2, 1 @@ -163,9 +163,9 @@ in_ram: lw t3, -8(t1) # t3 <-- location to fix up in FLASH
lw t4, 0(t3) # t4 <-- original pointer - add t4, t6 # t4 <-- adjusted pointer + add t4, s1 # t4 <-- adjusted pointer
- add t3, t6 # t3 <-- location to fix up in RAM + add t3, s1 # t3 <-- location to fix up in RAM sw t4, 0(t3)
2:
Synchronize the code with mips{32,64}/start.S, in order to allow further unifications.
Signed-off-by: Gabor Juhos juhosg@openwrt.org Cc: Daniel Schwierzeck daniel.schwierzeck@googlemail.com --- arch/mips/cpu/xburst/start.S | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/arch/mips/cpu/xburst/start.S b/arch/mips/cpu/xburst/start.S index 0fb8e7f..b30768f 100644 --- a/arch/mips/cpu/xburst/start.S +++ b/arch/mips/cpu/xburst/start.S @@ -63,6 +63,7 @@ _start: relocate_code: move sp, a0 # set new stack pointer
+ move s0, a1 # save gd in s0 move s2, a2 # save destination address in s2
li t0, CONFIG_SYS_MONITOR_BASE @@ -186,7 +187,7 @@ in_ram: blt t1, t2, 1b addi t1, 4
- move a0, a1 # a0 <-- gd + move a0, s0 # a0 <-- gd la t9, board_init_r jr t9 move a1, s2
Synchronize the code with mips{32,64}/start.S, in order to allow further unifications.
Signed-off-by: Gabor Juhos juhosg@openwrt.org Cc: Daniel Schwierzeck daniel.schwierzeck@googlemail.com --- arch/mips/cpu/xburst/start.S | 18 +++++++++--------- 1 file changed, 9 insertions(+), 9 deletions(-)
diff --git a/arch/mips/cpu/xburst/start.S b/arch/mips/cpu/xburst/start.S index b30768f..050364c 100644 --- a/arch/mips/cpu/xburst/start.S +++ b/arch/mips/cpu/xburst/start.S @@ -133,19 +133,19 @@ in_ram: * generated by GNU ld. Skip these reserved entries from relocation. */ lw t3, -4(t0) # t3 <-- num_got_entries - lw t4, -8(t0) # t4 <-- _GLOBAL_OFFSET_TABLE_ - add t4, s1 # t4 now holds relocated _G_O_T_ - addi t4, t4, 8 # skipping first two entries + lw t8, -8(t0) # t8 <-- _GLOBAL_OFFSET_TABLE_ + add t8, s1 # t8 now holds relocated _G_O_T_ + addi t8, t8, 8 # skipping first two entries li t2, 2 1: - lw t1, 0(t4) + lw t1, 0(t8) beqz t1, 2f add t1, s1 - sw t1, 0(t4) + sw t1, 0(t8) 2: addi t2, 1 blt t2, t3, 1b - addi t4, 4 + addi t8, 4
/* Update dynamic relocations */ lw t1, -16(t0) # t1 <-- __rel_dyn_start @@ -163,11 +163,11 @@ in_ram:
lw t3, -8(t1) # t3 <-- location to fix up in FLASH
- lw t4, 0(t3) # t4 <-- original pointer - add t4, s1 # t4 <-- adjusted pointer + lw t8, 0(t3) # t8 <-- original pointer + add t8, s1 # t8 <-- adjusted pointer
add t3, s1 # t3 <-- location to fix up in RAM - sw t4, 0(t3) + sw t8, 0(t3)
2: blt t1, t2, 1b
Make it similar to the code in mips{32,64}/start.S, in order to allow further unifications.
Signed-off-by: Gabor Juhos juhosg@openwrt.org Cc: Daniel Schwierzeck daniel.schwierzeck@googlemail.com --- arch/mips/cpu/xburst/start.S | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/arch/mips/cpu/xburst/start.S b/arch/mips/cpu/xburst/start.S index 050364c..5b9396b 100644 --- a/arch/mips/cpu/xburst/start.S +++ b/arch/mips/cpu/xburst/start.S @@ -155,10 +155,10 @@ in_ram: addi t1, 8
1: - lw t3, -4(t1) # t3 <-- relocation info + lw t8, -4(t1) # t3 <-- relocation info
- sub t3, 3 - bnez t3, 2f # skip non R_MIPS_REL32 entries + li t3, 3 + bne t8, t3, 2f # skip non R_MIPS_REL32 entries nop
lw t3, -8(t1) # t3 <-- location to fix up in FLASH
Make it similar to the code in mips{32,64}/start.S, in order to allow further unifications.
Signed-off-by: Gabor Juhos juhosg@openwrt.org Cc: Daniel Schwierzeck daniel.schwierzeck@googlemail.com --- v2: also change register name in the comment --- arch/mips/cpu/xburst/start.S | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/arch/mips/cpu/xburst/start.S b/arch/mips/cpu/xburst/start.S index 050364c..49b8231 100644 --- a/arch/mips/cpu/xburst/start.S +++ b/arch/mips/cpu/xburst/start.S @@ -155,10 +155,10 @@ in_ram: addi t1, 8
1: - lw t3, -4(t1) # t3 <-- relocation info + lw t8, -4(t1) # t8 <-- relocation info
- sub t3, 3 - bnez t3, 2f # skip non R_MIPS_REL32 entries + li t3, 3 + bne t8, t3, 2f # skip non R_MIPS_REL32 entries nop
lw t3, -8(t1) # t3 <-- location to fix up in FLASH
Synchronize the code with mips64/cache.S, in order to allow further unifications.
Signed-off-by: Gabor Juhos juhosg@openwrt.org Cc: Daniel Schwierzeck daniel.schwierzeck@googlemail.com --- arch/mips/cpu/mips32/cache.S | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/mips/cpu/mips32/cache.S b/arch/mips/cpu/mips32/cache.S index 8158ea8..6d31909 100644 --- a/arch/mips/cpu/mips32/cache.S +++ b/arch/mips/cpu/mips32/cache.S @@ -34,7 +34,7 @@ #define CONFIG_SYS_MIPS_CACHE_MODE CONF_CM_CACHABLE_NONCOHERENT #endif
-#define RA t8 +#define RA t9
/* * 16kB is the maximum size of instruction and data caches on MIPS 4K,
Synchronize the code with mips64/cache.S, in order to allow further unifications.
Signed-off-by: Gabor Juhos juhosg@openwrt.org Cc: Daniel Schwierzeck daniel.schwierzeck@googlemail.com --- arch/mips/cpu/mips32/cache.S | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/arch/mips/cpu/mips32/cache.S b/arch/mips/cpu/mips32/cache.S index 6d31909..e871d13 100644 --- a/arch/mips/cpu/mips32/cache.S +++ b/arch/mips/cpu/mips32/cache.S @@ -144,7 +144,7 @@ NESTED(mips_cache_reset, 0, ra) move RA, ra li t2, CONFIG_SYS_ICACHE_SIZE li t3, CONFIG_SYS_DCACHE_SIZE - li t4, CONFIG_SYS_CACHELINE_SIZE + li t8, CONFIG_SYS_CACHELINE_SIZE
li v0, MIPS_MAX_CACHE_SIZE
@@ -171,7 +171,7 @@ NESTED(mips_cache_reset, 0, ra) * Initialize the I-cache first, */ move a1, t2 - move a2, t4 + move a2, t8 PTR_LA t7, mips_init_icache jalr t7
@@ -179,7 +179,7 @@ NESTED(mips_cache_reset, 0, ra) * then initialize D-cache. */ move a1, t3 - move a2, t4 + move a2, t8 PTR_LA t7, mips_init_dcache jalr t7
Synchronize the code with mips64/cache.S, in order to allow further unifications.
Signed-off-by: Gabor Juhos juhosg@openwrt.org Cc: Daniel Schwierzeck daniel.schwierzeck@googlemail.com --- arch/mips/cpu/mips32/cache.S | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/arch/mips/cpu/mips32/cache.S b/arch/mips/cpu/mips32/cache.S index e871d13..ee80d35 100644 --- a/arch/mips/cpu/mips32/cache.S +++ b/arch/mips/cpu/mips32/cache.S @@ -172,16 +172,16 @@ NESTED(mips_cache_reset, 0, ra) */ move a1, t2 move a2, t8 - PTR_LA t7, mips_init_icache - jalr t7 + PTR_LA v1, mips_init_icache + jalr v1
/* * then initialize D-cache. */ move a1, t3 move a2, t8 - PTR_LA t7, mips_init_dcache - jalr t7 + PTR_LA v1, mips_init_dcache + jalr v1
jr RA END(mips_cache_reset)
2013/6/13 Gabor Juhos juhosg@openwrt.org:
The patch-set changes some parts of the low-level assembly code in order to minimize the difference between the mips32, mips64 and xburst implementation. Do it in small steps to make review easier.
The series is based on the testing branch of the MIPS custodian tree.
Cc: Daniel Schwierzeck daniel.schwierzeck@googlemail.com
Gabor Juhos (10): MIPS: mips32/start.S: use t8 register for dynamic relocation MIPS: mips32/start.S: rework relocation info check MIPS: xburst/start.S: save relocation address in s2 register MIPS: xburst/start.S: save relocation offset in s1 register MIPS: xburst/start.S: save gd in s0 register MIPS: xburst/start.S: use t8 register for dynamic relocation MIPS: xburst/start.S: rework relocation info check MIPS: mips32/cache.S: save return address in t9 register MIPS: mips32/cache.S: store cache line size in t8 register MIPS: mips32/cache.S: use v1 register for indirect function calls
arch/mips/cpu/mips32/cache.S | 16 ++++++++-------- arch/mips/cpu/mips32/start.S | 24 ++++++++++++------------ arch/mips/cpu/xburst/start.S | 41 ++++++++++++++++++++++------------------- 3 files changed, 42 insertions(+), 39 deletions(-)
-- 1.7.10
all patches applied to u-boot-mips/next, thanks
-- Best regards, Daniel
participants (2)
-
Daniel Schwierzeck -
Gabor Juhos