On 2024/2/17 08:22, Jonas Karlman wrote:

Change to use a common FIT load order, same-as-spl > SD-card > eMMC on RK3328 boards. Only EVB and Radxa ROCK Pi E is affected by this change.

Signed-off-by: Jonas Karlman jonas@kwiboo.se Reviewed-by: Dragan Simic dsimic@manjaro.org

Reviewed-by: Kever Yang kever.yang@rock-chips.com

Thanks, - Kever

---

v2:

• No change
• Collect r-b tag

---

arch/arm/dts/rk3328-nanopi-r2c-plus-u-boot.dtsi | 6 ------ arch/arm/dts/rk3328-nanopi-r2s-u-boot.dtsi | 5 ----- arch/arm/dts/rk3328-orangepi-r1-plus-lts-u-boot.dtsi | 5 ----- arch/arm/dts/rk3328-orangepi-r1-plus-u-boot.dtsi | 5 ----- arch/arm/dts/rk3328-roc-cc-u-boot.dtsi | 5 +---- arch/arm/dts/rk3328-rock64-u-boot.dtsi | 5 +---- arch/arm/dts/rk3328-u-boot.dtsi | 2 +- 7 files changed, 3 insertions(+), 30 deletions(-)

diff --git a/arch/arm/dts/rk3328-nanopi-r2c-plus-u-boot.dtsi b/arch/arm/dts/rk3328-nanopi-r2c-plus-u-boot.dtsi index f8adb9e5e1ff..1dc3c022c504 100644 --- a/arch/arm/dts/rk3328-nanopi-r2c-plus-u-boot.dtsi +++ b/arch/arm/dts/rk3328-nanopi-r2c-plus-u-boot.dtsi @@ -1,9 +1,3 @@ // SPDX-License-Identifier: GPL-2.0-or-later

#include "rk3328-nanopi-r2c-u-boot.dtsi"

-/ {

• chosen {

• u-boot,spl-boot-order = "same-as-spl", &sdmmc, &emmc;
  

• };

-}; diff --git a/arch/arm/dts/rk3328-nanopi-r2s-u-boot.dtsi b/arch/arm/dts/rk3328-nanopi-r2s-u-boot.dtsi index 78d37ab47558..d969b008775e 100644 --- a/arch/arm/dts/rk3328-nanopi-r2s-u-boot.dtsi +++ b/arch/arm/dts/rk3328-nanopi-r2s-u-boot.dtsi @@ -6,11 +6,6 @@

#include "rk3328-u-boot.dtsi" #include "rk3328-sdram-ddr4-666.dtsi" -/ {

• chosen {

• u-boot,spl-boot-order = "same-as-spl", &sdmmc, &emmc;
  

• };

-};

&gpio0 { bootph-pre-ram; diff --git a/arch/arm/dts/rk3328-orangepi-r1-plus-lts-u-boot.dtsi b/arch/arm/dts/rk3328-orangepi-r1-plus-lts-u-boot.dtsi index ebe33e48cb9c..5aaa5ccb15c1 100644 --- a/arch/arm/dts/rk3328-orangepi-r1-plus-lts-u-boot.dtsi +++ b/arch/arm/dts/rk3328-orangepi-r1-plus-lts-u-boot.dtsi @@ -6,11 +6,6 @@

#include "rk3328-u-boot.dtsi" #include "rk3328-sdram-lpddr3-666.dtsi" -/ {

• chosen {

• u-boot,spl-boot-order = "same-as-spl", &sdmmc, &emmc;
  

• };

-};

&gpio0 { bootph-pre-ram; diff --git a/arch/arm/dts/rk3328-orangepi-r1-plus-u-boot.dtsi b/arch/arm/dts/rk3328-orangepi-r1-plus-u-boot.dtsi index 637c70adf194..6d3db86dce6a 100644 --- a/arch/arm/dts/rk3328-orangepi-r1-plus-u-boot.dtsi +++ b/arch/arm/dts/rk3328-orangepi-r1-plus-u-boot.dtsi @@ -6,11 +6,6 @@

#include "rk3328-u-boot.dtsi" #include "rk3328-sdram-ddr4-666.dtsi" -/ {

• chosen {

• u-boot,spl-boot-order = "same-as-spl", &sdmmc, &emmc;
  

• };

-};

&gpio0 { bootph-pre-ram; diff --git a/arch/arm/dts/rk3328-roc-cc-u-boot.dtsi b/arch/arm/dts/rk3328-roc-cc-u-boot.dtsi index 2062f34bf825..8bc2f134f8f4 100644 --- a/arch/arm/dts/rk3328-roc-cc-u-boot.dtsi +++ b/arch/arm/dts/rk3328-roc-cc-u-boot.dtsi @@ -5,11 +5,8 @@

#include "rk3328-u-boot.dtsi" #include "rk3328-sdram-ddr4-666.dtsi" -/ {

• chosen {

• u-boot,spl-boot-order = "same-as-spl", &sdmmc, &emmc;
  

• };

+/ { smbios { compatible = "u-boot,sysinfo-smbios";

diff --git a/arch/arm/dts/rk3328-rock64-u-boot.dtsi b/arch/arm/dts/rk3328-rock64-u-boot.dtsi index 6904515b9693..bfe506fd2249 100644 --- a/arch/arm/dts/rk3328-rock64-u-boot.dtsi +++ b/arch/arm/dts/rk3328-rock64-u-boot.dtsi @@ -5,11 +5,8 @@

#include "rk3328-u-boot.dtsi" #include "rk3328-sdram-lpddr3-1600.dtsi" -/ {

• chosen {

• u-boot,spl-boot-order = "same-as-spl", &sdmmc, &emmc;
  

• };

+/ { smbios { compatible = "u-boot,sysinfo-smbios";

diff --git a/arch/arm/dts/rk3328-u-boot.dtsi b/arch/arm/dts/rk3328-u-boot.dtsi index a9f2536de2a2..a12be7876db0 100644 --- a/arch/arm/dts/rk3328-u-boot.dtsi +++ b/arch/arm/dts/rk3328-u-boot.dtsi @@ -13,7 +13,7 @@ };

chosen {

• u-boot,spl-boot-order = &emmc, &sdmmc;
  

• u-boot,spl-boot-order = "same-as-spl", &sdmmc, &emmc;
  

  };

  dmc: dmc {

On 2024/2/17 08:22, Jonas Karlman wrote:

Update defconfig for rk3328-evb with new defaults.

Add DM_RESET=y to support using reset signals.

Remove the xPL_DRIVERS_MISC=y option, no misc driver is used in xPL.

Add CONFIG_SPL_FIT_SIGNATURE=y to let SPL verify an auto generated hash of FIT images. This help indicate if there is an issue loading any of the images to DRAM or SRAM. Also add LEGACY_IMAGE_FORMAT=y to keep support for scripts.

Add CMD_GPIO=y and CMD_REGULATOR=y to add the helpful gpio and regulator commands.

Add MISC_INIT_R=y, ROCKCHIP_EFUSE=y and remove NET_RANDOM_ETHADDR=y, ethaddr and eth1addr is set based on cpuid read from eFUSE.

Remove pinctrl-0 and pinctrl-names from CONFIG_OF_SPL_REMOVE_PROPS, SPL need to configure pinctrl for e.g. SD-card.

Add SPL_DM_SEQ_ALIAS=y option to use alias sequence number in SPL.

Add DM_ETH_PHY=y, PHY_MOTORCOMM=y and PHY_REALTEK=y to support common ethernet PHYs.

Remove REGULATOR_PWM=y, the pwm-regulator compatible is not used.

Add RNG_ROCKCHIP=y and DM_RNG=y options to support the onboard random generator.

Add SYSINFO=y to support the sysinfo uclass.

Also add missing device tree files to MAINTAINERS and remove the obsolete README file.

Signed-off-by: Jonas Karlman jonas@kwiboo.se

Reviewed-by: Kever Yang kever.yang@rock-chips.com

Thanks, - Kever

---

v2:

• Add DM_RESET, CMD_GPIO, CMD_REGULATOR, PHY_GIGE and SYSINFO
• Remove REGULATOR_PWM

---

board/rockchip/evb_rk3328/MAINTAINERS | 2 + board/rockchip/evb_rk3328/README | 70 --------------------------- configs/evb-rk3328_defconfig | 22 ++++++--- 3 files changed, 18 insertions(+), 76 deletions(-) delete mode 100644 board/rockchip/evb_rk3328/README

diff --git a/board/rockchip/evb_rk3328/MAINTAINERS b/board/rockchip/evb_rk3328/MAINTAINERS index 5fc114a63f6c..dc750bd69426 100644 --- a/board/rockchip/evb_rk3328/MAINTAINERS +++ b/board/rockchip/evb_rk3328/MAINTAINERS @@ -4,6 +4,8 @@ S: Maintained F: board/rockchip/evb_rk3328 F: include/configs/evb_rk3328.h F: configs/evb-rk3328_defconfig +F: arch/arm/dts/rk3328-evb.dts +F: arch/arm/dts/rk3328-evb-u-boot.dtsi

NANOPI-R2C-RK3328 M: Tianling Shen cnsztl@gmail.com diff --git a/board/rockchip/evb_rk3328/README b/board/rockchip/evb_rk3328/README deleted file mode 100644 index 6cbb66a4cf87..000000000000 --- a/board/rockchip/evb_rk3328/README +++ /dev/null @@ -1,70 +0,0 @@

-Introduction

-RK3328 key features we might use in U-Boot: -* CPU: ARMv8 64bit quad-core Cortex-A53 -* IRAM: 36KB -* DRAM: 4GB-16MB dual-channel -* eMMC: support eMMC 5.0/5.1, suport HS400, HS200, DDR50 -* SD/MMC: support SD 3.0, MMC 4.51 -* USB: USB2.0 EHCI host port *2 -* Display: RGB/HDMI/DP/MIPI/EDP

-evb key features: -* regulator: pwm regulator for CPU B/L -* PMIC: rk808 -* debug console: UART2

-In order to support Arm Trust Firmware(ATF), we need to use the -miniloader from rockchip which: -* do DRAM init -* load and verify ATF image -* load and verify U-Boot image

-Here is the step-by-step to boot to U-Boot on rk3328.

-Get the Source and prebuild binary

• ...

  mkdir ~/evb_rk3328

• ...

  cd ~/evb_rk3328

• ...

  git clone https://github.com/ARM-software/arm-trusted-firmware.git

• ...

  git clone https://github.com/rockchip-linux/rkbin

• ...

  git clone https://github.com/rockchip-linux/rkflashtool

-Compile ATF

• ...

  cd arm-trusted-firmware

• ...

  make realclean

• ...

  make CROSS_COMPILE=aarch64-linux-gnu- PLAT=rk3328 bl31

-Compile U-Boot

• ...

  cd ../u-boot

• ...

  make CROSS_COMPILE=aarch64-linux-gnu- evb-rk3328_defconfig all

-Compile rkflashtool

• ...

  cd ../rkflashtool

• ...

  make

-Package image for miniloader

• ...

  cd ..

• ...

  cp arm-trusted-firmware/build/rk3328/release/bl31.bin rkbin/rk33

• ...

  ./rkbin/tools/trust_merger rkbin/tools/RK3328TRUST.ini

• ...

  ./rkbin/tools/loaderimage --pack --uboot u-boot/u-boot-dtb.bin uboot.img

• ...

  mkdir image

• ...

  mv trust.img ./image/

• ...

  mv uboot.img ./image/rk3328evb-uboot.bin

-Flash image

-Power on(or reset with RESET KEY) with MASKROM KEY preesed, and then:

• ...

  ./rkflashtool/rkflashloader rk3328evb

-You should be able to get U-Boot log message in console/UART2 now. diff --git a/configs/evb-rk3328_defconfig b/configs/evb-rk3328_defconfig index b9c541a92a1f..5a5f59c04b3b 100644 --- a/configs/evb-rk3328_defconfig +++ b/configs/evb-rk3328_defconfig @@ -9,11 +9,11 @@ CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x300000 CONFIG_SF_DEFAULT_SPEED=20000000 CONFIG_ENV_OFFSET=0x3F8000 CONFIG_DEFAULT_DEVICE_TREE="rk3328-evb" +CONFIG_DM_RESET=y CONFIG_ROCKCHIP_RK3328=y CONFIG_TPL_ROCKCHIP_COMMON_BOARD=y CONFIG_TPL_LIBCOMMON_SUPPORT=y CONFIG_TPL_LIBGENERIC_SUPPORT=y -CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL_STACK_R_ADDR=0x4000000 CONFIG_SPL_STACK=0x400000 CONFIG_TPL_SYS_MALLOC_F_LEN=0x800 @@ -25,10 +25,13 @@ CONFIG_DEBUG_UART=y # CONFIG_ANDROID_BOOT_IMAGE is not set CONFIG_FIT=y CONFIG_FIT_VERBOSE=y +CONFIG_SPL_FIT_SIGNATURE=y CONFIG_SPL_LOAD_FIT=y +CONFIG_LEGACY_IMAGE_FORMAT=y CONFIG_DEFAULT_FDT_FILE="rockchip/rk3328-evb.dtb" # CONFIG_DISPLAY_CPUINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y +CONFIG_MISC_INIT_R=y CONFIG_SPL_MAX_SIZE=0x40000 CONFIG_SPL_PAD_TO=0x7f8000 CONFIG_SPL_HAS_BSS_LINKER_SECTION=y @@ -41,22 +44,23 @@ CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000 CONFIG_SPL_ATF=y CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y CONFIG_TPL_SYS_MALLOC_SIMPLE=y -CONFIG_TPL_DRIVERS_MISC=y CONFIG_CMD_BOOTZ=y +CONFIG_CMD_GPIO=y CONFIG_CMD_GPT=y CONFIG_CMD_MMC=y CONFIG_CMD_USB=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_TIME=y +CONFIG_CMD_REGULATOR=y CONFIG_SPL_OF_CONTROL=y CONFIG_TPL_OF_CONTROL=y -CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" +CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" CONFIG_TPL_OF_PLATDATA=y CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_SYS_MMC_ENV_DEV=1 -CONFIG_NET_RANDOM_ETHADDR=y CONFIG_TPL_DM=y +CONFIG_SPL_DM_SEQ_ALIAS=y CONFIG_REGMAP=y CONFIG_SPL_REGMAP=y CONFIG_TPL_REGMAP=y @@ -70,8 +74,13 @@ CONFIG_FASTBOOT_CMD_OEM_FORMAT=y CONFIG_ROCKCHIP_GPIO=y CONFIG_SYS_I2C_ROCKCHIP=y CONFIG_MISC=y +CONFIG_ROCKCHIP_EFUSE=y CONFIG_MMC_DW=y CONFIG_MMC_DW_ROCKCHIP=y +CONFIG_PHY_MOTORCOMM=y +CONFIG_PHY_REALTEK=y +CONFIG_DM_ETH_PHY=y +CONFIG_PHY_GIGE=y CONFIG_ETH_DESIGNWARE=y CONFIG_GMAC_ROCKCHIP=y CONFIG_PHY_ROCKCHIP_INNO_USB2=y @@ -79,17 +88,18 @@ CONFIG_PINCTRL=y CONFIG_SPL_PINCTRL=y CONFIG_DM_PMIC=y CONFIG_PMIC_RK8XX=y -CONFIG_REGULATOR_PWM=y CONFIG_DM_REGULATOR_FIXED=y CONFIG_REGULATOR_RK8XX=y CONFIG_PWM_ROCKCHIP=y CONFIG_RAM=y CONFIG_SPL_RAM=y CONFIG_TPL_RAM=y +CONFIG_DM_RNG=y +CONFIG_RNG_ROCKCHIP=y CONFIG_BAUDRATE=1500000 CONFIG_DEBUG_UART_SHIFT=2 -CONFIG_DEBUG_UART_ANNOUNCE=y CONFIG_SYS_NS16550_MEM32=y +CONFIG_SYSINFO=y CONFIG_SYSRESET=y # CONFIG_TPL_SYSRESET is not set CONFIG_USB=y

On 2024/2/17 08:22, Jonas Karlman wrote:

Update defconfig for rk3328-rock64 with new defaults.

Remove the SPL_DRIVERS_MISC=y option, no misc driver is used in SPL.

Add CONFIG_SPL_FIT_SIGNATURE=y to let SPL verify an auto generated hash of FIT images. This help indicate if there is an issue loading any of the images to DRAM or SRAM. Also add LEGACY_IMAGE_FORMAT=y to keep support for scripts.

Remove SPL_I2C=y and SPL_PMIC_RK8XX=y, the related i2c and pmic nodes is not included in the SPL fdt.

Add CMD_GPIO=y and CMD_REGULATOR=y to add the helpful gpio and regulator commands. Also add CMD_POWEROFF=y to be able to use the poweroff command.

Remove the NET_RANDOM_ETHADDR=y option, ethaddr and eth1addr is set based on cpuid read from eFUSE.

Add SPL_DM_SEQ_ALIAS=y option to use alias sequence number in SPL.

Add DM_ETH_PHY=y and PHY_REALTEK=y to support onboard ethernet PHY.

Remove REGULATOR_PWM=y, the pwm-regulator compatible is not used.

Also add missing device tree file to MAINTAINERS and add myself as a reviewer for this board.

Signed-off-by: Jonas Karlman jonas@kwiboo.se Reviewed-by: Dragan Simic dsimic@manjaro.org

Reviewed-by: Kever Yang kever.yang@rock-chips.com

Thanks, - Kever

---

v2:

• Add CMD_GPIO, CMD_POWEROFF, CMD_REGULATOR and PHY_GIGE
• Remove SPL_I2C, SPL_PMIC_RK8XX and REGULATOR_PWM
• Collect r-b tag

---

board/rockchip/evb_rk3328/MAINTAINERS | 2 ++ configs/rock64-rk3328_defconfig | 14 +++++++++----- 2 files changed, 11 insertions(+), 5 deletions(-)

diff --git a/board/rockchip/evb_rk3328/MAINTAINERS b/board/rockchip/evb_rk3328/MAINTAINERS index dc750bd69426..419bc8ded375 100644 --- a/board/rockchip/evb_rk3328/MAINTAINERS +++ b/board/rockchip/evb_rk3328/MAINTAINERS @@ -47,8 +47,10 @@ F: arch/arm/dts/rk3328-roc-cc-u-boot.dtsi

ROCK64-RK3328 M: Matwey V. Kornilov matwey.kornilov@gmail.com +R: Jonas Karlman jonas@kwiboo.se S: Maintained F: configs/rock64-rk3328_defconfig +F: arch/arm/dts/rk3328-rock64.dts F: arch/arm/dts/rk3328-rock64-u-boot.dtsi

ROCKPIE-RK3328 diff --git a/configs/rock64-rk3328_defconfig b/configs/rock64-rk3328_defconfig index 0297d098761e..feda87014286 100644 --- a/configs/rock64-rk3328_defconfig +++ b/configs/rock64-rk3328_defconfig @@ -15,7 +15,6 @@ CONFIG_ROCKCHIP_RK3328=y CONFIG_TPL_ROCKCHIP_COMMON_BOARD=y CONFIG_TPL_LIBCOMMON_SUPPORT=y CONFIG_TPL_LIBGENERIC_SUPPORT=y -CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL_STACK_R_ADDR=0x600000 CONFIG_SPL_STACK=0x400000 CONFIG_TPL_SYS_MALLOC_F_LEN=0x800 @@ -26,7 +25,9 @@ CONFIG_DEBUG_UART=y # CONFIG_ANDROID_BOOT_IMAGE is not set CONFIG_FIT=y CONFIG_FIT_VERBOSE=y +CONFIG_SPL_FIT_SIGNATURE=y CONFIG_SPL_LOAD_FIT=y +CONFIG_LEGACY_IMAGE_FORMAT=y CONFIG_DEFAULT_FDT_FILE="rockchip/rk3328-rock64.dtb" # CONFIG_DISPLAY_CPUINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y @@ -39,17 +40,19 @@ CONFIG_SPL_BSS_MAX_SIZE=0x2000 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_STACK_R=y -CONFIG_SPL_I2C=y CONFIG_SPL_POWER=y CONFIG_SPL_ATF=y CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y CONFIG_TPL_SYS_MALLOC_SIMPLE=y CONFIG_CMD_BOOTZ=y +CONFIG_CMD_GPIO=y CONFIG_CMD_GPT=y CONFIG_CMD_MMC=y +CONFIG_CMD_POWEROFF=y CONFIG_CMD_USB=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_TIME=y +CONFIG_CMD_REGULATOR=y CONFIG_SPL_OF_CONTROL=y CONFIG_TPL_OF_CONTROL=y CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" @@ -57,8 +60,8 @@ CONFIG_TPL_OF_PLATDATA=y CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_SYS_MMC_ENV_DEV=1 -CONFIG_NET_RANDOM_ETHADDR=y CONFIG_TPL_DM=y +CONFIG_SPL_DM_SEQ_ALIAS=y CONFIG_REGMAP=y CONFIG_SPL_REGMAP=y CONFIG_TPL_REGMAP=y @@ -76,6 +79,9 @@ CONFIG_ROCKCHIP_EFUSE=y CONFIG_MMC_DW=y CONFIG_MMC_DW_ROCKCHIP=y CONFIG_SPI_FLASH_GIGADEVICE=y +CONFIG_PHY_REALTEK=y +CONFIG_DM_ETH_PHY=y +CONFIG_PHY_GIGE=y CONFIG_ETH_DESIGNWARE=y CONFIG_GMAC_ROCKCHIP=y CONFIG_PHY_ROCKCHIP_INNO_USB2=y @@ -83,9 +89,7 @@ CONFIG_PINCTRL=y CONFIG_SPL_PINCTRL=y CONFIG_DM_PMIC=y CONFIG_PMIC_RK8XX=y -CONFIG_SPL_PMIC_RK8XX=y CONFIG_SPL_DM_REGULATOR=y -CONFIG_REGULATOR_PWM=y CONFIG_DM_REGULATOR_FIXED=y CONFIG_SPL_DM_REGULATOR_FIXED=y CONFIG_REGULATOR_RK8XX=y

On 2024/2/17 08:22, Jonas Karlman wrote:

Update defconfig for rk3328-roc-cc with new defaults.

Remove the SPL_DRIVERS_MISC=y option, no misc driver is used in SPL.

Add CONFIG_SPL_FIT_SIGNATURE=y to let SPL verify an auto generated hash of FIT images. This help indicate if there is an issue loading any of the images to DRAM or SRAM. Also add LEGACY_IMAGE_FORMAT=y to keep support for scripts.

Remove SPL_I2C=y and SPL_PMIC_RK8XX=y, the related i2c and pmic nodes is not included in the SPL fdt.

Add CMD_GPIO=y and CMD_REGULATOR=y to add the helpful gpio and regulator commands. Also add CMD_POWEROFF=y to be able to use the poweroff command.

Add ROCKCHIP_EFUSE=y and remove NET_RANDOM_ETHADDR=y, ethaddr and eth1addr is set based on cpuid read from eFUSE.

Add SPL_DM_SEQ_ALIAS=y option to use alias sequence number in SPL.

Add DM_ETH_PHY=y, PHY_MOTORCOMM=y and PHY_REALTEK=y to support common ethernet PHYs.

Remove REGULATOR_PWM=y, the pwm-regulator compatible is not used.

Add RNG_ROCKCHIP=y and DM_RNG=y options to support the onboard random generator.

Also add missing device tree file to MAINTAINERS and add myself as a reviewer for this board.

Signed-off-by: Jonas Karlman jonas@kwiboo.se

Reviewed-by: Kever Yang kever.yang@rock-chips.com

Thanks, - Kever

---

v2:

• Add CMD_GPIO, CMD_POWEROFF, CMD_REGULATOR and PHY_GIGE
• Remove SPL_I2C, SPL_PMIC_RK8XX and REGULATOR_PWM

---

board/rockchip/evb_rk3328/MAINTAINERS | 2 ++ configs/roc-cc-rk3328_defconfig | 15 ++++++++++----- doc/board/rockchip/rockchip.rst | 2 +- 3 files changed, 13 insertions(+), 6 deletions(-)

diff --git a/board/rockchip/evb_rk3328/MAINTAINERS b/board/rockchip/evb_rk3328/MAINTAINERS index 419bc8ded375..09488eaf083f 100644 --- a/board/rockchip/evb_rk3328/MAINTAINERS +++ b/board/rockchip/evb_rk3328/MAINTAINERS @@ -41,8 +41,10 @@ F: arch/arm/dts/rk3328-orangepi-r1-plus-lts-u-boot.dtsi ROC-RK3328-CC M: Loic Devulder ldevulder@suse.com M: Chen-Yu Tsai wens@csie.org +R: Jonas Karlman jonas@kwiboo.se S: Maintained F: configs/roc-cc-rk3328_defconfig +F: arch/arm/dts/rk3328-roc-cc.dts F: arch/arm/dts/rk3328-roc-cc-u-boot.dtsi

ROCK64-RK3328 diff --git a/configs/roc-cc-rk3328_defconfig b/configs/roc-cc-rk3328_defconfig index 4ac3c9403b02..c4abc06092f7 100644 --- a/configs/roc-cc-rk3328_defconfig +++ b/configs/roc-cc-rk3328_defconfig @@ -15,7 +15,6 @@ CONFIG_ROCKCHIP_RK3328=y CONFIG_TPL_ROCKCHIP_COMMON_BOARD=y CONFIG_TPL_LIBCOMMON_SUPPORT=y CONFIG_TPL_LIBGENERIC_SUPPORT=y -CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL_STACK_R_ADDR=0x600000 CONFIG_SPL_STACK=0x400000 CONFIG_TPL_SYS_MALLOC_F_LEN=0x800 @@ -26,7 +25,9 @@ CONFIG_DEBUG_UART=y # CONFIG_ANDROID_BOOT_IMAGE is not set CONFIG_FIT=y CONFIG_FIT_VERBOSE=y +CONFIG_SPL_FIT_SIGNATURE=y CONFIG_SPL_LOAD_FIT=y +CONFIG_LEGACY_IMAGE_FORMAT=y CONFIG_DEFAULT_FDT_FILE="rockchip/rk3328-roc-cc.dtb" # CONFIG_DISPLAY_CPUINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y @@ -39,18 +40,20 @@ CONFIG_SPL_BSS_MAX_SIZE=0x2000 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_STACK_R=y -CONFIG_SPL_I2C=y CONFIG_SPL_POWER=y CONFIG_SPL_ATF=y CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y CONFIG_TPL_SYS_MALLOC_SIMPLE=y CONFIG_CMD_BOOTZ=y +CONFIG_CMD_GPIO=y CONFIG_CMD_GPT=y CONFIG_CMD_MMC=y +CONFIG_CMD_POWEROFF=y CONFIG_CMD_USB=y CONFIG_CMD_USB_MASS_STORAGE=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_TIME=y +CONFIG_CMD_REGULATOR=y CONFIG_SPL_OF_CONTROL=y CONFIG_TPL_OF_CONTROL=y CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" @@ -58,8 +61,8 @@ CONFIG_TPL_OF_PLATDATA=y CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_SYS_MMC_ENV_DEV=1 -CONFIG_NET_RANDOM_ETHADDR=y CONFIG_TPL_DM=y +CONFIG_SPL_DM_SEQ_ALIAS=y CONFIG_REGMAP=y CONFIG_SPL_REGMAP=y CONFIG_TPL_REGMAP=y @@ -73,9 +76,11 @@ CONFIG_FASTBOOT_CMD_OEM_FORMAT=y CONFIG_ROCKCHIP_GPIO=y CONFIG_SYS_I2C_ROCKCHIP=y CONFIG_MISC=y +CONFIG_ROCKCHIP_EFUSE=y CONFIG_MMC_DW=y CONFIG_MMC_DW_ROCKCHIP=y CONFIG_PHY_REALTEK=y +CONFIG_DM_ETH_PHY=y CONFIG_PHY_GIGE=y CONFIG_ETH_DESIGNWARE=y CONFIG_GMAC_ROCKCHIP=y @@ -84,9 +89,7 @@ CONFIG_PINCTRL=y CONFIG_SPL_PINCTRL=y CONFIG_DM_PMIC=y CONFIG_PMIC_RK8XX=y -CONFIG_SPL_PMIC_RK8XX=y CONFIG_SPL_DM_REGULATOR=y -CONFIG_REGULATOR_PWM=y CONFIG_DM_REGULATOR_FIXED=y CONFIG_SPL_DM_REGULATOR_FIXED=y CONFIG_DM_REGULATOR_GPIO=y @@ -95,6 +98,8 @@ CONFIG_PWM_ROCKCHIP=y CONFIG_RAM=y CONFIG_SPL_RAM=y CONFIG_TPL_RAM=y +CONFIG_DM_RNG=y +CONFIG_RNG_ROCKCHIP=y CONFIG_BAUDRATE=1500000 CONFIG_DEBUG_UART_SHIFT=2 CONFIG_SYS_NS16550_MEM32=y diff --git a/doc/board/rockchip/rockchip.rst b/doc/board/rockchip/rockchip.rst index e23ca4231cc1..23c2d0254ba2 100644 --- a/doc/board/rockchip/rockchip.rst +++ b/doc/board/rockchip/rockchip.rst @@ -60,8 +60,8 @@ List of mainline supported Rockchip boards: - ODROID-GO Advance (odroid-go2)

• rk3328
  • Rockchip Evb-RK3328 (evb-rk3328)

• - Firefly ROC-RK3328-CC (roc-cc-rk3328)
   - Pine64 Rock64 (rock64-rk3328)
  

• - Firefly-RK3328 (roc-cc-rk3328)
   - Radxa Rockpi E (rock-pi-e-rk3328)
  

  • rk3368
    • GeekBox (geekbox)

On 2024/2/17 08:22, Jonas Karlman wrote:

Update defconfig for rk3328-rock-pi-e with new defaults.

Remove the xPL_DRIVERS_MISC=y option, no misc driver is used in xPL.

Add CONFIG_SPL_FIT_SIGNATURE=y to let SPL verify an auto generated hash of FIT images. This help indicate if there is an issue loading any of the images to DRAM or SRAM. Also add LEGACY_IMAGE_FORMAT=y to keep support for scripts.

Remove SPL_I2C=y and SPL_PMIC_RK8XX=y, the related i2c and pmic nodes is not included in the SPL fdt.

Add CMD_GPIO=y and CMD_REGULATOR=y to add the helpful gpio and regulator commands.

Add ROCKCHIP_EFUSE=y and remove NET_RANDOM_ETHADDR=y, ethaddr and eth1addr is set based on cpuid read from eFUSE.

Add SPL_DM_SEQ_ALIAS=y option to use alias sequence number in SPL.

Add DM_MDIO=y to ensure device tree props can be used by PHY driver.

Remove REGULATOR_PWM=y, the pwm-regulator compatible is not used.

Add RNG_ROCKCHIP=y and DM_RNG=y options to support the onboard random generator.

Also add myself as a reviewer for this board.

Signed-off-by: Jonas Karlman jonas@kwiboo.se

Reviewed-by: Kever Yang kever.yang@rock-chips.com

Thanks, - Kever

---

v2:

• Add CMD_GPIO, CMD_REGULATOR, DM_MDIO and PHY_GIGE
• Remove SPL_I2C, SPL_PMIC_RK8XX and REGULATOR_PWM

---

board/rockchip/evb_rk3328/MAINTAINERS | 1 + configs/rock-pi-e-rk3328_defconfig | 17 ++++++++++------- doc/board/rockchip/rockchip.rst | 2 +- 3 files changed, 12 insertions(+), 8 deletions(-)

diff --git a/board/rockchip/evb_rk3328/MAINTAINERS b/board/rockchip/evb_rk3328/MAINTAINERS index 09488eaf083f..47fd05d2ea8b 100644 --- a/board/rockchip/evb_rk3328/MAINTAINERS +++ b/board/rockchip/evb_rk3328/MAINTAINERS @@ -57,6 +57,7 @@ F: arch/arm/dts/rk3328-rock64-u-boot.dtsi

ROCKPIE-RK3328 M: Banglang Huang banglang.huang@foxmail.com +R: Jonas Karlman jonas@kwiboo.se S: Maintained F: configs/rock-pi-e-rk3328_defconfig F: arch/arm/dts/rk3328-rock-pi-e.dts diff --git a/configs/rock-pi-e-rk3328_defconfig b/configs/rock-pi-e-rk3328_defconfig index 6dda900a9b42..35caad764551 100644 --- a/configs/rock-pi-e-rk3328_defconfig +++ b/configs/rock-pi-e-rk3328_defconfig @@ -15,7 +15,6 @@ CONFIG_ROCKCHIP_RK3328=y CONFIG_TPL_ROCKCHIP_COMMON_BOARD=y CONFIG_TPL_LIBCOMMON_SUPPORT=y CONFIG_TPL_LIBGENERIC_SUPPORT=y -CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL_STACK_R_ADDR=0x4000000 CONFIG_SPL_STACK=0x400000 CONFIG_TPL_SYS_MALLOC_F_LEN=0x800 @@ -27,7 +26,9 @@ CONFIG_DEBUG_UART=y # CONFIG_ANDROID_BOOT_IMAGE is not set CONFIG_FIT=y CONFIG_FIT_VERBOSE=y +CONFIG_SPL_FIT_SIGNATURE=y CONFIG_SPL_LOAD_FIT=y +CONFIG_LEGACY_IMAGE_FORMAT=y CONFIG_DEFAULT_FDT_FILE="rockchip/rk3328-rock-pi-e.dtb" # CONFIG_DISPLAY_CPUINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y @@ -41,17 +42,17 @@ CONFIG_SPL_BSS_MAX_SIZE=0x2000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000 -CONFIG_SPL_I2C=y CONFIG_SPL_POWER=y CONFIG_SPL_ATF=y CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y CONFIG_TPL_SYS_MALLOC_SIMPLE=y -CONFIG_TPL_DRIVERS_MISC=y CONFIG_CMD_BOOTZ=y +CONFIG_CMD_GPIO=y CONFIG_CMD_GPT=y CONFIG_CMD_MMC=y CONFIG_CMD_USB=y CONFIG_CMD_TIME=y +CONFIG_CMD_REGULATOR=y CONFIG_SPL_OF_CONTROL=y CONFIG_TPL_OF_CONTROL=y CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" @@ -59,8 +60,8 @@ CONFIG_TPL_OF_PLATDATA=y CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_SYS_MMC_ENV_DEV=1 -CONFIG_NET_RANDOM_ETHADDR=y CONFIG_TPL_DM=y +CONFIG_SPL_DM_SEQ_ALIAS=y CONFIG_REGMAP=y CONFIG_SPL_REGMAP=y CONFIG_TPL_REGMAP=y @@ -74,10 +75,13 @@ CONFIG_FASTBOOT_CMD_OEM_FORMAT=y CONFIG_ROCKCHIP_GPIO=y CONFIG_SYS_I2C_ROCKCHIP=y CONFIG_MISC=y +CONFIG_ROCKCHIP_EFUSE=y CONFIG_MMC_DW=y CONFIG_MMC_DW_ROCKCHIP=y CONFIG_PHY_REALTEK=y +CONFIG_DM_MDIO=y CONFIG_DM_ETH_PHY=y +CONFIG_PHY_GIGE=y CONFIG_ETH_DESIGNWARE=y CONFIG_GMAC_ROCKCHIP=y CONFIG_PHY_ROCKCHIP_INNO_USB2=y @@ -85,9 +89,7 @@ CONFIG_PINCTRL=y CONFIG_SPL_PINCTRL=y CONFIG_DM_PMIC=y CONFIG_PMIC_RK8XX=y -CONFIG_SPL_PMIC_RK8XX=y CONFIG_SPL_DM_REGULATOR=y -CONFIG_REGULATOR_PWM=y CONFIG_DM_REGULATOR_FIXED=y CONFIG_SPL_DM_REGULATOR_FIXED=y CONFIG_REGULATOR_RK8XX=y @@ -95,9 +97,10 @@ CONFIG_PWM_ROCKCHIP=y CONFIG_RAM=y CONFIG_SPL_RAM=y CONFIG_TPL_RAM=y +CONFIG_DM_RNG=y +CONFIG_RNG_ROCKCHIP=y CONFIG_BAUDRATE=1500000 CONFIG_DEBUG_UART_SHIFT=2 -CONFIG_DEBUG_UART_ANNOUNCE=y CONFIG_SYS_NS16550_MEM32=y CONFIG_SYSINFO=y CONFIG_SYSINFO_SMBIOS=y diff --git a/doc/board/rockchip/rockchip.rst b/doc/board/rockchip/rockchip.rst index 23c2d0254ba2..becd0bfe801d 100644 --- a/doc/board/rockchip/rockchip.rst +++ b/doc/board/rockchip/rockchip.rst @@ -62,7 +62,7 @@ List of mainline supported Rockchip boards: - Rockchip Evb-RK3328 (evb-rk3328) - Firefly ROC-RK3328-CC (roc-cc-rk3328) - Pine64 Rock64 (rock64-rk3328)

• - Radxa Rockpi E (rock-pi-e-rk3328)
  

• - Radxa ROCK Pi E (rock-pi-e-rk3328)
  

  • rk3368
    • GeekBox (geekbox)
    • PX5 EVB (evb-px5)

On 2024/2/17 08:22, Jonas Karlman wrote:

Update defconfig for rk3328-nanopi-r2* boards with new defaults.

Remove the SPL_DRIVERS_MISC=y option, no misc driver is used in SPL.

Add CONFIG_SPL_FIT_SIGNATURE=y to let SPL verify an auto generated hash of FIT images. This help indicate if there is an issue loading any of the images to DRAM or SRAM. Also add LEGACY_IMAGE_FORMAT=y to keep support for scripts.

Remove SPL_I2C=y and SPL_PMIC_RK8XX=y, the related i2c and pmic nodes is not included in the SPL fdt.

Add CMD_GPIO=y and CMD_REGULATOR=y to add the helpful gpio and regulator commands.

Add ROCKCHIP_EFUSE=y and remove NET_RANDOM_ETHADDR=y, ethaddr and eth1addr is set based on cpuid read from eFUSE.

Add SPL_DM_SEQ_ALIAS=y option to use alias sequence number in SPL.

Add DM_ETH_PHY=y, PHY_GIGE=y, PHY_MOTORCOMM=y, PHY_REALTEK=y and remove &gmac2io to support reset of onboard ethernet PHYs. Also add DM_MDIO=y to ensure device tree props is used by motorcomm PHY driver.

Remove REGULATOR_PWM=y, the pwm-regulator compatible is not used.

Add DM_REGULATOR_GPIO=y and SPL_DM_REGULATOR_GPIO=y to support the regulator-gpio compatible.

Add RNG_ROCKCHIP=y and DM_RNG=y options to support the onboard random generator.

Also add missing device tree files to MAINTAINERS file.

Signed-off-by: Jonas Karlman jonas@kwiboo.se

Reviewed-by: Kever Yang kever.yang@rock-chips.com

Thanks, - Kever

---

v2:

• Add CMD_GPIO, CMD_REGULATOR, DM_MDIO, PHY_GIGE, DM_REGULATOR_GPIO and SPL_DM_REGULATOR_GPIO
• Remove SPL_I2C, SPL_PMIC_RK8XX and REGULATOR_PWM

---

arch/arm/dts/rk3328-nanopi-r2s-u-boot.dtsi | 6 ------ board/rockchip/evb_rk3328/MAINTAINERS | 2 ++ configs/nanopi-r2c-plus-rk3328_defconfig | 20 +++++++++++++++----- configs/nanopi-r2c-rk3328_defconfig | 20 +++++++++++++++----- configs/nanopi-r2s-rk3328_defconfig | 20 +++++++++++++++----- doc/board/rockchip/rockchip.rst | 3 +++ 6 files changed, 50 insertions(+), 21 deletions(-)

diff --git a/arch/arm/dts/rk3328-nanopi-r2s-u-boot.dtsi b/arch/arm/dts/rk3328-nanopi-r2s-u-boot.dtsi index d969b008775e..0a1152e8b52d 100644 --- a/arch/arm/dts/rk3328-nanopi-r2s-u-boot.dtsi +++ b/arch/arm/dts/rk3328-nanopi-r2s-u-boot.dtsi @@ -27,9 +27,3 @@ &vcc_sd { bootph-pre-ram; };

-&gmac2io {

• snps,reset-gpio = <&gpio1 RK_PC2 GPIO_ACTIVE_LOW>;
• snps,reset-active-low;
• snps,reset-delays-us = <0 10000 50000>;

-}; diff --git a/board/rockchip/evb_rk3328/MAINTAINERS b/board/rockchip/evb_rk3328/MAINTAINERS index 47fd05d2ea8b..b88727acad26 100644 --- a/board/rockchip/evb_rk3328/MAINTAINERS +++ b/board/rockchip/evb_rk3328/MAINTAINERS @@ -11,12 +11,14 @@ NANOPI-R2C-RK3328 M: Tianling Shen cnsztl@gmail.com S: Maintained F: configs/nanopi-r2c-rk3328_defconfig +F: arch/arm/dts/rk3328-nanopi-r2c.dts F: arch/arm/dts/rk3328-nanopi-r2c-u-boot.dtsi

NANOPI-R2C-PLUS-RK3328 M: Tianling Shen cnsztl@gmail.com S: Maintained F: configs/nanopi-r2c-plus-rk3328_defconfig +F: arch/arm/dts/rk3328-nanopi-r2c-plus.dts F: arch/arm/dts/rk3328-nanopi-r2c-plus-u-boot.dtsi

NANOPI-R2S-RK3328 diff --git a/configs/nanopi-r2c-plus-rk3328_defconfig b/configs/nanopi-r2c-plus-rk3328_defconfig index 320ed8b434a8..7a7b0342629f 100644 --- a/configs/nanopi-r2c-plus-rk3328_defconfig +++ b/configs/nanopi-r2c-plus-rk3328_defconfig @@ -15,7 +15,6 @@ CONFIG_ROCKCHIP_RK3328=y CONFIG_TPL_ROCKCHIP_COMMON_BOARD=y CONFIG_TPL_LIBCOMMON_SUPPORT=y CONFIG_TPL_LIBGENERIC_SUPPORT=y -CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL_STACK_R_ADDR=0x600000 CONFIG_SPL_STACK=0x400000 CONFIG_TPL_SYS_MALLOC_F_LEN=0x800 @@ -26,7 +25,9 @@ CONFIG_DEBUG_UART=y # CONFIG_ANDROID_BOOT_IMAGE is not set CONFIG_FIT=y CONFIG_FIT_VERBOSE=y +CONFIG_SPL_FIT_SIGNATURE=y CONFIG_SPL_LOAD_FIT=y +CONFIG_LEGACY_IMAGE_FORMAT=y CONFIG_DEFAULT_FDT_FILE="rockchip/rk3328-nanopi-r2c-plus.dtb" # CONFIG_DISPLAY_CPUINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y @@ -39,17 +40,18 @@ CONFIG_SPL_BSS_MAX_SIZE=0x2000 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_STACK_R=y -CONFIG_SPL_I2C=y CONFIG_SPL_POWER=y CONFIG_SPL_ATF=y CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y CONFIG_TPL_SYS_MALLOC_SIMPLE=y CONFIG_CMD_BOOTZ=y +CONFIG_CMD_GPIO=y CONFIG_CMD_GPT=y CONFIG_CMD_MMC=y CONFIG_CMD_USB=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_TIME=y +CONFIG_CMD_REGULATOR=y CONFIG_SPL_OF_CONTROL=y CONFIG_TPL_OF_CONTROL=y CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" @@ -57,8 +59,8 @@ CONFIG_TPL_OF_PLATDATA=y CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_SYS_MMC_ENV_DEV=1 -CONFIG_NET_RANDOM_ETHADDR=y CONFIG_TPL_DM=y +CONFIG_SPL_DM_SEQ_ALIAS=y CONFIG_REGMAP=y CONFIG_SPL_REGMAP=y CONFIG_TPL_REGMAP=y @@ -72,8 +74,14 @@ CONFIG_FASTBOOT_CMD_OEM_FORMAT=y CONFIG_ROCKCHIP_GPIO=y CONFIG_SYS_I2C_ROCKCHIP=y CONFIG_MISC=y +CONFIG_ROCKCHIP_EFUSE=y CONFIG_MMC_DW=y CONFIG_MMC_DW_ROCKCHIP=y +CONFIG_PHY_MOTORCOMM=y +CONFIG_PHY_REALTEK=y +CONFIG_DM_MDIO=y +CONFIG_DM_ETH_PHY=y +CONFIG_PHY_GIGE=y CONFIG_ETH_DESIGNWARE=y CONFIG_GMAC_ROCKCHIP=y CONFIG_PHY_ROCKCHIP_INNO_USB2=y @@ -81,16 +89,18 @@ CONFIG_PINCTRL=y CONFIG_SPL_PINCTRL=y CONFIG_DM_PMIC=y CONFIG_PMIC_RK8XX=y -CONFIG_SPL_PMIC_RK8XX=y CONFIG_SPL_DM_REGULATOR=y -CONFIG_REGULATOR_PWM=y CONFIG_DM_REGULATOR_FIXED=y CONFIG_SPL_DM_REGULATOR_FIXED=y +CONFIG_DM_REGULATOR_GPIO=y +CONFIG_SPL_DM_REGULATOR_GPIO=y CONFIG_REGULATOR_RK8XX=y CONFIG_PWM_ROCKCHIP=y CONFIG_RAM=y CONFIG_SPL_RAM=y CONFIG_TPL_RAM=y +CONFIG_DM_RNG=y +CONFIG_RNG_ROCKCHIP=y CONFIG_BAUDRATE=1500000 CONFIG_DEBUG_UART_SHIFT=2 CONFIG_SYS_NS16550_MEM32=y diff --git a/configs/nanopi-r2c-rk3328_defconfig b/configs/nanopi-r2c-rk3328_defconfig index 583179d7c548..becad021f95d 100644 --- a/configs/nanopi-r2c-rk3328_defconfig +++ b/configs/nanopi-r2c-rk3328_defconfig @@ -15,7 +15,6 @@ CONFIG_ROCKCHIP_RK3328=y CONFIG_TPL_ROCKCHIP_COMMON_BOARD=y CONFIG_TPL_LIBCOMMON_SUPPORT=y CONFIG_TPL_LIBGENERIC_SUPPORT=y -CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL_STACK_R_ADDR=0x600000 CONFIG_SPL_STACK=0x400000 CONFIG_TPL_SYS_MALLOC_F_LEN=0x800 @@ -26,7 +25,9 @@ CONFIG_DEBUG_UART=y # CONFIG_ANDROID_BOOT_IMAGE is not set CONFIG_FIT=y CONFIG_FIT_VERBOSE=y +CONFIG_SPL_FIT_SIGNATURE=y CONFIG_SPL_LOAD_FIT=y +CONFIG_LEGACY_IMAGE_FORMAT=y CONFIG_DEFAULT_FDT_FILE="rockchip/rk3328-nanopi-r2c.dtb" # CONFIG_DISPLAY_CPUINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y @@ -39,17 +40,18 @@ CONFIG_SPL_BSS_MAX_SIZE=0x2000 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_STACK_R=y -CONFIG_SPL_I2C=y CONFIG_SPL_POWER=y CONFIG_SPL_ATF=y CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y CONFIG_TPL_SYS_MALLOC_SIMPLE=y CONFIG_CMD_BOOTZ=y +CONFIG_CMD_GPIO=y CONFIG_CMD_GPT=y CONFIG_CMD_MMC=y CONFIG_CMD_USB=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_TIME=y +CONFIG_CMD_REGULATOR=y CONFIG_SPL_OF_CONTROL=y CONFIG_TPL_OF_CONTROL=y CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" @@ -57,8 +59,8 @@ CONFIG_TPL_OF_PLATDATA=y CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_SYS_MMC_ENV_DEV=1 -CONFIG_NET_RANDOM_ETHADDR=y CONFIG_TPL_DM=y +CONFIG_SPL_DM_SEQ_ALIAS=y CONFIG_REGMAP=y CONFIG_SPL_REGMAP=y CONFIG_TPL_REGMAP=y @@ -72,8 +74,14 @@ CONFIG_FASTBOOT_CMD_OEM_FORMAT=y CONFIG_ROCKCHIP_GPIO=y CONFIG_SYS_I2C_ROCKCHIP=y CONFIG_MISC=y +CONFIG_ROCKCHIP_EFUSE=y CONFIG_MMC_DW=y CONFIG_MMC_DW_ROCKCHIP=y +CONFIG_PHY_MOTORCOMM=y +CONFIG_PHY_REALTEK=y +CONFIG_DM_MDIO=y +CONFIG_DM_ETH_PHY=y +CONFIG_PHY_GIGE=y CONFIG_ETH_DESIGNWARE=y CONFIG_GMAC_ROCKCHIP=y CONFIG_PHY_ROCKCHIP_INNO_USB2=y @@ -81,16 +89,18 @@ CONFIG_PINCTRL=y CONFIG_SPL_PINCTRL=y CONFIG_DM_PMIC=y CONFIG_PMIC_RK8XX=y -CONFIG_SPL_PMIC_RK8XX=y CONFIG_SPL_DM_REGULATOR=y -CONFIG_REGULATOR_PWM=y CONFIG_DM_REGULATOR_FIXED=y CONFIG_SPL_DM_REGULATOR_FIXED=y +CONFIG_DM_REGULATOR_GPIO=y +CONFIG_SPL_DM_REGULATOR_GPIO=y CONFIG_REGULATOR_RK8XX=y CONFIG_PWM_ROCKCHIP=y CONFIG_RAM=y CONFIG_SPL_RAM=y CONFIG_TPL_RAM=y +CONFIG_DM_RNG=y +CONFIG_RNG_ROCKCHIP=y CONFIG_BAUDRATE=1500000 CONFIG_DEBUG_UART_SHIFT=2 CONFIG_SYS_NS16550_MEM32=y diff --git a/configs/nanopi-r2s-rk3328_defconfig b/configs/nanopi-r2s-rk3328_defconfig index f7ed71e41228..fc910b9d03c9 100644 --- a/configs/nanopi-r2s-rk3328_defconfig +++ b/configs/nanopi-r2s-rk3328_defconfig @@ -15,7 +15,6 @@ CONFIG_ROCKCHIP_RK3328=y CONFIG_TPL_ROCKCHIP_COMMON_BOARD=y CONFIG_TPL_LIBCOMMON_SUPPORT=y CONFIG_TPL_LIBGENERIC_SUPPORT=y -CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL_STACK_R_ADDR=0x600000 CONFIG_SPL_STACK=0x400000 CONFIG_TPL_SYS_MALLOC_F_LEN=0x800 @@ -26,7 +25,9 @@ CONFIG_DEBUG_UART=y # CONFIG_ANDROID_BOOT_IMAGE is not set CONFIG_FIT=y CONFIG_FIT_VERBOSE=y +CONFIG_SPL_FIT_SIGNATURE=y CONFIG_SPL_LOAD_FIT=y +CONFIG_LEGACY_IMAGE_FORMAT=y CONFIG_DEFAULT_FDT_FILE="rockchip/rk3328-nanopi-r2s.dtb" # CONFIG_DISPLAY_CPUINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y @@ -39,17 +40,18 @@ CONFIG_SPL_BSS_MAX_SIZE=0x2000 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_STACK_R=y -CONFIG_SPL_I2C=y CONFIG_SPL_POWER=y CONFIG_SPL_ATF=y CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y CONFIG_TPL_SYS_MALLOC_SIMPLE=y CONFIG_CMD_BOOTZ=y +CONFIG_CMD_GPIO=y CONFIG_CMD_GPT=y CONFIG_CMD_MMC=y CONFIG_CMD_USB=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_TIME=y +CONFIG_CMD_REGULATOR=y CONFIG_SPL_OF_CONTROL=y CONFIG_TPL_OF_CONTROL=y CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" @@ -57,8 +59,8 @@ CONFIG_TPL_OF_PLATDATA=y CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_SYS_MMC_ENV_DEV=1 -CONFIG_NET_RANDOM_ETHADDR=y CONFIG_TPL_DM=y +CONFIG_SPL_DM_SEQ_ALIAS=y CONFIG_REGMAP=y CONFIG_SPL_REGMAP=y CONFIG_TPL_REGMAP=y @@ -72,8 +74,14 @@ CONFIG_FASTBOOT_CMD_OEM_FORMAT=y CONFIG_ROCKCHIP_GPIO=y CONFIG_SYS_I2C_ROCKCHIP=y CONFIG_MISC=y +CONFIG_ROCKCHIP_EFUSE=y CONFIG_MMC_DW=y CONFIG_MMC_DW_ROCKCHIP=y +CONFIG_PHY_MOTORCOMM=y +CONFIG_PHY_REALTEK=y +CONFIG_DM_MDIO=y +CONFIG_DM_ETH_PHY=y +CONFIG_PHY_GIGE=y CONFIG_ETH_DESIGNWARE=y CONFIG_GMAC_ROCKCHIP=y CONFIG_PHY_ROCKCHIP_INNO_USB2=y @@ -81,16 +89,18 @@ CONFIG_PINCTRL=y CONFIG_SPL_PINCTRL=y CONFIG_DM_PMIC=y CONFIG_PMIC_RK8XX=y -CONFIG_SPL_PMIC_RK8XX=y CONFIG_SPL_DM_REGULATOR=y -CONFIG_REGULATOR_PWM=y CONFIG_DM_REGULATOR_FIXED=y CONFIG_SPL_DM_REGULATOR_FIXED=y +CONFIG_DM_REGULATOR_GPIO=y +CONFIG_SPL_DM_REGULATOR_GPIO=y CONFIG_REGULATOR_RK8XX=y CONFIG_PWM_ROCKCHIP=y CONFIG_RAM=y CONFIG_SPL_RAM=y CONFIG_TPL_RAM=y +CONFIG_DM_RNG=y +CONFIG_RNG_ROCKCHIP=y CONFIG_BAUDRATE=1500000 CONFIG_DEBUG_UART_SHIFT=2 CONFIG_SYS_NS16550_MEM32=y diff --git a/doc/board/rockchip/rockchip.rst b/doc/board/rockchip/rockchip.rst index becd0bfe801d..5f613e7462e5 100644 --- a/doc/board/rockchip/rockchip.rst +++ b/doc/board/rockchip/rockchip.rst @@ -61,6 +61,9 @@ List of mainline supported Rockchip boards:

• rk3328
  • Rockchip Evb-RK3328 (evb-rk3328)
  • Firefly ROC-RK3328-CC (roc-cc-rk3328)

• - FriendlyElec NanoPi R2C (nanopi-r2c-rk3328)
  

• - FriendlyElec NanoPi R2C Plus (nanopi-r2c-plus-rk3328)
  

• - FriendlyElec NanoPi R2S (nanopi-r2s-rk3328)
   - Pine64 Rock64 (rock64-rk3328)
   - Radxa ROCK Pi E (rock-pi-e-rk3328)
  

  • rk3368

On 2024/2/17 08:22, Jonas Karlman wrote:

Update defconfig for rk3328-orangepi-r1-plus boards with new defaults.

Remove the SPL_DRIVERS_MISC=y option, no misc driver is used in SPL.

Add CONFIG_SPL_FIT_SIGNATURE=y to let SPL verify an auto generated hash of FIT images. This help indicate if there is an issue loading any of the images to DRAM or SRAM. Also add LEGACY_IMAGE_FORMAT=y to keep support for scripts.

Remove SPL_I2C=y and SPL_PMIC_RK8XX=y, the related i2c and pmic nodes is not included in the SPL fdt.

Add CMD_GPIO=y and CMD_REGULATOR=y to add the helpful gpio and regulator commands.

Add ROCKCHIP_EFUSE=y and remove NET_RANDOM_ETHADDR=y, ethaddr and eth1addr is set based on cpuid read from eFUSE.

Add SPL_DM_SEQ_ALIAS=y option to use alias sequence number in SPL.

Add DM_ETH_PHY=y, PHY_GIGE=y, PHY_MOTORCOMM=y, PHY_REALTEK=y and remove &gmac2io to support reset of onboard ethernet PHYs. Also add DM_MDIO=y to ensure device tree props is used by motorcomm PHY driver.

Add PHY_ROCKCHIP_INNO_USB2=y option to support the onboard USB PHY.

Remove REGULATOR_PWM=y, the pwm-regulator compatible is not used.

Add RNG_ROCKCHIP=y and DM_RNG=y options to support the onboard random generator.

Also add missing device tree files to MAINTAINERS file.

Signed-off-by: Jonas Karlman jonas@kwiboo.se Reviewed-by: Tianling Shen cnsztl@gmail.com

Reviewed-by: Kever Yang kever.yang@rock-chips.com

Thanks, - Kever

---

v2:

• Add CMD_GPIO, CMD_REGULATOR, DM_MDIO and PHY_GIGE
• Remove SPL_I2C, SPL_PMIC_RK8XX and REGULATOR_PWM
• Collect r-b tag

---

.../rk3328-orangepi-r1-plus-lts-u-boot.dtsi | 6 ------ .../dts/rk3328-orangepi-r1-plus-u-boot.dtsi | 6 ------ board/rockchip/evb_rk3328/MAINTAINERS | 2 ++ configs/orangepi-r1-plus-lts-rk3328_defconfig | 19 ++++++++++++++----- configs/orangepi-r1-plus-rk3328_defconfig | 19 ++++++++++++++----- doc/board/rockchip/rockchip.rst | 2 ++ 6 files changed, 32 insertions(+), 22 deletions(-)

diff --git a/arch/arm/dts/rk3328-orangepi-r1-plus-lts-u-boot.dtsi b/arch/arm/dts/rk3328-orangepi-r1-plus-lts-u-boot.dtsi index 5aaa5ccb15c1..8a4189c6f1cc 100644 --- a/arch/arm/dts/rk3328-orangepi-r1-plus-lts-u-boot.dtsi +++ b/arch/arm/dts/rk3328-orangepi-r1-plus-lts-u-boot.dtsi @@ -28,12 +28,6 @@ bootph-pre-ram; };

-&gmac2io {

• snps,reset-gpio = <&gpio1 RK_PC2 GPIO_ACTIVE_LOW>;
• snps,reset-active-low;
• snps,reset-delays-us = <0 10000 50000>;

-};

• &spi0 { spi_flash: spiflash@0 { bootph-all;

diff --git a/arch/arm/dts/rk3328-orangepi-r1-plus-u-boot.dtsi b/arch/arm/dts/rk3328-orangepi-r1-plus-u-boot.dtsi index 6d3db86dce6a..2e3b6a77a268 100644 --- a/arch/arm/dts/rk3328-orangepi-r1-plus-u-boot.dtsi +++ b/arch/arm/dts/rk3328-orangepi-r1-plus-u-boot.dtsi @@ -28,12 +28,6 @@ bootph-pre-ram; };

-&gmac2io {

• snps,reset-gpio = <&gpio1 RK_PC2 GPIO_ACTIVE_LOW>;
• snps,reset-active-low;
• snps,reset-delays-us = <0 10000 50000>;

-};

• &spi0 { spi_flash: spiflash@0 { bootph-all;

diff --git a/board/rockchip/evb_rk3328/MAINTAINERS b/board/rockchip/evb_rk3328/MAINTAINERS index b88727acad26..675b72dd060c 100644 --- a/board/rockchip/evb_rk3328/MAINTAINERS +++ b/board/rockchip/evb_rk3328/MAINTAINERS @@ -32,12 +32,14 @@ ORANGEPI-R1-PLUS-RK3328 M: Tianling Shen cnsztl@gmail.com S: Maintained F: configs/orangepi-r1-plus-rk3328_defconfig +F: arch/arm/dts/rk3328-orangepi-r1-plus.dts F: arch/arm/dts/rk3328-orangepi-r1-plus-u-boot.dtsi

ORANGEPI-R1-PLUS-LTS-RK3328 M: Tianling Shen cnsztl@gmail.com S: Maintained F: configs/orangepi-r1-plus-lts-rk3328_defconfig +F: arch/arm/dts/rk3328-orangepi-r1-plus-lts.dts F: arch/arm/dts/rk3328-orangepi-r1-plus-lts-u-boot.dtsi

ROC-RK3328-CC diff --git a/configs/orangepi-r1-plus-lts-rk3328_defconfig b/configs/orangepi-r1-plus-lts-rk3328_defconfig index d3d9417509e9..96d563bb4fc5 100644 --- a/configs/orangepi-r1-plus-lts-rk3328_defconfig +++ b/configs/orangepi-r1-plus-lts-rk3328_defconfig @@ -15,7 +15,6 @@ CONFIG_ROCKCHIP_RK3328=y CONFIG_TPL_ROCKCHIP_COMMON_BOARD=y CONFIG_TPL_LIBCOMMON_SUPPORT=y CONFIG_TPL_LIBGENERIC_SUPPORT=y -CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL_STACK_R_ADDR=0x600000 CONFIG_SPL_STACK=0x400000 CONFIG_TPL_SYS_MALLOC_F_LEN=0x800 @@ -26,7 +25,9 @@ CONFIG_DEBUG_UART=y # CONFIG_ANDROID_BOOT_IMAGE is not set CONFIG_FIT=y CONFIG_FIT_VERBOSE=y +CONFIG_SPL_FIT_SIGNATURE=y CONFIG_SPL_LOAD_FIT=y +CONFIG_LEGACY_IMAGE_FORMAT=y CONFIG_DEFAULT_FDT_FILE="rockchip/rk3328-orangepi-r1-plus-lts.dtb" # CONFIG_DISPLAY_CPUINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y @@ -39,17 +40,18 @@ CONFIG_SPL_BSS_MAX_SIZE=0x2000 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_STACK_R=y -CONFIG_SPL_I2C=y CONFIG_SPL_POWER=y CONFIG_SPL_ATF=y CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y CONFIG_TPL_SYS_MALLOC_SIMPLE=y CONFIG_CMD_BOOTZ=y +CONFIG_CMD_GPIO=y CONFIG_CMD_GPT=y CONFIG_CMD_MMC=y CONFIG_CMD_USB=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_TIME=y +CONFIG_CMD_REGULATOR=y CONFIG_SPL_OF_CONTROL=y CONFIG_TPL_OF_CONTROL=y CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" @@ -57,8 +59,8 @@ CONFIG_TPL_OF_PLATDATA=y CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_SYS_MMC_ENV_DEV=1 -CONFIG_NET_RANDOM_ETHADDR=y CONFIG_TPL_DM=y +CONFIG_SPL_DM_SEQ_ALIAS=y CONFIG_REGMAP=y CONFIG_SPL_REGMAP=y CONFIG_TPL_REGMAP=y @@ -72,18 +74,23 @@ CONFIG_FASTBOOT_CMD_OEM_FORMAT=y CONFIG_ROCKCHIP_GPIO=y CONFIG_SYS_I2C_ROCKCHIP=y CONFIG_MISC=y +CONFIG_ROCKCHIP_EFUSE=y CONFIG_MMC_DW=y CONFIG_MMC_DW_ROCKCHIP=y CONFIG_SPI_FLASH_GIGADEVICE=y +CONFIG_PHY_MOTORCOMM=y +CONFIG_PHY_REALTEK=y +CONFIG_DM_MDIO=y +CONFIG_DM_ETH_PHY=y +CONFIG_PHY_GIGE=y CONFIG_ETH_DESIGNWARE=y CONFIG_GMAC_ROCKCHIP=y +CONFIG_PHY_ROCKCHIP_INNO_USB2=y CONFIG_PINCTRL=y CONFIG_SPL_PINCTRL=y CONFIG_DM_PMIC=y CONFIG_PMIC_RK8XX=y -CONFIG_SPL_PMIC_RK8XX=y CONFIG_SPL_DM_REGULATOR=y -CONFIG_REGULATOR_PWM=y CONFIG_DM_REGULATOR_FIXED=y CONFIG_SPL_DM_REGULATOR_FIXED=y CONFIG_REGULATOR_RK8XX=y @@ -91,6 +98,8 @@ CONFIG_PWM_ROCKCHIP=y CONFIG_RAM=y CONFIG_SPL_RAM=y CONFIG_TPL_RAM=y +CONFIG_DM_RNG=y +CONFIG_RNG_ROCKCHIP=y CONFIG_BAUDRATE=1500000 CONFIG_DEBUG_UART_SHIFT=2 CONFIG_SYS_NS16550_MEM32=y diff --git a/configs/orangepi-r1-plus-rk3328_defconfig b/configs/orangepi-r1-plus-rk3328_defconfig index 9356e87132e7..dfb05f176553 100644 --- a/configs/orangepi-r1-plus-rk3328_defconfig +++ b/configs/orangepi-r1-plus-rk3328_defconfig @@ -15,7 +15,6 @@ CONFIG_ROCKCHIP_RK3328=y CONFIG_TPL_ROCKCHIP_COMMON_BOARD=y CONFIG_TPL_LIBCOMMON_SUPPORT=y CONFIG_TPL_LIBGENERIC_SUPPORT=y -CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL_STACK_R_ADDR=0x600000 CONFIG_SPL_STACK=0x400000 CONFIG_TPL_SYS_MALLOC_F_LEN=0x800 @@ -26,7 +25,9 @@ CONFIG_DEBUG_UART=y # CONFIG_ANDROID_BOOT_IMAGE is not set CONFIG_FIT=y CONFIG_FIT_VERBOSE=y +CONFIG_SPL_FIT_SIGNATURE=y CONFIG_SPL_LOAD_FIT=y +CONFIG_LEGACY_IMAGE_FORMAT=y CONFIG_DEFAULT_FDT_FILE="rockchip/rk3328-orangepi-r1-plus.dtb" # CONFIG_DISPLAY_CPUINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y @@ -39,17 +40,18 @@ CONFIG_SPL_BSS_MAX_SIZE=0x2000 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_STACK_R=y -CONFIG_SPL_I2C=y CONFIG_SPL_POWER=y CONFIG_SPL_ATF=y CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y CONFIG_TPL_SYS_MALLOC_SIMPLE=y CONFIG_CMD_BOOTZ=y +CONFIG_CMD_GPIO=y CONFIG_CMD_GPT=y CONFIG_CMD_MMC=y CONFIG_CMD_USB=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_TIME=y +CONFIG_CMD_REGULATOR=y CONFIG_SPL_OF_CONTROL=y CONFIG_TPL_OF_CONTROL=y CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" @@ -57,8 +59,8 @@ CONFIG_TPL_OF_PLATDATA=y CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_SYS_MMC_ENV_DEV=1 -CONFIG_NET_RANDOM_ETHADDR=y CONFIG_TPL_DM=y +CONFIG_SPL_DM_SEQ_ALIAS=y CONFIG_REGMAP=y CONFIG_SPL_REGMAP=y CONFIG_TPL_REGMAP=y @@ -72,18 +74,23 @@ CONFIG_FASTBOOT_CMD_OEM_FORMAT=y CONFIG_ROCKCHIP_GPIO=y CONFIG_SYS_I2C_ROCKCHIP=y CONFIG_MISC=y +CONFIG_ROCKCHIP_EFUSE=y CONFIG_MMC_DW=y CONFIG_MMC_DW_ROCKCHIP=y CONFIG_SPI_FLASH_GIGADEVICE=y +CONFIG_PHY_MOTORCOMM=y +CONFIG_PHY_REALTEK=y +CONFIG_DM_MDIO=y +CONFIG_DM_ETH_PHY=y +CONFIG_PHY_GIGE=y CONFIG_ETH_DESIGNWARE=y CONFIG_GMAC_ROCKCHIP=y +CONFIG_PHY_ROCKCHIP_INNO_USB2=y CONFIG_PINCTRL=y CONFIG_SPL_PINCTRL=y CONFIG_DM_PMIC=y CONFIG_PMIC_RK8XX=y -CONFIG_SPL_PMIC_RK8XX=y CONFIG_SPL_DM_REGULATOR=y -CONFIG_REGULATOR_PWM=y CONFIG_DM_REGULATOR_FIXED=y CONFIG_SPL_DM_REGULATOR_FIXED=y CONFIG_REGULATOR_RK8XX=y @@ -91,6 +98,8 @@ CONFIG_PWM_ROCKCHIP=y CONFIG_RAM=y CONFIG_SPL_RAM=y CONFIG_TPL_RAM=y +CONFIG_DM_RNG=y +CONFIG_RNG_ROCKCHIP=y CONFIG_BAUDRATE=1500000 CONFIG_DEBUG_UART_SHIFT=2 CONFIG_SYS_NS16550_MEM32=y diff --git a/doc/board/rockchip/rockchip.rst b/doc/board/rockchip/rockchip.rst index 5f613e7462e5..612edf917cc3 100644 --- a/doc/board/rockchip/rockchip.rst +++ b/doc/board/rockchip/rockchip.rst @@ -66,6 +66,8 @@ List of mainline supported Rockchip boards: - FriendlyElec NanoPi R2S (nanopi-r2s-rk3328) - Pine64 Rock64 (rock64-rk3328) - Radxa ROCK Pi E (rock-pi-e-rk3328)

• - Xunlong Orange Pi R1 Plus (orangepi-r1-plus-rk3328)
  

• - Xunlong Orange Pi R1 Plus LTS (orangepi-r1-plus-lts-rk3328)
  

  • rk3368
    • GeekBox (geekbox)
    • PX5 EVB (evb-px5)

On 2024/2/17 08:22, Jonas Karlman wrote:

When RK3328 boards run SPL from eMMC and fail to load FIT from eMMC due to it being missing or checksum validation fails there is a fallback to read FIT from SD-card. However, without proper pinctrl configuration reading FIT from SD-card will fail:

U-Boot SPL 2024.04-rc1 (Feb 05 2024 - 22:18:22 +0000) Trying to boot from MMC1 mmc_load_image_raw_sector: mmc block read error Trying to boot from MMC2 Card did not respond to voltage select! : -110 spl: mmc init failed with error: -95 Trying to boot from MMC1 mmc_load_image_raw_sector: mmc block read error SPL: failed to boot from all boot devices ### ERROR ### Please RESET the board ###

Fix this by tagging related emmc and sdmmc pinctrl nodes with bootph props. Also sort and move common nodes shared by all boards to the SoC u-boot.dtsi.

Signed-off-by: Jonas Karlman jonas@kwiboo.se

Reviewed-by: Kever Yang kever.yang@rock-chips.com

Thanks, - Kever

---

v2:

• Add missing UART2 pinctrl nodes to soc u-boot.dtsi
• Mark the pinctrl node to be included in U-Boot proper pre-reloc phase
• Add SD-card IO-voltage related nodes to nanopi-r2 u-boot.dtsi

---

arch/arm/dts/rk3328-evb-u-boot.dtsi | 4 + arch/arm/dts/rk3328-nanopi-r2s-u-boot.dtsi | 13 +-- .../rk3328-orangepi-r1-plus-lts-u-boot.dtsi | 25 ++--- .../dts/rk3328-orangepi-r1-plus-u-boot.dtsi | 25 ++--- arch/arm/dts/rk3328-roc-cc-u-boot.dtsi | 17 ---- arch/arm/dts/rk3328-rock-pi-e-u-boot.dtsi | 17 ---- arch/arm/dts/rk3328-rock64-u-boot.dtsi | 25 ++--- arch/arm/dts/rk3328-u-boot.dtsi | 91 +++++++++++++++++-- 8 files changed, 107 insertions(+), 110 deletions(-)

diff --git a/arch/arm/dts/rk3328-evb-u-boot.dtsi b/arch/arm/dts/rk3328-evb-u-boot.dtsi index 12b68df1ac67..38ad3cc16d09 100644 --- a/arch/arm/dts/rk3328-evb-u-boot.dtsi +++ b/arch/arm/dts/rk3328-evb-u-boot.dtsi @@ -44,3 +44,7 @@ /* Integrated PHY unsupported by U-Boot */ status = "broken"; };

+&vcc_sd {

• bootph-pre-ram;

+}; diff --git a/arch/arm/dts/rk3328-nanopi-r2s-u-boot.dtsi b/arch/arm/dts/rk3328-nanopi-r2s-u-boot.dtsi index 0a1152e8b52d..cca4f06145cf 100644 --- a/arch/arm/dts/rk3328-nanopi-r2s-u-boot.dtsi +++ b/arch/arm/dts/rk3328-nanopi-r2s-u-boot.dtsi @@ -7,23 +7,18 @@ #include "rk3328-u-boot.dtsi" #include "rk3328-sdram-ddr4-666.dtsi"

-&gpio0 { +&gpio1 { bootph-pre-ram; };

-&pinctrl {

• bootph-pre-ram;

-};

-&sdmmc0m1_pin {

• bootph-pre-ram;

+&sdio_vcc_pin {

• bootph-all; };

-&pcfg_pull_up_4ma { +&vcc_io_sdio { bootph-pre-ram; };

-/* Need this and all the pinctrl/gpio stuff above to set pinmux */ &vcc_sd { bootph-pre-ram; }; diff --git a/arch/arm/dts/rk3328-orangepi-r1-plus-lts-u-boot.dtsi b/arch/arm/dts/rk3328-orangepi-r1-plus-lts-u-boot.dtsi index 8a4189c6f1cc..7cdf6913795d 100644 --- a/arch/arm/dts/rk3328-orangepi-r1-plus-lts-u-boot.dtsi +++ b/arch/arm/dts/rk3328-orangepi-r1-plus-lts-u-boot.dtsi @@ -7,29 +7,16 @@ #include "rk3328-u-boot.dtsi" #include "rk3328-sdram-lpddr3-666.dtsi"

-&gpio0 {

• bootph-pre-ram;

-};

-&pinctrl {

• bootph-pre-ram;

-};

-&sdmmc0m1_pin { +&spi0 { bootph-pre-ram; -};

• bootph-some-ram;

-&pcfg_pull_up_4ma {

• bootph-pre-ram;

• flash@0 {

• bootph-pre-ram;
  

• bootph-some-ram;
  

• }; };

-/* Need this and all the pinctrl/gpio stuff above to set pinmux */ &vcc_sd { bootph-pre-ram; };

-&spi0 {

• spi_flash: spiflash@0 {

• bootph-all;
  

• };

-}; diff --git a/arch/arm/dts/rk3328-orangepi-r1-plus-u-boot.dtsi b/arch/arm/dts/rk3328-orangepi-r1-plus-u-boot.dtsi index 2e3b6a77a268..35baeb2464bc 100644 --- a/arch/arm/dts/rk3328-orangepi-r1-plus-u-boot.dtsi +++ b/arch/arm/dts/rk3328-orangepi-r1-plus-u-boot.dtsi @@ -7,29 +7,16 @@ #include "rk3328-u-boot.dtsi" #include "rk3328-sdram-ddr4-666.dtsi"

-&gpio0 {

• bootph-pre-ram;

-};

-&pinctrl {

• bootph-pre-ram;

-};

-&sdmmc0m1_pin { +&spi0 { bootph-pre-ram; -};

• bootph-some-ram;

-&pcfg_pull_up_4ma {

• bootph-pre-ram;

• flash@0 {

• bootph-pre-ram;
  

• bootph-some-ram;
  

• }; };

-/* Need this and all the pinctrl/gpio stuff above to set pinmux */ &vcc_sd { bootph-pre-ram; };

-&spi0 {

• spi_flash: spiflash@0 {

• bootph-all;
  

• };

-}; diff --git a/arch/arm/dts/rk3328-roc-cc-u-boot.dtsi b/arch/arm/dts/rk3328-roc-cc-u-boot.dtsi index 8bc2f134f8f4..47d74964fd0c 100644 --- a/arch/arm/dts/rk3328-roc-cc-u-boot.dtsi +++ b/arch/arm/dts/rk3328-roc-cc-u-boot.dtsi @@ -29,23 +29,6 @@ }; };

-&gpio0 {

• bootph-pre-ram;

-};

-&pinctrl {

• bootph-pre-ram;

-};

-&sdmmc0m1_pin {

• bootph-pre-ram;

-};

-&pcfg_pull_up_4ma {

• bootph-pre-ram;

-};

-/* Need this and all the pinctrl/gpio stuff above to set pinmux */ &vcc_sd { bootph-pre-ram; }; diff --git a/arch/arm/dts/rk3328-rock-pi-e-u-boot.dtsi b/arch/arm/dts/rk3328-rock-pi-e-u-boot.dtsi index 1f220c6dcd0f..9ed0aef1ecc9 100644 --- a/arch/arm/dts/rk3328-rock-pi-e-u-boot.dtsi +++ b/arch/arm/dts/rk3328-rock-pi-e-u-boot.dtsi @@ -29,23 +29,6 @@ }; };

-&gpio0 {

• bootph-pre-ram;

-};

-&pinctrl {

• bootph-pre-ram;

-};

-&sdmmc0m1_pin {

• bootph-pre-ram;

-};

-&pcfg_pull_up_4ma {

• bootph-pre-ram;

-};

-/* Need this and all the pinctrl/gpio stuff above to set pinmux */ &vcc_sd { bootph-pre-ram; }; diff --git a/arch/arm/dts/rk3328-rock64-u-boot.dtsi b/arch/arm/dts/rk3328-rock64-u-boot.dtsi index bfe506fd2249..9de645d8d7ab 100644 --- a/arch/arm/dts/rk3328-rock64-u-boot.dtsi +++ b/arch/arm/dts/rk3328-rock64-u-boot.dtsi @@ -29,29 +29,16 @@ }; };

-&gpio0 {

• bootph-pre-ram;

-};

-&pinctrl {

• bootph-pre-ram;

-};

-&sdmmc0m1_pin { +&spi0 { bootph-pre-ram; -};

• bootph-some-ram;

-&pcfg_pull_up_4ma {

• bootph-pre-ram;

• flash@0 {

• bootph-pre-ram;
  

• bootph-some-ram;
  

• }; };

-/* Need this and all the pinctrl/gpio stuff above to set pinmux */ &vcc_sd { bootph-pre-ram; };

-&spi0 {

• spi_flash: flash@0 {

• bootph-all;
  

• };

-}; diff --git a/arch/arm/dts/rk3328-u-boot.dtsi b/arch/arm/dts/rk3328-u-boot.dtsi index a12be7876db0..687c16da5135 100644 --- a/arch/arm/dts/rk3328-u-boot.dtsi +++ b/arch/arm/dts/rk3328-u-boot.dtsi @@ -38,33 +38,104 @@ bootph-all; };

+&emmc {

• bootph-pre-ram;
• bootph-some-ram;
• /* mmc to sram can't do dma, prevent aborts transferring TF-A parts */
• u-boot,spl-fifo-mode;

+};

+&emmc_bus8 {

• bootph-pre-ram;

+};

+&emmc_clk {

• bootph-pre-ram;

+};

+&emmc_cmd {

• bootph-pre-ram;

+};

+&gpio0 {

• bootph-pre-ram;

+};

• &grf { bootph-all; };

-&uart2 { +&pcfg_pull_none { bootph-all;

• clock-frequency = <24000000>; };

-&emmc { +&pcfg_pull_none_8ma {

• bootph-pre-ram;

+};

+&pcfg_pull_none_12ma {

• bootph-pre-ram;

+};

+&pcfg_pull_up { bootph-all; +};

• /* mmc to sram can't do dma, prevent aborts transfering TF-A parts */
• u-boot,spl-fifo-mode;

+&pcfg_pull_up_4ma {

• bootph-pre-ram;

+};

+&pcfg_pull_up_8ma {

• bootph-pre-ram;

+};

+&pcfg_pull_up_12ma {

• bootph-pre-ram;

+};

+&pinctrl {

• bootph-pre-ram;

• bootph-some-ram; };

  &sdmmc {

• bootph-all;

• bootph-pre-ram;
• bootph-some-ram;

• /* mmc to sram can't do dma, prevent aborts transfering TF-A parts */

• /* mmc to sram can't do dma, prevent aborts transferring TF-A parts */ u-boot,spl-fifo-mode; };

-&usb20_otg {

• hnp-srp-disable;

+&sdmmc0_bus4 {

• bootph-pre-ram;

+};

+&sdmmc0_clk {

• bootph-pre-ram;

+};

+&sdmmc0_cmd {

• bootph-pre-ram;

+};

+&sdmmc0_dectn {

• bootph-pre-ram;

+};

+&sdmmc0m1_pin {

• bootph-pre-ram;

+};

+&uart2 {

• bootph-all;
• clock-frequency = <24000000>; };

-&spi0 { +&uart2m1_xfer { bootph-all; };

+&usb20_otg {

• hnp-srp-disable;

+};

Hi Quentin,

On 2024-02-22 11:18, Quentin Schulz wrote:

Hi Jonas,

On 2/17/24 01:22, Jonas Karlman wrote:

...

Similar to RK35xx the BootRom in RK3328 can read all data and look for idbloader at 0x8000, same as it does for SD and eMMC.

Use the rksd format and modify the mkimage offset to generate a bootable u-boot-rockchip-spi.bin that can be written to 0x0 of SPI NOR flash.

Signed-off-by: Jonas Karlman jonas@kwiboo.se

v2:

• No change

---

arch/arm/dts/rk3328-u-boot.dtsi | 11 +++++++++++ arch/arm/mach-rockchip/rk3328/rk3328.c | 1 + 2 files changed, 12 insertions(+)

diff --git a/arch/arm/dts/rk3328-u-boot.dtsi b/arch/arm/dts/rk3328-u-boot.dtsi index a030f1a5e51d..4d43fe2fb51a 100644 --- a/arch/arm/dts/rk3328-u-boot.dtsi +++ b/arch/arm/dts/rk3328-u-boot.dtsi @@ -133,3 +133,14 @@ &usb20_otg { hnp-srp-disable; };

+#ifdef CONFIG_ROCKCHIP_SPI_IMAGE +&binman {

• simple-bin-spi {

• mkimage {
  

• 	args = "-n", CONFIG_SYS_SOC, "-T", "rksd";
  

• 	offset = <0x8000>;
  

• };
  

• };

+}; +#endif

Do we have a list of SoCs that need to use rkspi type for booting from SPI flashes? I would much rather have rksd the default in rockchip-u-boot.dtsi instead of having to add it for each and every SoC which is not impacted by this change (which I assume should be now all new SoCs?).

My best guess is that any BROM prior to and including RK3399 use the 2K per page read code for SPI flash. Any newer SoC seem to have SPI more in common with MMC, i.e. read full page data and look for boot header at similar offsets, @ 32KiB.

I have been able to read out the BROM version (last 16 bytes of BROM) from my RK ARM64 SoCs:

Read 2K per page: RK3399: 330C 20160118 V100

Read full SPI flash data: RK3328: 320C 20161117 V100 RK356x: 350A 20210322 V300 RK3588: 350B 20210512 V100

Unsure, guessing it read full SPI flash data: RK3308B: 330E 20180806 V200

There is also a longer list of BROM versions of older SoCs at [1].

[1] https://github.com/rockchip-linux/u-boot/blob/next-dev/arch/arm/mach-rockchi...

I could also imagine a Kconfig symbol just for that, one that would NOT appear in menuconfig because it makes no sense to make it selectable (I think this can be achieved without a prompt?), e.g. (not tested): """ config ROCKCHIP_SPI_IMAGE_TYPE string depends on ROCKCHIP_SPI_IMAGE default "rksd" default "rkspi" if ROCKCHIP_RK3399 help The type passed to mkimage to generate a TPL+SPL image bootable from SPI flash on Rockchip SoCs. """

and then have """ args = "-n", CONFIG_SYS_SOC, "-T", CONFIG_ROCKCHIP_SPI_IMAGE_TYPE; """

in rockchip-u-boot.dtsi instead?

Agree that we should try to fix this in a different way, still not sure what the best approach will be.

Another approach I played around with was to modify the mkimage rkspi format to only apply the 2K padding on affected SoCs [2]. At that time I used the RK_HEADER_V1/V2 flag, but as seen for RK3328 that cannot be used to reliably know if the padding is needed or not.

From what I can see in mainline U-Boot only boards with the following

SoCs have ROCKCHIP_SPI_IMAGE enabled:

- RK3288 and RK3399 (2K per page) - RK356x and RK3588 (full page)

With RK3328 also using full page read the scale have now tipped over so that we could prefer rksd format over rkspi. Unless anyone would like to enable it for a board with an older SoC.

I am open for any suggestion on how we should proceed :-)

[2] https://github.com/Kwiboo/u-boot-rockchip/commit/7b42660412493496c379015dc50...

I've missed those changes for other SoCs but did you explain why the SPI image is expected to start at offset 0x8000? We don't have that in rockchip-u-boot.dtsi by default, so offset 0 I assume.

Based on my testing of boot from SPI flash on RK356x booting worked when I wrote ID block @ 32 KiB offset from start of SPI flash. This was different to the @ 0 offset used on RK3288 and RK3399.

Most documentation already mentioned that u-boot-rockchip-spi.bin should be written to start of SPI flash. Adding an offset of 32 KiB so that the same instruction can be used across SoCs seemed like the best approach.

Regards, Jonas

Cheers, Quentin