[U-Boot] [PATCH 1/4] armv7: fsl: remove sata support
Remove the old implementation in order to enable DM for sata
Signed-off-by: Peng Ma peng.ma@nxp.com --- arch/arm/cpu/armv7/ls102xa/Makefile | 1 - arch/arm/cpu/armv7/ls102xa/ls102xa_sata.c | 41 --------------------- arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h | 27 -------------- arch/arm/include/asm/arch-ls102xa/ls102xa_sata.h | 10 ----- board/freescale/ls1021aiot/ls1021aiot.c | 5 --- board/freescale/ls1021aqds/ls1021aqds.c | 4 -- board/freescale/ls1021atwr/ls1021atwr.c | 4 -- 7 files changed, 0 insertions(+), 92 deletions(-) delete mode 100644 arch/arm/cpu/armv7/ls102xa/ls102xa_sata.c delete mode 100644 arch/arm/include/asm/arch-ls102xa/ls102xa_sata.h
diff --git a/arch/arm/cpu/armv7/ls102xa/Makefile b/arch/arm/cpu/armv7/ls102xa/Makefile index f8300c7..0c1596f 100644 --- a/arch/arm/cpu/armv7/ls102xa/Makefile +++ b/arch/arm/cpu/armv7/ls102xa/Makefile @@ -10,7 +10,6 @@ obj-y += timer.o obj-y += fsl_epu.o obj-y += soc.o
-obj-$(CONFIG_SCSI_AHCI_PLAT) += ls102xa_sata.o obj-$(CONFIG_OF_LIBFDT) += fdt.o obj-$(CONFIG_SYS_HAS_SERDES) += fsl_ls1_serdes.o ls102xa_serdes.o obj-$(CONFIG_SPL) += spl.o diff --git a/arch/arm/cpu/armv7/ls102xa/ls102xa_sata.c b/arch/arm/cpu/armv7/ls102xa/ls102xa_sata.c deleted file mode 100644 index c9fe752..0000000 --- a/arch/arm/cpu/armv7/ls102xa/ls102xa_sata.c +++ /dev/null @@ -1,41 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * Copyright 2015 Freescale Semiconductor, Inc. - */ -#include <common.h> -#include <asm/io.h> -#include <asm/arch/immap_ls102xa.h> -#include <ahci.h> -#include <scsi.h> - -/* port register default value */ -#define AHCI_PORT_PHY_1_CFG 0xa003fffe -#define AHCI_PORT_PHY_2_CFG 0x28183414 -#define AHCI_PORT_PHY_3_CFG 0x0e080e06 -#define AHCI_PORT_PHY_4_CFG 0x064a080b -#define AHCI_PORT_PHY_5_CFG 0x2aa86470 -#define AHCI_PORT_TRANS_CFG 0x08000029 - -#define SATA_ECC_REG_ADDR 0x20220520 -#define SATA_ECC_DISABLE 0x00020000 - -int ls1021a_sata_init(void) -{ - struct ccsr_ahci __iomem *ccsr_ahci = (void *)AHCI_BASE_ADDR; - -#ifdef CONFIG_SYS_FSL_ERRATUM_A008407 - out_le32((void *)SATA_ECC_REG_ADDR, SATA_ECC_DISABLE); -#endif - - out_le32(&ccsr_ahci->ppcfg, AHCI_PORT_PHY_1_CFG); - out_le32(&ccsr_ahci->pp2c, AHCI_PORT_PHY_2_CFG); - out_le32(&ccsr_ahci->pp3c, AHCI_PORT_PHY_3_CFG); - out_le32(&ccsr_ahci->pp4c, AHCI_PORT_PHY_4_CFG); - out_le32(&ccsr_ahci->pp5c, AHCI_PORT_PHY_5_CFG); - out_le32(&ccsr_ahci->ptc, AHCI_PORT_TRANS_CFG); - - ahci_init((void __iomem *)AHCI_BASE_ADDR); - scsi_scan(false); - - return 0; -} diff --git a/arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h b/arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h index 13a282f..d6ba298 100644 --- a/arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h +++ b/arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h @@ -389,33 +389,6 @@ struct ccsr_serdes { u8 res_a00[0x1000-0xa00]; /* from 0xa00 to 0xfff */ };
- - -/* AHCI (sata) register map */ -struct ccsr_ahci { - u32 res1[0xa4/4]; /* 0x0 - 0xa4 */ - u32 pcfg; /* port config */ - u32 ppcfg; /* port phy1 config */ - u32 pp2c; /* port phy2 config */ - u32 pp3c; /* port phy3 config */ - u32 pp4c; /* port phy4 config */ - u32 pp5c; /* port phy5 config */ - u32 paxic; /* port AXI config */ - u32 axicc; /* AXI cache control */ - u32 axipc; /* AXI PROT control */ - u32 ptc; /* port Trans Config */ - u32 pts; /* port Trans Status */ - u32 plc; /* port link config */ - u32 plc1; /* port link config1 */ - u32 plc2; /* port link config2 */ - u32 pls; /* port link status */ - u32 pls1; /* port link status1 */ - u32 pcmdc; /* port CMD config */ - u32 ppcs; /* port phy control status */ - u32 pberr; /* port 0/1 BIST error */ - u32 cmds; /* port 0/1 CMD status error */ -}; - #define RCPM_POWMGTCSR 0x130 #define RCPM_POWMGTCSR_SERDES_PW 0x80000000 #define RCPM_POWMGTCSR_LPM20_REQ 0x00100000 diff --git a/arch/arm/include/asm/arch-ls102xa/ls102xa_sata.h b/arch/arm/include/asm/arch-ls102xa/ls102xa_sata.h deleted file mode 100644 index 3acc5af..0000000 --- a/arch/arm/include/asm/arch-ls102xa/ls102xa_sata.h +++ /dev/null @@ -1,10 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * Copyright 2015 Freescale Semiconductor, Inc. - */ - -#ifndef __FSL_SATA_H_ -#define __FSL_SATA_H_ - -int ls1021a_sata_init(void); -#endif diff --git a/board/freescale/ls1021aiot/ls1021aiot.c b/board/freescale/ls1021aiot/ls1021aiot.c index a691dab..fb05b55 100644 --- a/board/freescale/ls1021aiot/ls1021aiot.c +++ b/board/freescale/ls1021aiot/ls1021aiot.c @@ -11,7 +11,6 @@
#include <asm/arch/ls102xa_devdis.h> #include <asm/arch/ls102xa_soc.h> -#include <asm/arch/ls102xa_sata.h> #include <fsl_csu.h> #include <fsl_esdhc.h> #include <fsl_immap.h> @@ -206,10 +205,6 @@ int board_init(void) #ifdef CONFIG_BOARD_LATE_INIT int board_late_init(void) { -#ifdef CONFIG_SCSI_AHCI_PLAT - ls1021a_sata_init(); -#endif - return 0; } #endif diff --git a/board/freescale/ls1021aqds/ls1021aqds.c b/board/freescale/ls1021aqds/ls1021aqds.c index 6722cad..c828dac 100644 --- a/board/freescale/ls1021aqds/ls1021aqds.c +++ b/board/freescale/ls1021aqds/ls1021aqds.c @@ -11,7 +11,6 @@ #include <asm/arch/fsl_serdes.h> #include <asm/arch/ls102xa_soc.h> #include <asm/arch/ls102xa_devdis.h> -#include <asm/arch/ls102xa_sata.h> #include <hwconfig.h> #include <mmc.h> #include <fsl_csu.h> @@ -362,9 +361,6 @@ int config_serdes_mux(void) #ifdef CONFIG_BOARD_LATE_INIT int board_late_init(void) { -#ifdef CONFIG_SCSI_AHCI_PLAT - ls1021a_sata_init(); -#endif #ifdef CONFIG_CHAIN_OF_TRUST fsl_setenv_chain_of_trust(); #endif diff --git a/board/freescale/ls1021atwr/ls1021atwr.c b/board/freescale/ls1021atwr/ls1021atwr.c index 863bf76..dcd6d93 100644 --- a/board/freescale/ls1021atwr/ls1021atwr.c +++ b/board/freescale/ls1021atwr/ls1021atwr.c @@ -11,7 +11,6 @@ #include <asm/arch/fsl_serdes.h> #include <asm/arch/ls102xa_devdis.h> #include <asm/arch/ls102xa_soc.h> -#include <asm/arch/ls102xa_sata.h> #include <hwconfig.h> #include <mmc.h> #include <fsl_csu.h> @@ -556,9 +555,6 @@ void spl_board_init(void) #ifdef CONFIG_BOARD_LATE_INIT int board_late_init(void) { -#ifdef CONFIG_SCSI_AHCI_PLAT - ls1021a_sata_init(); -#endif #ifdef CONFIG_CHAIN_OF_TRUST fsl_setenv_chain_of_trust(); #endif
Add sata node to support this feature.
Signed-off-by: Peng Ma peng.ma@nxp.com --- arch/arm/dts/ls1021a-qds.dtsi | 4 ++++ arch/arm/dts/ls1021a-twr.dtsi | 4 ++++ arch/arm/dts/ls1021a.dtsi | 7 +++++++ 3 files changed, 15 insertions(+), 0 deletions(-)
diff --git a/arch/arm/dts/ls1021a-qds.dtsi b/arch/arm/dts/ls1021a-qds.dtsi index fb1af15..47c128f 100644 --- a/arch/arm/dts/ls1021a-qds.dtsi +++ b/arch/arm/dts/ls1021a-qds.dtsi @@ -212,3 +212,7 @@ &uart1 { status = "okay"; }; + +&sata { + status = "okay"; +}; diff --git a/arch/arm/dts/ls1021a-twr.dtsi b/arch/arm/dts/ls1021a-twr.dtsi index 63f2079..14e0cea 100644 --- a/arch/arm/dts/ls1021a-twr.dtsi +++ b/arch/arm/dts/ls1021a-twr.dtsi @@ -103,3 +103,7 @@ &uart1 { status = "okay"; }; + +&sata { + status = "okay"; +}; diff --git a/arch/arm/dts/ls1021a.dtsi b/arch/arm/dts/ls1021a.dtsi index 5b3fc6a..dcc4ac7 100644 --- a/arch/arm/dts/ls1021a.dtsi +++ b/arch/arm/dts/ls1021a.dtsi @@ -404,5 +404,12 @@ ranges = <0x81000000 0x0 0x00000000 0x34020000 0x0 0x00010000 /* downstream I/O */ 0x82000000 0x0 0x38000000 0x38000000 0x0 0x08000000>; /* non-prefetchable memory */ }; + + sata: sata@3200000 { + compatible = "fsl,ls1021a-ahci"; + reg = <0x3200000 0x10000>; + interrupts = <0 101 4>; + status = "disabled"; + }; }; };
Enable related configs to support sata DM feature.
Signed-off-by: Peng Ma peng.ma@nxp.com --- configs/ls1021atwr_nor_defconfig | 5 +++++ 1 files changed, 5 insertions(+), 0 deletions(-)
diff --git a/configs/ls1021atwr_nor_defconfig b/configs/ls1021atwr_nor_defconfig index f4f7998..ffee644 100644 --- a/configs/ls1021atwr_nor_defconfig +++ b/configs/ls1021atwr_nor_defconfig @@ -50,3 +50,8 @@ CONFIG_VIDEO=y # CONFIG_VIDEO_SW_CURSOR is not set CONFIG_BLK=y CONFIG_DM_MMC=y +CONFIG_DM_SCSI=y +CONFIG_SATA_CEVA=y +CONFIG_SCSI_AHCI=y +CONFIG_SCSI=y +CONFIG_AHCI=y
On 07/31/2018 11:18 PM, Peng Ma wrote:
Enable related configs to support sata DM feature.
Signed-off-by: Peng Ma peng.ma@nxp.com
configs/ls1021atwr_nor_defconfig | 5 +++++ 1 files changed, 5 insertions(+), 0 deletions(-)
diff --git a/configs/ls1021atwr_nor_defconfig b/configs/ls1021atwr_nor_defconfig index f4f7998..ffee644 100644 --- a/configs/ls1021atwr_nor_defconfig +++ b/configs/ls1021atwr_nor_defconfig @@ -50,3 +50,8 @@ CONFIG_VIDEO=y # CONFIG_VIDEO_SW_CURSOR is not set CONFIG_BLK=y CONFIG_DM_MMC=y +CONFIG_DM_SCSI=y +CONFIG_SATA_CEVA=y +CONFIG_SCSI_AHCI=y +CONFIG_SCSI=y +CONFIG_AHCI=y
Peng,
Your code base has CONFIG_BLK=y but upstream code doesn't have it. Please rebase your patches and verify before sending another version.
Thanks.
York
Hi York,
This patch depend on https://patchwork.ozlabs.org/patch/941093/ , I forgot to write depend on. Could I add "depend on" in My patch at V3 or not?
Best regards Peng Ma -----Original Message----- From: York Sun Sent: 2018年8月8日 5:49 To: Peng Ma peng.ma@nxp.com Cc: albert.u.boot@aribaud.net; feng.li_2@nxp.com; Alison Wang alison.wang@nxp.com; sumit.garg@nxp.com; Sriram Dash sriram.dash@nxp.com; suresh.bhagat@nxp.com; Ran Wang ran.wang_1@nxp.com; Rajesh Bhagat rajesh.bhagat@nxp.com; Ashish Kumar ashish.kumar@nxp.com; michal.simek@xilinx.com; sjg@chromium.org; Andy Tang andy.tang@nxp.com; u-boot@lists.denx.de Subject: Re: [PATCH 3/4] arm: ls1021atwr: enable DM support for sata
On 07/31/2018 11:18 PM, Peng Ma wrote:
Enable related configs to support sata DM feature.
Signed-off-by: Peng Ma peng.ma@nxp.com
configs/ls1021atwr_nor_defconfig | 5 +++++ 1 files changed, 5 insertions(+), 0 deletions(-)
diff --git a/configs/ls1021atwr_nor_defconfig b/configs/ls1021atwr_nor_defconfig index f4f7998..ffee644 100644 --- a/configs/ls1021atwr_nor_defconfig +++ b/configs/ls1021atwr_nor_defconfig @@ -50,3 +50,8 @@ CONFIG_VIDEO=y # CONFIG_VIDEO_SW_CURSOR is not set CONFIG_BLK=y CONFIG_DM_MMC=y +CONFIG_DM_SCSI=y +CONFIG_SATA_CEVA=y +CONFIG_SCSI_AHCI=y +CONFIG_SCSI=y +CONFIG_AHCI=y
Peng,
Your code base has CONFIG_BLK=y but upstream code doesn't have it. Please rebase your patches and verify before sending another version.
Thanks.
York
On 08/07/2018 06:52 PM, Peng Ma wrote:
Hi York,
This patch depend on https://patchwork.ozlabs.org/patch/941093/ , I forgot to write depend on. Could I add "depend on" in My patch at V3 or not?
Do not send another version for this explanation. The patch set you depend on need to change. I see v4 for that set, but the first patch is not right. Please respond to my comment for that patch https://patchwork.ozlabs.org/patch/953746/.
York
Add ahci compatible support for ls1021a soc.
Signed-off-by: Peng Ma peng.ma@nxp.com --- drivers/ata/sata_ceva.c | 24 ++++++++++++++++++++++++ 1 files changed, 24 insertions(+), 0 deletions(-)
diff --git a/drivers/ata/sata_ceva.c b/drivers/ata/sata_ceva.c index aa31515..e45679b 100644 --- a/drivers/ata/sata_ceva.c +++ b/drivers/ata/sata_ceva.c @@ -82,13 +82,24 @@ #define CEVA_TRANS_CFG 0x08000029 #define CEVA_AXICC_CFG 0x3fffffff
+/* for ls1021a */ +#define LS1021_AHCI_VEND_AXICC 0xC0 +#define LS1021_CEVA_PHY2_CFG 0x28183414 +#define LS1021_CEVA_PHY3_CFG 0x0e080e06 +#define LS1021_CEVA_PHY4_CFG 0x064a080b +#define LS1021_CEVA_PHY5_CFG 0x2aa86470 + /* ecc addr-val pair */ #define ECC_DIS_ADDR_CH2 0x80000000 #define ECC_DIS_VAL_CH2 0x20140520 +#define SATA_ECC_REG_ADDR 0x20220520 +#define SATA_ECC_DISABLE 0x00020000
enum ceva_soc { CEVA_1V84, CEVA_LS1012A, + CEVA_LS1021A, CEVA_LS1043A, };
@@ -115,6 +126,18 @@ static int ceva_init_sata(struct ceva_sata_priv *priv) writel(tmp, base + AHCI_VEND_PTC); break;
+ case CEVA_LS1021A: + writel(SATA_ECC_DISABLE, SATA_ECC_REG_ADDR); + writel(CEVA_PHY1_CFG, base + AHCI_VEND_PPCFG); + writel(LS1021_CEVA_PHY2_CFG, base + AHCI_VEND_PP2C); + writel(LS1021_CEVA_PHY3_CFG, base + AHCI_VEND_PP3C); + writel(LS1021_CEVA_PHY4_CFG, base + AHCI_VEND_PP4C); + writel(LS1021_CEVA_PHY5_CFG, base + AHCI_VEND_PP5C); + writel(CEVA_TRANS_CFG, base + AHCI_VEND_PTC); + if (priv->flag & FLAG_COHERENT) + writel(CEVA_AXICC_CFG, base + LS1021_AHCI_VEND_AXICC); + break; + case CEVA_LS1012A: case CEVA_LS1043A: writel(ECC_DIS_ADDR_CH2, ECC_DIS_VAL_CH2); @@ -147,6 +170,7 @@ static int sata_ceva_probe(struct udevice *dev) static const struct udevice_id sata_ceva_ids[] = { { .compatible = "ceva,ahci-1v84", .data = CEVA_1V84 }, { .compatible = "fsl,ls1012a-ahci", .data = CEVA_LS1012A }, + { .compatible = "fsl,ls1021a-ahci", .data = CEVA_LS1021A }, { .compatible = "fsl,ls1043a-ahci", .data = CEVA_LS1043A }, { } };
On 1.8.2018 08:15, Peng Ma wrote:
Add ahci compatible support for ls1021a soc.
Signed-off-by: Peng Ma peng.ma@nxp.com
drivers/ata/sata_ceva.c | 24 ++++++++++++++++++++++++ 1 files changed, 24 insertions(+), 0 deletions(-)
diff --git a/drivers/ata/sata_ceva.c b/drivers/ata/sata_ceva.c index aa31515..e45679b 100644 --- a/drivers/ata/sata_ceva.c +++ b/drivers/ata/sata_ceva.c @@ -82,13 +82,24 @@ #define CEVA_TRANS_CFG 0x08000029 #define CEVA_AXICC_CFG 0x3fffffff
+/* for ls1021a */ +#define LS1021_AHCI_VEND_AXICC 0xC0 +#define LS1021_CEVA_PHY2_CFG 0x28183414 +#define LS1021_CEVA_PHY3_CFG 0x0e080e06 +#define LS1021_CEVA_PHY4_CFG 0x064a080b +#define LS1021_CEVA_PHY5_CFG v
/* ecc addr-val pair */c #define ECC_DIS_ADDR_CH2 0x80000000 #define ECC_DIS_VAL_CH2 0x20140520 +#define SATA_ECC_REG_ADDR 0x20220520 +#define SATA_ECC_DISABLE 0x00020000
enum ceva_soc { CEVA_1V84, CEVA_LS1012A,
- CEVA_LS1021A, CEVA_LS1043A,
};
@@ -115,6 +126,18 @@ static int ceva_init_sata(struct ceva_sata_priv *priv) writel(tmp, base + AHCI_VEND_PTC); break;
- case CEVA_LS1021A:
writel(SATA_ECC_DISABLE, SATA_ECC_REG_ADDR);writel(CEVA_PHY1_CFG, base + AHCI_VEND_PPCFG);writel(LS1021_CEVA_PHY2_CFG, base + AHCI_VEND_PP2C);writel(LS1021_CEVA_PHY3_CFG, base + AHCI_VEND_PP3C);writel(LS1021_CEVA_PHY4_CFG, base + AHCI_VEND_PP4C);writel(LS1021_CEVA_PHY5_CFG, base + AHCI_VEND_PP5C);writel(CEVA_TRANS_CFG, base + AHCI_VEND_PTC);if (priv->flag & FLAG_COHERENT)writel(CEVA_AXICC_CFG, base + LS1021_AHCI_VEND_AXICC);break;- case CEVA_LS1012A: case CEVA_LS1043A: writel(ECC_DIS_ADDR_CH2, ECC_DIS_VAL_CH2);
@@ -147,6 +170,7 @@ static int sata_ceva_probe(struct udevice *dev) static const struct udevice_id sata_ceva_ids[] = { { .compatible = "ceva,ahci-1v84", .data = CEVA_1V84 }, { .compatible = "fsl,ls1012a-ahci", .data = CEVA_LS1012A },
- { .compatible = "fsl,ls1021a-ahci", .data = CEVA_LS1021A }, { .compatible = "fsl,ls1043a-ahci", .data = CEVA_LS1043A }, { }
};
Acked-by: Michal Simek michal.simek@xilinx.com
Thanks, Michal
On 07/31/2018 11:15 PM, Peng Ma wrote:
Add ahci compatible support for ls1021a soc.
Signed-off-by: Peng Ma peng.ma@nxp.com Acked-by: Michal Simek michal.simek@xilinx.com
drivers/ata/sata_ceva.c | 24 ++++++++++++++++++++++++ 1 files changed, 24 insertions(+), 0 deletions(-)
writel(tmp, base + AHCI_VEND_PTC); break;
- case CEVA_LS1021A:
writel(SATA_ECC_DISABLE, SATA_ECC_REG_ADDR);writel(CEVA_PHY1_CFG, base + AHCI_VEND_PPCFG);writel(LS1021_CEVA_PHY2_CFG, base + AHCI_VEND_PP2C);writel(LS1021_CEVA_PHY3_CFG, base + AHCI_VEND_PP3C);writel(LS1021_CEVA_PHY4_CFG, base + AHCI_VEND_PP4C);writel(LS1021_CEVA_PHY5_CFG, base + AHCI_VEND_PP5C);writel(CEVA_TRANS_CFG, base + AHCI_VEND_PTC);if (priv->flag & FLAG_COHERENT)writel(CEVA_AXICC_CFG, base + LS1021_AHCI_VEND_AXICC);break;
Peng,
Looks this this patch is corrupted. Is the above change at line 116?
York
On 07/31/2018 11:18 PM, Peng Ma wrote:
Remove the old implementation in order to enable DM for sata
Signed-off-by: Peng Ma peng.ma@nxp.com
This patch set has been applied to fsl-qoriq master, awaiting upstream. Thanks.
York
participants (3)
-
Michal Simek -
Peng Ma -
York Sun