Ping?

Is this patch acceptable for merging?

Cheers, Kyle Moffett

On Oct 18, 2011, at 17:16, Moffett, Kyle D wrote:

Standard Debian powerpc and powerpcspe systems only include hard-float libgcc in their native compilers, which causes scary build warnings when building U-Boot.

While U-Boot does not use floating point at all, it is perfectly legal for a hard-float libgcc to use features of the floating point unit to implement 64-bit divides and shifts. Since U-Boot does not set up the floating point unit or initialize the registers, that could cause crashes or other misbehavior.

In particular, on e500 systems with SPE extensions, a "hard-float" libgcc might use the top half of the "extended" 64-bit registers for various 64-bit shifts and other operations, which is probably unsafe.

To avoid a dependency on "nof" (IE: soft-float) libgcc provided by the system toolchain, U-Boot should be able to provide its own copies of the necessary routines just like the Linux kernel does. In particular, this resolves build failures on native Debian PowerPC systems which no longer provide any soft-float libraries in the system toolchain.

This patch provides an implementation of USE_PRIVATE_LIBGCC=yes from the Linux Kernel that matches what the ARM architecture implements in assembly files in arch/arm/lib/*.S

Specifically, the routines are: _ashldi3(), _ashrdi3(), and _lshrdi3(). They were borrowed from arch/powerpc/kernel/misc_32.S as of v2.6.38-rc5, commit 85e2efbb1db9a18d218006706d6e4fbeb0216213, and are GPLv2+.

The Makefile framework was copied from the U-Boot ARM port.

Signed-off-by: Kyle Moffett Kyle.D.Moffett@boeing.com Cc: Wolfgang Denk wd@denx.de Cc: Kim Phillips kim.phillips@freescale.com Cc: Andy Fleming afleming@gmail.com Cc: Kumar Gala kumar.gala@freescale.com Cc: Stefan Roese sr@denx.de

---

I believe I have addressed all of the previous questions regarding this patch with an updated commit message. Can this be merged?

Cheers, Kyle Moffett

-- Curious about my work on the Debian powerpcspe port? I'm keeping a blog here: http://pureperl.blogspot.com/

---

arch/powerpc/lib/Makefile | 23 ++++++++++++++++++++- arch/powerpc/lib/_ashldi3.S | 45 +++++++++++++++++++++++++++++++++++++++++ arch/powerpc/lib/_ashrdi3.S | 47 +++++++++++++++++++++++++++++++++++++++++++ arch/powerpc/lib/_lshrdi3.S | 45 +++++++++++++++++++++++++++++++++++++++++ 4 files changed, 159 insertions(+), 1 deletions(-) create mode 100644 arch/powerpc/lib/_ashldi3.S create mode 100644 arch/powerpc/lib/_ashrdi3.S create mode 100644 arch/powerpc/lib/_lshrdi3.S

diff --git a/arch/powerpc/lib/Makefile b/arch/powerpc/lib/Makefile index 724d8ee..cdd62a2 100644 --- a/arch/powerpc/lib/Makefile +++ b/arch/powerpc/lib/Makefile @@ -23,6 +23,19 @@

include $(TOPDIR)/config.mk

+## Build a couple of necessary functions into a private libgcc +LIBGCC = $(obj)libgcc.o +GLSOBJS += _ashldi3.o +GLSOBJS += _ashrdi3.o +GLSOBJS += _lshrdi3.o +LGOBJS := $(addprefix $(obj),$(GLSOBJS)) \

•   $(addprefix $(obj),$(GLCOBJS))
  

+## But only build it if the user asked for it +ifdef USE_PRIVATE_LIBGCC +TARGETS += $(LIBGCC) +endif

LIB = $(obj)lib$(ARCH).o

SOBJS-y += ppccache.o @@ -53,9 +66,14 @@ endif

COBJS += $(sort $(COBJS-y))

-SRCS := $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c) +SRCS := $(GLSOBJS:.o=.S) $(GLCOBJS:.o=.c) \

•   $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c)
  

OBJS := $(addprefix $(obj),$(SOBJS-y) $(COBJS-y))

+TARGETS += $(LIB)

+all: $(TARGETS)

$(LIB): $(obj).depend $(OBJS) @if ! $(CROSS_COMPILE)readelf -S $(OBJS) | grep -q '.fixup.*PROGBITS';\ then \ @@ -65,6 +83,9 @@ $(LIB): $(obj).depend $(OBJS) fi; $(call cmd_link_o_target, $(OBJS))

+$(LIBGCC): $(obj).depend $(LGOBJS)

• $(call cmd_link_o_target, $(LGOBJS))

#########################################################################

# defines $(obj).depend target diff --git a/arch/powerpc/lib/_ashldi3.S b/arch/powerpc/lib/_ashldi3.S new file mode 100644 index 0000000..e452f56 --- /dev/null +++ b/arch/powerpc/lib/_ashldi3.S @@ -0,0 +1,45 @@ +/*

• • This code was copied from arch/powerpc/kernel/misc_32.S in the Linux
• • kernel sources (commit 85e2efbb1db9a18d218006706d6e4fbeb0216213, also
• • known as 2.6.38-rc5). The source file copyrights are as follows:
• • (C) Copyright 1995-1996 Gary Thomas (gdt@linuxppc.org)
• • Largely rewritten by Cort Dougan (cort@cs.nmt.edu)
• • and Paul Mackerras.
• • This program is free software; you can redistribute it and/or
• • modify it under the terms of the GNU General Public License as
• • published by the Free Software Foundation; either version 2 of
• • the License, or (at your option) any later version.
• */

+#include <ppc_asm.tmpl> +#include <ppc_defs.h> +#include <config.h>

+/*

• • Extended precision shifts.
• • Updated to be valid for shift counts from 0 to 63 inclusive.
• • -- Gabriel
• • R3/R4 has 64 bit value
• • R5 has shift count
• • result in R3/R4
• • ashrdi3: arithmetic right shift (sign propagation)
• • lshrdi3: logical right shift
• • ashldi3: left shift
• */
• .globl __ashldi3

+__ashldi3:

• subfic r6,r5,32
• slw r3,r3,r5 # MSW = count > 31 ? 0 : MSW << count
• addi r7,r5,32 # could be xori, or addi with -32
• srw r6,r4,r6 # t1 = count > 31 ? 0 : LSW >> (32-count)
• slw r7,r4,r7 # t2 = count < 32 ? 0 : LSW << (count-32)
• or r3,r3,r6 # MSW |= t1
• slw r4,r4,r5 # LSW = LSW << count
• or r3,r3,r7 # MSW |= t2
• blr

diff --git a/arch/powerpc/lib/_ashrdi3.S b/arch/powerpc/lib/_ashrdi3.S new file mode 100644 index 0000000..f28ab49 --- /dev/null +++ b/arch/powerpc/lib/_ashrdi3.S @@ -0,0 +1,47 @@ +/*

• • This code was copied from arch/powerpc/kernel/misc_32.S in the Linux
• • kernel sources (commit 85e2efbb1db9a18d218006706d6e4fbeb0216213, also
• • known as 2.6.38-rc5). The source file copyrights are as follows:
• • (C) Copyright 1995-1996 Gary Thomas (gdt@linuxppc.org)
• • Largely rewritten by Cort Dougan (cort@cs.nmt.edu)
• • and Paul Mackerras.
• • This program is free software; you can redistribute it and/or
• • modify it under the terms of the GNU General Public License as
• • published by the Free Software Foundation; either version 2 of
• • the License, or (at your option) any later version.
• */

+#include <ppc_asm.tmpl> +#include <ppc_defs.h> +#include <config.h>

+/*

• • Extended precision shifts.
• • Updated to be valid for shift counts from 0 to 63 inclusive.
• • -- Gabriel
• • R3/R4 has 64 bit value
• • R5 has shift count
• • result in R3/R4
• • ashrdi3: arithmetic right shift (sign propagation)
• • lshrdi3: logical right shift
• • ashldi3: left shift
• */
• .globl __ashrdi3

+__ashrdi3:

• subfic r6,r5,32
• srw r4,r4,r5 # LSW = count > 31 ? 0 : LSW >> count
• addi r7,r5,32 # could be xori, or addi with -32
• slw r6,r3,r6 # t1 = count > 31 ? 0 : MSW << (32-count)
• rlwinm r8,r7,0,32 # t3 = (count < 32) ? 32 : 0
• sraw r7,r3,r7 # t2 = MSW >> (count-32)
• or r4,r4,r6 # LSW |= t1
• slw r7,r7,r8 # t2 = (count < 32) ? 0 : t2
• sraw r3,r3,r5 # MSW = MSW >> count
• or r4,r4,r7 # LSW |= t2
• blr

diff --git a/arch/powerpc/lib/_lshrdi3.S b/arch/powerpc/lib/_lshrdi3.S new file mode 100644 index 0000000..c1bbe7b --- /dev/null +++ b/arch/powerpc/lib/_lshrdi3.S @@ -0,0 +1,45 @@ +/*

• • This code was copied from arch/powerpc/kernel/misc_32.S in the Linux
• • kernel sources (commit 85e2efbb1db9a18d218006706d6e4fbeb0216213, also
• • known as 2.6.38-rc5). The source file copyrights are as follows:
• • (C) Copyright 1995-1996 Gary Thomas (gdt@linuxppc.org)
• • Largely rewritten by Cort Dougan (cort@cs.nmt.edu)
• • and Paul Mackerras.
• • This program is free software; you can redistribute it and/or
• • modify it under the terms of the GNU General Public License as
• • published by the Free Software Foundation; either version 2 of
• • the License, or (at your option) any later version.
• */

+#include <ppc_asm.tmpl> +#include <ppc_defs.h> +#include <config.h>

+/*

• • Extended precision shifts.
• • Updated to be valid for shift counts from 0 to 63 inclusive.
• • -- Gabriel
• • R3/R4 has 64 bit value
• • R5 has shift count
• • result in R3/R4
• • ashrdi3: arithmetic right shift (sign propagation)
• • lshrdi3: logical right shift
• • ashldi3: left shift
• */
• .globl __lshrdi3

+__lshrdi3:

• subfic r6,r5,32
• srw r4,r4,r5 # LSW = count > 31 ? 0 : LSW >> count
• addi r7,r5,32 # could be xori, or addi with -32
• slw r6,r3,r6 # t1 = count > 31 ? 0 : MSW << (32-count)
• srw r7,r3,r7 # t2 = count < 32 ? 0 : MSW >> (count-32)
• or r4,r4,r6 # LSW |= t1
• srw r3,r3,r5 # MSW = MSW >> count
• or r4,r4,r7 # LSW |= t2
• blr

-- 1.7.2.5