[U-Boot-Users] U-Boot help request for OHCI driver with CPU cache on
Hi all, I am porting U-Boot to a MIPS64 platform, that uses USB host controller NEC uPD720101 on PCI bus.
I didn't modify anything related with USB driver, I just enabled OHCI in the configuration. When CPU cache is disabled, USB is perfect working. When CPU cache is enabled, every driver works well but not USB.
Could you suggest me how to solve the problem? Is there any specific part of USB driver that requires cache handling?
Best Regards, Ryan Chen
Ryan CHEN ryan.chen@st.com writes:
I am porting U-Boot to a MIPS64 platform, that uses USB host controller NEC uPD720101 on PCI bus.
What CPU? What version of U-Boot are you using?
I didn't modify anything related with USB driver, I just enabled OHCI in the configuration.
Please be more specific, *exactly* which USB options did you enable in your config?
When CPU cache is disabled, USB is perfect working. When CPU cache is enabled, every driver works well but not USB.
Again, what is "not working well"?
Could you suggest me how to solve the problem? Is there any specific part of USB driver that requires cache handling?
None that I'm aware of, but I could imagine that enabling caches might cause some kind of problems.
Best regards
Markus Klotzbuecher
-- DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-0 Fax: +49-8142-66989-80 Email: office@denx.de
On Thursday 15 May 2008 10:37:04 Markus Klotzbücher wrote:
Could you suggest me how to solve the problem? Is there any specific part of USB driver that requires cache handling?
None that I'm aware of, but I could imagine that enabling caches might cause some kind of problems.
With U-Boot's current OHCI implementation you will run into trouble at least with cache incoherent CPUs like the 4xx PowerPCs. The 4xx_enet driver has been modified to deal with this stuff when data caches are enabled. The USB OHCI driver will also need that kind of fixing (making the code very ugly). An other approach would be to put the USB DMA accessable memory into some non-cached memory. Perhaps this is much more simple.
I am not very familiar with MIPS64. But I bet that this is Ryan's problem.
Matthias
Hi Matthias,
Matthias Fuchs matthias.fuchs@esd-electronics.com writes:
On Thursday 15 May 2008 10:37:04 Markus Klotzbücher wrote:
Could you suggest me how to solve the problem? Is there any specific part of USB driver that requires cache handling?
None that I'm aware of, but I could imagine that enabling caches might cause some kind of problems.
With U-Boot's current OHCI implementation you will run into trouble at least with cache incoherent CPUs like the 4xx PowerPCs. The 4xx_enet driver has been modified to deal with this stuff when data caches are enabled. The USB OHCI driver will also need that kind of fixing (making the code very ugly). An other approach would be to put the USB DMA accessable memory into some non-cached memory. Perhaps this is much more simple.
Thanks for the explanation. Yes I agree that this is likely the problem.
I'm wondering if the benefits of having the cache enabled is worth the pain of fixing (= making the code uglier) this at all. I somehow doubt it.
Best regards
Markus Klotzbuecher
-- DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-0 Fax: +49-8142-66989-80 Email: office@denx.de
Yes, I have tried the first suggestion from Matthias Fuchs. But make it working with cache is very complex. So now I am trying the way that map one TLB entry to make USB hcca and data struct in uncached region. I think it's a easy way but not suitable for other platform.
Best Regards, Ryan Chen
-----Original Message----- From: Markus Klotzbücher [mailto:mk@denx.de] Sent: Saturday, May 17, 2008 12:25 AM To: Matthias Fuchs Cc: u-boot-users@lists.sourceforge.net; Ryan CHEN; ebenard@eukrea.com; weissg@vienna.at; Zhang Wei Subject: Re: [U-Boot-Users] U-Boot help request for OHCI driver with CPU cache on
Hi Matthias,
Matthias Fuchs matthias.fuchs@esd-electronics.com writes:
On Thursday 15 May 2008 10:37:04 Markus Klotzbücher wrote:
Could you suggest me how to solve the problem? Is there any specific part of USB driver that requires cache handling?
None that I'm aware of, but I could imagine that enabling caches might cause some kind of problems.
With U-Boot's current OHCI implementation you will run into trouble at least with cache incoherent CPUs like the 4xx PowerPCs. The 4xx_enet driver has been modified to deal with this stuff when data caches are enabled. The USB OHCI driver will also need that kind of fixing (making the code very ugly). An other approach would be to put the USB DMA accessable memory into some non-cached memory. Perhaps this is much more simple.
Thanks for the explanation. Yes I agree that this is likely the problem.
I'm wondering if the benefits of having the cache enabled is worth the pain of fixing (= making the code uglier) this at all. I somehow doubt it.
Best regards
Markus Klotzbuecher
-- DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-0 Fax: +49-8142-66989-80 Email: office@denx.de
Hi Ryan,
you are probably using the CONFIG_USB_OHCI_NEW option for your PCI OHCI controller. The code in drivers/usb/usb_ohci.c is currently not aware of caches. So we need to add some flush/invalidates at the correct places.
I think nobody will keep you from starting to work on this :-)
Matthias
On Thursday 15 May 2008 06:33:07 Ryan CHEN wrote:
Hi all, I am porting U-Boot to a MIPS64 platform, that uses USB host controller NEC uPD720101 on PCI bus.
I didn't modify anything related with USB driver, I just enabled OHCI in the configuration. When CPU cache is disabled, USB is perfect working. When CPU cache is enabled, every driver works well but not USB.
Could you suggest me how to solve the problem? Is there any specific part of USB driver that requires cache handling?
Best Regards, Ryan Chen
participants (3)
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Markus Klotzbücher -
Matthias Fuchs -
Ryan CHEN