[PATCH 1/3] arm: dts: imx8mn-beacon: Resync dtsi with Kernel 5.17-rc1
Resync the SOM and baseboard files with the device trees that will be included in 5.17-RC1 when it's cut. This will improve pinmuxing for USDHC1 and add USB functionality. Add edits to imx8mn-beacon-kit-u-boot for enabling USB.
Signed-off-by: Adam Ford aford173@gmail.com
diff --git a/arch/arm/dts/imx8mn-beacon-baseboard.dtsi b/arch/arm/dts/imx8mn-beacon-baseboard.dtsi index 376ca8ff72..0f40b43ac0 100644 --- a/arch/arm/dts/imx8mn-beacon-baseboard.dtsi +++ b/arch/arm/dts/imx8mn-beacon-baseboard.dtsi @@ -126,7 +126,6 @@ compatible = "wlf,wm8962"; reg = <0x1a>; clocks = <&clk IMX8MN_CLK_SAI3_ROOT>; - clock-names = "xclk"; DCVDD-supply = <®_audio>; DBVDD-supply = <®_audio>; AVDD-supply = <®_audio>; diff --git a/arch/arm/dts/imx8mn-beacon-kit-u-boot.dtsi b/arch/arm/dts/imx8mn-beacon-kit-u-boot.dtsi index 69fd69c8d0..a06b271787 100644 --- a/arch/arm/dts/imx8mn-beacon-kit-u-boot.dtsi +++ b/arch/arm/dts/imx8mn-beacon-kit-u-boot.dtsi @@ -110,6 +110,10 @@ u-boot,dm-spl; };
+&usbotg1 { + dr_mode="host"; +}; + &usdhc1 { u-boot,dm-spl; sd-uhs-sdr104; diff --git a/arch/arm/dts/imx8mn-beacon-som.dtsi b/arch/arm/dts/imx8mn-beacon-som.dtsi index de2cd0e320..1133cded9b 100644 --- a/arch/arm/dts/imx8mn-beacon-som.dtsi +++ b/arch/arm/dts/imx8mn-beacon-som.dtsi @@ -101,7 +101,7 @@ #size-cells = <1>; compatible = "jedec,spi-nor"; spi-max-frequency = <80000000>; - spi-tx-bus-width = <4>; + spi-tx-bus-width = <1>; spi-rx-bus-width = <4>; }; }; @@ -120,6 +120,9 @@ interrupt-parent = <&gpio1>; interrupts = <3 IRQ_TYPE_LEVEL_LOW>; rohm,reset-snvs-powered; + #clock-cells = <0>; + clocks = <&osc_32k 0>; + clock-output-names = "clk-32k-out";
regulators { buck1_reg: BUCK1 { @@ -262,12 +265,15 @@ &usdhc1 { #address-cells = <1>; #size-cells = <0>; - pinctrl-names = "default"; + pinctrl-names = "default", "state_100mhz", "state_200mhz"; pinctrl-0 = <&pinctrl_usdhc1>; + pinctrl-1 = <&pinctrl_usdhc1_100mhz>; + pinctrl-2 = <&pinctrl_usdhc1_200mhz>; + vmmc-supply = <&buck4_reg>; + vqmmc-supply = <&buck5_reg>; bus-width = <4>; non-removable; cap-power-off-card; - pm-ignore-notify; keep-power-in-suspend; mmc-pwrseq = <&usdhc1_pwrseq>; status = "okay";
With the updated device tree's having USB support, enable in U-Boot. This also requires the addition of the imx8m power domain, since the USB is gated by the power domain controller.
Signed-off-by: Adam Ford aford173@gmail.com
diff --git a/configs/imx8mn_beacon_defconfig b/configs/imx8mn_beacon_defconfig index cfe43102a7..045faed35f 100644 --- a/configs/imx8mn_beacon_defconfig +++ b/configs/imx8mn_beacon_defconfig @@ -54,6 +54,8 @@ CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y CONFIG_CMD_PART=y CONFIG_CMD_SPI=y +CONFIG_CMD_USB=y +CONFIG_CMD_USB_MASS_STORAGE=y CONFIG_CMD_DHCP=y CONFIG_CMD_MII=y CONFIG_CMD_PING=y @@ -131,6 +133,7 @@ CONFIG_DM_THERMAL=y CONFIG_USB=y # CONFIG_SPL_DM_USB is not set CONFIG_USB_EHCI_HCD=y +CONFIG_USB_STORAGE=y CONFIG_USB_GADGET=y CONFIG_USB_GADGET_MANUFACTURER="FSL" CONFIG_USB_GADGET_VENDOR_NUM=0x0525 @@ -139,3 +142,4 @@ CONFIG_CI_UDC=y CONFIG_SDP_LOADADDR=0x0 CONFIG_OF_LIBFDT_OVERLAY=y CONFIG_IMX_WATCHDOG=y +
Hi Adam,
On Sat, Jan 22, 2022 at 4:48 PM Adam Ford aford173@gmail.com wrote:
CONFIG_OF_LIBFDT_OVERLAY=y CONFIG_IMX_WATCHDOG=y
Unneeded blank line in this and in the next patch.
Reviewed-by: Fabio Estevam festevam@gmail.com
Sync'ing the imx8mn_beacon_2g_defconfig with the standard model means making the configs the same with one additional flag because the 2G version has a different RAM.
Signed-off-by: Adam Ford aford173@gmail.com
diff --git a/configs/imx8mn_beacon_2g_defconfig b/configs/imx8mn_beacon_2g_defconfig index 8b98d687ec..c6af6beaf9 100644 --- a/configs/imx8mn_beacon_2g_defconfig +++ b/configs/imx8mn_beacon_2g_defconfig @@ -39,6 +39,7 @@ CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x300 CONFIG_SPL_I2C=y CONFIG_SPL_POWER=y +CONFIG_SPL_WATCHDOG=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="u-boot=> " # CONFIG_BOOTM_NETBSD is not set @@ -53,6 +54,9 @@ CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y CONFIG_CMD_PART=y +CONFIG_CMD_SPI=y +CONFIG_CMD_USB=y +CONFIG_CMD_USB_MASS_STORAGE=y CONFIG_CMD_DHCP=y CONFIG_CMD_MII=y CONFIG_CMD_PING=y @@ -64,7 +68,6 @@ CONFIG_CMD_EXT4_WRITE=y CONFIG_CMD_FAT=y CONFIG_OF_CONTROL=y CONFIG_SPL_OF_CONTROL=y -CONFIG_OF_SPL_REMOVE_PROPS="interrupt-parent interrupts" CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y @@ -93,10 +96,13 @@ CONFIG_MMC_UHS_SUPPORT=y CONFIG_MMC_HS400_ES_SUPPORT=y CONFIG_MMC_HS400_SUPPORT=y CONFIG_FSL_USDHC=y +CONFIG_MTD=y +CONFIG_DM_MTD=y CONFIG_DM_SPI_FLASH=y CONFIG_SF_DEFAULT_SPEED=40000000 CONFIG_SPI_FLASH_BAR=y CONFIG_SPI_FLASH_STMICRO=y +CONFIG_SPI_FLASH_MTD=y CONFIG_PHYLIB=y CONFIG_PHY_ATHEROS=y CONFIG_DM_ETH=y @@ -104,6 +110,7 @@ CONFIG_PHY_GIGE=y CONFIG_FEC_MXC=y CONFIG_MII=y CONFIG_PINCTRL=y +CONFIG_SPL_PINCTRL=y CONFIG_PINCTRL_IMX8M=y CONFIG_DM_PMIC=y # CONFIG_SPL_PMIC_CHILDREN is not set @@ -118,12 +125,16 @@ CONFIG_DM_SERIAL=y CONFIG_MXC_UART=y CONFIG_SPI=y CONFIG_DM_SPI=y +CONFIG_NXP_FSPI=y CONFIG_SYSRESET=y +CONFIG_SPL_SYSRESET=y CONFIG_SYSRESET_PSCI=y +CONFIG_SYSRESET_WATCHDOG=y CONFIG_DM_THERMAL=y CONFIG_USB=y # CONFIG_SPL_DM_USB is not set CONFIG_USB_EHCI_HCD=y +CONFIG_USB_STORAGE=y CONFIG_USB_GADGET=y CONFIG_USB_GADGET_MANUFACTURER="FSL" CONFIG_USB_GADGET_VENDOR_NUM=0x0525 @@ -131,3 +142,5 @@ CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5 CONFIG_CI_UDC=y CONFIG_SDP_LOADADDR=0x0 CONFIG_OF_LIBFDT_OVERLAY=y +CONFIG_IMX_WATCHDOG=y +
On Sat, Jan 22, 2022 at 4:48 PM Adam Ford aford173@gmail.com wrote:
Resync the SOM and baseboard files with the device trees that will be included in 5.17-RC1 when it's cut. This will improve pinmuxing for USDHC1 and add USB functionality. Add edits to imx8mn-beacon-kit-u-boot for enabling USB.
Signed-off-by: Adam Ford aford173@gmail.com
Reviewed-by: Fabio Estevam festevam@gmail.com
participants (2)
-
Adam Ford -
Fabio Estevam