[U-Boot] [PATCH 1/8] arm926ej-s: Invalidate instruction cache in flush_cache
If U-Boot is loaded from RAM and the OS is loaded into an overlapping region, the instruction cache is not coherent when that OS is started. We must therefore invalidate the instruction cache in addition to cleaning the data cache.
Signed-off-by: Michael Spang mspang@csclub.uwaterloo.ca --- arch/arm/lib/cache.c | 2 ++ 1 files changed, 2 insertions(+), 0 deletions(-)
diff --git a/arch/arm/lib/cache.c b/arch/arm/lib/cache.c index 30686fe..047786a 100644 --- a/arch/arm/lib/cache.c +++ b/arch/arm/lib/cache.c @@ -37,6 +37,8 @@ void flush_cache (unsigned long dummy1, unsigned long dummy2) asm("0: mrc p15, 0, r15, c7, c10, 3\n\t" "bne 0b\n" : : : "memory"); /* disable write buffer as well (page 2-22) */ asm("mcr p15, 0, %0, c7, c10, 4" : : "r" (0)); + /* invalidate icache for coherence with cleaned dcache */ + asm("mcr p15, 0, %0, c7, c5, 0" : : "r" (0)); #endif #ifdef CONFIG_OMAP34XX void v7_flush_cache_all(void);
This code intends to read the SDRAM controller base address registers but is instead reading the CPU window base address registers.
Signed-off-by: Michael Spang mspang@csclub.uwaterloo.ca --- arch/arm/cpu/arm926ejs/orion5x/dram.c | 2 +- arch/arm/include/asm/arch-orion5x/orion5x.h | 1 + 2 files changed, 2 insertions(+), 1 deletions(-)
diff --git a/arch/arm/cpu/arm926ejs/orion5x/dram.c b/arch/arm/cpu/arm926ejs/orion5x/dram.c index b749282..7f3a318 100644 --- a/arch/arm/cpu/arm926ejs/orion5x/dram.c +++ b/arch/arm/cpu/arm926ejs/orion5x/dram.c @@ -38,7 +38,7 @@ u32 orion5x_sdram_bar(enum memory_bank bank) { struct orion5x_ddr_addr_decode_registers *winregs = (struct orion5x_ddr_addr_decode_registers *) - ORION5X_CPU_WIN_BASE; + ORION5X_SDRAM_CTRL_BASE;
u32 result = 0; u32 enable = 0x01 & winregs[bank].size; diff --git a/arch/arm/include/asm/arch-orion5x/orion5x.h b/arch/arm/include/asm/arch-orion5x/orion5x.h index e3d3f76..f262ad1 100644 --- a/arch/arm/include/asm/arch-orion5x/orion5x.h +++ b/arch/arm/include/asm/arch-orion5x/orion5x.h @@ -42,6 +42,7 @@ #define ORION5X_REGISTER(x) (ORION5X_REGS_PHY_BASE + x)
/* Documented registers */ +#define ORION5X_SDRAM_CTRL_BASE (ORION5X_REGISTER(0x01500)) #define ORION5X_TWSI_BASE (ORION5X_REGISTER(0x11000)) #define ORION5X_UART0_BASE (ORION5X_REGISTER(0x12000)) #define ORION5X_UART1_BASE (ORION5X_REGISTER(0x12100))
Hi Michael,
Le 29/01/2011 02:00, Michael Spang a écrit :
This code intends to read the SDRAM controller base address registers but is instead reading the CPU window base address registers.
Side note: IIUC this change is not required since the CPU Window registers match the SDRAM controller registers on orion5x in U-boot; but it is fine if only for the sake of correctness, and assuming it works for other orion5x boards (testing underway for edminiv2).
Signed-off-by: Michael Spangmspang@csclub.uwaterloo.ca
arch/arm/cpu/arm926ejs/orion5x/dram.c | 2 +- arch/arm/include/asm/arch-orion5x/orion5x.h | 1 + 2 files changed, 2 insertions(+), 1 deletions(-)
diff --git a/arch/arm/cpu/arm926ejs/orion5x/dram.c b/arch/arm/cpu/arm926ejs/orion5x/dram.c index b749282..7f3a318 100644 --- a/arch/arm/cpu/arm926ejs/orion5x/dram.c +++ b/arch/arm/cpu/arm926ejs/orion5x/dram.c @@ -38,7 +38,7 @@ u32 orion5x_sdram_bar(enum memory_bank bank) { struct orion5x_ddr_addr_decode_registers *winregs = (struct orion5x_ddr_addr_decode_registers *)
Please remove the 'ddr_' part of the struct name while you're at it: this struct is not DDR specific, it also covers CPU window register.
ORION5X_CPU_WIN_BASE;
ORION5X_SDRAM_CTRL_BASE;u32 result = 0; u32 enable = 0x01& winregs[bank].size;
diff --git a/arch/arm/include/asm/arch-orion5x/orion5x.h b/arch/arm/include/asm/arch-orion5x/orion5x.h index e3d3f76..f262ad1 100644 --- a/arch/arm/include/asm/arch-orion5x/orion5x.h +++ b/arch/arm/include/asm/arch-orion5x/orion5x.h @@ -42,6 +42,7 @@ #define ORION5X_REGISTER(x) (ORION5X_REGS_PHY_BASE + x)
/* Documented registers */ +#define ORION5X_SDRAM_CTRL_BASE (ORION5X_REGISTER(0x01500)) #define ORION5X_TWSI_BASE (ORION5X_REGISTER(0x11000)) #define ORION5X_UART0_BASE (ORION5X_REGISTER(0x12000)) #define ORION5X_UART1_BASE (ORION5X_REGISTER(0x12100))
Amicalement,
On Sat, Jan 29, 2011 at 2:24 AM, Albert ARIBAUD albert.aribaud@free.fr wrote:
diff --git a/arch/arm/cpu/arm926ejs/orion5x/dram.c b/arch/arm/cpu/arm926ejs/orion5x/dram.c index b749282..7f3a318 100644 --- a/arch/arm/cpu/arm926ejs/orion5x/dram.c +++ b/arch/arm/cpu/arm926ejs/orion5x/dram.c @@ -38,7 +38,7 @@ u32 orion5x_sdram_bar(enum memory_bank bank) { struct orion5x_ddr_addr_decode_registers *winregs = (struct orion5x_ddr_addr_decode_registers *)
Please remove the 'ddr_' part of the struct name while you're at it: this struct is not DDR specific, it also covers CPU window register.
Done.
Michael
On 2011/01/29 9:24 AM, Albert ARIBAUD wrote:
Hi Michael,
Le 29/01/2011 02:00, Michael Spang a écrit :
This code intends to read the SDRAM controller base address registers but is instead reading the CPU window base address registers.
Side note: IIUC this change is not required since the CPU Window registers match the SDRAM controller registers on orion5x in U-boot; but it is fine if only for the sake of correctness, and assuming it works for other orion5x boards (testing underway for edminiv2).
I have this same change in my patch set for the DNS323, for what it is worth. I must have needed it, but I can't remember exactly what the behaviour was without it. :-)
Rogan
On Fri, Mar 18, 2011 at 1:57 AM, Rogan Dawes rogan@dawes.za.net wrote:
On 2011/01/29 9:24 AM, Albert ARIBAUD wrote:
Hi Michael,
Le 29/01/2011 02:00, Michael Spang a écrit :
This code intends to read the SDRAM controller base address registers but is instead reading the CPU window base address registers.
Side note: IIUC this change is not required since the CPU Window registers match the SDRAM controller registers on orion5x in U-boot; but it is fine if only for the sake of correctness, and assuming it works for other orion5x boards (testing underway for edminiv2).
I have this same change in my patch set for the DNS323, for what it is worth. I must have needed it, but I can't remember exactly what the behaviour was without it. :-)
Rogan
I was having trouble remembering what was wrong as well. It turns out the CPU window registers are not actually laid out in the way that the structure and code expect. The "cpu address map registers" have the layout
struct { u32 control; u32 base; };
which is not the same as the SD-RAM registers:
struct { u32 base; u32 size; };
The result is that the test to see if the window is enabled fails, even though it is enabled. This works by coincidence for the TS-7800, because the window being disabled causes the correct base address of 0 to be returned.
Michael
The TS-7800 has one 128M RAM bank, so the maximum must be increased.
Signed-off-by: Michael Spang mspang@csclub.uwaterloo.ca --- arch/arm/include/asm/arch-orion5x/orion5x.h | 2 +- 1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/arch/arm/include/asm/arch-orion5x/orion5x.h b/arch/arm/include/asm/arch-orion5x/orion5x.h index f262ad1..95bb952 100644 --- a/arch/arm/include/asm/arch-orion5x/orion5x.h +++ b/arch/arm/include/asm/arch-orion5x/orion5x.h @@ -64,7 +64,7 @@ #define MAX_MVGBE_DEVS 1 #define MVGBE0_BASE ORION5X_EGIGA_BASE
-#define CONFIG_MAX_RAM_BANK_SIZE (64*1024*1024) +#define CONFIG_MAX_RAM_BANK_SIZE (128*1024*1024)
/* include here SoC variants. 5181, 5281, 6183 should go here when adding support for them, and this comment should then be updated. */
Le 29/01/2011 02:00, Michael Spang a écrit :
The TS-7800 has one 128M RAM bank, so the maximum must be increased.
Signed-off-by: Michael Spangmspang@csclub.uwaterloo.ca
arch/arm/include/asm/arch-orion5x/orion5x.h | 2 +- 1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/arch/arm/include/asm/arch-orion5x/orion5x.h b/arch/arm/include/asm/arch-orion5x/orion5x.h index f262ad1..95bb952 100644 --- a/arch/arm/include/asm/arch-orion5x/orion5x.h +++ b/arch/arm/include/asm/arch-orion5x/orion5x.h @@ -64,7 +64,7 @@ #define MAX_MVGBE_DEVS 1 #define MVGBE0_BASE ORION5X_EGIGA_BASE
-#define CONFIG_MAX_RAM_BANK_SIZE (64*1024*1024) +#define CONFIG_MAX_RAM_BANK_SIZE (128*1024*1024)
/* include here SoC variants. 5181, 5281, 6183 should go here when adding support for them, and this comment should then be updated. */
I have a vague memory about trying this with edminiv2 and having issues with getting the right memory size, which probably means there is a bug in orion5x with unmapped memory accesses. Testing will tell.
Amicalement,
For the TS-7800, the FPGA contains a bootloader which handles the SDRAM initialization and loads a bootloader from RAM. We should not try to initialize RAM again while running from it.
Signed-off-by: Michael Spang mspang@csclub.uwaterloo.ca --- arch/arm/cpu/arm926ejs/orion5x/lowlevel_init.S | 4 ++++ 1 files changed, 4 insertions(+), 0 deletions(-)
diff --git a/arch/arm/cpu/arm926ejs/orion5x/lowlevel_init.S b/arch/arm/cpu/arm926ejs/orion5x/lowlevel_init.S index 0523bd4..37d7d14 100644 --- a/arch/arm/cpu/arm926ejs/orion5x/lowlevel_init.S +++ b/arch/arm/cpu/arm926ejs/orion5x/lowlevel_init.S @@ -86,6 +86,8 @@
lowlevel_init:
+#ifndef CONFIG_SKIP_SDRAM_INIT + /* Use 'r4 as the base for internal register accesses */ ldr r4, =ORION5X_REGS_PHY_BASE
@@ -289,5 +291,7 @@ lowlevel_init: orr r2, r2, r6 str r2, [r3, #0x484]
+#endif + /* Return to U-boot via saved link register */ mov pc, lr
Le 29/01/2011 02:00, Michael Spang a écrit :
For the TS-7800, the FPGA contains a bootloader which handles the SDRAM initialization and loads a bootloader from RAM. We should not try to initialize RAM again while running from it.
Signed-off-by: Michael Spangmspang@csclub.uwaterloo.ca
arch/arm/cpu/arm926ejs/orion5x/lowlevel_init.S | 4 ++++ 1 files changed, 4 insertions(+), 0 deletions(-)
diff --git a/arch/arm/cpu/arm926ejs/orion5x/lowlevel_init.S b/arch/arm/cpu/arm926ejs/orion5x/lowlevel_init.S index 0523bd4..37d7d14 100644 --- a/arch/arm/cpu/arm926ejs/orion5x/lowlevel_init.S +++ b/arch/arm/cpu/arm926ejs/orion5x/lowlevel_init.S @@ -86,6 +86,8 @@
lowlevel_init:
+#ifndef CONFIG_SKIP_SDRAM_INIT
- /* Use 'r4 as the base for internal register accesses */ ldr r4, =ORION5X_REGS_PHY_BASE
@@ -289,5 +291,7 @@ lowlevel_init: orr r2, r2, r6 str r2, [r3, #0x484]
+#endif
- /* Return to U-boot via saved link register */ mov pc, lr
That's basically making lowlevel_init empty, so I would prefer that you put #ifdef/#endif around the call to lowlevel_init in start.S and modify the orion5x Makefile to include lowlevel_init.S only if CONFIG_SKIP_DRAM_INIT is not defined.
(come to think of it, CONFIG_SKIP_LOWLEVEL_INIT is a bit of a misnomer since it actually skips not only lowlevelinit but also cpu_init_crit. Possibly one could even go as far as renaming CONFIG_SKIP_LOWLEVEL_INIT to CONFIG_SKIP_CPU_INIT_CRIT, and then reuse CONFIG_SKIP_LOWLEVEL_INIT for lowlevel_init; but that can be a separate patch, with a nifty doc update.)
Amicalement,
On Sat, Jan 29, 2011 at 2:36 AM, Albert ARIBAUD albert.aribaud@free.fr wrote:
Le 29/01/2011 02:00, Michael Spang a écrit :
For the TS-7800, the FPGA contains a bootloader which handles the SDRAM initialization and loads a bootloader from RAM. We should not try to initialize RAM again while running from it.
Signed-off-by: Michael Spangmspang@csclub.uwaterloo.ca
arch/arm/cpu/arm926ejs/orion5x/lowlevel_init.S | 4 ++++ 1 files changed, 4 insertions(+), 0 deletions(-)
diff --git a/arch/arm/cpu/arm926ejs/orion5x/lowlevel_init.S b/arch/arm/cpu/arm926ejs/orion5x/lowlevel_init.S index 0523bd4..37d7d14 100644 --- a/arch/arm/cpu/arm926ejs/orion5x/lowlevel_init.S +++ b/arch/arm/cpu/arm926ejs/orion5x/lowlevel_init.S @@ -86,6 +86,8 @@
lowlevel_init:
+#ifndef CONFIG_SKIP_SDRAM_INIT
/* Use 'r4 as the base for internal register accesses */ ldr r4, =ORION5X_REGS_PHY_BASE
@@ -289,5 +291,7 @@ lowlevel_init: orr r2, r2, r6 str r2, [r3, #0x484]
+#endif
/* Return to U-boot via saved link register */ mov pc, lr
That's basically making lowlevel_init empty, so I would prefer that you put #ifdef/#endif around the call to lowlevel_init in start.S and modify the orion5x Makefile to include lowlevel_init.S only if CONFIG_SKIP_DRAM_INIT is not defined.
(come to think of it, CONFIG_SKIP_LOWLEVEL_INIT is a bit of a misnomer since it actually skips not only lowlevelinit but also cpu_init_crit. Possibly one could even go as far as renaming CONFIG_SKIP_LOWLEVEL_INIT to CONFIG_SKIP_CPU_INIT_CRIT, and then reuse CONFIG_SKIP_LOWLEVEL_INIT for lowlevel_init; but that can be a separate patch, with a nifty doc update.)
I've done the latter change. I thought about moving the call to lowlevel_init outside of cpu_init_crit, but I doubt it is useful to do board-specific initialization without also initializing the CPU.
I've also removed the annotation that CONFIG_SKIP_LOWLEVEL_INIT option is ARM-only, because there is one mips board (vct) that uses this option.
Michael
The MVGBE driver either gets the MAC from the environment, or invents one. This allows the driver to leave the existing address alone in case it is initialized before U-Boot starts.
Signed-off-by: Michael Spang mspang@csclub.uwaterloo.ca --- drivers/net/mvgbe.c | 20 ++++++++++++++++++++ 1 files changed, 20 insertions(+), 0 deletions(-)
diff --git a/drivers/net/mvgbe.c b/drivers/net/mvgbe.c index c701f43..0e0dae1 100644 --- a/drivers/net/mvgbe.c +++ b/drivers/net/mvgbe.c @@ -380,6 +380,22 @@ static void port_uc_addr_set(struct mvgbe_registers *regs, u8 * p_addr) }
/* + * port_uc_addr_get - This function gets the port unicast address. + */ +static void port_uc_addr_get(struct mvgbe_registers *regs, u8 * p_addr) +{ + u32 mac_l = MVGBE_REG_RD(regs->macal); + u32 mac_h = MVGBE_REG_RD(regs->macah); + + p_addr[0] = (mac_h >> 24); + p_addr[1] = (mac_h >> 16); + p_addr[2] = (mac_h >> 8); + p_addr[3] = (mac_h >> 0); + p_addr[4] = (mac_l >> 8); + p_addr[5] = (mac_l >> 0); +} + +/* * mvgbe_init_rx_desc_ring - Curve a Rx chain desc list and buffer in memory. */ static void mvgbe_init_rx_desc_ring(struct mvgbe_device *dmvgbe) @@ -718,6 +734,9 @@ error1: return -1; }
+#if defined(CONFIG_PRESERVE_LOCAL_MAC) + port_uc_addr_get(dmvgbe->regs, dmvgbe->dev.enetaddr); +#else while (!eth_getenv_enetaddr(s, dev->enetaddr)) { /* Generate Private MAC addr if not set */ dev->enetaddr[0] = 0x02; @@ -736,6 +755,7 @@ error1: #endif eth_setenv_enetaddr(s, dev->enetaddr); } +#endif
dev->init = (void *)mvgbe_init; dev->halt = (void *)mvgbe_halt;
The TS-7800 is an Orion5x implementation by Technologic Systems.
Signed-off-by: Michael Spang mspang@csclub.uwaterloo.ca --- MAKEALL | 1 + board/technologic/ts7800/Makefile | 46 +++++++++++ board/technologic/ts7800/ts7800.c | 36 +++++++++ boards.cfg | 1 + include/configs/ts7800.h | 149 +++++++++++++++++++++++++++++++++++++ 5 files changed, 233 insertions(+), 0 deletions(-) create mode 100644 board/technologic/ts7800/Makefile create mode 100644 board/technologic/ts7800/ts7800.c create mode 100644 include/configs/ts7800.h
diff --git a/MAKEALL b/MAKEALL index a732e6a..5cd4155 100755 --- a/MAKEALL +++ b/MAKEALL @@ -344,6 +344,7 @@ LIST_ARM9=" \ edb9315 \ edb9315a \ edminiv2 \ + ts7800 \ guruplug \ imx27lite \ jadecpu \ diff --git a/board/technologic/ts7800/Makefile b/board/technologic/ts7800/Makefile new file mode 100644 index 0000000..d62d0f2 --- /dev/null +++ b/board/technologic/ts7800/Makefile @@ -0,0 +1,46 @@ +# +# Copyright (C) 2010 Michael Spang mspang@csclub.uwaterloo.ca +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, +# MA 02110-1301 USA +# + +LIB = $(obj)lib$(BOARD).o + +COBJS := ts7800.o + +SRCS := $(COBJS:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS)) + +$(LIB): $(obj).depend $(OBJS) + $(AR) $(ARFLAGS) $@ $(OBJS) + +clean: + rm -f $(OBJS) + +distclean: clean + rm -f $(LIB) core *.bak .depend + +######################################################################### + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +######################################################################### diff --git a/board/technologic/ts7800/ts7800.c b/board/technologic/ts7800/ts7800.c new file mode 100644 index 0000000..8d4ba73 --- /dev/null +++ b/board/technologic/ts7800/ts7800.c @@ -0,0 +1,36 @@ +/* + * Copyright (C) 2010 Michael Spang mspang@csclub.uwaterloo.ca + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, + * MA 02110-1301 USA + */ + +#include <common.h> + +DECLARE_GLOBAL_DATA_PTR; + +int board_init(void) +{ + // Technologic's MBR uses machine type 526, however the mainline + // machine type is 1652. Technologic's kernel sources will need + // patching to boot from U-Boot. + gd->bd->bi_arch_number = MACH_TYPE_TS78XX; + gd->bd->bi_boot_params = 0x100; + + return 0; +} diff --git a/boards.cfg b/boards.cfg index 4cca934..22d8eeb 100644 --- a/boards.cfg +++ b/boards.cfg @@ -104,6 +104,7 @@ imx27lite arm arm926ejs imx27lite logicpd magnesium arm arm926ejs imx27lite logicpd mx27 omap5912osk arm arm926ejs - ti omap edminiv2 arm arm926ejs - LaCie orion5x +ts7800 arm arm926ejs - technologic orion5x ca9x4_ct_vxp arm armv7 vexpress armltd mx51evk arm armv7 mx51evk freescale mx5 mx53evk arm armv7 mx53evk freescale mx5 diff --git a/include/configs/ts7800.h b/include/configs/ts7800.h new file mode 100644 index 0000000..dc7e3e2 --- /dev/null +++ b/include/configs/ts7800.h @@ -0,0 +1,149 @@ +/* + * Copyright (C) 2010 Michael Spang mspang@csclub.uwaterloo.ca + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, + * MA 02110-1301 USA + */ + +#ifndef _CONFIG_TS7800_H +#define _CONFIG_TS7800_H + +/* + * User Interface Configuration + */ + +#define CONFIG_IDENT_STRING " TS-7800" +#define CONFIG_SYS_PROMPT "TS-7800> " +#define CONFIG_DISPLAY_CPUINFO +#define CONFIG_BOOTDELAY 3 + +/* + * Flash Driver + */ + +#define CONFIG_SYS_NO_FLASH + +/* + * Commands Configuration + */ + +#include <config_cmd_default.h> +#define CONFIG_CMD_PING +#define CONFIG_CMD_MII + +/* + * Serial Port Configuration + */ + +#define CONFIG_CONS_INDEX 1 +#define CONFIG_BAUDRATE 115200 + +/* + * Environment Configuration + */ + +#define CONFIG_ENV_IS_NOWHERE 1 +#define CONFIG_ENV_SIZE 0x2000 + +/* + * Limits + */ + +#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buff Size */ +#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) /* Print Buffer Size */ +#define CONFIG_SYS_MAXARGS 16 /* Maximum arguments to U-Boot commands */ + +/* + * System Components + */ + +#define CONFIG_MARVELL 1 +#define CONFIG_ARM926EJS 1 /* Basic Architecture */ +#define CONFIG_FEROCEON 1 /* CPU Core subversion */ +#define CONFIG_ORION5X 1 /* SOC Family Name */ +#define CONFIG_88F5182 1 /* SOC Name */ +#define CONFIG_MACH_TS78XX 1 /* Machine type */ +#define CONFIG_SYS_HZ 1000 + +/* + * Board Initialization + */ + +#define CONFIG_ARCH_MISC_INIT /* call arch_misc_init() */ +#define CONFIG_ARCH_CPU_INIT /* call arch_cpu_init() */ +#define CONFIG_SKIP_SDRAM_INIT /* U-Boot starts in RAM so do not initialize RAM */ + +/* MPP configuration need not be changed from power-on */ +#define ORION5X_MPP0_7 0x00000000 +#define ORION5X_MPP8_15 0x00000000 +#define ORION5X_MPP16_23 0x00000000 +#define ORION5X_GPIO_OUT_ENABLE 0xffffffff + +/* + * Memory Layout + */ + +#define CONFIG_SYS_TEXT_BASE 0x00008000 /* Boards loads U-Boot at 32 kB */ +#define CONFIG_SYS_INIT_SP_ADDR 0x00100000 /* Initial stack at 1 MB */ +#define CONFIG_SYS_MALLOC_LEN 0x00020000 /* Reserve 128 kB for malloc() */ + +#define CONFIG_SYS_SDRAM_BASE 0x00000000 /* RAM starts at address 0 */ +#define CONFIG_NR_DRAM_BANKS 1 /* Board has one 128 MB RAM bank */ + +#define CONFIG_SYS_LOAD_ADDR 0x00800000 /* Executables load by default at 8 MB */ +#define CONFIG_SYS_MEMTEST_START 0x00001000 /* Memtest starts after vectors */ +#define CONFIG_SYS_MEMTEST_END 0x07e00000 /* Memtest ends before U-Boot */ + +/* + * UART Driver + */ + +#define CONFIG_SYS_NS16550 +#define CONFIG_SYS_NS16550_SERIAL +#define CONFIG_SYS_NS16550_REG_SIZE (-4) +#define CONFIG_SYS_NS16550_CLK CONFIG_SYS_TCLK +#define CONFIG_SYS_NS16550_COM1 ORION5X_UART0_BASE +#define CONFIG_SYS_NS16550_COM2 ORION5X_UART1_BASE +#define CONFIG_SYS_BAUDRATE_TABLE \ + { 9600, 19200, 38400, 57600, 115200, 230400, 460800, 921600 } + +/* + * Network Driver + */ + +#ifdef CONFIG_CMD_NET +#define CONFIG_MVGBE +#define CONFIG_MVGBE_PORTS {1} +#define CONFIG_PRESERVE_LOCAL_MAC +#define CONFIG_PHY_BASE_ADR 0 +#define CONFIG_NETCONSOLE +#define CONFIG_NET_MULTI +#define CONFIG_MII +#define CONFIG_SYS_FAULT_ECHO_LINK_DOWN +#define CONFIG_ENV_OVERWRITE +#endif + +/* + * Linux + */ + +#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */ +#define CONFIG_INITRD_TAG 1 /* enable INITRD tag */ +#define CONFIG_SETUP_MEMORY_TAGS 1 /* enable memory tag */ + +#endif /* _CONFIG_TS7800_H */
Le 29/01/2011 02:00, Michael Spang a écrit :
The TS-7800 is an Orion5x implementation by Technologic Systems.
Signed-off-by: Michael Spangmspang@csclub.uwaterloo.ca
MAKEALL | 1 + board/technologic/ts7800/Makefile | 46 +++++++++++ board/technologic/ts7800/ts7800.c | 36 +++++++++ boards.cfg | 1 + include/configs/ts7800.h | 149 +++++++++++++++++++++++++++++++++++++ 5 files changed, 233 insertions(+), 0 deletions(-) create mode 100644 board/technologic/ts7800/Makefile create mode 100644 board/technologic/ts7800/ts7800.c create mode 100644 include/configs/ts7800.h
diff --git a/MAKEALL b/MAKEALL index a732e6a..5cd4155 100755 --- a/MAKEALL +++ b/MAKEALL @@ -344,6 +344,7 @@ LIST_ARM9=" \ edb9315 \ edb9315a \ edminiv2 \
- ts7800 \ guruplug \ imx27lite \ jadecpu \
diff --git a/board/technologic/ts7800/Makefile b/board/technologic/ts7800/Makefile new file mode 100644 index 0000000..d62d0f2 --- /dev/null +++ b/board/technologic/ts7800/Makefile @@ -0,0 +1,46 @@ +# +# Copyright (C) 2010 Michael Spangmspang@csclub.uwaterloo.ca
Fix copyright year (holds for the whole patchset)
+# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, +# MA 02110-1301 USA +#
+LIB = $(obj)lib$(BOARD).o
+COBJS := ts7800.o
+SRCS := $(COBJS:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS))
+$(LIB): $(obj).depend $(OBJS)
- $(AR) $(ARFLAGS) $@ $(OBJS)
+clean:
- rm -f $(OBJS)
+distclean: clean
- rm -f $(LIB) core *.bak .depend
+#########################################################################
+# defines $(obj).depend target +include $(SRCTREE)/rules.mk
+sinclude $(obj).depend
+######################################################################### diff --git a/board/technologic/ts7800/ts7800.c b/board/technologic/ts7800/ts7800.c new file mode 100644 index 0000000..8d4ba73 --- /dev/null +++ b/board/technologic/ts7800/ts7800.c @@ -0,0 +1,36 @@ +/*
- Copyright (C) 2010 Michael Spangmspang@csclub.uwaterloo.ca
- See file CREDITS for list of people who contributed to this
- project.
- This program is free software; you can redistribute it and/or
- modify it under the terms of the GNU General Public License as
- published by the Free Software Foundation; either version 2 of
- the License, or (at your option) any later version.
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
- MA 02110-1301 USA
- */
+#include<common.h>
+DECLARE_GLOBAL_DATA_PTR;
+int board_init(void) +{
// Technologic's MBR uses machine type 526, however the mainline// machine type is 1652. Technologic's kernel sources will need// patching to boot from U-Boot.
... or the machine type can be changed to 526 in the U-boot boot script before starting the Technologic modified Linux.
- gd->bd->bi_arch_number = MACH_TYPE_TS78XX;
- gd->bd->bi_boot_params = 0x100;
- return 0;
+} diff --git a/boards.cfg b/boards.cfg index 4cca934..22d8eeb 100644 --- a/boards.cfg +++ b/boards.cfg @@ -104,6 +104,7 @@ imx27lite arm arm926ejs imx27lite logicpd magnesium arm arm926ejs imx27lite logicpd mx27 omap5912osk arm arm926ejs - ti omap edminiv2 arm arm926ejs - LaCie orion5x +ts7800 arm arm926ejs - technologic orion5x ca9x4_ct_vxp arm armv7 vexpress armltd mx51evk arm armv7 mx51evk freescale mx5 mx53evk arm armv7 mx53evk freescale mx5 diff --git a/include/configs/ts7800.h b/include/configs/ts7800.h new file mode 100644 index 0000000..dc7e3e2 --- /dev/null +++ b/include/configs/ts7800.h @@ -0,0 +1,149 @@ +/*
- Copyright (C) 2010 Michael Spangmspang@csclub.uwaterloo.ca
- See file CREDITS for list of people who contributed to this
- project.
- This program is free software; you can redistribute it and/or
- modify it under the terms of the GNU General Public License as
- published by the Free Software Foundation; either version 2 of
- the License, or (at your option) any later version.
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
- MA 02110-1301 USA
- */
+#ifndef _CONFIG_TS7800_H +#define _CONFIG_TS7800_H
+/*
- User Interface Configuration
- */
+#define CONFIG_IDENT_STRING " TS-7800" +#define CONFIG_SYS_PROMPT "TS-7800> " +#define CONFIG_DISPLAY_CPUINFO +#define CONFIG_BOOTDELAY 3
+/*
- Flash Driver
- */
+#define CONFIG_SYS_NO_FLASH
+/*
- Commands Configuration
- */
+#include<config_cmd_default.h> +#define CONFIG_CMD_PING +#define CONFIG_CMD_MII
+/*
- Serial Port Configuration
- */
+#define CONFIG_CONS_INDEX 1 +#define CONFIG_BAUDRATE 115200
+/*
- Environment Configuration
- */
+#define CONFIG_ENV_IS_NOWHERE 1 +#define CONFIG_ENV_SIZE 0x2000
+/*
- Limits
- */
+#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buff Size */ +#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) /* Print Buffer Size */ +#define CONFIG_SYS_MAXARGS 16 /* Maximum arguments to U-Boot commands */
+/*
- System Components
- */
+#define CONFIG_MARVELL 1 +#define CONFIG_ARM926EJS 1 /* Basic Architecture */ +#define CONFIG_FEROCEON 1 /* CPU Core subversion */ +#define CONFIG_ORION5X 1 /* SOC Family Name */ +#define CONFIG_88F5182 1 /* SOC Name */ +#define CONFIG_MACH_TS78XX 1 /* Machine type */ +#define CONFIG_SYS_HZ 1000
+/*
- Board Initialization
- */
+#define CONFIG_ARCH_MISC_INIT /* call arch_misc_init() */ +#define CONFIG_ARCH_CPU_INIT /* call arch_cpu_init() */ +#define CONFIG_SKIP_SDRAM_INIT /* U-Boot starts in RAM so do not initialize RAM */
+/* MPP configuration need not be changed from power-on */ +#define ORION5X_MPP0_7 0x00000000 +#define ORION5X_MPP8_15 0x00000000 +#define ORION5X_MPP16_23 0x00000000 +#define ORION5X_GPIO_OUT_ENABLE 0xffffffff
+/*
- Memory Layout
- */
+#define CONFIG_SYS_TEXT_BASE 0x00008000 /* Boards loads U-Boot at 32 kB */ +#define CONFIG_SYS_INIT_SP_ADDR 0x00100000 /* Initial stack at 1 MB */ +#define CONFIG_SYS_MALLOC_LEN 0x00020000 /* Reserve 128 kB for malloc() */
+#define CONFIG_SYS_SDRAM_BASE 0x00000000 /* RAM starts at address 0 */ +#define CONFIG_NR_DRAM_BANKS 1 /* Board has one 128 MB RAM bank */
+#define CONFIG_SYS_LOAD_ADDR 0x00800000 /* Executables load by default at 8 MB */ +#define CONFIG_SYS_MEMTEST_START 0x00001000 /* Memtest starts after vectors */ +#define CONFIG_SYS_MEMTEST_END 0x07e00000 /* Memtest ends before U-Boot */
+/*
- UART Driver
- */
+#define CONFIG_SYS_NS16550 +#define CONFIG_SYS_NS16550_SERIAL +#define CONFIG_SYS_NS16550_REG_SIZE (-4) +#define CONFIG_SYS_NS16550_CLK CONFIG_SYS_TCLK +#define CONFIG_SYS_NS16550_COM1 ORION5X_UART0_BASE +#define CONFIG_SYS_NS16550_COM2 ORION5X_UART1_BASE +#define CONFIG_SYS_BAUDRATE_TABLE \
- { 9600, 19200, 38400, 57600, 115200, 230400, 460800, 921600 }
+/*
- Network Driver
- */
+#ifdef CONFIG_CMD_NET +#define CONFIG_MVGBE +#define CONFIG_MVGBE_PORTS {1} +#define CONFIG_PRESERVE_LOCAL_MAC +#define CONFIG_PHY_BASE_ADR 0 +#define CONFIG_NETCONSOLE +#define CONFIG_NET_MULTI +#define CONFIG_MII +#define CONFIG_SYS_FAULT_ECHO_LINK_DOWN +#define CONFIG_ENV_OVERWRITE +#endif
+/*
- Linux
- */
+#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */ +#define CONFIG_INITRD_TAG 1 /* enable INITRD tag */ +#define CONFIG_SETUP_MEMORY_TAGS 1 /* enable memory tag */
+#endif /* _CONFIG_TS7800_H */
Amicalement,
On Sat, Jan 29, 2011 at 2:39 AM, Albert ARIBAUD albert.aribaud@free.fr wrote:
Le 29/01/2011 02:00, Michael Spang a écrit :
The TS-7800 is an Orion5x implementation by Technologic Systems.
Signed-off-by: Michael Spangmspang@csclub.uwaterloo.ca
MAKEALL | 1 + board/technologic/ts7800/Makefile | 46 +++++++++++ board/technologic/ts7800/ts7800.c | 36 +++++++++ boards.cfg | 1 + include/configs/ts7800.h | 149 +++++++++++++++++++++++++++++++++++++ 5 files changed, 233 insertions(+), 0 deletions(-) create mode 100644 board/technologic/ts7800/Makefile create mode 100644 board/technologic/ts7800/ts7800.c create mode 100644 include/configs/ts7800.h
diff --git a/MAKEALL b/MAKEALL index a732e6a..5cd4155 100755 --- a/MAKEALL +++ b/MAKEALL @@ -344,6 +344,7 @@ LIST_ARM9=" \ edb9315 \ edb9315a \ edminiv2 \
- ts7800 \
guruplug \ imx27lite \ jadecpu \ diff --git a/board/technologic/ts7800/Makefile b/board/technologic/ts7800/Makefile new file mode 100644 index 0000000..d62d0f2 --- /dev/null +++ b/board/technologic/ts7800/Makefile @@ -0,0 +1,46 @@ +# +# Copyright (C) 2010 Michael Spangmspang@csclub.uwaterloo.ca
Fix copyright year (holds for the whole patchset)
+# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, +# MA 02110-1301 USA +#
+LIB = $(obj)lib$(BOARD).o
+COBJS := ts7800.o
+SRCS := $(COBJS:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS))
+$(LIB): $(obj).depend $(OBJS)
- $(AR) $(ARFLAGS) $@ $(OBJS)
+clean:
- rm -f $(OBJS)
+distclean: clean
- rm -f $(LIB) core *.bak .depend
+#########################################################################
+# defines $(obj).depend target +include $(SRCTREE)/rules.mk
+sinclude $(obj).depend
+######################################################################### diff --git a/board/technologic/ts7800/ts7800.c b/board/technologic/ts7800/ts7800.c new file mode 100644 index 0000000..8d4ba73 --- /dev/null +++ b/board/technologic/ts7800/ts7800.c @@ -0,0 +1,36 @@ +/*
- Copyright (C) 2010 Michael Spangmspang@csclub.uwaterloo.ca
- See file CREDITS for list of people who contributed to this
- project.
- This program is free software; you can redistribute it and/or
- modify it under the terms of the GNU General Public License as
- published by the Free Software Foundation; either version 2 of
- the License, or (at your option) any later version.
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
- MA 02110-1301 USA
- */
+#include<common.h>
+DECLARE_GLOBAL_DATA_PTR;
+int board_init(void) +{
- // Technologic's MBR uses machine type 526, however the mainline
- // machine type is 1652. Technologic's kernel sources will need
- // patching to boot from U-Boot.
... or the machine type can be changed to 526 in the U-boot boot script before starting the Technologic modified Linux.
Good to know, I've documented this in the README.
Michael
Dear Michael Spang,
In message 1296262841-8819-6-git-send-email-mspang@csclub.uwaterloo.ca you wrote:
The TS-7800 is an Orion5x implementation by Technologic Systems.
Signed-off-by: Michael Spang mspang@csclub.uwaterloo.ca
MAKEALL | 1 + board/technologic/ts7800/Makefile | 46 +++++++++++ board/technologic/ts7800/ts7800.c | 36 +++++++++ boards.cfg | 1 + include/configs/ts7800.h | 149 +++++++++++++++++++++++++++++++++++++ 5 files changed, 233 insertions(+), 0 deletions(-) create mode 100644 board/technologic/ts7800/Makefile create mode 100644 board/technologic/ts7800/ts7800.c create mode 100644 include/configs/ts7800.h
Please run all your patches through checkpatch:
ERROR: code indent should use tabs where possible
WARNING: please, no spaces at the start of a line
ERROR: do not use C99 // comments
WARNING: line over 80 characters
etc. etc.
Best regards,
Wolfgang Denk
The NAND control functions were written by Alexander Clouter and copied here from Linux.
Signed-off-by: Michael Spang mspang@csclub.uwaterloo.ca --- drivers/mtd/nand/Makefile | 1 + drivers/mtd/nand/ts7800_nand.c | 68 ++++++++++++++++++++++++++++++++++++++++ include/configs/ts7800.h | 46 +++++++++++++++++++++++++-- 3 files changed, 112 insertions(+), 3 deletions(-) create mode 100644 drivers/mtd/nand/ts7800_nand.c
diff --git a/drivers/mtd/nand/Makefile b/drivers/mtd/nand/Makefile index 8b598f6..897e6c2 100644 --- a/drivers/mtd/nand/Makefile +++ b/drivers/mtd/nand/Makefile @@ -49,6 +49,7 @@ COBJS-$(CONFIG_NAND_S3C2410) += s3c2410_nand.o COBJS-$(CONFIG_NAND_S3C64XX) += s3c64xx.o COBJS-$(CONFIG_NAND_SPEAR) += spr_nand.o COBJS-$(CONFIG_NAND_OMAP_GPMC) += omap_gpmc.o +COBJS-$(CONFIG_NAND_TS7800) += ts7800_nand.o COBJS-$(CONFIG_NAND_PLAT) += nand_plat.o endif
diff --git a/drivers/mtd/nand/ts7800_nand.c b/drivers/mtd/nand/ts7800_nand.c new file mode 100644 index 0000000..12ee207 --- /dev/null +++ b/drivers/mtd/nand/ts7800_nand.c @@ -0,0 +1,68 @@ +/* + * Based on arch/arm/mach-orion5x/ts78xx-setup.c from Linux + * by Alexander Clouter alex@digriz.org.uk. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <asm/io.h> +#include <nand.h> + +/* + * hardware specific access to control-lines + * + * ctrl: + * NAND_NCE: bit 0 -> bit 2 + * NAND_CLE: bit 1 -> bit 1 + * NAND_ALE: bit 2 -> bit 0 + */ +static void ts78xx_ts_nand_cmd_ctrl(struct mtd_info *mtd, int cmd, + unsigned int ctrl) +{ + struct nand_chip *this = mtd->priv; + + if (ctrl & NAND_CTRL_CHANGE) { + unsigned char bits; + + bits = (ctrl & NAND_NCE) << 2; + bits |= ctrl & NAND_CLE; + bits |= (ctrl & NAND_ALE) >> 2; + + writeb((readb(TS_NAND_CTRL) & ~0x7) | bits, TS_NAND_CTRL); + } + + if (cmd != NAND_CMD_NONE) + writeb(cmd, this->IO_ADDR_W); +} + +static int ts78xx_ts_nand_dev_ready(struct mtd_info *mtd) +{ + return readb(TS_NAND_CTRL) & 0x20; +} + +int board_nand_init(struct nand_chip *nand) +{ + nand->options = NAND_USE_FLASH_BBT; + nand->ecc.mode = NAND_ECC_SOFT; + nand->cmd_ctrl = ts78xx_ts_nand_cmd_ctrl; + nand->dev_ready = ts78xx_ts_nand_dev_ready; + nand->chip_delay = 15; + return 0; +} diff --git a/include/configs/ts7800.h b/include/configs/ts7800.h index dc7e3e2..76409ab 100644 --- a/include/configs/ts7800.h +++ b/include/configs/ts7800.h @@ -33,10 +33,11 @@ #define CONFIG_BOOTDELAY 3
/* - * Flash Driver + * Flash Configuration */
-#define CONFIG_SYS_NO_FLASH +#define CONFIG_SYS_NO_FLASH /* TS-7800 has only NAND flash */ +#define CONFIG_USE_NAND 0 /* Disable NAND by default */
/* * Commands Configuration @@ -46,6 +47,11 @@ #define CONFIG_CMD_PING #define CONFIG_CMD_MII
+#if CONFIG_USE_NAND +#define CONFIG_CMD_NAND +#define CONFIG_CMD_MTDPARTS +#endif + /* * Serial Port Configuration */ @@ -57,9 +63,21 @@ * Environment Configuration */
-#define CONFIG_ENV_IS_NOWHERE 1 +#if CONFIG_USE_NAND + +#define CONFIG_ENV_IS_IN_NAND + +#define CONFIG_ENV_OFFSET 0x00320000 /* 128k(mbr) + 3m(kernel) */ +#define CONFIG_ENV_SIZE 0x00020000 /* 128k */ +#define CONFIG_ENV_RANGE 0x00100000 /* 1m(env) */ + +#else + +#define CONFIG_ENV_IS_NOWHERE #define CONFIG_ENV_SIZE 0x2000
+#endif + /* * Limits */ @@ -109,6 +127,28 @@ #define CONFIG_SYS_MEMTEST_START 0x00001000 /* Memtest starts after vectors */ #define CONFIG_SYS_MEMTEST_END 0x07e00000 /* Memtest ends before U-Boot */
+#define ORION5X_ADR_PCI_MEM 0xe8000000 /* Match PCI memory mapping to Linux (FPGA) */ +#define ORION5X_SZ_PCI_MEM 0x08000000 + +/* + * Flash Driver + */ + +#ifdef CONFIG_CMD_NAND + +#define TS_NAND_CTRL 0xe8000800 +#define TS_NAND_DATA 0xe8000804 + +#define CONFIG_NAND_TS7800 +#define CONFIG_SYS_NAND_BASE TS_NAND_DATA +#define CONFIG_SYS_MAX_NAND_DEVICE 1 + +#define CONFIG_MTD_DEVICE +#define MTDIDS_DEFAULT "nand0=gen_nand" +#define MTDPARTS_DEFAULT "mtdparts=gen_nand:128k(mbr),3m(uboot),1m(env),4m(linux),-(rootfs)" + +#endif + /* * UART Driver */
Dear Michael Spang,
In message 1296262841-8819-7-git-send-email-mspang@csclub.uwaterloo.ca you wrote:
The NAND control functions were written by Alexander Clouter and copied here from Linux.
Signed-off-by: Michael Spang mspang@csclub.uwaterloo.ca
drivers/mtd/nand/Makefile | 1 + drivers/mtd/nand/ts7800_nand.c | 68 ++++++++++++++++++++++++++++++++++++++++ include/configs/ts7800.h | 46 +++++++++++++++++++++++++-- 3 files changed, 112 insertions(+), 3 deletions(-) create mode 100644 drivers/mtd/nand/ts7800_nand.c
ERROR: code indent should use tabs where possible
WARNING: please, no spaces at the start of a line
WARNING: line over 80 characters
Best regards,
Wolfgang Denk
Signed-off-by: Michael Spang mspang@csclub.uwaterloo.ca --- doc/README.ts7800 | 60 +++++++++++++++++++++++++++++++++++++++++++++++++++++ 1 files changed, 60 insertions(+), 0 deletions(-) create mode 100644 doc/README.ts7800
diff --git a/doc/README.ts7800 b/doc/README.ts7800 new file mode 100644 index 0000000..25b9883 --- /dev/null +++ b/doc/README.ts7800 @@ -0,0 +1,60 @@ +Booting +------- + +The TS-7800 boots initially from a proprietary bootloader on the FPGA +called TS-BOOTROM. TS-BOOTROM loads a small image from the MBR of the +onboard NAND or SD card into RAM, and executes it. The default MBR is +intended to boot a Linux kernel. + +The TS-7800 port of U-Boot takes the place of the Linux kernel in this +configuration, and is therefore loaded and executed by the MBR. The +MBR also creates an ATAG structure intended for Linux, but U-Boot +ignores it. + +NAND layout +----------- + +NAND support is not enabled by default because U-Boot will overwrite +part of it with its environment. To enable NAND support, enable +CONFIG_USE_NAND in include/configs/ts7800.h. + +The default NAND partition layout used by Technologic and Linux is: + + 128k(mbr),4m(linux),4m(initrd),-(rootfs) + +For U-Boot, we split the linux partition into a partition for the +U-Boot code and a partition for the U-Boot environment. The initrd +partition is not used, and is renamed to "linux". The new layout is: + + 128k(mbr),3m(uboot),1m(env),4m(linux),-(rootfs) + +When NAND support is enabled, this string is available in the U-Boot +default environment as the "mtdparts" variable. You may wish to use +this layout for Linux as well by adding it to the Linux command line. +For example: + + setenv bootargs console=ttyS0,115200n8 ${mtdparts} + +Installing U-Boot +----------------- + +To install U-Boot to the onboard flash, write u-boot.bin to the kernel +partition on the flash. From Linux this might be done as follows: + + flash_eraseall /dev/mtd1 + nandwrite --pad /dev/mtd1 u-boot.bin + +When running from onboard flash, you may wish to enable NAND support +as described in the previous section. The environment is not preserved +unless you enable NAND support. + +To install U-Boot to an SD card, write u-boot.bin to the kernel +partition on the card. + +TS-7800 Wiki +------------ + +A useful resource about the TS-7800 is the TS-7800 wiki [1], +maintained by Alexander Clouter. + +[1] http://www.digriz.org.uk/ts78xx
participants (4)
-
Albert ARIBAUD -
Michael Spang -
Rogan Dawes -
Wolfgang Denk