[U-Boot] [PATCH 4/4 v2] xilinx: Add new Zynq board
Add support for Xilinx Zynq board.
Signed-off-by: Michal Simek monstr@monstr.eu
--- v2: Forget to also add config file --- board/xilinx/zynq/Makefile | 57 +++++++++++++++++ board/xilinx/zynq/board.c | 64 +++++++++++++++++++ board/xilinx/zynq/lowlevel_init.S | 27 ++++++++ boards.cfg | 1 + include/configs/zynq.h | 124 +++++++++++++++++++++++++++++++++++++ 5 files changed, 273 insertions(+), 0 deletions(-) create mode 100644 board/xilinx/zynq/Makefile create mode 100644 board/xilinx/zynq/board.c create mode 100644 board/xilinx/zynq/lowlevel_init.S create mode 100644 include/configs/zynq.h
diff --git a/board/xilinx/zynq/Makefile b/board/xilinx/zynq/Makefile new file mode 100644 index 0000000..373a8a7 --- /dev/null +++ b/board/xilinx/zynq/Makefile @@ -0,0 +1,57 @@ +# +# (C) Copyright 2000-2006 +# Wolfgang Denk, DENX Software Engineering, wd@denx.de. +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +include $(TOPDIR)/config.mk +ifneq ($(OBJTREE),$(SRCTREE)) +$(shell mkdir -p $(obj)../common) +endif + +LIB = $(obj)lib$(BOARD).o + +COBJS-y := board.o + +COBJS := $(sort $(COBJS-y)) + +SOBJS := lowlevel_init.o + +SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS)) +SOBJS := $(addprefix $(obj),$(SOBJS)) + +$(LIB): $(obj).depend $(OBJS) $(SOBJS) + $(call cmd_link_o_target, $(OBJS) $(SOBJS)) + +clean: + rm -f $(SOBJS) $(OBJS) + +distclean: clean + rm -f $(LIB) core *.bak $(obj).depend + +######################################################################### + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +######################################################################### diff --git a/board/xilinx/zynq/board.c b/board/xilinx/zynq/board.c new file mode 100644 index 0000000..716fcfe --- /dev/null +++ b/board/xilinx/zynq/board.c @@ -0,0 +1,64 @@ +/* + * (C) Copyright 2012 Michal Simek monstr@monstr.eu + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <netdev.h> + +DECLARE_GLOBAL_DATA_PTR; + +int board_init(void) +{ + icache_enable(); + + return 0; +} + +int board_late_init(void) +{ + return 0; +} + +#ifdef CONFIG_CMD_NET +int board_eth_init(bd_t *bis) +{ + int ret = 0; + +#if defined(CONFIG_XILINX_GEM) && defined(CONFIG_XPSS_GEM_BASEADDR0) + ret |= xilinx_gem_initialize(bis, CONFIG_XPSS_GEM_BASEADDR0); +#endif + + return ret; +} +#endif + +int dram_init(void) +{ + gd->ram_size = CONFIG_SYS_SDRAM_SIZE; + + return 0; +} + +void reset_cpu(ulong addr) +{ + while (1) + ; +} diff --git a/board/xilinx/zynq/lowlevel_init.S b/board/xilinx/zynq/lowlevel_init.S new file mode 100644 index 0000000..642eb18 --- /dev/null +++ b/board/xilinx/zynq/lowlevel_init.S @@ -0,0 +1,27 @@ +/* + * (C) Copyright 2012 Michal Simek monstr@monstr.eu + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +#include <config.h> +#include <linux/linkage.h> + +ENTRY(lowlevel_init) + mov pc, lr +ENDPROC(lowlevel_init) diff --git a/boards.cfg b/boards.cfg index fdb84ad..aeca912 100644 --- a/boards.cfg +++ b/boards.cfg @@ -261,6 +261,7 @@ seaboard arm armv7 seaboard nvidia ventana arm armv7 ventana nvidia tegra2 whistler arm armv7 whistler nvidia tegra2 u8500_href arm armv7 u8500 st-ericsson u8500 +zynq arm armv7 zynq xilinx zynq actux1_4_16 arm ixp actux1 - - actux1:FLASH2X2 actux1_4_32 arm ixp actux1 - - actux1:FLASH2X2,RAM_32MB actux1_8_16 arm ixp actux1 - - actux1:FLASH1X8 diff --git a/include/configs/zynq.h b/include/configs/zynq.h new file mode 100644 index 0000000..bd64eb8 --- /dev/null +++ b/include/configs/zynq.h @@ -0,0 +1,124 @@ +/* + * (C) Copyright 2012 Michal Simek monstr@monstr.eu + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef __CONFIG_ZYNQ_H +#define __CONFIG_ZYNQ_H + +#define CONFIG_ARMV7 /* This is an ARM V7 CPU core */ +#define CONFIG_ZYNQ + +/* CPU clock */ +#define CONFIG_CPU_FREQ_HZ 800000000 +#define CONFIG_SYS_HZ 1000 + +/* Ram */ +#define CONFIG_NR_DRAM_BANKS 1 +#define CONFIG_SYS_SDRAM_BASE 0 +#define CONFIG_SYS_SDRAM_SIZE 0x40000000 +#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE +#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x1000) + +/* The following table includes the supported baudrates */ +#define CONFIG_SYS_BAUDRATE_TABLE \ + {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200, 230400} + +#define CONFIG_BAUDRATE 115200 + +/* XPSS Serial driver */ +#define CONFIG_XPSS_SERIAL +#define CONFIG_XPSS_SERIAL_BASEADDR0 0xE0001000 +#define CONFIG_XPSS_SERIAL_BAUDRATE0 CONFIG_BAUDRATE +#define CONFIG_XPSS_SERIAL_CLOCK0 50000000 + +/* SCU timer address is hardcoded */ +#define CONFIG_XPSS_SCUTIMER_BASEADDR 0xF8F00600 + +/* Ethernet driver */ +#define CONFIG_NET_MULTI +#define CONFIG_XILINX_GEM +#define CONFIG_XPSS_GEM_BASEADDR0 0xE000B000 + +#define CONFIG_ETHADDR 00:0a:35:00:b2:02 +#define CONFIG_IPADDR 192.168.0.105 +#define CONFIG_SERVERIP 192.168.0.101 +#define CONFIG_GATEWAYIP 192.168.0.1 + +#define CONFIG_BOOTP_SERVERIP +#define CONFIG_BOOTP_BOOTPATH +#define CONFIG_BOOTP_GATEWAY +#define CONFIG_BOOTP_HOSTNAME +#define CONFIG_BOOTP_MAY_FAIL + +/* MII and Phylib */ +#define CONFIG_MII +#define CONFIG_SYS_FAULT_ECHO_LINK_DOWN +#define CONFIG_PHYLIB +#define CONFIG_PHY_ATHEROS +#define CONFIG_PHY_BROADCOM +#define CONFIG_PHY_DAVICOM +#define CONFIG_PHY_GIGE +#define CONFIG_PHY_LXT +#define CONFIG_PHY_MARVELL +#define CONFIG_PHY_MICREL +#define CONFIG_PHY_NATSEMI +#define CONFIG_PHY_REALTEK +#define CONFIG_PHY_VITESSE + +/* Environment */ +#define CONFIG_ENV_IS_NOWHERE +#define CONFIG_ENV_SIZE 0x10000 + +#define CONFIG_SYS_NO_FLASH + +#define CONFIG_SYS_MALLOC_LEN 0x400000 +#define CONFIG_SYS_INIT_RAM_ADDR CONFIG_SYS_SDRAM_BASE +#define CONFIG_SYS_INIT_RAM_SIZE CONFIG_SYS_MALLOC_LEN +#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \ + CONFIG_SYS_INIT_RAM_SIZE - \ + GENERATED_GBL_DATA_SIZE) + +#define CONFIG_SYS_PROMPT "U-Boot> " +#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ +#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ + sizeof(CONFIG_SYS_PROMPT) + 16) + +#define CONFIG_SYS_LOAD_ADDR 0 +#define CONFIG_SYS_MAXARGS 15 /* max number of command args */ +#define CONFIG_SYS_LONGHELP +#define CONFIG_AUTO_COMPLETE +#define CONFIG_CMDLINE_EDITING + +#define CONFIG_SYS_HUSH_PARSER +#define CONFIG_SYS_PROMPT_HUSH_PS2 "> " + +/* OF */ +#define CONFIG_FIT +#define CONFIG_OF_LIBFDT + +/* Commands */ +#include <config_cmd_default.h> + +#define CONFIG_CMD_PING +#define CONFIG_CMD_DHCP +#define CONFIG_CMD_MII + +#endif /* __CONFIG_ZYNQ_H */
Hi Michal,
On Tue, Aug 14, 2012 at 7:15 AM, Michal Simek monstr@monstr.eu wrote:
Add support for Xilinx Zynq board.
Signed-off-by: Michal Simek monstr@monstr.eu
v2: Forget to also add config file
board/xilinx/zynq/Makefile | 57 +++++++++++++++++ board/xilinx/zynq/board.c | 64 +++++++++++++++++++ board/xilinx/zynq/lowlevel_init.S | 27 ++++++++
This lowlevel_init.S should be in arch/arm/cpu/armv7/zynq/
boards.cfg | 1 + include/configs/zynq.h | 124 +++++++++++++++++++++++++++++++++++++ 5 files changed, 273 insertions(+), 0 deletions(-) create mode 100644 board/xilinx/zynq/Makefile create mode 100644 board/xilinx/zynq/board.c create mode 100644 board/xilinx/zynq/lowlevel_init.S create mode 100644 include/configs/zynq.h
diff --git a/board/xilinx/zynq/Makefile b/board/xilinx/zynq/Makefile new file mode 100644 index 0000000..373a8a7 --- /dev/null +++ b/board/xilinx/zynq/Makefile @@ -0,0 +1,57 @@ +# +# (C) Copyright 2000-2006 +# Wolfgang Denk, DENX Software Engineering, wd@denx.de. +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +#
+include $(TOPDIR)/config.mk +ifneq ($(OBJTREE),$(SRCTREE)) +$(shell mkdir -p $(obj)../common) +endif
+LIB = $(obj)lib$(BOARD).o
+COBJS-y := board.o
+COBJS := $(sort $(COBJS-y))
+SOBJS := lowlevel_init.o
+SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS)) +SOBJS := $(addprefix $(obj),$(SOBJS))
+$(LIB): $(obj).depend $(OBJS) $(SOBJS)
$(call cmd_link_o_target, $(OBJS) $(SOBJS))+clean:
rm -f $(SOBJS) $(OBJS)+distclean: clean
rm -f $(LIB) core *.bak $(obj).depend+#########################################################################
+# defines $(obj).depend target +include $(SRCTREE)/rules.mk
+sinclude $(obj).depend
+######################################################################### diff --git a/board/xilinx/zynq/board.c b/board/xilinx/zynq/board.c new file mode 100644 index 0000000..716fcfe --- /dev/null +++ b/board/xilinx/zynq/board.c
Are you thinking that this will be the one and only Zynq board? Perhaps a layout like what Xilinx has in their branch is more appropriate.
http://git.xilinx.com/?p=u-boot-xarm.git;a=history;f=board/xilinx/zynq_commo...
@@ -0,0 +1,64 @@ +/*
- (C) Copyright 2012 Michal Simek monstr@monstr.eu
- See file CREDITS for list of people who contributed to this
- project.
- This program is free software; you can redistribute it and/or
- modify it under the terms of the GNU General Public License as
- published by the Free Software Foundation; either version 2 of
- the License, or (at your option) any later version.
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- MA 02111-1307 USA
- */
+#include <common.h> +#include <netdev.h>
+DECLARE_GLOBAL_DATA_PTR;
+int board_init(void) +{
icache_enable();return 0;+}
+int board_late_init(void) +{
return 0;+}
+#ifdef CONFIG_CMD_NET +int board_eth_init(bd_t *bis) +{
int ret = 0;+#if defined(CONFIG_XILINX_GEM) && defined(CONFIG_XPSS_GEM_BASEADDR0)
ret |= xilinx_gem_initialize(bis, CONFIG_XPSS_GEM_BASEADDR0);+#endif
return ret;+} +#endif
+int dram_init(void) +{
gd->ram_size = CONFIG_SYS_SDRAM_SIZE;return 0;+}
+void reset_cpu(ulong addr) +{
while (1);+} diff --git a/board/xilinx/zynq/lowlevel_init.S b/board/xilinx/zynq/lowlevel_init.S new file mode 100644 index 0000000..642eb18 --- /dev/null +++ b/board/xilinx/zynq/lowlevel_init.S @@ -0,0 +1,27 @@ +/*
- (C) Copyright 2012 Michal Simek monstr@monstr.eu
- See file CREDITS for list of people who contributed to this
- project.
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
- */
+#include <config.h> +#include <linux/linkage.h>
+ENTRY(lowlevel_init)
mov pc, lr+ENDPROC(lowlevel_init) diff --git a/boards.cfg b/boards.cfg index fdb84ad..aeca912 100644 --- a/boards.cfg +++ b/boards.cfg @@ -261,6 +261,7 @@ seaboard arm armv7 seaboard nvidia ventana arm armv7 ventana nvidia tegra2 whistler arm armv7 whistler nvidia tegra2 u8500_href arm armv7 u8500 st-ericsson u8500 +zynq arm armv7 zynq xilinx zynq actux1_4_16 arm ixp actux1 - - actux1:FLASH2X2 actux1_4_32 arm ixp actux1 - - actux1:FLASH2X2,RAM_32MB actux1_8_16 arm ixp actux1 - - actux1:FLASH1X8 diff --git a/include/configs/zynq.h b/include/configs/zynq.h new file mode 100644 index 0000000..bd64eb8 --- /dev/null +++ b/include/configs/zynq.h @@ -0,0 +1,124 @@ +/*
- (C) Copyright 2012 Michal Simek monstr@monstr.eu
- See file CREDITS for list of people who contributed to this
- project.
- This program is free software; you can redistribute it and/or
- modify it under the terms of the GNU General Public License as
- published by the Free Software Foundation; either version 2 of
- the License, or (at your option) any later version.
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- MA 02111-1307 USA
- */
+#ifndef __CONFIG_ZYNQ_H +#define __CONFIG_ZYNQ_H
+#define CONFIG_ARMV7 /* This is an ARM V7 CPU core */ +#define CONFIG_ZYNQ
+/* CPU clock */ +#define CONFIG_CPU_FREQ_HZ 800000000 +#define CONFIG_SYS_HZ 1000
+/* Ram */ +#define CONFIG_NR_DRAM_BANKS 1 +#define CONFIG_SYS_SDRAM_BASE 0 +#define CONFIG_SYS_SDRAM_SIZE 0x40000000 +#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE +#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x1000)
+/* The following table includes the supported baudrates */ +#define CONFIG_SYS_BAUDRATE_TABLE \
{300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200, 230400}+#define CONFIG_BAUDRATE 115200
+/* XPSS Serial driver */ +#define CONFIG_XPSS_SERIAL +#define CONFIG_XPSS_SERIAL_BASEADDR0 0xE0001000 +#define CONFIG_XPSS_SERIAL_BAUDRATE0 CONFIG_BAUDRATE +#define CONFIG_XPSS_SERIAL_CLOCK0 50000000
+/* SCU timer address is hardcoded */ +#define CONFIG_XPSS_SCUTIMER_BASEADDR 0xF8F00600
+/* Ethernet driver */ +#define CONFIG_NET_MULTI +#define CONFIG_XILINX_GEM +#define CONFIG_XPSS_GEM_BASEADDR0 0xE000B000
+#define CONFIG_ETHADDR 00:0a:35:00:b2:02
Don't put MAC addresses in a config file.
+#define CONFIG_IPADDR 192.168.0.105 +#define CONFIG_SERVERIP 192.168.0.101 +#define CONFIG_GATEWAYIP 192.168.0.1
Is this really helpful?
+#define CONFIG_BOOTP_SERVERIP +#define CONFIG_BOOTP_BOOTPATH +#define CONFIG_BOOTP_GATEWAY +#define CONFIG_BOOTP_HOSTNAME +#define CONFIG_BOOTP_MAY_FAIL
+/* MII and Phylib */ +#define CONFIG_MII +#define CONFIG_SYS_FAULT_ECHO_LINK_DOWN +#define CONFIG_PHYLIB +#define CONFIG_PHY_ATHEROS +#define CONFIG_PHY_BROADCOM +#define CONFIG_PHY_DAVICOM +#define CONFIG_PHY_GIGE +#define CONFIG_PHY_LXT +#define CONFIG_PHY_MARVELL +#define CONFIG_PHY_MICREL +#define CONFIG_PHY_NATSEMI +#define CONFIG_PHY_REALTEK +#define CONFIG_PHY_VITESSE
I guess since this is a ficticious board it has every manufacturer's phy on it?
+/* Environment */ +#define CONFIG_ENV_IS_NOWHERE +#define CONFIG_ENV_SIZE 0x10000
+#define CONFIG_SYS_NO_FLASH
+#define CONFIG_SYS_MALLOC_LEN 0x400000 +#define CONFIG_SYS_INIT_RAM_ADDR CONFIG_SYS_SDRAM_BASE +#define CONFIG_SYS_INIT_RAM_SIZE CONFIG_SYS_MALLOC_LEN +#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
CONFIG_SYS_INIT_RAM_SIZE - \GENERATED_GBL_DATA_SIZE)+#define CONFIG_SYS_PROMPT "U-Boot> " +#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ +#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
sizeof(CONFIG_SYS_PROMPT) + 16)+#define CONFIG_SYS_LOAD_ADDR 0 +#define CONFIG_SYS_MAXARGS 15 /* max number of command args */ +#define CONFIG_SYS_LONGHELP
Why the peculiar spacing?
+#define CONFIG_AUTO_COMPLETE +#define CONFIG_CMDLINE_EDITING
+#define CONFIG_SYS_HUSH_PARSER +#define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
+/* OF */ +#define CONFIG_FIT +#define CONFIG_OF_LIBFDT
+/* Commands */ +#include <config_cmd_default.h>
+#define CONFIG_CMD_PING +#define CONFIG_CMD_DHCP +#define CONFIG_CMD_MII
+#endif /* __CONFIG_ZYNQ_H */
1.7.0.4
U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Hi Joe,
sorry missed this one.
On 08/14/2012 05:48 PM, Joe Hershberger wrote:
Hi Michal,
On Tue, Aug 14, 2012 at 7:15 AM, Michal Simek monstr@monstr.eu wrote:
Add support for Xilinx Zynq board.
Signed-off-by: Michal Simek monstr@monstr.eu
v2: Forget to also add config file
board/xilinx/zynq/Makefile | 57 +++++++++++++++++ board/xilinx/zynq/board.c | 64 +++++++++++++++++++ board/xilinx/zynq/lowlevel_init.S | 27 ++++++++
This lowlevel_init.S should be in arch/arm/cpu/armv7/zynq/
It will be in the next version.
boards.cfg | 1 + include/configs/zynq.h | 124 +++++++++++++++++++++++++++++++++++++ 5 files changed, 273 insertions(+), 0 deletions(-) create mode 100644 board/xilinx/zynq/Makefile create mode 100644 board/xilinx/zynq/board.c create mode 100644 board/xilinx/zynq/lowlevel_init.S create mode 100644 include/configs/zynq.h
diff --git a/board/xilinx/zynq/Makefile b/board/xilinx/zynq/Makefile new file mode 100644 index 0000000..373a8a7 --- /dev/null +++ b/board/xilinx/zynq/Makefile @@ -0,0 +1,57 @@ +# +# (C) Copyright 2000-2006 +# Wolfgang Denk, DENX Software Engineering, wd@denx.de. +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +#
+include $(TOPDIR)/config.mk +ifneq ($(OBJTREE),$(SRCTREE)) +$(shell mkdir -p $(obj)../common) +endif
+LIB = $(obj)lib$(BOARD).o
+COBJS-y := board.o
+COBJS := $(sort $(COBJS-y))
+SOBJS := lowlevel_init.o
+SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS)) +SOBJS := $(addprefix $(obj),$(SOBJS))
+$(LIB): $(obj).depend $(OBJS) $(SOBJS)
$(call cmd_link_o_target, $(OBJS) $(SOBJS))+clean:
rm -f $(SOBJS) $(OBJS)+distclean: clean
rm -f $(LIB) core *.bak $(obj).depend+#########################################################################
+# defines $(obj).depend target +include $(SRCTREE)/rules.mk
+sinclude $(obj).depend
+######################################################################### diff --git a/board/xilinx/zynq/board.c b/board/xilinx/zynq/board.c new file mode 100644 index 0000000..716fcfe --- /dev/null +++ b/board/xilinx/zynq/board.c
Are you thinking that this will be the one and only Zynq board? Perhaps a layout like what Xilinx has in their branch is more appropriate.
http://git.xilinx.com/?p=u-boot-xarm.git;a=history;f=board/xilinx/zynq_commo...
My intention is to have one zynq generic board as I have it for microblaze. The main reason is that every board design could be different and supporting all variants is impossible.
When DM is ready to use with OF then DTS will handle the board differences.
@@ -0,0 +1,64 @@ +/*
- (C) Copyright 2012 Michal Simek monstr@monstr.eu
- See file CREDITS for list of people who contributed to this
- project.
- This program is free software; you can redistribute it and/or
- modify it under the terms of the GNU General Public License as
- published by the Free Software Foundation; either version 2 of
- the License, or (at your option) any later version.
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- MA 02111-1307 USA
- */
+#include <common.h> +#include <netdev.h>
+DECLARE_GLOBAL_DATA_PTR;
+int board_init(void) +{
icache_enable();return 0;+}
+int board_late_init(void) +{
return 0;+}
+#ifdef CONFIG_CMD_NET +int board_eth_init(bd_t *bis) +{
int ret = 0;+#if defined(CONFIG_XILINX_GEM) && defined(CONFIG_XPSS_GEM_BASEADDR0)
ret |= xilinx_gem_initialize(bis, CONFIG_XPSS_GEM_BASEADDR0);+#endif
return ret;+} +#endif
+int dram_init(void) +{
gd->ram_size = CONFIG_SYS_SDRAM_SIZE;return 0;+}
+void reset_cpu(ulong addr) +{
while (1);+} diff --git a/board/xilinx/zynq/lowlevel_init.S b/board/xilinx/zynq/lowlevel_init.S new file mode 100644 index 0000000..642eb18 --- /dev/null +++ b/board/xilinx/zynq/lowlevel_init.S @@ -0,0 +1,27 @@ +/*
- (C) Copyright 2012 Michal Simek monstr@monstr.eu
- See file CREDITS for list of people who contributed to this
- project.
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
- */
+#include <config.h> +#include <linux/linkage.h>
+ENTRY(lowlevel_init)
mov pc, lr+ENDPROC(lowlevel_init) diff --git a/boards.cfg b/boards.cfg index fdb84ad..aeca912 100644 --- a/boards.cfg +++ b/boards.cfg @@ -261,6 +261,7 @@ seaboard arm armv7 seaboard nvidia ventana arm armv7 ventana nvidia tegra2 whistler arm armv7 whistler nvidia tegra2 u8500_href arm armv7 u8500 st-ericsson u8500 +zynq arm armv7 zynq xilinx zynq actux1_4_16 arm ixp actux1 - - actux1:FLASH2X2 actux1_4_32 arm ixp actux1 - - actux1:FLASH2X2,RAM_32MB actux1_8_16 arm ixp actux1 - - actux1:FLASH1X8 diff --git a/include/configs/zynq.h b/include/configs/zynq.h new file mode 100644 index 0000000..bd64eb8 --- /dev/null +++ b/include/configs/zynq.h @@ -0,0 +1,124 @@ +/*
- (C) Copyright 2012 Michal Simek monstr@monstr.eu
- See file CREDITS for list of people who contributed to this
- project.
- This program is free software; you can redistribute it and/or
- modify it under the terms of the GNU General Public License as
- published by the Free Software Foundation; either version 2 of
- the License, or (at your option) any later version.
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- MA 02111-1307 USA
- */
+#ifndef __CONFIG_ZYNQ_H +#define __CONFIG_ZYNQ_H
+#define CONFIG_ARMV7 /* This is an ARM V7 CPU core */ +#define CONFIG_ZYNQ
+/* CPU clock */ +#define CONFIG_CPU_FREQ_HZ 800000000 +#define CONFIG_SYS_HZ 1000
+/* Ram */ +#define CONFIG_NR_DRAM_BANKS 1 +#define CONFIG_SYS_SDRAM_BASE 0 +#define CONFIG_SYS_SDRAM_SIZE 0x40000000 +#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE +#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x1000)
+/* The following table includes the supported baudrates */ +#define CONFIG_SYS_BAUDRATE_TABLE \
{300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200, 230400}+#define CONFIG_BAUDRATE 115200
+/* XPSS Serial driver */ +#define CONFIG_XPSS_SERIAL +#define CONFIG_XPSS_SERIAL_BASEADDR0 0xE0001000 +#define CONFIG_XPSS_SERIAL_BAUDRATE0 CONFIG_BAUDRATE +#define CONFIG_XPSS_SERIAL_CLOCK0 50000000
+/* SCU timer address is hardcoded */ +#define CONFIG_XPSS_SCUTIMER_BASEADDR 0xF8F00600
+/* Ethernet driver */ +#define CONFIG_NET_MULTI +#define CONFIG_XILINX_GEM +#define CONFIG_XPSS_GEM_BASEADDR0 0xE000B000
+#define CONFIG_ETHADDR 00:0a:35:00:b2:02
Don't put MAC addresses in a config file.
Where should be MAC address setup?
+#define CONFIG_IPADDR 192.168.0.105 +#define CONFIG_SERVERIP 192.168.0.101 +#define CONFIG_GATEWAYIP 192.168.0.1
Is this really helpful?
yes or no. Why not to define? It is setup for my network but it can be easily changed.
+#define CONFIG_BOOTP_SERVERIP +#define CONFIG_BOOTP_BOOTPATH +#define CONFIG_BOOTP_GATEWAY +#define CONFIG_BOOTP_HOSTNAME +#define CONFIG_BOOTP_MAY_FAIL
+/* MII and Phylib */ +#define CONFIG_MII +#define CONFIG_SYS_FAULT_ECHO_LINK_DOWN +#define CONFIG_PHYLIB +#define CONFIG_PHY_ATHEROS +#define CONFIG_PHY_BROADCOM +#define CONFIG_PHY_DAVICOM +#define CONFIG_PHY_GIGE +#define CONFIG_PHY_LXT +#define CONFIG_PHY_MARVELL +#define CONFIG_PHY_MICREL +#define CONFIG_PHY_NATSEMI +#define CONFIG_PHY_REALTEK +#define CONFIG_PHY_VITESSE
I guess since this is a ficticious board it has every manufacturer's phy on it?
This is not fictitious board. It is targetting to zc702 with Marwell phy but this configuration should work for zynq generic board as I describe above.
I have checked u-boot size and enabling all phys increase u-boot size for 4.5kB which is fine.
Also still there are others option with using programmable logic with axi_ethernet IP where other phys can be used.
+/* Environment */ +#define CONFIG_ENV_IS_NOWHERE +#define CONFIG_ENV_SIZE 0x10000
+#define CONFIG_SYS_NO_FLASH
+#define CONFIG_SYS_MALLOC_LEN 0x400000 +#define CONFIG_SYS_INIT_RAM_ADDR CONFIG_SYS_SDRAM_BASE +#define CONFIG_SYS_INIT_RAM_SIZE CONFIG_SYS_MALLOC_LEN +#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
CONFIG_SYS_INIT_RAM_SIZE - \GENERATED_GBL_DATA_SIZE)+#define CONFIG_SYS_PROMPT "U-Boot> " +#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ +#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
sizeof(CONFIG_SYS_PROMPT) + 16)+#define CONFIG_SYS_LOAD_ADDR 0 +#define CONFIG_SYS_MAXARGS 15 /* max number of command args */ +#define CONFIG_SYS_LONGHELP
Why the peculiar spacing?
No reason for that - I have fixed that.
Thanks, Michal
Hi Michal,
On Wed, Aug 15, 2012 at 3:49 AM, Michal Simek monstr@monstr.eu wrote:
Hi Joe,
sorry missed this one.
On 08/14/2012 05:48 PM, Joe Hershberger wrote:
Are you thinking that this will be the one and only Zynq board? Perhaps a layout like what Xilinx has in their branch is more appropriate.
http://git.xilinx.com/?p=u-boot-xarm.git;a=history;f=board/xilinx/zynq_commo...
My intention is to have one zynq generic board as I have it for microblaze. The main reason is that every board design could be different and supporting all variants is impossible.
I believe this is a fundamental misunderstanding of the Zynq architecture.
With the microblaze and virtex ppc architecture you basically have an FPGA that happens to have a processor in it. The Zynq architecture is the opposite... an ARM system that happens to have an FPGA attached to it.
The different boards have plenty of hard IP and peripherals available for all of the key interfaces that u-boot needs to be aware of. Certainly there can be other peripherals added to the fabric and those can be handles with device tree. Generally these boards are well defined, unlike microblaze targets.
When DM is ready to use with OF then DTS will handle the board differences.
That's fine, but I doubt we will see u-boot collapse into directory of DTS files and one board per architecture. I expect it to have much more impact as a way of eliminating the separate targets for boards that have several variants in their configuration (PCI or not, etc).
<--snip-->
+#define CONFIG_ETHADDR 00:0a:35:00:b2:02
Don't put MAC addresses in a config file.
Where should be MAC address setup?
In the environment.
+#define CONFIG_IPADDR 192.168.0.105 +#define CONFIG_SERVERIP 192.168.0.101 +#define CONFIG_GATEWAYIP 192.168.0.1
Is this really helpful?
yes or no. Why not to define? It is setup for my network but it can be easily changed.
Again... the environment. It is easily added to the environment.
+#define CONFIG_BOOTP_SERVERIP +#define CONFIG_BOOTP_BOOTPATH +#define CONFIG_BOOTP_GATEWAY +#define CONFIG_BOOTP_HOSTNAME +#define CONFIG_BOOTP_MAY_FAIL
+/* MII and Phylib */ +#define CONFIG_MII +#define CONFIG_SYS_FAULT_ECHO_LINK_DOWN +#define CONFIG_PHYLIB +#define CONFIG_PHY_ATHEROS +#define CONFIG_PHY_BROADCOM +#define CONFIG_PHY_DAVICOM +#define CONFIG_PHY_GIGE +#define CONFIG_PHY_LXT +#define CONFIG_PHY_MARVELL +#define CONFIG_PHY_MICREL +#define CONFIG_PHY_NATSEMI +#define CONFIG_PHY_REALTEK +#define CONFIG_PHY_VITESSE
I guess since this is a ficticious board it has every manufacturer's phy on it?
This is not fictitious board. It is targetting to zc702 with Marwell phy but this configuration should work for zynq generic board as I describe above.
This comes back to the fact that you know what phy is on this board because it is not a random board with a Zynq on it, it is a specific board with specific peripherals.
I have checked u-boot size and enabling all phys increase u-boot size for 4.5kB which is fine.
That's not a reasonable approach. It you take that approach with every peripheral, then u-boot explodes in size.
Also still there are others option with using programmable logic with axi_ethernet IP where other phys can be used.
And yet this board has no other phy on the fabric. Let the board that does enable those phys.
-Joe
Hi Joe,
On 08/15/2012 07:31 PM, Joe Hershberger wrote:
Hi Michal,
On Wed, Aug 15, 2012 at 3:49 AM, Michal Simek monstr@monstr.eu wrote:
Hi Joe,
sorry missed this one.
On 08/14/2012 05:48 PM, Joe Hershberger wrote:
Are you thinking that this will be the one and only Zynq board? Perhaps a layout like what Xilinx has in their branch is more appropriate.
http://git.xilinx.com/?p=u-boot-xarm.git;a=history;f=board/xilinx/zynq_commo...
My intention is to have one zynq generic board as I have it for microblaze. The main reason is that every board design could be different and supporting all variants is impossible.
I believe this is a fundamental misunderstanding of the Zynq architecture.
I don't think that this is not my fundamental misunderstanding.
With the microblaze and virtex ppc architecture you basically have an FPGA that happens to have a processor in it. The Zynq architecture is the opposite... an ARM system that happens to have an FPGA attached to it.
We are working in this area for quite a long time to be convinced that this is the best solution we can make. And even this is only one way how to maintain this platform. Creating new u-boot board description for every board or configuration is bad idea.
The different boards have plenty of hard IP and peripherals available for all of the key interfaces that u-boot needs to be aware of. Certainly there can be other peripherals added to the fabric and those can be handles with device tree. Generally these boards are well defined, unlike microblaze targets.
Zynq is not like any other ARM based board. There is still a lot of space for configuring it and you need all the time any input from user even if you use reference board. All reference boards contains a lot of connectors which started with FMC, pins, configurable options.
When DM is ready to use with OF then DTS will handle the board differences.
That's fine, but I doubt we will see u-boot collapse into directory of DTS files and one board per architecture. I expect it to have much more impact as a way of eliminating the separate targets for boards that have several variants in their configuration (PCI or not, etc).
My expectation is to have one DTS for microblaze and one for Zynq. Then user can use device-tree generator from Xilinx EDK to get DTS and will replace template in u-boot.
<--snip-->
+#define CONFIG_ETHADDR 00:0a:35:00:b2:02
Don't put MAC addresses in a config file.
Where should be MAC address setup?
In the environment.
no problem with that
+#define CONFIG_IPADDR 192.168.0.105 +#define CONFIG_SERVERIP 192.168.0.101 +#define CONFIG_GATEWAYIP 192.168.0.1
Is this really helpful?
yes or no. Why not to define? It is setup for my network but it can be easily changed.
Again... the environment. It is easily added to the environment.
no problem with that
+#define CONFIG_BOOTP_SERVERIP +#define CONFIG_BOOTP_BOOTPATH +#define CONFIG_BOOTP_GATEWAY +#define CONFIG_BOOTP_HOSTNAME +#define CONFIG_BOOTP_MAY_FAIL
+/* MII and Phylib */ +#define CONFIG_MII +#define CONFIG_SYS_FAULT_ECHO_LINK_DOWN +#define CONFIG_PHYLIB +#define CONFIG_PHY_ATHEROS +#define CONFIG_PHY_BROADCOM +#define CONFIG_PHY_DAVICOM +#define CONFIG_PHY_GIGE +#define CONFIG_PHY_LXT +#define CONFIG_PHY_MARVELL +#define CONFIG_PHY_MICREL +#define CONFIG_PHY_NATSEMI +#define CONFIG_PHY_REALTEK +#define CONFIG_PHY_VITESSE
I guess since this is a ficticious board it has every manufacturer's phy on it?
This is not fictitious board. It is targetting to zc702 with Marwell phy but this configuration should work for zynq generic board as I describe above.
This comes back to the fact that you know what phy is on this board because it is not a random board with a Zynq on it, it is a specific board with specific peripherals.
Of course you always know it but not if you create generic platform. But if you like I will remove others phys which are not physically placed on zc702.
I have checked u-boot size and enabling all phys increase u-boot size for 4.5kB which is fine.
That's not a reasonable approach. It you take that approach with every peripheral, then u-boot explodes in size.
Don't agree with that. There is not unlimited number of peripherals/drivers which you can use. I don't expect any u-boot size explosion. Enabling support for basic drivers is reasonable.
Anyway I am OK to remove other phys and wait till DM with OF is ready. Because in that time I expect that we will have to enable all platform acceptable drivers anyway.
Also still there are others option with using programmable logic with axi_ethernet IP where other phys can be used.
And yet this board has no other phy on the fabric. Let the board that does enable those phys.
I don't think that creating special u-boot board for every zynq platform is good solution. But we will see when DM is done.
Thanks, Michal
Hi Michal,
On Thu, Aug 16, 2012 at 1:12 AM, Michal Simek monstr@monstr.eu wrote:
Hi Joe,
On 08/15/2012 07:31 PM, Joe Hershberger wrote:
Hi Michal,
I believe this is a fundamental misunderstanding of the Zynq architecture.
I don't think that this is not my fundamental misunderstanding.
With the microblaze and virtex ppc architecture you basically have an FPGA that happens to have a processor in it. The Zynq architecture is the opposite... an ARM system that happens to have an FPGA attached to it.
We are working in this area for quite a long time to be convinced that this is the best solution we can make. And even this is only one way how to maintain this platform. Creating new u-boot board description for every board or configuration is bad idea.
The different boards have plenty of hard IP and peripherals available for all of the key interfaces that u-boot needs to be aware of. Certainly there can be other peripherals added to the fabric and those can be handles with device tree. Generally these boards are well defined, unlike microblaze targets.
Zynq is not like any other ARM based board. There is still a lot of space for configuring it and you need all the time any input from user even if you use reference board. All reference boards contains a lot of connectors which started with FMC, pins, configurable options.
It is possible to add custom features in the fabric. I agree that it is not reasonable to support many different possible things there. That should be left to the user to customize.
On the other hand, I think it should be easy to use a given board without first learning everything about it. Please consider each board as though it has no fabric. What can be supported on the board with what is connected to the MIO port? Can it run u-boot? Access memory? Access Ethernet or USB? Boot Linux? In general, the answer to all these is yes. However each board has different things populated. Different RAM, different types of flash interfaces, different Ethernet phys, etc.
If I get a Zed board and you get a ZC702 board, we should not each have to write a DTS file and customize all the other config file settings when those differences are known based on the board, just because it is possible to further extend each of these boards beyond their MIO capabilities.
-Joe
On 08/16/2012 07:27 PM, Joe Hershberger wrote:
Hi Michal,
On Thu, Aug 16, 2012 at 1:12 AM, Michal Simek monstr@monstr.eu wrote:
Hi Joe,
On 08/15/2012 07:31 PM, Joe Hershberger wrote:
Hi Michal,
I believe this is a fundamental misunderstanding of the Zynq architecture.
I don't think that this is not my fundamental misunderstanding.
With the microblaze and virtex ppc architecture you basically have an FPGA that happens to have a processor in it. The Zynq architecture is the opposite... an ARM system that happens to have an FPGA attached to it.
We are working in this area for quite a long time to be convinced that this is the best solution we can make. And even this is only one way how to maintain this platform. Creating new u-boot board description for every board or configuration is bad idea.
The different boards have plenty of hard IP and peripherals available for all of the key interfaces that u-boot needs to be aware of. Certainly there can be other peripherals added to the fabric and those can be handles with device tree. Generally these boards are well defined, unlike microblaze targets.
Zynq is not like any other ARM based board. There is still a lot of space for configuring it and you need all the time any input from user even if you use reference board. All reference boards contains a lot of connectors which started with FMC, pins, configurable options.
It is possible to add custom features in the fabric. I agree that it is not reasonable to support many different possible things there. That should be left to the user to customize.
ok.
On the other hand, I think it should be easy to use a given board without first learning everything about it. Please consider each board as though it has no fabric. What can be supported on the board with what is connected to the MIO port? Can it run u-boot? Access memory? Access Ethernet or USB? Boot Linux? In general, the answer to all these is yes. However each board has different things populated. Different RAM, different types of flash interfaces, different Ethernet phys, etc.
For this purpose will be reference designs and BSPs for reference boards and none has to spend time on these details. It means one BSP for zc702 for EDK 14.2 one for 14.3, etc. The same for the ZED board and others.
If you want to do it for your custom board then you have to compile FSBL in SDK anyway and SDK will also generate DTS or currently what we use in PetaLinux configuration file for u-boot because configuration from DTS is not ready.
This will be well documented and there are just some steps which is quite easy to do.
But I believe in near future when DM with OF is ready you will need just DTS.
I have to also check what xilinx will be distributed with their reference board but I expect that it will be the same as was with previous boards. It means SD(COMPACT flash in past) card with several demos where one will be Linux with DTS file.
If I get a Zed board and you get a ZC702 board, we should not each have to write a DTS file and customize all the other config file settings when those differences are known based on the board, just because it is possible to further extend each of these boards beyond their MIO capabilities.
I am not sure how did you write your DTS file but we and Xilinx are using device-tree BSP in EDK to generate it. It means you don't need to write it at all. We also have customization extension to setup phy addresses for example. This extension is used in PetaLinux and I expect will be also available in public git repository soon too.
You need to compile fsbl and in the same SDK menu you just select device-tree BSP to generate it. Not sure if Xilinx included this to the latest EDK 14.2 but definitely they have this BSP here http://git.xilinx.com/?p=device-tree.git;a=summary.
Thanks, Michal
participants (2)
-
Joe Hershberger -
Michal Simek