In preparation for a generic GPIO driver for the DA8xx processors, rename <asm/arch/gpio_defs.h> to <asm/arch/gpio.h> and fix up all files which include it.

Signed-off-by: Laurence Withers lwithers@guralp.com --- arch/arm/include/asm/arch-davinci/gpio.h | 66 +++++++++++++++++++++++++ arch/arm/include/asm/arch-davinci/gpio_defs.h | 66 ------------------------- board/davinci/dm355leopard/dm355leopard.c | 2 +- board/davinci/dm365evm/dm365evm.c | 2 +- drivers/usb/musb/da8xx.h | 2 +- 5 files changed, 69 insertions(+), 69 deletions(-) create mode 100644 arch/arm/include/asm/arch-davinci/gpio.h delete mode 100644 arch/arm/include/asm/arch-davinci/gpio_defs.h

diff --git a/arch/arm/include/asm/arch-davinci/gpio.h b/arch/arm/include/asm/arch-davinci/gpio.h new file mode 100644 index 0000000..1be2ac2 --- /dev/null +++ b/arch/arm/include/asm/arch-davinci/gpio.h @@ -0,0 +1,66 @@ +/* + * Copyright (C) 2009 Texas Instruments Incorporated + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ +#ifndef _GPIO_DEFS_H_ +#define _GPIO_DEFS_H_ + +#ifndef CONFIG_SOC_DA8XX +#define DAVINCI_GPIO_BINTEN 0x01C67008 +#define DAVINCI_GPIO_BANK01 0x01C67010 +#define DAVINCI_GPIO_BANK23 0x01C67038 +#define DAVINCI_GPIO_BANK45 0x01C67060 +#define DAVINCI_GPIO_BANK67 0x01C67088 + +#else /* CONFIG_SOC_DA8XX */ +#define DAVINCI_GPIO_BINTEN 0x01E26008 +#define DAVINCI_GPIO_BANK01 0x01E26010 +#define DAVINCI_GPIO_BANK23 0x01E26038 +#define DAVINCI_GPIO_BANK45 0x01E26060 +#define DAVINCI_GPIO_BANK67 0x01E26088 +#endif /* CONFIG_SOC_DA8XX */ + +struct davinci_gpio { + unsigned int dir; + unsigned int out_data; + unsigned int set_data; + unsigned int clr_data; + unsigned int in_data; + unsigned int set_rising; + unsigned int clr_rising; + unsigned int set_falling; + unsigned int clr_falling; + unsigned int intstat; +}; + +struct davinci_gpio_bank { + int num_gpio; + unsigned int irq_num; + unsigned int irq_mask; + unsigned long *in_use; + unsigned long base; +}; + +#define davinci_gpio_bank01 ((struct davinci_gpio *)DAVINCI_GPIO_BANK01) +#define davinci_gpio_bank23 ((struct davinci_gpio *)DAVINCI_GPIO_BANK23) +#define davinci_gpio_bank45 ((struct davinci_gpio *)DAVINCI_GPIO_BANK45) +#define davinci_gpio_bank67 ((struct davinci_gpio *)DAVINCI_GPIO_BANK67) + +#endif diff --git a/arch/arm/include/asm/arch-davinci/gpio_defs.h b/arch/arm/include/asm/arch-davinci/gpio_defs.h deleted file mode 100644 index 1be2ac2..0000000 --- a/arch/arm/include/asm/arch-davinci/gpio_defs.h +++ /dev/null @@ -1,66 +0,0 @@ -/* - * Copyright (C) 2009 Texas Instruments Incorporated - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ -#ifndef _GPIO_DEFS_H_ -#define _GPIO_DEFS_H_ - -#ifndef CONFIG_SOC_DA8XX -#define DAVINCI_GPIO_BINTEN 0x01C67008 -#define DAVINCI_GPIO_BANK01 0x01C67010 -#define DAVINCI_GPIO_BANK23 0x01C67038 -#define DAVINCI_GPIO_BANK45 0x01C67060 -#define DAVINCI_GPIO_BANK67 0x01C67088 - -#else /* CONFIG_SOC_DA8XX */ -#define DAVINCI_GPIO_BINTEN 0x01E26008 -#define DAVINCI_GPIO_BANK01 0x01E26010 -#define DAVINCI_GPIO_BANK23 0x01E26038 -#define DAVINCI_GPIO_BANK45 0x01E26060 -#define DAVINCI_GPIO_BANK67 0x01E26088 -#endif /* CONFIG_SOC_DA8XX */ - -struct davinci_gpio { - unsigned int dir; - unsigned int out_data; - unsigned int set_data; - unsigned int clr_data; - unsigned int in_data; - unsigned int set_rising; - unsigned int clr_rising; - unsigned int set_falling; - unsigned int clr_falling; - unsigned int intstat; -}; - -struct davinci_gpio_bank { - int num_gpio; - unsigned int irq_num; - unsigned int irq_mask; - unsigned long *in_use; - unsigned long base; -}; - -#define davinci_gpio_bank01 ((struct davinci_gpio *)DAVINCI_GPIO_BANK01) -#define davinci_gpio_bank23 ((struct davinci_gpio *)DAVINCI_GPIO_BANK23) -#define davinci_gpio_bank45 ((struct davinci_gpio *)DAVINCI_GPIO_BANK45) -#define davinci_gpio_bank67 ((struct davinci_gpio *)DAVINCI_GPIO_BANK67) - -#endif diff --git a/board/davinci/dm355leopard/dm355leopard.c b/board/davinci/dm355leopard/dm355leopard.c index 0ee0d11..0ad5678 100644 --- a/board/davinci/dm355leopard/dm355leopard.c +++ b/board/davinci/dm355leopard/dm355leopard.c @@ -20,7 +20,7 @@ #include <nand.h> #include <asm/io.h> #include <asm/arch/hardware.h> -#include <asm/arch/gpio_defs.h> +#include <asm/arch/gpio.h> #include <asm/arch/nand_defs.h> #include <asm/arch/davinci_misc.h> #include <net.h> diff --git a/board/davinci/dm365evm/dm365evm.c b/board/davinci/dm365evm/dm365evm.c index 5fb7611..ac54106 100644 --- a/board/davinci/dm365evm/dm365evm.c +++ b/board/davinci/dm365evm/dm365evm.c @@ -22,7 +22,7 @@ #include <asm/arch/hardware.h> #include <asm/arch/emif_defs.h> #include <asm/arch/nand_defs.h> -#include <asm/arch/gpio_defs.h> +#include <asm/arch/gpio.h> #include <netdev.h> #include <asm/arch/davinci_misc.h> #ifdef CONFIG_DAVINCI_MMC diff --git a/drivers/usb/musb/da8xx.h b/drivers/usb/musb/da8xx.h index b9660ba..be1cdaf 100644 --- a/drivers/usb/musb/da8xx.h +++ b/drivers/usb/musb/da8xx.h @@ -25,7 +25,7 @@ #define __DA8XX_MUSB_H__

#include <asm/arch/hardware.h> -#include <asm/arch/gpio_defs.h> +#include <asm/arch/gpio.h> #include "musb_core.h"

/* Base address of da8xx usb0 wrapper */

Add a generic GPIO driver for the DaVinci DA8xx processors. It is turned on by defining CONFIG_DA8XX_GPIO and fulfills the generic GPIO interface specified in <asm/gpio.h> . The driver has support for both manipulating GPIO pins as well as automatically configuring the pin multiplexor registers to set the pin function to GPIO.

Signed-off-by: Laurence Withers lwithers@guralp.com --- arch/arm/include/asm/arch-davinci/gpio.h | 8 + drivers/gpio/Makefile | 1 + drivers/gpio/da8xx_gpio.c | 281 ++++++++++++++++++++++++++++++ 3 files changed, 290 insertions(+), 0 deletions(-) create mode 100644 drivers/gpio/da8xx_gpio.c

diff --git a/arch/arm/include/asm/arch-davinci/gpio.h b/arch/arm/include/asm/arch-davinci/gpio.h index 1be2ac2..29dcccf 100644 --- a/arch/arm/include/asm/arch-davinci/gpio.h +++ b/arch/arm/include/asm/arch-davinci/gpio.h @@ -63,4 +63,12 @@ struct davinci_gpio_bank { #define davinci_gpio_bank45 ((struct davinci_gpio *)DAVINCI_GPIO_BANK45) #define davinci_gpio_bank67 ((struct davinci_gpio *)DAVINCI_GPIO_BANK67)

+#define gpio_status() gpio_info() +#define GPIO_NAME_SIZE 20 +#define MAX_NUM_GPIOS 144 +#define GPIO_BANK(gp) (davinci_gpio_bank01 + ((gp) >> 5)) +#define GPIO_BIT(gp) ((gp) & 0x1F) + +void gpio_info(void); + #endif diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile index 1e3ae11..62ec97d 100644 --- a/drivers/gpio/Makefile +++ b/drivers/gpio/Makefile @@ -32,6 +32,7 @@ COBJS-$(CONFIG_MXC_GPIO) += mxc_gpio.o COBJS-$(CONFIG_PCA953X) += pca953x.o COBJS-$(CONFIG_S5P) += s5p_gpio.o COBJS-$(CONFIG_TEGRA2_GPIO) += tegra2_gpio.o +COBJS-$(CONFIG_DA8XX_GPIO) += da8xx_gpio.o

COBJS := $(COBJS-y) SRCS := $(COBJS:.o=.c) diff --git a/drivers/gpio/da8xx_gpio.c b/drivers/gpio/da8xx_gpio.c new file mode 100644 index 0000000..0308223 --- /dev/null +++ b/drivers/gpio/da8xx_gpio.c @@ -0,0 +1,281 @@ +/* + * GPIO driver for TI DaVinci DA8xx SOCs. + * + * (C) Copyright 2011 Guralp Systems Ltd. + * Laurence Withers lwithers@guralp.com + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <asm/io.h> +#include <asm/gpio.h> +#include <asm/arch/gpio.h> +#include <asm/arch/hardware.h> +#include <asm/arch/davinci_misc.h> + + +static struct gpio_registry { + int is_registered; + char name[GPIO_NAME_SIZE]; +} gpio_registry[MAX_NUM_GPIOS]; + + +#define pinmux(x) (&davinci_syscfg_regs->pinmux[x]) + +static const struct pinmux_config gpio_pinmux[] = { + { pinmux(1), 8, 7 }, /* GP0[0] */ + { pinmux(1), 8, 6 }, + { pinmux(1), 8, 5 }, + { pinmux(1), 8, 4 }, + { pinmux(1), 8, 3 }, + { pinmux(1), 8, 2 }, + { pinmux(1), 8, 1 }, + { pinmux(1), 8, 0 }, + { pinmux(0), 8, 7 }, + { pinmux(0), 8, 6 }, + { pinmux(0), 8, 5 }, + { pinmux(0), 8, 4 }, + { pinmux(0), 8, 3 }, + { pinmux(0), 8, 2 }, + { pinmux(0), 8, 1 }, + { pinmux(0), 8, 0 }, + { pinmux(4), 8, 7 }, /* GP1[0] */ + { pinmux(4), 8, 6 }, + { pinmux(4), 8, 5 }, + { pinmux(4), 8, 4 }, + { pinmux(4), 8, 3 }, + { pinmux(4), 8, 2 }, + { pinmux(4), 4, 1 }, + { pinmux(4), 4, 0 }, + { pinmux(3), 4, 0 }, + { pinmux(2), 4, 6 }, + { pinmux(2), 4, 5 }, + { pinmux(2), 4, 4 }, + { pinmux(2), 4, 3 }, + { pinmux(2), 4, 2 }, + { pinmux(2), 4, 1 }, + { pinmux(2), 8, 0 }, + { pinmux(6), 8, 7 }, /* GP2[0] */ + { pinmux(6), 8, 6 }, + { pinmux(6), 8, 5 }, + { pinmux(6), 8, 4 }, + { pinmux(6), 8, 3 }, + { pinmux(6), 8, 2 }, + { pinmux(6), 8, 1 }, + { pinmux(6), 8, 0 }, + { pinmux(5), 8, 7 }, + { pinmux(5), 8, 6 }, + { pinmux(5), 8, 5 }, + { pinmux(5), 8, 4 }, + { pinmux(5), 8, 3 }, + { pinmux(5), 8, 2 }, + { pinmux(5), 8, 1 }, + { pinmux(5), 8, 0 }, + { pinmux(8), 8, 7 }, /* GP3[0] */ + { pinmux(8), 8, 6 }, + { pinmux(8), 8, 5 }, + { pinmux(8), 8, 4 }, + { pinmux(8), 8, 3 }, + { pinmux(8), 8, 2 }, + { pinmux(8), 8, 1 }, + { pinmux(8), 8, 0 }, + { pinmux(7), 8, 7 }, + { pinmux(7), 8, 6 }, + { pinmux(7), 8, 5 }, + { pinmux(7), 8, 4 }, + { pinmux(7), 8, 3 }, + { pinmux(7), 8, 2 }, + { pinmux(7), 8, 1 }, + { pinmux(7), 8, 0 }, + { pinmux(10), 8, 7 }, /* GP4[0] */ + { pinmux(10), 8, 6 }, + { pinmux(10), 8, 5 }, + { pinmux(10), 8, 4 }, + { pinmux(10), 8, 3 }, + { pinmux(10), 8, 2 }, + { pinmux(10), 8, 1 }, + { pinmux(10), 8, 0 }, + { pinmux(9), 8, 7 }, + { pinmux(9), 8, 6 }, + { pinmux(9), 8, 5 }, + { pinmux(9), 8, 4 }, + { pinmux(9), 8, 3 }, + { pinmux(9), 8, 2 }, + { pinmux(9), 8, 1 }, + { pinmux(9), 8, 0 }, + { pinmux(12), 8, 7 }, /* GP5[0] */ + { pinmux(12), 8, 6 }, + { pinmux(12), 8, 5 }, + { pinmux(12), 8, 4 }, + { pinmux(12), 8, 3 }, + { pinmux(12), 8, 2 }, + { pinmux(12), 8, 1 }, + { pinmux(12), 8, 0 }, + { pinmux(11), 8, 7 }, + { pinmux(11), 8, 6 }, + { pinmux(11), 8, 5 }, + { pinmux(11), 8, 4 }, + { pinmux(11), 8, 3 }, + { pinmux(11), 8, 2 }, + { pinmux(11), 8, 1 }, + { pinmux(11), 8, 0 }, + { pinmux(19), 8, 6 }, /* GP6[0] */ + { pinmux(19), 8, 5 }, + { pinmux(19), 8, 4 }, + { pinmux(19), 8, 3 }, + { pinmux(19), 8, 2 }, + { pinmux(16), 8, 1 }, + { pinmux(14), 8, 1 }, + { pinmux(14), 8, 0 }, + { pinmux(13), 8, 7 }, + { pinmux(13), 8, 6 }, + { pinmux(13), 8, 5 }, + { pinmux(13), 8, 4 }, + { pinmux(13), 8, 3 }, + { pinmux(13), 8, 2 }, + { pinmux(13), 8, 1 }, + { pinmux(13), 8, 0 }, + { pinmux(18), 8, 1 }, /* GP7[0] */ + { pinmux(18), 8, 0 }, + { pinmux(17), 8, 7 }, + { pinmux(17), 8, 6 }, + { pinmux(17), 8, 5 }, + { pinmux(17), 8, 4 }, + { pinmux(17), 8, 3 }, + { pinmux(17), 8, 2 }, + { pinmux(17), 8, 1 }, + { pinmux(17), 8, 0 }, + { pinmux(16), 8, 7 }, + { pinmux(16), 8, 6 }, + { pinmux(16), 8, 5 }, + { pinmux(16), 8, 4 }, + { pinmux(16), 8, 3 }, + { pinmux(16), 8, 2 }, + { pinmux(19), 8, 0 }, /* GP8[0] */ + { pinmux(3), 4, 7 }, + { pinmux(3), 4, 6 }, + { pinmux(3), 4, 5 }, + { pinmux(3), 4, 4 }, + { pinmux(3), 4, 3 }, + { pinmux(3), 4, 2 }, + { pinmux(2), 4, 7 }, + { pinmux(19), 8, 1 }, + { pinmux(19), 8, 0 }, + { pinmux(18), 8, 7 }, + { pinmux(18), 8, 6 }, + { pinmux(18), 8, 5 }, + { pinmux(18), 8, 4 }, + { pinmux(18), 8, 3 }, + { pinmux(18), 8, 2 }, +}; + + + +int gpio_request(int gp, const char *label) +{ + if (gp >= MAX_NUM_GPIOS) + return -1; + + if (gpio_registry[gp].is_registered) + return -1; + + gpio_registry[gp].is_registered = 1; + strncpy(gpio_registry[gp].name, label, GPIO_NAME_SIZE); + gpio_registry[gp].name[GPIO_NAME_SIZE - 1] = 0; + + davinci_configure_pin_mux(&gpio_pinmux[gp], 1); + + return 0; +} + + +void gpio_free(int gp) +{ + gpio_registry[gp].is_registered = 0; +} + + +void gpio_toggle_value(int gp) +{ + struct davinci_gpio *bank; + + bank = GPIO_BANK(gp); + gpio_set_value(gp, !gpio_get_value(gp)); +} + + +int gpio_direction_input(int gp) +{ + struct davinci_gpio *bank; + + bank = GPIO_BANK(gp); + setbits_le32(&bank->dir, 1U << GPIO_BIT(gp)); + return 0; +} + + +int gpio_direction_output(int gp, int value) +{ + struct davinci_gpio *bank; + + bank = GPIO_BANK(gp); + clrbits_le32(&bank->dir, 1U << GPIO_BIT(gp)); + gpio_set_value(gp, value); + return 0; +} + + +int gpio_get_value(int gp) +{ + struct davinci_gpio *bank; + unsigned int ip; + + bank = GPIO_BANK(gp); + ip = in_le32(&bank->in_data) & (1U << GPIO_BIT(gp)); + return ip ? 1 : 0; +} + + +void gpio_set_value(int gp, int value) +{ + struct davinci_gpio *bank; + + bank = GPIO_BANK(gp); + + if (value) + bank->set_data = 1U << GPIO_BIT(gp); + else + bank->clr_data = 1U << GPIO_BIT(gp); +} + + +void gpio_info(void) +{ + int gp, dir, val; + struct davinci_gpio *bank; + + for (gp = 0; gp < MAX_NUM_GPIOS; ++gp) { + bank = GPIO_BANK(gp); + dir = in_le32(&bank->dir) & (1U << GPIO_BIT(gp)); + val = gpio_get_value(gp); + + printf("% 4d: %s: %d [%c] %s\n", + gp, dir ? " in" : "out", val, + gpio_registry[gp].is_registered ? 'x' : ' ', + gpio_registry[gp].name); + } +}