[PATCH 0/3] rockchip: Port IO-domain driver for RK3568 from linux
This series port the IO-domain driver for RK3568 from linux. It is necessary for the IO-domain setting of the SoC to match the voltage supplied by the regulators.
The driver auto probe after bind and configures IO-domain based on the voltage reported by the regulators. This fixes issues observed while working on a gmac driver for RK3568 devices. The IO-domain setting default to 3v3, however some vccio domains may be supplied by 1v8.
I skipped a patch that fixes rk809 switch regulators to report voltage due to a discrepancy between dt-binding and reference schematics.
In mfd/rockchip,rk809.yaml: vcc8-supply: The input supply for SWITCH_REG1. vcc9-supply: The input supply for DCDC_REG5 and SWITCH_REG2.
In reference schematics: VCC8: Switch2 VCC9: Switch1 and BUCK5
Vendor U-Boot use the input supply based on schematics to report voltage.
The IO-domain driver will just continue to next IO-domain when a regulator is reporting 0 uV.
Patch 1 fixes rk8xx buck regulator driver to report correct voltage. Patch 2 adds protection so that regulator autoset only happens one time. Patch 3 adds the IO-domain driver.
This series can also be found at [1]
[1] https://github.com/Kwiboo/u-boot-rockchip/commits/rk3568-io-domain-v1
Jonas Karlman (2): power: regulator: Only run autoset once for each regulator rockchip: Port IO-domain driver for RK3568 from linux
Joseph Chen (1): regulator: rk8xx: Return correct voltage for buck converters
drivers/misc/Kconfig | 9 ++ drivers/misc/Makefile | 1 + drivers/misc/rockchip-io-domain.c | 157 +++++++++++++++++++++ drivers/power/regulator/regulator-uclass.c | 18 ++- drivers/power/regulator/rk8xx.c | 98 ++++++++----- include/power/regulator.h | 1 + 6 files changed, 242 insertions(+), 42 deletions(-) create mode 100644 drivers/misc/rockchip-io-domain.c
From: Joseph Chen chenjh@rock-chips.com
Information from the first range group is always used to calculate the voltage returned for buck converters. This may result in wrong voltage reported back to the regulator_get_value caller.
Traverse all the possible BUCK ranges to fix this issue.
Fixes: addd062beacc ("power: pmic: rk816: support rk816 pmic") Fixes: b62280745e55 ("power: pmic: rk805: support rk805 pmic") Fixes: b4a35574b38d ("power: pmic: rk817: support rk817 pmic") Fixes: ee30068fa574 ("power: pmic: rk809: support rk809 pmic") Signed-off-by: Joseph Chen chenjh@rock-chips.com [jonas@kwiboo.se: fix checkpatch error, update commit message] Signed-off-by: Jonas Karlman jonas@kwiboo.se --- drivers/power/regulator/rk8xx.c | 98 ++++++++++++++++++++------------- 1 file changed, 60 insertions(+), 38 deletions(-)
diff --git a/drivers/power/regulator/rk8xx.c b/drivers/power/regulator/rk8xx.c index e95640a39b0a..21949d678326 100644 --- a/drivers/power/regulator/rk8xx.c +++ b/drivers/power/regulator/rk8xx.c @@ -88,62 +88,65 @@ struct rk8xx_reg_info { u8 config_reg; u8 vsel_mask; u8 min_sel; + /* only for buck now */ + u8 max_sel; + u8 range_num; };
static const struct rk8xx_reg_info rk808_buck[] = { - { 712500, 12500, REG_BUCK1_ON_VSEL, REG_BUCK1_SLP_VSEL, REG_BUCK1_CONFIG, RK808_BUCK_VSEL_MASK, }, - { 712500, 12500, REG_BUCK2_ON_VSEL, REG_BUCK2_SLP_VSEL, REG_BUCK2_CONFIG, RK808_BUCK_VSEL_MASK, }, - { 712500, 12500, NA, NA, REG_BUCK3_CONFIG, RK808_BUCK_VSEL_MASK, }, - { 1800000, 100000, REG_BUCK4_ON_VSEL, REG_BUCK4_SLP_VSEL, REG_BUCK4_CONFIG, RK808_BUCK4_VSEL_MASK, }, + { 712500, 12500, REG_BUCK1_ON_VSEL, REG_BUCK1_SLP_VSEL, REG_BUCK1_CONFIG, RK808_BUCK_VSEL_MASK, 0x00, 0x3f, 1}, + { 712500, 12500, REG_BUCK2_ON_VSEL, REG_BUCK2_SLP_VSEL, REG_BUCK2_CONFIG, RK808_BUCK_VSEL_MASK, 0x00, 0x3f, 1}, + { NA, NA, NA, NA, REG_BUCK3_CONFIG, NA, NA, NA, 1}, + { 1800000, 100000, REG_BUCK4_ON_VSEL, REG_BUCK4_SLP_VSEL, REG_BUCK4_CONFIG, RK808_BUCK4_VSEL_MASK, 0x00, 0x0f, 1}, };
static const struct rk8xx_reg_info rk816_buck[] = { /* buck 1 */ - { 712500, 12500, REG_BUCK1_ON_VSEL, REG_BUCK1_SLP_VSEL, REG_BUCK1_CONFIG, RK818_BUCK_VSEL_MASK, 0x00, }, - { 1800000, 200000, REG_BUCK1_ON_VSEL, REG_BUCK1_SLP_VSEL, REG_BUCK1_CONFIG, RK818_BUCK_VSEL_MASK, 0x3c, }, - { 2300000, 0, REG_BUCK1_ON_VSEL, REG_BUCK1_SLP_VSEL, REG_BUCK1_CONFIG, RK818_BUCK_VSEL_MASK, 0x3f, }, + { 712500, 12500, REG_BUCK1_ON_VSEL, REG_BUCK1_SLP_VSEL, REG_BUCK1_CONFIG, RK818_BUCK_VSEL_MASK, 0x00, 0x3b, 3}, + { 1800000, 200000, REG_BUCK1_ON_VSEL, REG_BUCK1_SLP_VSEL, REG_BUCK1_CONFIG, RK818_BUCK_VSEL_MASK, 0x3c, 0x3e, 3}, + { 2300000, 0, REG_BUCK1_ON_VSEL, REG_BUCK1_SLP_VSEL, REG_BUCK1_CONFIG, RK818_BUCK_VSEL_MASK, 0x3f, 0x3f, 3}, /* buck 2 */ - { 712500, 12500, REG_BUCK2_ON_VSEL, REG_BUCK2_SLP_VSEL, REG_BUCK2_CONFIG, RK818_BUCK_VSEL_MASK, 0x00, }, - { 1800000, 200000, REG_BUCK2_ON_VSEL, REG_BUCK2_SLP_VSEL, REG_BUCK2_CONFIG, RK818_BUCK_VSEL_MASK, 0x3c, }, - { 2300000, 0, REG_BUCK2_ON_VSEL, REG_BUCK2_SLP_VSEL, REG_BUCK2_CONFIG, RK818_BUCK_VSEL_MASK, 0x3f, }, + { 712500, 12500, REG_BUCK2_ON_VSEL, REG_BUCK2_SLP_VSEL, REG_BUCK2_CONFIG, RK818_BUCK_VSEL_MASK, 0x00, 0x3b, 3}, + { 1800000, 200000, REG_BUCK2_ON_VSEL, REG_BUCK2_SLP_VSEL, REG_BUCK2_CONFIG, RK818_BUCK_VSEL_MASK, 0x3c, 0x3e, 3}, + { 2300000, 0, REG_BUCK2_ON_VSEL, REG_BUCK2_SLP_VSEL, REG_BUCK2_CONFIG, RK818_BUCK_VSEL_MASK, 0x3f, 0x3f, 3}, /* buck 3 */ - { 712500, 12500, NA, NA, REG_BUCK3_CONFIG, RK818_BUCK_VSEL_MASK, }, + { NA, NA, NA, NA, REG_BUCK3_CONFIG, NA, NA, NA, 1}, /* buck 4 */ - { 800000, 100000, REG_BUCK4_ON_VSEL, REG_BUCK4_SLP_VSEL, REG_BUCK4_CONFIG, RK818_BUCK4_VSEL_MASK, }, + { 800000, 100000, REG_BUCK4_ON_VSEL, REG_BUCK4_SLP_VSEL, REG_BUCK4_CONFIG, RK818_BUCK4_VSEL_MASK, 0x00, 0x1b, 1}, };
static const struct rk8xx_reg_info rk809_buck5[] = { /* buck 5 */ - { 1500000, 0, RK809_BUCK5_CONFIG(0), RK809_BUCK5_CONFIG(1), NA, RK809_BUCK5_VSEL_MASK, 0x00, }, - { 1800000, 200000, RK809_BUCK5_CONFIG(0), RK809_BUCK5_CONFIG(1), NA, RK809_BUCK5_VSEL_MASK, 0x01, }, - { 2800000, 200000, RK809_BUCK5_CONFIG(0), RK809_BUCK5_CONFIG(1), NA, RK809_BUCK5_VSEL_MASK, 0x04, }, - { 3300000, 300000, RK809_BUCK5_CONFIG(0), RK809_BUCK5_CONFIG(1), NA, RK809_BUCK5_VSEL_MASK, 0x06, }, + { 1500000, 0, RK809_BUCK5_CONFIG(0), RK809_BUCK5_CONFIG(1), NA, RK809_BUCK5_VSEL_MASK, 0x00, 0x00, 4}, + { 1800000, 200000, RK809_BUCK5_CONFIG(0), RK809_BUCK5_CONFIG(1), NA, RK809_BUCK5_VSEL_MASK, 0x01, 0x03, 4}, + { 2800000, 200000, RK809_BUCK5_CONFIG(0), RK809_BUCK5_CONFIG(1), NA, RK809_BUCK5_VSEL_MASK, 0x04, 0x05, 4}, + { 3300000, 300000, RK809_BUCK5_CONFIG(0), RK809_BUCK5_CONFIG(1), NA, RK809_BUCK5_VSEL_MASK, 0x06, 0x07, 4}, };
static const struct rk8xx_reg_info rk817_buck[] = { /* buck 1 */ - { 500000, 12500, RK817_BUCK_ON_VSEL(1), RK817_BUCK_SLP_VSEL(1), RK817_BUCK_CONFIG(1), RK817_BUCK_VSEL_MASK, 0x00, }, - { 1500000, 100000, RK817_BUCK_ON_VSEL(1), RK817_BUCK_SLP_VSEL(1), RK817_BUCK_CONFIG(1), RK817_BUCK_VSEL_MASK, 0x50, }, - { 2400000, 0, RK817_BUCK_ON_VSEL(1), RK817_BUCK_SLP_VSEL(1), RK817_BUCK_CONFIG(1), RK817_BUCK_VSEL_MASK, 0x59, }, + { 500000, 12500, RK817_BUCK_ON_VSEL(1), RK817_BUCK_SLP_VSEL(1), RK817_BUCK_CONFIG(1), RK817_BUCK_VSEL_MASK, 0x00, 0x4f, 3}, + { 1500000, 100000, RK817_BUCK_ON_VSEL(1), RK817_BUCK_SLP_VSEL(1), RK817_BUCK_CONFIG(1), RK817_BUCK_VSEL_MASK, 0x50, 0x58, 3}, + { 2400000, 0, RK817_BUCK_ON_VSEL(1), RK817_BUCK_SLP_VSEL(1), RK817_BUCK_CONFIG(1), RK817_BUCK_VSEL_MASK, 0x59, 0x59, 3}, /* buck 2 */ - { 500000, 12500, RK817_BUCK_ON_VSEL(2), RK817_BUCK_SLP_VSEL(2), RK817_BUCK_CONFIG(2), RK817_BUCK_VSEL_MASK, 0x00, }, - { 1500000, 100000, RK817_BUCK_ON_VSEL(2), RK817_BUCK_SLP_VSEL(2), RK817_BUCK_CONFIG(2), RK817_BUCK_VSEL_MASK, 0x50, }, - { 2400000, 0, RK817_BUCK_ON_VSEL(2), RK817_BUCK_SLP_VSEL(2), RK817_BUCK_CONFIG(2), RK817_BUCK_VSEL_MASK, 0x59, }, + { 500000, 12500, RK817_BUCK_ON_VSEL(2), RK817_BUCK_SLP_VSEL(2), RK817_BUCK_CONFIG(2), RK817_BUCK_VSEL_MASK, 0x00, 0x4f, 3}, + { 1500000, 100000, RK817_BUCK_ON_VSEL(2), RK817_BUCK_SLP_VSEL(2), RK817_BUCK_CONFIG(2), RK817_BUCK_VSEL_MASK, 0x50, 0x58, 3}, + { 2400000, 0, RK817_BUCK_ON_VSEL(2), RK817_BUCK_SLP_VSEL(2), RK817_BUCK_CONFIG(2), RK817_BUCK_VSEL_MASK, 0x59, 0x59, 3}, /* buck 3 */ - { 500000, 12500, RK817_BUCK_ON_VSEL(3), RK817_BUCK_SLP_VSEL(3), RK817_BUCK_CONFIG(3), RK817_BUCK_VSEL_MASK, 0x00, }, - { 1500000, 100000, RK817_BUCK_ON_VSEL(3), RK817_BUCK_SLP_VSEL(3), RK817_BUCK_CONFIG(3), RK817_BUCK_VSEL_MASK, 0x50, }, - { 2400000, 0, RK817_BUCK_ON_VSEL(3), RK817_BUCK_SLP_VSEL(3), RK817_BUCK_CONFIG(3), RK817_BUCK_VSEL_MASK, 0x59, }, + { 500000, 12500, RK817_BUCK_ON_VSEL(3), RK817_BUCK_SLP_VSEL(3), RK817_BUCK_CONFIG(3), RK817_BUCK_VSEL_MASK, 0x00, 0x4f, 3}, + { 1500000, 100000, RK817_BUCK_ON_VSEL(3), RK817_BUCK_SLP_VSEL(3), RK817_BUCK_CONFIG(3), RK817_BUCK_VSEL_MASK, 0x50, 0x58, 3}, + { 2400000, 0, RK817_BUCK_ON_VSEL(3), RK817_BUCK_SLP_VSEL(3), RK817_BUCK_CONFIG(3), RK817_BUCK_VSEL_MASK, 0x59, 0x59, 3}, /* buck 4 */ - { 500000, 12500, RK817_BUCK_ON_VSEL(4), RK817_BUCK_SLP_VSEL(4), RK817_BUCK_CONFIG(4), RK817_BUCK_VSEL_MASK, 0x00, }, - { 1500000, 100000, RK817_BUCK_ON_VSEL(4), RK817_BUCK_SLP_VSEL(4), RK817_BUCK_CONFIG(4), RK817_BUCK_VSEL_MASK, 0x50, }, - { 3400000, 0, RK817_BUCK_ON_VSEL(4), RK817_BUCK_SLP_VSEL(4), RK817_BUCK_CONFIG(4), RK817_BUCK_VSEL_MASK, 0x63, }, + { 500000, 12500, RK817_BUCK_ON_VSEL(4), RK817_BUCK_SLP_VSEL(4), RK817_BUCK_CONFIG(4), RK817_BUCK_VSEL_MASK, 0x00, 0x4f, 3}, + { 1500000, 100000, RK817_BUCK_ON_VSEL(4), RK817_BUCK_SLP_VSEL(4), RK817_BUCK_CONFIG(4), RK817_BUCK_VSEL_MASK, 0x50, 0x62, 3}, + { 3400000, 0, RK817_BUCK_ON_VSEL(4), RK817_BUCK_SLP_VSEL(4), RK817_BUCK_CONFIG(4), RK817_BUCK_VSEL_MASK, 0x63, 0x63, 3}, };
static const struct rk8xx_reg_info rk818_buck[] = { - { 712500, 12500, REG_BUCK1_ON_VSEL, REG_BUCK1_SLP_VSEL, REG_BUCK1_CONFIG, RK818_BUCK_VSEL_MASK, }, - { 712500, 12500, REG_BUCK2_ON_VSEL, REG_BUCK2_SLP_VSEL, REG_BUCK2_CONFIG, RK818_BUCK_VSEL_MASK, }, - { 712500, 12500, NA, NA, REG_BUCK3_CONFIG, RK818_BUCK_VSEL_MASK, }, - { 1800000, 100000, REG_BUCK4_ON_VSEL, REG_BUCK4_SLP_VSEL, REG_BUCK4_CONFIG, RK818_BUCK4_VSEL_MASK, }, + { 712500, 12500, REG_BUCK1_ON_VSEL, REG_BUCK1_SLP_VSEL, REG_BUCK1_CONFIG, RK818_BUCK_VSEL_MASK, 0x00, 0x3f, 1}, + { 712500, 12500, REG_BUCK2_ON_VSEL, REG_BUCK2_SLP_VSEL, REG_BUCK2_CONFIG, RK818_BUCK_VSEL_MASK, 0x00, 0x3f, 1}, + { NA, NA, NA, NA, REG_BUCK3_CONFIG, NA, NA, NA, 1}, + { 1800000, 100000, REG_BUCK4_ON_VSEL, REG_BUCK4_SLP_VSEL, REG_BUCK4_CONFIG, RK818_BUCK4_VSEL_MASK, 0x00, 0x10, 1}, };
#ifdef ENABLE_DRIVER @@ -706,10 +709,9 @@ static int _ldo_get_suspend_enable(struct udevice *pmic, int ldo) static int buck_get_value(struct udevice *dev) { int buck = dev->driver_data - 1; - /* We assume level-1 voltage is enough for usage in U-Boot */ const struct rk8xx_reg_info *info = get_buck_reg(dev->parent, buck, 0); int mask = info->vsel_mask; - int ret, val; + int i, ret, val;
if (info->vsel_reg == NA) return -ENOSYS; @@ -717,9 +719,20 @@ static int buck_get_value(struct udevice *dev) ret = pmic_reg_read(dev->parent, info->vsel_reg); if (ret < 0) return ret; + val = ret & mask; + if (val >= info->min_sel && val <= info->max_sel) + goto finish;
- return info->min_uv + val * info->step_uv; + /* unlucky to try */ + for (i = 1; i < info->range_num; i++) { + info++; + if (val <= info->max_sel && val >= info->min_sel) + break; + } + +finish: + return info->min_uv + (val - info->min_sel) * info->step_uv; }
static int buck_set_value(struct udevice *dev, int uvolt) @@ -732,10 +745,9 @@ static int buck_set_value(struct udevice *dev, int uvolt) static int buck_get_suspend_value(struct udevice *dev) { int buck = dev->driver_data - 1; - /* We assume level-1 voltage is enough for usage in U-Boot */ const struct rk8xx_reg_info *info = get_buck_reg(dev->parent, buck, 0); int mask = info->vsel_mask; - int ret, val; + int i, ret, val;
if (info->vsel_sleep_reg == NA) return -ENOSYS; @@ -745,8 +757,18 @@ static int buck_get_suspend_value(struct udevice *dev) return ret;
val = ret & mask; + if (val <= info->max_sel && val >= info->min_sel) + goto finish;
- return info->min_uv + val * info->step_uv; + /* unlucky to try */ + for (i = 1; i < info->range_num; i++) { + info++; + if (val <= info->max_sel && val >= info->min_sel) + break; + } + +finish: + return info->min_uv + (val - info->min_sel) * info->step_uv; }
static int buck_set_suspend_value(struct udevice *dev, int uvolt)
Hi Jonas,
On Sun, 6 Aug 2023 at 06:04, Jonas Karlman jonas@kwiboo.se wrote:
From: Joseph Chen chenjh@rock-chips.com
Information from the first range group is always used to calculate the voltage returned for buck converters. This may result in wrong voltage reported back to the regulator_get_value caller.
Traverse all the possible BUCK ranges to fix this issue.
Fixes: addd062beacc ("power: pmic: rk816: support rk816 pmic") Fixes: b62280745e55 ("power: pmic: rk805: support rk805 pmic") Fixes: b4a35574b38d ("power: pmic: rk817: support rk817 pmic") Fixes: ee30068fa574 ("power: pmic: rk809: support rk809 pmic") Signed-off-by: Joseph Chen chenjh@rock-chips.com [jonas@kwiboo.se: fix checkpatch error, update commit message] Signed-off-by: Jonas Karlman jonas@kwiboo.se
drivers/power/regulator/rk8xx.c | 98 ++++++++++++++++++++------------- 1 file changed, 60 insertions(+), 38 deletions(-)
Reviewed-by: Simon Glass sjg@chromium.org
diff --git a/drivers/power/regulator/rk8xx.c b/drivers/power/regulator/rk8xx.c index e95640a39b0a..21949d678326 100644 --- a/drivers/power/regulator/rk8xx.c +++ b/drivers/power/regulator/rk8xx.c @@ -88,62 +88,65 @@ struct rk8xx_reg_info { u8 config_reg; u8 vsel_mask; u8 min_sel;
/* only for buck now */u8 max_sel;u8 range_num;};
Please comment the items. What is range_num? The number of ranges or the number of ranges - 1?
static const struct rk8xx_reg_info rk808_buck[] = {
{ 712500, 12500, REG_BUCK1_ON_VSEL, REG_BUCK1_SLP_VSEL, REG_BUCK1_CONFIG, RK808_BUCK_VSEL_MASK, },{ 712500, 12500, REG_BUCK2_ON_VSEL, REG_BUCK2_SLP_VSEL, REG_BUCK2_CONFIG, RK808_BUCK_VSEL_MASK, },{ 712500, 12500, NA, NA, REG_BUCK3_CONFIG, RK808_BUCK_VSEL_MASK, },{ 1800000, 100000, REG_BUCK4_ON_VSEL, REG_BUCK4_SLP_VSEL, REG_BUCK4_CONFIG, RK808_BUCK4_VSEL_MASK, },
{ 712500, 12500, REG_BUCK1_ON_VSEL, REG_BUCK1_SLP_VSEL, REG_BUCK1_CONFIG, RK808_BUCK_VSEL_MASK, 0x00, 0x3f, 1},{ 712500, 12500, REG_BUCK2_ON_VSEL, REG_BUCK2_SLP_VSEL, REG_BUCK2_CONFIG, RK808_BUCK_VSEL_MASK, 0x00, 0x3f, 1},{ NA, NA, NA, NA, REG_BUCK3_CONFIG, NA, NA, NA, 1},{ 1800000, 100000, REG_BUCK4_ON_VSEL, REG_BUCK4_SLP_VSEL, REG_BUCK4_CONFIG, RK808_BUCK4_VSEL_MASK, 0x00, 0x0f, 1},};
static const struct rk8xx_reg_info rk816_buck[] = { /* buck 1 */
{ 712500, 12500, REG_BUCK1_ON_VSEL, REG_BUCK1_SLP_VSEL, REG_BUCK1_CONFIG, RK818_BUCK_VSEL_MASK, 0x00, },{ 1800000, 200000, REG_BUCK1_ON_VSEL, REG_BUCK1_SLP_VSEL, REG_BUCK1_CONFIG, RK818_BUCK_VSEL_MASK, 0x3c, },{ 2300000, 0, REG_BUCK1_ON_VSEL, REG_BUCK1_SLP_VSEL, REG_BUCK1_CONFIG, RK818_BUCK_VSEL_MASK, 0x3f, },
{ 712500, 12500, REG_BUCK1_ON_VSEL, REG_BUCK1_SLP_VSEL, REG_BUCK1_CONFIG, RK818_BUCK_VSEL_MASK, 0x00, 0x3b, 3},{ 1800000, 200000, REG_BUCK1_ON_VSEL, REG_BUCK1_SLP_VSEL, REG_BUCK1_CONFIG, RK818_BUCK_VSEL_MASK, 0x3c, 0x3e, 3},{ 2300000, 0, REG_BUCK1_ON_VSEL, REG_BUCK1_SLP_VSEL, REG_BUCK1_CONFIG, RK818_BUCK_VSEL_MASK, 0x3f, 0x3f, 3}, /* buck 2 */
{ 712500, 12500, REG_BUCK2_ON_VSEL, REG_BUCK2_SLP_VSEL, REG_BUCK2_CONFIG, RK818_BUCK_VSEL_MASK, 0x00, },{ 1800000, 200000, REG_BUCK2_ON_VSEL, REG_BUCK2_SLP_VSEL, REG_BUCK2_CONFIG, RK818_BUCK_VSEL_MASK, 0x3c, },{ 2300000, 0, REG_BUCK2_ON_VSEL, REG_BUCK2_SLP_VSEL, REG_BUCK2_CONFIG, RK818_BUCK_VSEL_MASK, 0x3f, },
{ 712500, 12500, REG_BUCK2_ON_VSEL, REG_BUCK2_SLP_VSEL, REG_BUCK2_CONFIG, RK818_BUCK_VSEL_MASK, 0x00, 0x3b, 3},{ 1800000, 200000, REG_BUCK2_ON_VSEL, REG_BUCK2_SLP_VSEL, REG_BUCK2_CONFIG, RK818_BUCK_VSEL_MASK, 0x3c, 0x3e, 3},{ 2300000, 0, REG_BUCK2_ON_VSEL, REG_BUCK2_SLP_VSEL, REG_BUCK2_CONFIG, RK818_BUCK_VSEL_MASK, 0x3f, 0x3f, 3}, /* buck 3 */
{ 712500, 12500, NA, NA, REG_BUCK3_CONFIG, RK818_BUCK_VSEL_MASK, },
{ NA, NA, NA, NA, REG_BUCK3_CONFIG, NA, NA, NA, 1}, /* buck 4 */
{ 800000, 100000, REG_BUCK4_ON_VSEL, REG_BUCK4_SLP_VSEL, REG_BUCK4_CONFIG, RK818_BUCK4_VSEL_MASK, },
{ 800000, 100000, REG_BUCK4_ON_VSEL, REG_BUCK4_SLP_VSEL, REG_BUCK4_CONFIG, RK818_BUCK4_VSEL_MASK, 0x00, 0x1b, 1},};
static const struct rk8xx_reg_info rk809_buck5[] = { /* buck 5 */
{ 1500000, 0, RK809_BUCK5_CONFIG(0), RK809_BUCK5_CONFIG(1), NA, RK809_BUCK5_VSEL_MASK, 0x00, },{ 1800000, 200000, RK809_BUCK5_CONFIG(0), RK809_BUCK5_CONFIG(1), NA, RK809_BUCK5_VSEL_MASK, 0x01, },{ 2800000, 200000, RK809_BUCK5_CONFIG(0), RK809_BUCK5_CONFIG(1), NA, RK809_BUCK5_VSEL_MASK, 0x04, },{ 3300000, 300000, RK809_BUCK5_CONFIG(0), RK809_BUCK5_CONFIG(1), NA, RK809_BUCK5_VSEL_MASK, 0x06, },
{ 1500000, 0, RK809_BUCK5_CONFIG(0), RK809_BUCK5_CONFIG(1), NA, RK809_BUCK5_VSEL_MASK, 0x00, 0x00, 4},{ 1800000, 200000, RK809_BUCK5_CONFIG(0), RK809_BUCK5_CONFIG(1), NA, RK809_BUCK5_VSEL_MASK, 0x01, 0x03, 4},{ 2800000, 200000, RK809_BUCK5_CONFIG(0), RK809_BUCK5_CONFIG(1), NA, RK809_BUCK5_VSEL_MASK, 0x04, 0x05, 4},{ 3300000, 300000, RK809_BUCK5_CONFIG(0), RK809_BUCK5_CONFIG(1), NA, RK809_BUCK5_VSEL_MASK, 0x06, 0x07, 4},};
static const struct rk8xx_reg_info rk817_buck[] = { /* buck 1 */
{ 500000, 12500, RK817_BUCK_ON_VSEL(1), RK817_BUCK_SLP_VSEL(1), RK817_BUCK_CONFIG(1), RK817_BUCK_VSEL_MASK, 0x00, },{ 1500000, 100000, RK817_BUCK_ON_VSEL(1), RK817_BUCK_SLP_VSEL(1), RK817_BUCK_CONFIG(1), RK817_BUCK_VSEL_MASK, 0x50, },{ 2400000, 0, RK817_BUCK_ON_VSEL(1), RK817_BUCK_SLP_VSEL(1), RK817_BUCK_CONFIG(1), RK817_BUCK_VSEL_MASK, 0x59, },
{ 500000, 12500, RK817_BUCK_ON_VSEL(1), RK817_BUCK_SLP_VSEL(1), RK817_BUCK_CONFIG(1), RK817_BUCK_VSEL_MASK, 0x00, 0x4f, 3},{ 1500000, 100000, RK817_BUCK_ON_VSEL(1), RK817_BUCK_SLP_VSEL(1), RK817_BUCK_CONFIG(1), RK817_BUCK_VSEL_MASK, 0x50, 0x58, 3},{ 2400000, 0, RK817_BUCK_ON_VSEL(1), RK817_BUCK_SLP_VSEL(1), RK817_BUCK_CONFIG(1), RK817_BUCK_VSEL_MASK, 0x59, 0x59, 3}, /* buck 2 */
{ 500000, 12500, RK817_BUCK_ON_VSEL(2), RK817_BUCK_SLP_VSEL(2), RK817_BUCK_CONFIG(2), RK817_BUCK_VSEL_MASK, 0x00, },{ 1500000, 100000, RK817_BUCK_ON_VSEL(2), RK817_BUCK_SLP_VSEL(2), RK817_BUCK_CONFIG(2), RK817_BUCK_VSEL_MASK, 0x50, },{ 2400000, 0, RK817_BUCK_ON_VSEL(2), RK817_BUCK_SLP_VSEL(2), RK817_BUCK_CONFIG(2), RK817_BUCK_VSEL_MASK, 0x59, },
{ 500000, 12500, RK817_BUCK_ON_VSEL(2), RK817_BUCK_SLP_VSEL(2), RK817_BUCK_CONFIG(2), RK817_BUCK_VSEL_MASK, 0x00, 0x4f, 3},{ 1500000, 100000, RK817_BUCK_ON_VSEL(2), RK817_BUCK_SLP_VSEL(2), RK817_BUCK_CONFIG(2), RK817_BUCK_VSEL_MASK, 0x50, 0x58, 3},{ 2400000, 0, RK817_BUCK_ON_VSEL(2), RK817_BUCK_SLP_VSEL(2), RK817_BUCK_CONFIG(2), RK817_BUCK_VSEL_MASK, 0x59, 0x59, 3}, /* buck 3 */
{ 500000, 12500, RK817_BUCK_ON_VSEL(3), RK817_BUCK_SLP_VSEL(3), RK817_BUCK_CONFIG(3), RK817_BUCK_VSEL_MASK, 0x00, },{ 1500000, 100000, RK817_BUCK_ON_VSEL(3), RK817_BUCK_SLP_VSEL(3), RK817_BUCK_CONFIG(3), RK817_BUCK_VSEL_MASK, 0x50, },{ 2400000, 0, RK817_BUCK_ON_VSEL(3), RK817_BUCK_SLP_VSEL(3), RK817_BUCK_CONFIG(3), RK817_BUCK_VSEL_MASK, 0x59, },
{ 500000, 12500, RK817_BUCK_ON_VSEL(3), RK817_BUCK_SLP_VSEL(3), RK817_BUCK_CONFIG(3), RK817_BUCK_VSEL_MASK, 0x00, 0x4f, 3},{ 1500000, 100000, RK817_BUCK_ON_VSEL(3), RK817_BUCK_SLP_VSEL(3), RK817_BUCK_CONFIG(3), RK817_BUCK_VSEL_MASK, 0x50, 0x58, 3},{ 2400000, 0, RK817_BUCK_ON_VSEL(3), RK817_BUCK_SLP_VSEL(3), RK817_BUCK_CONFIG(3), RK817_BUCK_VSEL_MASK, 0x59, 0x59, 3}, /* buck 4 */
{ 500000, 12500, RK817_BUCK_ON_VSEL(4), RK817_BUCK_SLP_VSEL(4), RK817_BUCK_CONFIG(4), RK817_BUCK_VSEL_MASK, 0x00, },{ 1500000, 100000, RK817_BUCK_ON_VSEL(4), RK817_BUCK_SLP_VSEL(4), RK817_BUCK_CONFIG(4), RK817_BUCK_VSEL_MASK, 0x50, },{ 3400000, 0, RK817_BUCK_ON_VSEL(4), RK817_BUCK_SLP_VSEL(4), RK817_BUCK_CONFIG(4), RK817_BUCK_VSEL_MASK, 0x63, },
{ 500000, 12500, RK817_BUCK_ON_VSEL(4), RK817_BUCK_SLP_VSEL(4), RK817_BUCK_CONFIG(4), RK817_BUCK_VSEL_MASK, 0x00, 0x4f, 3},{ 1500000, 100000, RK817_BUCK_ON_VSEL(4), RK817_BUCK_SLP_VSEL(4), RK817_BUCK_CONFIG(4), RK817_BUCK_VSEL_MASK, 0x50, 0x62, 3},{ 3400000, 0, RK817_BUCK_ON_VSEL(4), RK817_BUCK_SLP_VSEL(4), RK817_BUCK_CONFIG(4), RK817_BUCK_VSEL_MASK, 0x63, 0x63, 3},};
static const struct rk8xx_reg_info rk818_buck[] = {
{ 712500, 12500, REG_BUCK1_ON_VSEL, REG_BUCK1_SLP_VSEL, REG_BUCK1_CONFIG, RK818_BUCK_VSEL_MASK, },{ 712500, 12500, REG_BUCK2_ON_VSEL, REG_BUCK2_SLP_VSEL, REG_BUCK2_CONFIG, RK818_BUCK_VSEL_MASK, },{ 712500, 12500, NA, NA, REG_BUCK3_CONFIG, RK818_BUCK_VSEL_MASK, },{ 1800000, 100000, REG_BUCK4_ON_VSEL, REG_BUCK4_SLP_VSEL, REG_BUCK4_CONFIG, RK818_BUCK4_VSEL_MASK, },
{ 712500, 12500, REG_BUCK1_ON_VSEL, REG_BUCK1_SLP_VSEL, REG_BUCK1_CONFIG, RK818_BUCK_VSEL_MASK, 0x00, 0x3f, 1},{ 712500, 12500, REG_BUCK2_ON_VSEL, REG_BUCK2_SLP_VSEL, REG_BUCK2_CONFIG, RK818_BUCK_VSEL_MASK, 0x00, 0x3f, 1},{ NA, NA, NA, NA, REG_BUCK3_CONFIG, NA, NA, NA, 1},{ 1800000, 100000, REG_BUCK4_ON_VSEL, REG_BUCK4_SLP_VSEL, REG_BUCK4_CONFIG, RK818_BUCK4_VSEL_MASK, 0x00, 0x10, 1},};
#ifdef ENABLE_DRIVER @@ -706,10 +709,9 @@ static int _ldo_get_suspend_enable(struct udevice *pmic, int ldo) static int buck_get_value(struct udevice *dev) { int buck = dev->driver_data - 1;
/* We assume level-1 voltage is enough for usage in U-Boot */ const struct rk8xx_reg_info *info = get_buck_reg(dev->parent, buck, 0); int mask = info->vsel_mask;int ret, val;
int i, ret, val; if (info->vsel_reg == NA) return -ENOSYS;@@ -717,9 +719,20 @@ static int buck_get_value(struct udevice *dev) ret = pmic_reg_read(dev->parent, info->vsel_reg); if (ret < 0) return ret;
val = ret & mask;if (val >= info->min_sel && val <= info->max_sel)goto finish;
return info->min_uv + val * info->step_uv;
/* unlucky to try */for (i = 1; i < info->range_num; i++) {info++;if (val <= info->max_sel && val >= info->min_sel)break;}
Can you add a comment here as to what happens when you fall through?
+finish:
return info->min_uv + (val - info->min_sel) * info->step_uv;}
static int buck_set_value(struct udevice *dev, int uvolt) @@ -732,10 +745,9 @@ static int buck_set_value(struct udevice *dev, int uvolt) static int buck_get_suspend_value(struct udevice *dev) { int buck = dev->driver_data - 1;
/* We assume level-1 voltage is enough for usage in U-Boot */ const struct rk8xx_reg_info *info = get_buck_reg(dev->parent, buck, 0); int mask = info->vsel_mask;int ret, val;
int i, ret, val; if (info->vsel_sleep_reg == NA) return -ENOSYS;@@ -745,8 +757,18 @@ static int buck_get_suspend_value(struct udevice *dev) return ret;
val = ret & mask;
if (val <= info->max_sel && val >= info->min_sel)goto finish;
return info->min_uv + val * info->step_uv;
/* unlucky to try */for (i = 1; i < info->range_num; i++) {info++;
It seems you could drop the if() part above and just use this loop, if i started at 0 and you incremented info after the next line?
if (val <= info->max_sel && val >= info->min_sel)break;}+finish:
return info->min_uv + (val - info->min_sel) * info->step_uv;}
static int buck_set_suspend_value(struct udevice *dev, int uvolt)
2.41.0
Regards, Simon
Hi Simon,
On 2023-08-07 03:33, Simon Glass wrote:
Hi Jonas,
On Sun, 6 Aug 2023 at 06:04, Jonas Karlman jonas@kwiboo.se wrote:
From: Joseph Chen chenjh@rock-chips.com
Information from the first range group is always used to calculate the voltage returned for buck converters. This may result in wrong voltage reported back to the regulator_get_value caller.
Traverse all the possible BUCK ranges to fix this issue.
Fixes: addd062beacc ("power: pmic: rk816: support rk816 pmic") Fixes: b62280745e55 ("power: pmic: rk805: support rk805 pmic") Fixes: b4a35574b38d ("power: pmic: rk817: support rk817 pmic") Fixes: ee30068fa574 ("power: pmic: rk809: support rk809 pmic") Signed-off-by: Joseph Chen chenjh@rock-chips.com [jonas@kwiboo.se: fix checkpatch error, update commit message] Signed-off-by: Jonas Karlman jonas@kwiboo.se
drivers/power/regulator/rk8xx.c | 98 ++++++++++++++++++++------------- 1 file changed, 60 insertions(+), 38 deletions(-)
Reviewed-by: Simon Glass sjg@chromium.org
diff --git a/drivers/power/regulator/rk8xx.c b/drivers/power/regulator/rk8xx.c index e95640a39b0a..21949d678326 100644 --- a/drivers/power/regulator/rk8xx.c +++ b/drivers/power/regulator/rk8xx.c @@ -88,62 +88,65 @@ struct rk8xx_reg_info { u8 config_reg; u8 vsel_mask; u8 min_sel;
/* only for buck now */u8 max_sel;u8 range_num;};
Please comment the items. What is range_num? The number of ranges or the number of ranges - 1?
Will take a closer look and add comments in v2.
static const struct rk8xx_reg_info rk808_buck[] = {
{ 712500, 12500, REG_BUCK1_ON_VSEL, REG_BUCK1_SLP_VSEL, REG_BUCK1_CONFIG, RK808_BUCK_VSEL_MASK, },{ 712500, 12500, REG_BUCK2_ON_VSEL, REG_BUCK2_SLP_VSEL, REG_BUCK2_CONFIG, RK808_BUCK_VSEL_MASK, },{ 712500, 12500, NA, NA, REG_BUCK3_CONFIG, RK808_BUCK_VSEL_MASK, },{ 1800000, 100000, REG_BUCK4_ON_VSEL, REG_BUCK4_SLP_VSEL, REG_BUCK4_CONFIG, RK808_BUCK4_VSEL_MASK, },
{ 712500, 12500, REG_BUCK1_ON_VSEL, REG_BUCK1_SLP_VSEL, REG_BUCK1_CONFIG, RK808_BUCK_VSEL_MASK, 0x00, 0x3f, 1},{ 712500, 12500, REG_BUCK2_ON_VSEL, REG_BUCK2_SLP_VSEL, REG_BUCK2_CONFIG, RK808_BUCK_VSEL_MASK, 0x00, 0x3f, 1},{ NA, NA, NA, NA, REG_BUCK3_CONFIG, NA, NA, NA, 1},{ 1800000, 100000, REG_BUCK4_ON_VSEL, REG_BUCK4_SLP_VSEL, REG_BUCK4_CONFIG, RK808_BUCK4_VSEL_MASK, 0x00, 0x0f, 1},};
static const struct rk8xx_reg_info rk816_buck[] = { /* buck 1 */
{ 712500, 12500, REG_BUCK1_ON_VSEL, REG_BUCK1_SLP_VSEL, REG_BUCK1_CONFIG, RK818_BUCK_VSEL_MASK, 0x00, },{ 1800000, 200000, REG_BUCK1_ON_VSEL, REG_BUCK1_SLP_VSEL, REG_BUCK1_CONFIG, RK818_BUCK_VSEL_MASK, 0x3c, },{ 2300000, 0, REG_BUCK1_ON_VSEL, REG_BUCK1_SLP_VSEL, REG_BUCK1_CONFIG, RK818_BUCK_VSEL_MASK, 0x3f, },
{ 712500, 12500, REG_BUCK1_ON_VSEL, REG_BUCK1_SLP_VSEL, REG_BUCK1_CONFIG, RK818_BUCK_VSEL_MASK, 0x00, 0x3b, 3},{ 1800000, 200000, REG_BUCK1_ON_VSEL, REG_BUCK1_SLP_VSEL, REG_BUCK1_CONFIG, RK818_BUCK_VSEL_MASK, 0x3c, 0x3e, 3},{ 2300000, 0, REG_BUCK1_ON_VSEL, REG_BUCK1_SLP_VSEL, REG_BUCK1_CONFIG, RK818_BUCK_VSEL_MASK, 0x3f, 0x3f, 3}, /* buck 2 */
{ 712500, 12500, REG_BUCK2_ON_VSEL, REG_BUCK2_SLP_VSEL, REG_BUCK2_CONFIG, RK818_BUCK_VSEL_MASK, 0x00, },{ 1800000, 200000, REG_BUCK2_ON_VSEL, REG_BUCK2_SLP_VSEL, REG_BUCK2_CONFIG, RK818_BUCK_VSEL_MASK, 0x3c, },{ 2300000, 0, REG_BUCK2_ON_VSEL, REG_BUCK2_SLP_VSEL, REG_BUCK2_CONFIG, RK818_BUCK_VSEL_MASK, 0x3f, },
{ 712500, 12500, REG_BUCK2_ON_VSEL, REG_BUCK2_SLP_VSEL, REG_BUCK2_CONFIG, RK818_BUCK_VSEL_MASK, 0x00, 0x3b, 3},{ 1800000, 200000, REG_BUCK2_ON_VSEL, REG_BUCK2_SLP_VSEL, REG_BUCK2_CONFIG, RK818_BUCK_VSEL_MASK, 0x3c, 0x3e, 3},{ 2300000, 0, REG_BUCK2_ON_VSEL, REG_BUCK2_SLP_VSEL, REG_BUCK2_CONFIG, RK818_BUCK_VSEL_MASK, 0x3f, 0x3f, 3}, /* buck 3 */
{ 712500, 12500, NA, NA, REG_BUCK3_CONFIG, RK818_BUCK_VSEL_MASK, },
{ NA, NA, NA, NA, REG_BUCK3_CONFIG, NA, NA, NA, 1}, /* buck 4 */
{ 800000, 100000, REG_BUCK4_ON_VSEL, REG_BUCK4_SLP_VSEL, REG_BUCK4_CONFIG, RK818_BUCK4_VSEL_MASK, },
{ 800000, 100000, REG_BUCK4_ON_VSEL, REG_BUCK4_SLP_VSEL, REG_BUCK4_CONFIG, RK818_BUCK4_VSEL_MASK, 0x00, 0x1b, 1},};
static const struct rk8xx_reg_info rk809_buck5[] = { /* buck 5 */
{ 1500000, 0, RK809_BUCK5_CONFIG(0), RK809_BUCK5_CONFIG(1), NA, RK809_BUCK5_VSEL_MASK, 0x00, },{ 1800000, 200000, RK809_BUCK5_CONFIG(0), RK809_BUCK5_CONFIG(1), NA, RK809_BUCK5_VSEL_MASK, 0x01, },{ 2800000, 200000, RK809_BUCK5_CONFIG(0), RK809_BUCK5_CONFIG(1), NA, RK809_BUCK5_VSEL_MASK, 0x04, },{ 3300000, 300000, RK809_BUCK5_CONFIG(0), RK809_BUCK5_CONFIG(1), NA, RK809_BUCK5_VSEL_MASK, 0x06, },
{ 1500000, 0, RK809_BUCK5_CONFIG(0), RK809_BUCK5_CONFIG(1), NA, RK809_BUCK5_VSEL_MASK, 0x00, 0x00, 4},{ 1800000, 200000, RK809_BUCK5_CONFIG(0), RK809_BUCK5_CONFIG(1), NA, RK809_BUCK5_VSEL_MASK, 0x01, 0x03, 4},{ 2800000, 200000, RK809_BUCK5_CONFIG(0), RK809_BUCK5_CONFIG(1), NA, RK809_BUCK5_VSEL_MASK, 0x04, 0x05, 4},{ 3300000, 300000, RK809_BUCK5_CONFIG(0), RK809_BUCK5_CONFIG(1), NA, RK809_BUCK5_VSEL_MASK, 0x06, 0x07, 4},};
static const struct rk8xx_reg_info rk817_buck[] = { /* buck 1 */
{ 500000, 12500, RK817_BUCK_ON_VSEL(1), RK817_BUCK_SLP_VSEL(1), RK817_BUCK_CONFIG(1), RK817_BUCK_VSEL_MASK, 0x00, },{ 1500000, 100000, RK817_BUCK_ON_VSEL(1), RK817_BUCK_SLP_VSEL(1), RK817_BUCK_CONFIG(1), RK817_BUCK_VSEL_MASK, 0x50, },{ 2400000, 0, RK817_BUCK_ON_VSEL(1), RK817_BUCK_SLP_VSEL(1), RK817_BUCK_CONFIG(1), RK817_BUCK_VSEL_MASK, 0x59, },
{ 500000, 12500, RK817_BUCK_ON_VSEL(1), RK817_BUCK_SLP_VSEL(1), RK817_BUCK_CONFIG(1), RK817_BUCK_VSEL_MASK, 0x00, 0x4f, 3},{ 1500000, 100000, RK817_BUCK_ON_VSEL(1), RK817_BUCK_SLP_VSEL(1), RK817_BUCK_CONFIG(1), RK817_BUCK_VSEL_MASK, 0x50, 0x58, 3},{ 2400000, 0, RK817_BUCK_ON_VSEL(1), RK817_BUCK_SLP_VSEL(1), RK817_BUCK_CONFIG(1), RK817_BUCK_VSEL_MASK, 0x59, 0x59, 3}, /* buck 2 */
{ 500000, 12500, RK817_BUCK_ON_VSEL(2), RK817_BUCK_SLP_VSEL(2), RK817_BUCK_CONFIG(2), RK817_BUCK_VSEL_MASK, 0x00, },{ 1500000, 100000, RK817_BUCK_ON_VSEL(2), RK817_BUCK_SLP_VSEL(2), RK817_BUCK_CONFIG(2), RK817_BUCK_VSEL_MASK, 0x50, },{ 2400000, 0, RK817_BUCK_ON_VSEL(2), RK817_BUCK_SLP_VSEL(2), RK817_BUCK_CONFIG(2), RK817_BUCK_VSEL_MASK, 0x59, },
{ 500000, 12500, RK817_BUCK_ON_VSEL(2), RK817_BUCK_SLP_VSEL(2), RK817_BUCK_CONFIG(2), RK817_BUCK_VSEL_MASK, 0x00, 0x4f, 3},{ 1500000, 100000, RK817_BUCK_ON_VSEL(2), RK817_BUCK_SLP_VSEL(2), RK817_BUCK_CONFIG(2), RK817_BUCK_VSEL_MASK, 0x50, 0x58, 3},{ 2400000, 0, RK817_BUCK_ON_VSEL(2), RK817_BUCK_SLP_VSEL(2), RK817_BUCK_CONFIG(2), RK817_BUCK_VSEL_MASK, 0x59, 0x59, 3}, /* buck 3 */
{ 500000, 12500, RK817_BUCK_ON_VSEL(3), RK817_BUCK_SLP_VSEL(3), RK817_BUCK_CONFIG(3), RK817_BUCK_VSEL_MASK, 0x00, },{ 1500000, 100000, RK817_BUCK_ON_VSEL(3), RK817_BUCK_SLP_VSEL(3), RK817_BUCK_CONFIG(3), RK817_BUCK_VSEL_MASK, 0x50, },{ 2400000, 0, RK817_BUCK_ON_VSEL(3), RK817_BUCK_SLP_VSEL(3), RK817_BUCK_CONFIG(3), RK817_BUCK_VSEL_MASK, 0x59, },
{ 500000, 12500, RK817_BUCK_ON_VSEL(3), RK817_BUCK_SLP_VSEL(3), RK817_BUCK_CONFIG(3), RK817_BUCK_VSEL_MASK, 0x00, 0x4f, 3},{ 1500000, 100000, RK817_BUCK_ON_VSEL(3), RK817_BUCK_SLP_VSEL(3), RK817_BUCK_CONFIG(3), RK817_BUCK_VSEL_MASK, 0x50, 0x58, 3},{ 2400000, 0, RK817_BUCK_ON_VSEL(3), RK817_BUCK_SLP_VSEL(3), RK817_BUCK_CONFIG(3), RK817_BUCK_VSEL_MASK, 0x59, 0x59, 3}, /* buck 4 */
{ 500000, 12500, RK817_BUCK_ON_VSEL(4), RK817_BUCK_SLP_VSEL(4), RK817_BUCK_CONFIG(4), RK817_BUCK_VSEL_MASK, 0x00, },{ 1500000, 100000, RK817_BUCK_ON_VSEL(4), RK817_BUCK_SLP_VSEL(4), RK817_BUCK_CONFIG(4), RK817_BUCK_VSEL_MASK, 0x50, },{ 3400000, 0, RK817_BUCK_ON_VSEL(4), RK817_BUCK_SLP_VSEL(4), RK817_BUCK_CONFIG(4), RK817_BUCK_VSEL_MASK, 0x63, },
{ 500000, 12500, RK817_BUCK_ON_VSEL(4), RK817_BUCK_SLP_VSEL(4), RK817_BUCK_CONFIG(4), RK817_BUCK_VSEL_MASK, 0x00, 0x4f, 3},{ 1500000, 100000, RK817_BUCK_ON_VSEL(4), RK817_BUCK_SLP_VSEL(4), RK817_BUCK_CONFIG(4), RK817_BUCK_VSEL_MASK, 0x50, 0x62, 3},{ 3400000, 0, RK817_BUCK_ON_VSEL(4), RK817_BUCK_SLP_VSEL(4), RK817_BUCK_CONFIG(4), RK817_BUCK_VSEL_MASK, 0x63, 0x63, 3},};
static const struct rk8xx_reg_info rk818_buck[] = {
{ 712500, 12500, REG_BUCK1_ON_VSEL, REG_BUCK1_SLP_VSEL, REG_BUCK1_CONFIG, RK818_BUCK_VSEL_MASK, },{ 712500, 12500, REG_BUCK2_ON_VSEL, REG_BUCK2_SLP_VSEL, REG_BUCK2_CONFIG, RK818_BUCK_VSEL_MASK, },{ 712500, 12500, NA, NA, REG_BUCK3_CONFIG, RK818_BUCK_VSEL_MASK, },{ 1800000, 100000, REG_BUCK4_ON_VSEL, REG_BUCK4_SLP_VSEL, REG_BUCK4_CONFIG, RK818_BUCK4_VSEL_MASK, },
{ 712500, 12500, REG_BUCK1_ON_VSEL, REG_BUCK1_SLP_VSEL, REG_BUCK1_CONFIG, RK818_BUCK_VSEL_MASK, 0x00, 0x3f, 1},{ 712500, 12500, REG_BUCK2_ON_VSEL, REG_BUCK2_SLP_VSEL, REG_BUCK2_CONFIG, RK818_BUCK_VSEL_MASK, 0x00, 0x3f, 1},{ NA, NA, NA, NA, REG_BUCK3_CONFIG, NA, NA, NA, 1},{ 1800000, 100000, REG_BUCK4_ON_VSEL, REG_BUCK4_SLP_VSEL, REG_BUCK4_CONFIG, RK818_BUCK4_VSEL_MASK, 0x00, 0x10, 1},};
#ifdef ENABLE_DRIVER @@ -706,10 +709,9 @@ static int _ldo_get_suspend_enable(struct udevice *pmic, int ldo) static int buck_get_value(struct udevice *dev) { int buck = dev->driver_data - 1;
/* We assume level-1 voltage is enough for usage in U-Boot */ const struct rk8xx_reg_info *info = get_buck_reg(dev->parent, buck, 0); int mask = info->vsel_mask;int ret, val;
int i, ret, val; if (info->vsel_reg == NA) return -ENOSYS;@@ -717,9 +719,20 @@ static int buck_get_value(struct udevice *dev) ret = pmic_reg_read(dev->parent, info->vsel_reg); if (ret < 0) return ret;
val = ret & mask;if (val >= info->min_sel && val <= info->max_sel)goto finish;
return info->min_uv + val * info->step_uv;
/* unlucky to try */for (i = 1; i < info->range_num; i++) {info++;if (val <= info->max_sel && val >= info->min_sel)break;}Can you add a comment here as to what happens when you fall through?
Sure, will try to get a better understanding and add comments in v2.
+finish:
return info->min_uv + (val - info->min_sel) * info->step_uv;}
static int buck_set_value(struct udevice *dev, int uvolt) @@ -732,10 +745,9 @@ static int buck_set_value(struct udevice *dev, int uvolt) static int buck_get_suspend_value(struct udevice *dev) { int buck = dev->driver_data - 1;
/* We assume level-1 voltage is enough for usage in U-Boot */ const struct rk8xx_reg_info *info = get_buck_reg(dev->parent, buck, 0); int mask = info->vsel_mask;int ret, val;
int i, ret, val; if (info->vsel_sleep_reg == NA) return -ENOSYS;@@ -745,8 +757,18 @@ static int buck_get_suspend_value(struct udevice *dev) return ret;
val = ret & mask;
if (val <= info->max_sel && val >= info->min_sel)goto finish;
return info->min_uv + val * info->step_uv;
/* unlucky to try */for (i = 1; i < info->range_num; i++) {info++;It seems you could drop the if() part above and just use this loop, if i started at 0 and you incremented info after the next line?
You are probably right, I only imported this commit as-is from vendor U-Boot and only fixed a missing space that was reported by checkpatch.
Without this patch some regulators would report completely wrong voltage e.g. for 1.8V it reported 1.5V and for 3.3V it reported ~1.8V. Something that completely broke the logic of the IO-domain driver.
Will try to refactor this code to reduce complexity in v2.
Regards, Jonas
if (val <= info->max_sel && val >= info->min_sel)break;}+finish:
return info->min_uv + (val - info->min_sel) * info->step_uv;}
static int buck_set_suspend_value(struct udevice *dev, int uvolt)
2.41.0
Regards, Simon
With the commit 4fcba5d556b4 ("regulator: implement basic reference counter"), keeping regulator enablement in balance become more important. Calling regulator_autoset multiple times on a fixed regulator increase the enable count for each call, resulting in an unbalanced enable count.
Introduce a AUTOSET_DONE flag and use it to mark that autoset has run for the regulator. Return -EALREADY on any subsequent call to autoset.
This fixes so that the enable count is only ever increased by one per regulator for autoset.
Fixes: 4fcba5d556b4 ("regulator: implement basic reference counter") Signed-off-by: Jonas Karlman jonas@kwiboo.se --- Cc: Svyatoslav Ryhel clamor95@gmail.com --- drivers/power/regulator/regulator-uclass.c | 18 ++++++++++++++---- include/power/regulator.h | 1 + 2 files changed, 15 insertions(+), 4 deletions(-)
diff --git a/drivers/power/regulator/regulator-uclass.c b/drivers/power/regulator/regulator-uclass.c index 3a6ba69f6d5f..77d101f262e2 100644 --- a/drivers/power/regulator/regulator-uclass.c +++ b/drivers/power/regulator/regulator-uclass.c @@ -293,6 +293,9 @@ int regulator_autoset(struct udevice *dev)
uc_pdata = dev_get_uclass_plat(dev);
+ if (uc_pdata->flags & REGULATOR_FLAG_AUTOSET_DONE) + return -EALREADY; + ret = regulator_set_suspend_enable(dev, uc_pdata->suspend_on); if (ret == -ENOSYS) ret = 0; @@ -306,11 +309,15 @@ int regulator_autoset(struct udevice *dev) return ret; }
- if (!uc_pdata->always_on && !uc_pdata->boot_on) - return -EMEDIUMTYPE; + if (!uc_pdata->always_on && !uc_pdata->boot_on) { + ret = -EMEDIUMTYPE; + goto out; + }
- if (uc_pdata->type == REGULATOR_TYPE_FIXED) - return regulator_set_enable(dev, true); + if (uc_pdata->type == REGULATOR_TYPE_FIXED) { + ret = regulator_set_enable(dev, true); + goto out; + }
if (uc_pdata->flags & REGULATOR_FLAG_AUTOSET_UV) ret = regulator_set_value(dev, uc_pdata->min_uV); @@ -322,6 +329,9 @@ int regulator_autoset(struct udevice *dev) if (!ret) ret = regulator_set_enable(dev, true);
+out: + uc_pdata->flags |= REGULATOR_FLAG_AUTOSET_DONE; + return ret; }
diff --git a/include/power/regulator.h b/include/power/regulator.h index ff1bfc2435ae..200652cb3d7a 100644 --- a/include/power/regulator.h +++ b/include/power/regulator.h @@ -134,6 +134,7 @@ struct dm_regulator_mode { enum regulator_flag { REGULATOR_FLAG_AUTOSET_UV = 1 << 0, REGULATOR_FLAG_AUTOSET_UA = 1 << 1, + REGULATOR_FLAG_AUTOSET_DONE = 1 << 2, };
/**
Port the Rockchip IO-domain driver for RK3568 from linux.
The driver auto probe after bind to configure IO-domain based on the regulator voltage. Compared to the linux driver this driver is not notified about regulator voltage changes and only configure IO-domain based on the initial voltage autoset by the regulator.
It is not recommended to enable MMC_IO_VOLTAGE or the mmc signal voltage and IO-domain may end up out of sync.
Based on the linux commit 28b05a64e47c ("soc: rockchip: io-domain: add rk3568 support").
Signed-off-by: Jonas Karlman jonas@kwiboo.se --- Cc: Jianqun Xu jay.xu@rock-chips.com Cc: Heiko Stuebner heiko@sntech.de Cc: Doug Anderson dianders@chromium.org --- drivers/misc/Kconfig | 9 ++ drivers/misc/Makefile | 1 + drivers/misc/rockchip-io-domain.c | 157 ++++++++++++++++++++++++++++++ 3 files changed, 167 insertions(+) create mode 100644 drivers/misc/rockchip-io-domain.c
diff --git a/drivers/misc/Kconfig b/drivers/misc/Kconfig index b9f5c7a37aed..d160ce693939 100644 --- a/drivers/misc/Kconfig +++ b/drivers/misc/Kconfig @@ -101,6 +101,15 @@ config ROCKCHIP_OTP addressing and a length or through child-nodes that are generated based on the e-fuse map retrieved from the DTS.
+config ROCKCHIP_IODOMAIN + bool "Rockchip IO-domain driver support" + depends on DM_REGULATOR && ARCH_ROCKCHIP + default y if ROCKCHIP_RK3568 + help + Enable support for IO-domains in Rockchip SoCs. It is necessary + for the IO-domain setting of the SoC to match the voltage supplied + by the regulators. + config SIFIVE_OTP bool "SiFive eMemory OTP driver" depends on MISC diff --git a/drivers/misc/Makefile b/drivers/misc/Makefile index fd8805f34bd9..b67b82358a6c 100644 --- a/drivers/misc/Makefile +++ b/drivers/misc/Makefile @@ -69,6 +69,7 @@ obj-$(CONFIG_SANDBOX) += qfw_sandbox.o endif obj-$(CONFIG_ROCKCHIP_EFUSE) += rockchip-efuse.o obj-$(CONFIG_ROCKCHIP_OTP) += rockchip-otp.o +obj-$(CONFIG_$(SPL_TPL_)ROCKCHIP_IODOMAIN) += rockchip-io-domain.o obj-$(CONFIG_SANDBOX) += syscon_sandbox.o misc_sandbox.o obj-$(CONFIG_SIFIVE_OTP) += sifive-otp.o obj-$(CONFIG_SMSC_LPC47M) += smsc_lpc47m.o diff --git a/drivers/misc/rockchip-io-domain.c b/drivers/misc/rockchip-io-domain.c new file mode 100644 index 000000000000..e458e3a17e2d --- /dev/null +++ b/drivers/misc/rockchip-io-domain.c @@ -0,0 +1,157 @@ +// SPDX-License-Identifier: GPL-2.0 + +#include <common.h> +#include <dm.h> +#include <dm/device_compat.h> +#include <regmap.h> +#include <syscon.h> +#include <power/regulator.h> + +#define MAX_SUPPLIES 16 + +/* + * The max voltage for 1.8V and 3.3V come from the Rockchip datasheet under + * "Recommended Operating Conditions" for "Digital GPIO". When the typical + * is 3.3V the max is 3.6V. When the typical is 1.8V the max is 1.98V. + * + * They are used like this: + * - If the voltage on a rail is above the "1.8" voltage (1.98V) we'll tell the + * SoC we're at 3.3. + * - If the voltage on a rail is above the "3.3" voltage (3.6V) we'll consider + * that to be an error. + */ +#define MAX_VOLTAGE_1_8 1980000 +#define MAX_VOLTAGE_3_3 3600000 + +#define RK3568_PMU_GRF_IO_VSEL0 (0x0140) +#define RK3568_PMU_GRF_IO_VSEL1 (0x0144) +#define RK3568_PMU_GRF_IO_VSEL2 (0x0148) + +struct rockchip_iodomain_soc_data { + int grf_offset; + const char *supply_names[MAX_SUPPLIES]; + int (*write)(struct regmap *grf, int idx, int uV); +}; + +static int rk3568_iodomain_write(struct regmap *grf, int idx, int uV) +{ + u32 is_3v3 = uV > MAX_VOLTAGE_1_8; + u32 val0, val1; + int b; + + switch (idx) { + case 0: /* pmuio1 */ + break; + case 1: /* pmuio2 */ + b = idx; + val0 = BIT(16 + b) | (is_3v3 ? 0 : BIT(b)); + b = idx + 4; + val1 = BIT(16 + b) | (is_3v3 ? BIT(b) : 0); + + regmap_write(grf, RK3568_PMU_GRF_IO_VSEL2, val0); + regmap_write(grf, RK3568_PMU_GRF_IO_VSEL2, val1); + break; + case 3: /* vccio2 */ + break; + case 2: /* vccio1 */ + case 4: /* vccio3 */ + case 5: /* vccio4 */ + case 6: /* vccio5 */ + case 7: /* vccio6 */ + case 8: /* vccio7 */ + b = idx - 1; + val0 = BIT(16 + b) | (is_3v3 ? 0 : BIT(b)); + val1 = BIT(16 + b) | (is_3v3 ? BIT(b) : 0); + + regmap_write(grf, RK3568_PMU_GRF_IO_VSEL0, val0); + regmap_write(grf, RK3568_PMU_GRF_IO_VSEL1, val1); + break; + default: + return -EINVAL; + } + + return 0; +} + +static const struct rockchip_iodomain_soc_data soc_data_rk3568_pmu = { + .grf_offset = 0x140, + .supply_names = { + NULL, + "pmuio2-supply", + "vccio1-supply", + NULL, + "vccio3-supply", + "vccio4-supply", + "vccio5-supply", + "vccio6-supply", + "vccio7-supply", + }, + .write = rk3568_iodomain_write, +}; + +static const struct udevice_id rockchip_iodomain_ids[] = { + { + .compatible = "rockchip,rk3568-pmu-io-voltage-domain", + .data = (ulong)&soc_data_rk3568_pmu, + }, + { } +}; + +static int rockchip_iodomain_bind(struct udevice *dev) +{ + dev_or_flags(dev, DM_FLAG_PROBE_AFTER_BIND); + + return 0; +} + +static int rockchip_iodomain_probe(struct udevice *dev) +{ + struct rockchip_iodomain_soc_data *soc_data = + (struct rockchip_iodomain_soc_data *)dev_get_driver_data(dev); + struct regmap *grf; + int ret; + + grf = syscon_get_regmap(dev_get_parent(dev)); + if (IS_ERR(grf)) + return PTR_ERR(grf); + + for (int i = 0; i < MAX_SUPPLIES; i++) { + const char *supply_name = soc_data->supply_names[i]; + struct udevice *reg; + int uV; + + if (!supply_name) + continue; + + ret = device_get_supply_regulator(dev, supply_name, ®); + if (ret) + continue; + + ret = regulator_autoset(reg); + if (ret && ret != -EALREADY && ret != -EMEDIUMTYPE && + ret != -ENOSYS) + continue; + + uV = regulator_get_value(reg); + if (uV <= 0) + continue; + + if (uV > MAX_VOLTAGE_3_3) { + dev_crit(dev, "%s: %d uV is too high. May damage SoC!\n", + supply_name, uV); + continue; + } + + soc_data->write(grf, i, uV); + } + + return 0; +} + +U_BOOT_DRIVER(rockchip_iodomain) = { + .name = "rockchip_iodomain", + .id = UCLASS_NOP, + .of_match = rockchip_iodomain_ids, + .bind = rockchip_iodomain_bind, + .probe = rockchip_iodomain_probe, +};
Hi Jonas,
On Sun, 6 Aug 2023 at 06:04, Jonas Karlman jonas@kwiboo.se wrote:
Port the Rockchip IO-domain driver for RK3568 from linux.
The driver auto probe after bind to configure IO-domain based on the regulator voltage. Compared to the linux driver this driver is not notified about regulator voltage changes and only configure IO-domain based on the initial voltage autoset by the regulator.
It is not recommended to enable MMC_IO_VOLTAGE or the mmc signal voltage and IO-domain may end up out of sync.
Based on the linux commit 28b05a64e47c ("soc: rockchip: io-domain: add rk3568 support").
Signed-off-by: Jonas Karlman jonas@kwiboo.se
Cc: Jianqun Xu jay.xu@rock-chips.com Cc: Heiko Stuebner heiko@sntech.de Cc: Doug Anderson dianders@chromium.org
drivers/misc/Kconfig | 9 ++ drivers/misc/Makefile | 1 + drivers/misc/rockchip-io-domain.c | 157 ++++++++++++++++++++++++++++++ 3 files changed, 167 insertions(+) create mode 100644 drivers/misc/rockchip-io-domain.c
Reviewed-by: Simon Glass sjg@chromium.org
nits below
diff --git a/drivers/misc/Kconfig b/drivers/misc/Kconfig index b9f5c7a37aed..d160ce693939 100644 --- a/drivers/misc/Kconfig +++ b/drivers/misc/Kconfig @@ -101,6 +101,15 @@ config ROCKCHIP_OTP addressing and a length or through child-nodes that are generated based on the e-fuse map retrieved from the DTS.
+config ROCKCHIP_IODOMAIN
bool "Rockchip IO-domain driver support"depends on DM_REGULATOR && ARCH_ROCKCHIPdefault y if ROCKCHIP_RK3568helpEnable support for IO-domains in Rockchip SoCs. It is necessaryfor the IO-domain setting of the SoC to match the voltage suppliedby the regulators.config SIFIVE_OTP bool "SiFive eMemory OTP driver" depends on MISC diff --git a/drivers/misc/Makefile b/drivers/misc/Makefile index fd8805f34bd9..b67b82358a6c 100644 --- a/drivers/misc/Makefile +++ b/drivers/misc/Makefile @@ -69,6 +69,7 @@ obj-$(CONFIG_SANDBOX) += qfw_sandbox.o endif obj-$(CONFIG_ROCKCHIP_EFUSE) += rockchip-efuse.o obj-$(CONFIG_ROCKCHIP_OTP) += rockchip-otp.o +obj-$(CONFIG_$(SPL_TPL_)ROCKCHIP_IODOMAIN) += rockchip-io-domain.o obj-$(CONFIG_SANDBOX) += syscon_sandbox.o misc_sandbox.o obj-$(CONFIG_SIFIVE_OTP) += sifive-otp.o obj-$(CONFIG_SMSC_LPC47M) += smsc_lpc47m.o diff --git a/drivers/misc/rockchip-io-domain.c b/drivers/misc/rockchip-io-domain.c new file mode 100644 index 000000000000..e458e3a17e2d --- /dev/null +++ b/drivers/misc/rockchip-io-domain.c @@ -0,0 +1,157 @@ +// SPDX-License-Identifier: GPL-2.0
+#include <common.h> +#include <dm.h> +#include <dm/device_compat.h> +#include <regmap.h> +#include <syscon.h> +#include <power/regulator.h>
+#define MAX_SUPPLIES 16
+/*
- The max voltage for 1.8V and 3.3V come from the Rockchip datasheet under
- "Recommended Operating Conditions" for "Digital GPIO". When the typical
- is 3.3V the max is 3.6V. When the typical is 1.8V the max is 1.98V.
- They are used like this:
- If the voltage on a rail is above the "1.8" voltage (1.98V) we'll tell the
- SoC we're at 3.3.
- If the voltage on a rail is above the "3.3" voltage (3.6V) we'll consider
- that to be an error.
- */
+#define MAX_VOLTAGE_1_8 1980000 +#define MAX_VOLTAGE_3_3 3600000
+#define RK3568_PMU_GRF_IO_VSEL0 (0x0140) +#define RK3568_PMU_GRF_IO_VSEL1 (0x0144) +#define RK3568_PMU_GRF_IO_VSEL2 (0x0148)
Drop brackets
Do we need the RK3568_ prefix?
+struct rockchip_iodomain_soc_data {
int grf_offset;const char *supply_names[MAX_SUPPLIES];int (*write)(struct regmap *grf, int idx, int uV);+};
+static int rk3568_iodomain_write(struct regmap *grf, int idx, int uV) +{
u32 is_3v3 = uV > MAX_VOLTAGE_1_8;u32 val0, val1;int b;switch (idx) {case 0: /* pmuio1 */break;case 1: /* pmuio2 */b = idx;val0 = BIT(16 + b) | (is_3v3 ? 0 : BIT(b));b = idx + 4;val1 = BIT(16 + b) | (is_3v3 ? BIT(b) : 0);regmap_write(grf, RK3568_PMU_GRF_IO_VSEL2, val0);regmap_write(grf, RK3568_PMU_GRF_IO_VSEL2, val1);break;case 3: /* vccio2 */break;case 2: /* vccio1 */case 4: /* vccio3 */case 5: /* vccio4 */case 6: /* vccio5 */case 7: /* vccio6 */case 8: /* vccio7 */b = idx - 1;val0 = BIT(16 + b) | (is_3v3 ? 0 : BIT(b));val1 = BIT(16 + b) | (is_3v3 ? BIT(b) : 0);regmap_write(grf, RK3568_PMU_GRF_IO_VSEL0, val0);regmap_write(grf, RK3568_PMU_GRF_IO_VSEL1, val1);break;default:return -EINVAL;}return 0;+}
+static const struct rockchip_iodomain_soc_data soc_data_rk3568_pmu = {
.grf_offset = 0x140,.supply_names = {NULL,"pmuio2-supply","vccio1-supply",NULL,"vccio3-supply","vccio4-supply","vccio5-supply","vccio6-supply","vccio7-supply",},.write = rk3568_iodomain_write,+};
+static const struct udevice_id rockchip_iodomain_ids[] = {
{.compatible = "rockchip,rk3568-pmu-io-voltage-domain",.data = (ulong)&soc_data_rk3568_pmu,},{ }+};
+static int rockchip_iodomain_bind(struct udevice *dev) +{
dev_or_flags(dev, DM_FLAG_PROBE_AFTER_BIND);
Why is this needed?
return 0;+}
+static int rockchip_iodomain_probe(struct udevice *dev) +{
struct rockchip_iodomain_soc_data *soc_data =(struct rockchip_iodomain_soc_data *)dev_get_driver_data(dev);struct regmap *grf;int ret;grf = syscon_get_regmap(dev_get_parent(dev));if (IS_ERR(grf))return PTR_ERR(grf);for (int i = 0; i < MAX_SUPPLIES; i++) {const char *supply_name = soc_data->supply_names[i];struct udevice *reg;int uV;if (!supply_name)continue;ret = device_get_supply_regulator(dev, supply_name, ®);if (ret)continue;ret = regulator_autoset(reg);if (ret && ret != -EALREADY && ret != -EMEDIUMTYPE &&ret != -ENOSYS)continue;uV = regulator_get_value(reg);if (uV <= 0)continue;if (uV > MAX_VOLTAGE_3_3) {dev_crit(dev, "%s: %d uV is too high. May damage SoC!\n",supply_name, uV);continue;}soc_data->write(grf, i, uV);}return 0;+}
+U_BOOT_DRIVER(rockchip_iodomain) = {
.name = "rockchip_iodomain",.id = UCLASS_NOP,
So this just exists to probe some power supplies at the start?
.of_match = rockchip_iodomain_ids,.bind = rockchip_iodomain_bind,.probe = rockchip_iodomain_probe,+};
2.41.0
Regards, Simon
Hi Simon, On 2023-08-07 03:33, Simon Glass wrote:
Hi Jonas,
On Sun, 6 Aug 2023 at 06:04, Jonas Karlman jonas@kwiboo.se wrote:
Port the Rockchip IO-domain driver for RK3568 from linux.
The driver auto probe after bind to configure IO-domain based on the regulator voltage. Compared to the linux driver this driver is not notified about regulator voltage changes and only configure IO-domain based on the initial voltage autoset by the regulator.
It is not recommended to enable MMC_IO_VOLTAGE or the mmc signal voltage and IO-domain may end up out of sync.
Based on the linux commit 28b05a64e47c ("soc: rockchip: io-domain: add rk3568 support").
Signed-off-by: Jonas Karlman jonas@kwiboo.se
Cc: Jianqun Xu jay.xu@rock-chips.com Cc: Heiko Stuebner heiko@sntech.de Cc: Doug Anderson dianders@chromium.org
drivers/misc/Kconfig | 9 ++ drivers/misc/Makefile | 1 + drivers/misc/rockchip-io-domain.c | 157 ++++++++++++++++++++++++++++++ 3 files changed, 167 insertions(+) create mode 100644 drivers/misc/rockchip-io-domain.c
Reviewed-by: Simon Glass sjg@chromium.org
nits below
diff --git a/drivers/misc/Kconfig b/drivers/misc/Kconfig index b9f5c7a37aed..d160ce693939 100644 --- a/drivers/misc/Kconfig +++ b/drivers/misc/Kconfig @@ -101,6 +101,15 @@ config ROCKCHIP_OTP addressing and a length or through child-nodes that are generated based on the e-fuse map retrieved from the DTS.
+config ROCKCHIP_IODOMAIN
bool "Rockchip IO-domain driver support"depends on DM_REGULATOR && ARCH_ROCKCHIPdefault y if ROCKCHIP_RK3568helpEnable support for IO-domains in Rockchip SoCs. It is necessaryfor the IO-domain setting of the SoC to match the voltage suppliedby the regulators.config SIFIVE_OTP bool "SiFive eMemory OTP driver" depends on MISC diff --git a/drivers/misc/Makefile b/drivers/misc/Makefile index fd8805f34bd9..b67b82358a6c 100644 --- a/drivers/misc/Makefile +++ b/drivers/misc/Makefile @@ -69,6 +69,7 @@ obj-$(CONFIG_SANDBOX) += qfw_sandbox.o endif obj-$(CONFIG_ROCKCHIP_EFUSE) += rockchip-efuse.o obj-$(CONFIG_ROCKCHIP_OTP) += rockchip-otp.o +obj-$(CONFIG_$(SPL_TPL_)ROCKCHIP_IODOMAIN) += rockchip-io-domain.o obj-$(CONFIG_SANDBOX) += syscon_sandbox.o misc_sandbox.o obj-$(CONFIG_SIFIVE_OTP) += sifive-otp.o obj-$(CONFIG_SMSC_LPC47M) += smsc_lpc47m.o diff --git a/drivers/misc/rockchip-io-domain.c b/drivers/misc/rockchip-io-domain.c new file mode 100644 index 000000000000..e458e3a17e2d --- /dev/null +++ b/drivers/misc/rockchip-io-domain.c @@ -0,0 +1,157 @@ +// SPDX-License-Identifier: GPL-2.0
+#include <common.h> +#include <dm.h> +#include <dm/device_compat.h> +#include <regmap.h> +#include <syscon.h> +#include <power/regulator.h>
+#define MAX_SUPPLIES 16
+/*
- The max voltage for 1.8V and 3.3V come from the Rockchip datasheet under
- "Recommended Operating Conditions" for "Digital GPIO". When the typical
- is 3.3V the max is 3.6V. When the typical is 1.8V the max is 1.98V.
- They are used like this:
- If the voltage on a rail is above the "1.8" voltage (1.98V) we'll tell the
- SoC we're at 3.3.
- If the voltage on a rail is above the "3.3" voltage (3.6V) we'll consider
- that to be an error.
- */
+#define MAX_VOLTAGE_1_8 1980000 +#define MAX_VOLTAGE_3_3 3600000
+#define RK3568_PMU_GRF_IO_VSEL0 (0x0140) +#define RK3568_PMU_GRF_IO_VSEL1 (0x0144) +#define RK3568_PMU_GRF_IO_VSEL2 (0x0148)
Drop brackets
Will do in a v2.
Do we need the RK3568_ prefix?
Yes, this only imports the RK3568 parts almost 1:1 from linux at this stage. Support for other SoCs should be added in the future so that we can move away from having to hard-code IO-domain settings in board init.
RockPro64 configures two IO-domains in misc_init_r, that can be dropped and would be handled by this driver once RK3399 support has been ported. https://source.denx.de/u-boot/u-boot/-/blob/master/board/pine64/rockpro64_rk...
Linux driver has support for 10 different SoCs: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/driv...
+struct rockchip_iodomain_soc_data {
int grf_offset;const char *supply_names[MAX_SUPPLIES];int (*write)(struct regmap *grf, int idx, int uV);+};
+static int rk3568_iodomain_write(struct regmap *grf, int idx, int uV) +{
u32 is_3v3 = uV > MAX_VOLTAGE_1_8;u32 val0, val1;int b;switch (idx) {case 0: /* pmuio1 */break;case 1: /* pmuio2 */b = idx;val0 = BIT(16 + b) | (is_3v3 ? 0 : BIT(b));b = idx + 4;val1 = BIT(16 + b) | (is_3v3 ? BIT(b) : 0);regmap_write(grf, RK3568_PMU_GRF_IO_VSEL2, val0);regmap_write(grf, RK3568_PMU_GRF_IO_VSEL2, val1);break;case 3: /* vccio2 */break;case 2: /* vccio1 */case 4: /* vccio3 */case 5: /* vccio4 */case 6: /* vccio5 */case 7: /* vccio6 */case 8: /* vccio7 */b = idx - 1;val0 = BIT(16 + b) | (is_3v3 ? 0 : BIT(b));val1 = BIT(16 + b) | (is_3v3 ? BIT(b) : 0);regmap_write(grf, RK3568_PMU_GRF_IO_VSEL0, val0);regmap_write(grf, RK3568_PMU_GRF_IO_VSEL1, val1);break;default:return -EINVAL;}return 0;+}
+static const struct rockchip_iodomain_soc_data soc_data_rk3568_pmu = {
.grf_offset = 0x140,.supply_names = {NULL,"pmuio2-supply","vccio1-supply",NULL,"vccio3-supply","vccio4-supply","vccio5-supply","vccio6-supply","vccio7-supply",},.write = rk3568_iodomain_write,+};
+static const struct udevice_id rockchip_iodomain_ids[] = {
{.compatible = "rockchip,rk3568-pmu-io-voltage-domain",.data = (ulong)&soc_data_rk3568_pmu,},{ }+};
+static int rockchip_iodomain_bind(struct udevice *dev) +{
dev_or_flags(dev, DM_FLAG_PROBE_AFTER_BIND);Why is this needed?
So that the driver auto probe as early as possible. Is there any other way of telling that this device must be probed? There is no real consumer of this device so lazy loading it does not work.
return 0;+}
+static int rockchip_iodomain_probe(struct udevice *dev) +{
struct rockchip_iodomain_soc_data *soc_data =(struct rockchip_iodomain_soc_data *)dev_get_driver_data(dev);struct regmap *grf;int ret;grf = syscon_get_regmap(dev_get_parent(dev));if (IS_ERR(grf))return PTR_ERR(grf);for (int i = 0; i < MAX_SUPPLIES; i++) {const char *supply_name = soc_data->supply_names[i];struct udevice *reg;int uV;if (!supply_name)continue;ret = device_get_supply_regulator(dev, supply_name, ®);if (ret)continue;ret = regulator_autoset(reg);if (ret && ret != -EALREADY && ret != -EMEDIUMTYPE &&ret != -ENOSYS)continue;uV = regulator_get_value(reg);if (uV <= 0)continue;if (uV > MAX_VOLTAGE_3_3) {dev_crit(dev, "%s: %d uV is too high. May damage SoC!\n",supply_name, uV);continue;}soc_data->write(grf, i, uV);}return 0;+}
+U_BOOT_DRIVER(rockchip_iodomain) = {
.name = "rockchip_iodomain",.id = UCLASS_NOP,So this just exists to probe some power supplies at the start?
No, it exists to configure the different VCCIO-domains in 1.8V or 3.3V mode to match the voltage of the input supply of a IO-domain. In order to do that it needs to probe each IO-domains input supply regulator.
To quote from a reference schematics [1] for RK3568:
When the IO domain power supply voltage is 1.8V, the IO domain voltage configuration in DTS must be set to 1.8V mode. If it is misconfigured to 3.3V mode, the IO function of this power domain will be abnormally;
When the IO domain power supply voltage is 3.3V, the IO domain voltage configuration in DTS must be set to 3.3V mode. If it is misconfigured to 1.8V mode, the IO in this power domain will be in overvoltage state, and the IO will be damaged after long-term operation.
On RK3568 an issue with ethernet was observed, TX packages would not reach the network, yet RX packages was received. Turned out that the VCCIO-domain was default configured in 3.3V, and input supply provided and PHY expected 1.8V.
[1] http://opensource.rock-chips.com/images/5/56/RK3568_hardware_reference_20220...
Regards, Jonas
.of_match = rockchip_iodomain_ids,.bind = rockchip_iodomain_bind,.probe = rockchip_iodomain_probe,+};
2.41.0
Regards, Simon
participants (2)
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Jonas Karlman -
Simon Glass